BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: AM65xx_DRA80xM

--  Created by    : Texas Instruments Incorporated                           --
--  BSDL Revision : 1.2                                                      --
--                                                                           --
--  BSDL Status   : Initial Release                                          --
--  Date Created  : Jan 18 2019                                              --
--                                                                           --
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--                                                                           --
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--  at the time of sale in accordance with TI's standard warranty. Testing   --
--  and other quality control techniques are utilized to the extent TI deems --
--  necessary to support this warranty. Specific testing of all parameters   --
--  of each device is not necessarily performed, except those mandated by    --
--  government requirements.                                                 --
--                                                                           --
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--  adequate design and operating safeguards must be provided by the         --
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--                                                                           --
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--  responsible nor liable for any such use.                                 --
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--                                                                           --
--  Rev 1.2 Updated pin names to match the data manual                       --
--                                                                           --
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--  Products. www.ti.com/sc/docs/stdterms.htm                                --
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--  Mailing Address:                                                         --
--                                                                           --
--             Texas Instruments                                             --
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--             Dallas, Texas 75265                                           --
--                                                                           --
--             Copyright � 2016, Texas Instruments Incorporated              --
-- ------------------------------------------------------------------------- --
--                                                                           --
--  BSDL mode for AM65x can be used for the AM6548, AM6546, AM6528, AM6527,  --
--  AM6526, DRA804M and DRA802M components.                                  --
--                                                                           --
-- ------------------------------------------------------------------------- --

entity AM65xx_DRA80xM is

 generic(PHYSICAL_PIN_MAP : string := "CCC");

 port(
     RSV2                : linkage   	bit;
     RSV3                : linkage   	bit;
     RSV4                : linkage   	bit;
     CSI0_RXN0      	 : linkage    	bit;
     CSI0_RXN1      	 : linkage    	bit;
     CSI0_RXN2      	 : linkage    	bit;
     CSI0_RXN3      	 : linkage    	bit;
     CSI0_RXN4      	 : linkage    	bit;
     CSI0_RXP0      	 : linkage     	bit;
     CSI0_RXP1      	 : linkage     	bit;
     CSI0_RXP2      	 : linkage    	bit;
     CSI0_RXP3      	 : linkage     	bit;
     CSI0_RXP4      	 : linkage    	bit;
     DDR_AC0             : inout     	bit;
     DDR_AC1             : inout     	bit;
     DDR_AC10            : inout     	bit;
     DDR_AC11            : inout     	bit;
     DDR_AC12            : inout     	bit;
     DDR_AC13            : inout     	bit;
     DDR_AC14            : inout     	bit;
     DDR_AC15            : inout     	bit;
     DDR_AC16            : inout     	bit;
     DDR_AC17            : inout     	bit;
     DDR_AC18            : inout     	bit;
     DDR_AC19            : inout     	bit;
     DDR_AC2             : inout     	bit;
     DDR_AC20            : inout     	bit;
     DDR_AC21            : inout     	bit;
     DDR_AC22            : inout     	bit;
     DDR_AC23            : inout     	bit;
     DDR_AC24            : inout     	bit;
     DDR_AC25            : inout     	bit;
     DDR_AC26            : inout     	bit;
     DDR_AC27            : inout     	bit;
     DDR_AC28            : inout     	bit;
     DDR_AC29            : inout     	bit;
     DDR_AC3             : inout     	bit;
     DDR_AC4             : inout     	bit;
     DDR_AC5             : inout     	bit;
     DDR_AC6             : inout     	bit;
     DDR_AC7             : inout     	bit;
     DDR_AC8             : inout     	bit;
     DDR_AC9             : inout     	bit;
     DDR_ALERTn          : inout     	bit;
     RSV5                : linkage   	bit;
     DDR_CK0P            : inout        bit; 
     DDR_CK0N            : inout        bit; 
     DDR_CK1P            : inout        bit; 
     DDR_CK1N            : inout        bit; 
     DDR_DQ0             : inout     	bit;
     DDR_DQ1             : inout     	bit;
     DDR_DQ9             : inout     	bit;
     DDR_DQ10            : inout     	bit;
     DDR_DQ11            : inout     	bit;
     DDR_DQ12            : inout     	bit;
     DDR_DQ13            : inout     	bit;
     DDR_DQ14            : inout     	bit;
     DDR_DQ15            : inout     	bit;
     DDR_DM1             : inout     	bit;
     DDR_DQ16            : inout     	bit;
     DDR_DQ17            : inout     	bit;
     DDR_DQ2             : inout     	bit;
     DDR_DQ18            : inout     	bit;
     DDR_DQ19            : inout     	bit;
     DDR_DQ20            : inout     	bit;
     DDR_DQ21            : inout     	bit;
     DDR_DQ22            : inout     	bit;
     DDR_DQ23            : inout     	bit;
     DDR_DM2             : inout     	bit;
     DDR_DQ24            : inout     	bit;
     DDR_DQ25            : inout     	bit;
     DDR_DQ26            : inout     	bit;
     DDR_DQ3             : inout     	bit;
     DDR_DQ27            : inout     	bit;
     DDR_DQ28            : inout     	bit;
     DDR_DQ29            : inout     	bit;
     DDR_DQ30            : inout     	bit;
     DDR_DQ31            : inout     	bit;
     DDR_DM3             : inout     	bit;
     DDR_ECC_D0          : inout     	bit;
     DDR_ECC_D1          : inout     	bit;
     DDR_ECC_D2          : inout     	bit;
     DDR_ECC_D3          : inout     	bit;
     DDR_DQ4             : inout     	bit;
     DDR_ECC_D4          : inout     	bit;
     DDR_ECC_D5          : inout     	bit;
     DDR_ECC_D6          : inout     	bit;
     DDR_ECC_DM          : inout     	bit;
     DDR_DQ5             : inout     	bit;
     DDR_DQ6             : inout     	bit;
     DDR_DQ7             : inout     	bit;
     DDR_DM0             : inout     	bit;
     DDR_DQ8             : inout     	bit;
     DDR_DQS0P           : inout     	bit;
     DDR_DQS0N           : inout     	bit;
     DDR_DQS1P           : inout     	bit;
     DDR_DQS1N           : inout     	bit;
     DDR_DQS2P           : inout     	bit;
     DDR_DQS2N           : inout     	bit;
     DDR_DQS3P           : inout     	bit;
     DDR_DQS3N           : inout     	bit;
     DDR_ECC_DQSP        : inout     	bit;
     DDR_ECC_DQSN        : inout     	bit;
     RSV6                : inout     	bit;
     RSV7                : inout     	bit;
     DDR_FS_RESETn       : linkage     	bit;  
     DDR_RESETn          : inout     	bit;
     DDR_VREF0           : linkage   	bit;
     DDR_VREF_ZQ         : linkage   	bit;
     DDR_VTP             : linkage   	bit;
     ECAP0_IN_APWM_OUT   : inout     	bit;
     EXT_REFCLK1         : inout     	bit;
     GPMC0_AD0           : inout     	bit;
     GPMC0_AD1           : inout     	bit;
     GPMC0_AD10          : inout     	bit;
     GPMC0_AD11          : inout     	bit;
     GPMC0_AD12          : inout     	bit;
     GPMC0_AD13          : inout     	bit;
     GPMC0_AD14          : inout     	bit;
     GPMC0_AD15          : inout     	bit;
     GPMC0_AD2           : inout     	bit;
     GPMC0_AD3           : inout     	bit;
     GPMC0_AD4           : inout     	bit;
     GPMC0_AD5           : inout     	bit;
     GPMC0_AD6           : inout     	bit;
     GPMC0_AD7           : inout     	bit;
     GPMC0_AD8           : inout     	bit;
     GPMC0_AD9           : inout     	bit;
     GPMC0_ADVn_ALE      : inout     	bit;
     GPMC0_BE0n_CLE      : inout     	bit;
     GPMC0_BE1n          : inout     	bit;
     GPMC0_CLK           : inout     	bit;
     GPMC0_CSn0          : inout     	bit;
     GPMC0_CSn1          : inout     	bit;
     GPMC0_CSn2          : inout     	bit;
     GPMC0_CSn3          : inout     	bit;
     GPMC0_DIR           : inout     	bit;
     GPMC0_OEn_REn       : inout     	bit;
     GPMC0_WAIT0         : inout     	bit;
     GPMC0_WAIT1         : inout     	bit;
     GPMC0_WEn           : inout     	bit;
     GPMC0_WPn           : inout     	bit;
     RSV10               : linkage   	bit;
     MCU_ADC0_AIN0       : linkage   	bit;
     MCU_ADC0_AIN1       : linkage   	bit;
     MCU_ADC0_AIN2       : linkage   	bit;
     MCU_ADC0_AIN3       : linkage   	bit;
     MCU_ADC0_AIN4       : linkage   	bit;
     MCU_ADC0_AIN5       : linkage   	bit;
     MCU_ADC0_AIN6       : linkage   	bit;
     MCU_ADC0_AIN7       : linkage   	bit;
     MCU_ADC0_REFN       : linkage   	bit;
     MCU_ADC0_REFP       : linkage   	bit;
     MCU_ADC1_AIN0       : linkage   	bit;
     MCU_ADC1_AIN1       : linkage   	bit;
     MCU_ADC1_AIN2       : linkage   	bit;
     MCU_ADC1_AIN3       : linkage   	bit;
     MCU_ADC1_AIN4       : linkage   	bit;
     MCU_ADC1_AIN5       : linkage   	bit;
     MCU_ADC1_AIN6       : linkage   	bit;
     MCU_ADC1_AIN7       : linkage   	bit;
     MCU_ADC1_REFN       : linkage   	bit;
     MCU_ADC1_REFP       : linkage   	bit;
     MCU_BYP_POR         : in	     	bit; 
     MCU_MCAN0_RX        : inout     	bit;
     MCU_MCAN0_TX        : inout     	bit;
     MCU_MDIO0_MDC       : inout     	bit;
     MCU_MDIO0_MDIO      : inout     	bit;
     MCU_OSPI0_CLK       : inout     	bit;
     MCU_OSPI0_CSn0      : inout     	bit;
     MCU_OSPI0_CSn1      : inout     	bit;
     MCU_OSPI0_D0        : inout     	bit;
     MCU_OSPI0_D1        : inout     	bit;
     MCU_OSPI0_D2        : inout     	bit;
     MCU_OSPI0_D3        : inout     	bit;
     MCU_OSPI0_D4        : inout     	bit;
     MCU_OSPI0_D5        : inout     	bit;
     MCU_OSPI0_D6        : inout     	bit;
     MCU_OSPI0_D7        : inout     	bit;
     MCU_OSPI0_DQS       : inout     	bit;
     MCU_OSPI0_LBCLKO    : inout     	bit;
     MCU_OSPI1_CLK       : inout     	bit;
     MCU_OSPI1_CSn0      : inout     	bit;
     MCU_OSPI1_CSn1      : inout     	bit;
     MCU_OSPI1_D0        : inout     	bit;
     MCU_OSPI1_D1        : inout     	bit;
     MCU_OSPI1_D2        : inout     	bit;
     MCU_OSPI1_D3        : inout     	bit;
     MCU_OSPI1_DQS       : inout     	bit;
     MCU_OSPI1_LBCLKO    : inout     	bit;
     MCU_PORz            : in        	bit;
     MCU_PORz_OUT        : inout     	bit;
     MCU_RESETSTATz      : inout     	bit;
     MCU_RESETz          : in	     	bit; 
     MCU_RGMII1_RXC      : inout     	bit;
     MCU_RGMII1_RX_CTL   : inout     	bit;
     MCU_RGMII1_RD0      : inout     	bit;
     MCU_RGMII1_RD1      : inout     	bit;
     MCU_RGMII1_RD2      : inout     	bit;
     MCU_RGMII1_RD3      : inout     	bit;
     MCU_RGMII1_TXC      : inout     	bit;
     MCU_RGMII1_TX_CTL   : inout     	bit;
     MCU_RGMII1_TD0      : inout     	bit;
     MCU_RGMII1_TD1      : inout     	bit;
     MCU_RGMII1_TD2      : inout     	bit;
     MCU_RGMII1_TD3      : inout     	bit;
     MCU_SAFETY_ERRORn   : inout     	bit;
     MCU_I2C0_SCL        : inout     	bit;
     MCU_I2C0_SDA        : inout     	bit;
     MCU_SPI0_CLK        : inout     	bit;
     MCU_SPI0_D0         : inout     	bit;
     MCU_SPI0_D1         : inout     	bit;
     MCU_SPI0_CS0        : inout     	bit;
     MCU_TEST_POR        : in  	     	bit; 
     MMC0_CALPAD         : linkage   	bit;
     MMC0_CLK            : linkage	bit; 
     MMC0_CMD            : linkage     	bit;
     MMC0_DAT0           : linkage     	bit;
     MMC0_DAT1           : linkage     	bit;
     MMC0_DAT2           : linkage     	bit;
     MMC0_DAT3           : linkage     	bit;
     MMC0_DAT4           : linkage     	bit;
     MMC0_DAT5           : linkage     	bit;
     MMC0_DAT6           : linkage     	bit;
     MMC0_DAT7           : linkage     	bit;
     MMC0_DS             : linkage	bit; 
     MMC0_SDCD           : linkage     	bit;
     MMC0_SDWP           : linkage     	bit;
     RSV12               : linkage   	bit;
     MMC1_CALPAD         : linkage   	bit;
     MMC1_CLK            : linkage     	bit; 
     MMC1_CMD            : linkage     	bit;
     MMC1_DAT0           : linkage     	bit;
     MMC1_DAT1           : linkage     	bit;
     MMC1_DAT2           : linkage     	bit;
     MMC1_DAT3           : linkage     	bit;
     MMC1_SDCD           : linkage     	bit;
     MMC1_SDWP           : linkage     	bit;
     RSV13               : linkage   	bit;
     NMIn                : inout     	bit;
     OLDI0_CLKP          : linkage	bit; 
     OLDI0_CLKN          : linkage	bit;
     OLDI0_A0P           : linkage     	bit;
     OLDI0_A0N           : linkage	bit;
     OLDI0_A1P           : linkage     	bit;
     OLDI0_A1N           : linkage	bit;
     OLDI0_A2P           : linkage     	bit;
     OLDI0_A2N           : linkage	bit;
     OLDI0_A3P           : linkage     	bit;
     OLDI0_A3N           : linkage	bit;
     OSC1_XI             : linkage   	bit;
     OSC1_XO             : linkage   	bit;
     RSV9                : linkage   	bit;
     SERDES1_REFCLKN     : linkage   	bit;
     SERDES1_REFCLKP     : linkage   	bit;
     SERDES1_REFRES      : linkage   	bit;
     SERDES1_RXN0        : linkage      bit; 
     SERDES1_RXP0        : linkage      bit; 
     SERDES1_TXN0        : linkage      bit; 
     SERDES1_TXP0        : linkage      bit; 
     PMIC_POWER_EN0      : inout     	bit;
     PMIC_POWER_EN1      : inout     	bit;
     PORz                : in        	bit;
     PORz_OUT            : inout     	bit;
     PRG0_MDIO0_MDIO     : inout     	bit;
     PRG0_MDIO0_MDC      : inout     	bit;
     PRG0_PRU0_GPO0      : inout     	bit;
     PRG0_PRU0_GPO1      : inout     	bit;
     PRG0_PRU0_GPO10     : inout     	bit;
     PRG0_PRU0_GPO11     : inout     	bit;
     PRG0_PRU0_GPO12     : inout     	bit;
     PRG0_PRU0_GPO13     : inout     	bit;
     PRG0_PRU0_GPO14     : inout     	bit;
     PRG0_PRU0_GPO15     : inout     	bit;
     PRG0_PRU0_GPO16     : inout     	bit;
     PRG0_PRU0_GPO17     : inout     	bit;
     PRG0_PRU0_GPO18     : inout     	bit;
     PRG0_PRU0_GPO19     : inout     	bit;
     PRG0_PRU0_GPO2      : inout     	bit;
     PRG0_PRU0_GPO3      : inout     	bit;
     PRG0_PRU0_GPO4      : inout     	bit;
     PRG0_PRU0_GPO5      : inout     	bit;
     PRG0_PRU0_GPO6      : inout     	bit;
     PRG0_PRU0_GPO7      : inout     	bit;
     PRG0_PRU0_GPO8      : inout     	bit;
     PRG0_PRU0_GPO9      : inout     	bit;
     PRG0_PRU1_GPO0      : inout     	bit;
     PRG0_PRU1_GPO1      : inout     	bit;
     PRG0_PRU1_GPO10     : inout     	bit;
     PRG0_PRU1_GPO11     : inout     	bit;
     PRG0_PRU1_GPO12     : inout     	bit;
     PRG0_PRU1_GPO13     : inout     	bit;
     PRG0_PRU1_GPO14     : inout     	bit;
     PRG0_PRU1_GPO15     : inout     	bit;
     PRG0_PRU1_GPO16     : inout     	bit;
     PRG0_PRU1_GPO17     : inout     	bit;
     PRG0_PRU1_GPO18     : inout     	bit;
     PRG0_PRU1_GPO19     : inout     	bit;
     PRG0_PRU1_GPO2      : inout     	bit;
     PRG0_PRU1_GPO3      : inout     	bit;
     PRG0_PRU1_GPO4      : inout     	bit;
     PRG0_PRU1_GPO5      : inout     	bit;
     PRG0_PRU1_GPO6      : inout     	bit;
     PRG0_PRU1_GPO7      : inout     	bit;
     PRG0_PRU1_GPO8      : inout     	bit;
     PRG0_PRU1_GPO9      : inout     	bit;
     PRG1_MDIO0_MDIO     : inout     	bit;
     PRG1_MDIO0_MDC      : inout     	bit;
     PRG1_PRU0_GPO0      : inout     	bit;
     PRG1_PRU0_GPO1      : inout     	bit;
     PRG1_PRU0_GPO10     : inout     	bit;
     PRG1_PRU0_GPO11     : inout     	bit;
     PRG1_PRU0_GPO12     : inout     	bit;
     PRG1_PRU0_GPO13     : inout     	bit;
     PRG1_PRU0_GPO14     : inout     	bit;
     PRG1_PRU0_GPO15     : inout     	bit;
     PRG1_PRU0_GPO16     : inout     	bit;
     PRG1_PRU0_GPO17     : inout     	bit;
     PRG1_PRU0_GPO18     : inout     	bit;
     PRG1_PRU0_GPO19     : inout     	bit;
     PRG1_PRU0_GPO2      : inout     	bit;
     PRG1_PRU0_GPO3      : inout     	bit;
     PRG1_PRU0_GPO4      : inout     	bit;
     PRG1_PRU0_GPO5      : inout     	bit;
     PRG1_PRU0_GPO6      : inout     	bit;
     PRG1_PRU0_GPO7      : inout     	bit;
     PRG1_PRU0_GPO8      : inout     	bit;
     PRG1_PRU0_GPO9      : inout     	bit;
     PRG1_PRU1_GPO0      : inout     	bit;
     PRG1_PRU1_GPO1      : inout     	bit;
     PRG1_PRU1_GPO10     : inout     	bit;
     PRG1_PRU1_GPO11     : inout     	bit;
     PRG1_PRU1_GPO12     : inout     	bit;
     PRG1_PRU1_GPO13     : inout     	bit;
     PRG1_PRU1_GPO14     : inout     	bit;
     PRG1_PRU1_GPO15     : inout     	bit;
     PRG1_PRU1_GPO16     : inout     	bit;
     PRG1_PRU1_GPO17     : inout     	bit;
     PRG1_PRU1_GPO18     : inout     	bit;
     PRG1_PRU1_GPO19     : inout     	bit;
     PRG1_PRU1_GPO2      : inout     	bit;
     PRG1_PRU1_GPO3      : inout     	bit;
     PRG1_PRU1_GPO4      : inout     	bit;
     PRG1_PRU1_GPO5      : inout     	bit;
     PRG1_PRU1_GPO6      : inout     	bit;
     PRG1_PRU1_GPO7      : inout     	bit;
     PRG1_PRU1_GPO8      : inout     	bit;
     PRG1_PRU1_GPO9      : inout     	bit;
     PRG2_PRU0_GPO0      : inout     	bit;
     PRG2_PRU0_GPO1      : inout     	bit;
     PRG2_PRU0_GPO10     : inout     	bit;
     PRG2_PRU0_GPO11     : inout     	bit;
     PRG2_PRU0_GPO16     : inout     	bit;
     PRG2_PRU0_GPO2      : inout     	bit;
     PRG2_PRU0_GPO3      : inout     	bit;
     PRG2_PRU0_GPO4      : inout     	bit;
     PRG2_PRU0_GPO5      : inout     	bit;
     PRG2_PRU0_GPO6      : inout     	bit;
     PRG2_PRU0_GPO7      : inout     	bit;
     PRG2_PRU0_GPO8      : inout     	bit;
     PRG2_PRU0_GPO9      : inout     	bit;
     PRG2_PRU1_GPO0      : inout     	bit;
     PRG2_PRU1_GPO1      : inout     	bit;
     PRG2_PRU1_GPO10     : inout     	bit;
     PRG2_PRU1_GPO11     : inout     	bit;
     PRG2_PRU1_GPO16     : inout     	bit;
     PRG2_PRU1_GPO2      : inout     	bit;
     PRG2_PRU1_GPO3      : inout     	bit;
     PRG2_PRU1_GPO4      : inout     	bit;
     PRG2_PRU1_GPO5      : inout     	bit;
     PRG2_PRU1_GPO6      : inout     	bit;
     PRG2_PRU1_GPO7      : inout     	bit;
     PRG2_PRU1_GPO8      : inout     	bit;
     PRG2_PRU1_GPO9      : inout     	bit;
     REFCLK0N            : linkage     	bit;
     REFCLK0P            : linkage   	bit;
     REFCLK1N            : linkage   	bit;
     REFCLK1P            : linkage   	bit;
     RESETSTATz          : inout     	bit;
     RESETz              : in        	bit;
     I2C0_SCL            : inout     	bit;
     I2C1_SCL            : inout     	bit;
     I2C0_SDA            : inout     	bit;
     I2C1_SDA            : inout     	bit;
     SOC_SAFETY_ERRORn   : inout     	bit;
     SPI0_CLK            : inout     	bit;
     SPI0_D0             : inout     	bit;
     SPI0_D1             : inout     	bit;
     SPI0_CS0            : inout     	bit;
     SPI0_CS1            : inout     	bit;
     SPI1_CLK            : inout     	bit;
     SPI1_D0             : inout     	bit;
     SPI1_D1             : inout     	bit;
     SPI1_CS0            : inout     	bit;
     SPI1_CS1            : inout     	bit;
     TDI                 : in        	bit;
     TDO                 : out       	bit;
     TEMP_DIODE_P        : linkage   	bit;
     TIMER_IO0           : inout     	bit;
     TIMER_IO1           : inout     	bit;
     TMS                 : in        	bit;
     UART0_CTSn          : inout     	bit;
     UART0_RTSn          : inout     	bit;
     UART0_RXD           : inout     	bit;
     UART0_TXD           : inout     	bit;
     RSV8                : linkage   	bit;
     USB0_DM             : linkage   	bit;
     USB0_DP             : linkage   	bit;
     USB0_DRVVBUS        : inout	bit;
     USB0_ID             : linkage   	bit;
     SERDES0_REFCLKN     : linkage   	bit;
     SERDES0_REFCLKP     : linkage   	bit;
     SERDES0_REFRES      : linkage   	bit;
     SERDES0_RXN         : linkage      bit;
     SERDES0_RXP         : linkage      bit;
     SERDES0_TXN         : linkage      bit;
     SERDES0_TXP         : linkage      bit;
     USB0_VBUS           : linkage   	bit;
     USB1_DM             : linkage   	bit;
     USB1_DP             : linkage   	bit;
     USB1_DRVVBUS        : inout	bit;
     USB1_ID             : linkage   	bit;
     USB1_VBUS           : linkage   	bit;
     RSV11               : linkage   	bit;
     EMU0          	 : in	     	bit;
     EMU1          	 : in	     	bit;
     WKUP_GPIO0_0        : inout     	bit;
     WKUP_GPIO0_1        : inout     	bit;
     WKUP_GPIO0_10       : inout     	bit;
     WKUP_GPIO0_11       : inout     	bit;
     WKUP_GPIO0_2        : inout     	bit;
     WKUP_GPIO0_3        : inout     	bit;
     WKUP_GPIO0_4        : inout     	bit;
     WKUP_GPIO0_5        : inout     	bit;
     WKUP_GPIO0_6        : inout     	bit;
     WKUP_GPIO0_7        : inout     	bit;
     WKUP_GPIO0_8        : inout     	bit;
     WKUP_GPIO0_9        : inout     	bit;
     WKUP_LFOSC0_XI      : linkage   	bit;
     WKUP_LFOSC0_XO      : linkage   	bit;
     WKUP_OSC0_XI        : linkage   	bit;
     WKUP_OSC0_XO        : linkage   	bit;
     WKUP_I2C0_SCL       : inout     	bit;
     WKUP_I2C0_SDA       : inout     	bit;
     TCK                 : in        	bit;
     TRSTn               : in        	bit;
     WKUP_UART0_RXD      : inout     	bit;
     WKUP_UART0_TXD      : inout     	bit;
     VDD		 : linkage      bit_vector(31 downto 0);
     VSS		 : linkage      bit_vector(169 downto 0);
     VDDA_PLL1_DDR	 : linkage      bit;
     VDDA_1P8_MON0    	 :  linkage     bit;
     VDDA_1P8_MON_WKUP   :  linkage     bit;
     VDDA_3P3_IOLDO0     :  linkage     bit;
     VDDA_3P3_IOLDO1     :  linkage     bit;
     VDDA_3P3_IOLDO_WKUP :  linkage     bit;
     VDDA_3P3_SDIO    	 :  linkage     bit;
     VDDA_3P3_MON0   	 :  linkage     bit;
     VDDA_3P3_USB	 :  linkage     bit;
     VDDA_3P3_MON_WKUP   :  linkage     bit;
     VDDA_SRAM_CORE0   	 :  linkage     bit;
     VDDA_SRAM_CORE1   	 :  linkage     bit;
     VDDA_ADC_MCU	 :  linkage     bit_vector(1 downto 0);
     VDDA_SRAM_MPU0	 :  linkage     bit;
     VDDA_SRAM_MPU1	 :  linkage     bit;
     VDDA_PLL_MPU0	 :  linkage     bit;
     VDDA_PLL_MPU1	 :  linkage     bit;
     VDDA_PLL0_DDR 	 :  linkage     bit;
     VDDA_PLL_DSS 	 :  linkage     bit;
     VDDA_PLL_CORE 	 :  linkage     bit;
     VDDA_PLL_PER0 	 :  linkage     bit;
     VDDA_VSYS_MON   	 :  linkage     bit;
     VDDA_LDO_WKUP 	 :  linkage     bit;
     VDDA_POR_WKUP 	 :  linkage     bit;
     VDDA_1P8_SDIO 	 :  linkage     bit;
     VDDS8   		 :  linkage     bit;
     VDDA_1P8_SERDES0	 :  linkage     bit_vector(2 downto 0);
     VDDA_MCU		 :  linkage     bit;
     VDDA_WKUP		 :  linkage     bit;
     VDDSHV0 		 :  linkage     bit_vector(1 downto 0);
     VDDSHV1 		 :  linkage     bit_vector(1 downto 0);
     VDDSHV2 		 :  linkage     bit_vector(4 downto 0);
     VDDSHV3 		 :  linkage     bit_vector(4 downto 0);
     VDDSHV4 		 :  linkage     bit_vector(4 downto 0);
     VDDSHV5 		 :  linkage     bit_vector(3 downto 0);
     VDDSHV6 		 :  linkage     bit_vector(2 downto 0);
     VDDSHV7 		 :  linkage     bit_vector(2 downto 0);
     VDDSHV8    	 :  linkage     bit;
     VDDSHV2_WKUP        :  linkage     bit_vector(2 downto 0);
     VDDSHV1_WKUP        :  linkage     bit_vector(2 downto 0);	  
     VDDSHV0_WKUP        :  linkage     bit_vector(3 downto 0);	  
     VDDS_DDR		 :  linkage     bit_vector(5 downto 0);							       
     VDDS0      	 :  linkage     bit;	
     VDDS1	   	 :  linkage     bit;
     VDDA_1P8_CSI0	 :  linkage     bit_vector(1 downto 0);
     VDDS2   		 :  linkage     bit;
     VDDS6	       	 :  linkage     bit;
     VDDS7	       	 :  linkage     bit;
     VDDA_1P8_OLDI0  	 :  linkage     bit;
     VDDS3	         :  linkage     bit;
     VDDS4	         :  linkage     bit;
     VDDS5	         :  linkage     bit;
     VDDS_OSC0  	 :  linkage     bit;
     VDDS2_WKUP  	 :  linkage     bit;
     VDDS1_WKUP   	 :  linkage     bit;
     VDDS0_WKUP 	 :  linkage     bit;
     VDD_MCU 		 :  linkage     bit_vector(4 downto 0);
     VDD_MPU0 		 :  linkage     bit_vector(4 downto 0);
     VDD_MPU1 		 :  linkage     bit_vector(5 downto 0);
     VDD_WKUP1		 :  linkage     bit;
     VDD_WKUP0		 :  linkage     bit_vector(2 downto 0);
     VPP_CORE   	 :  linkage     bit;
     VPP_MCU    	 :  linkage     bit
        );


 use STD_1149_1_2001.all;

 attribute COMPONENT_CONFORMANCE of AM65xx_DRA80xM : entity is "STD_1149_1_2001";

 attribute PIN_MAP of AM65xx_DRA80xM: entity is PHYSICAL_PIN_MAP;
 constant CCC : PIN_MAP_STRING :=
	"RSV2                :      AA6," &
	"RSV3                :      B1," &
	"RSV4		     :      AC23," &
	"CSI0_RXN0           :      G28," &
	"CSI0_RXN1           :      H27," &
	"CSI0_RXN2           :      F26," &
	"CSI0_RXN3           :      H25," &
	"CSI0_RXN4           :      G24," &
	"CSI0_RXP0           :      F28," &
	"CSI0_RXP1           :      G27," &
	"CSI0_RXP2           :      G26," &
	"CSI0_RXP3           :      G25," &
	"CSI0_RXP4           :      F24," &
	"DDR_AC0             :      A10," &
	"DDR_AC1             :      D9," &
	"DDR_AC10            :      E7," &
	"DDR_AC11            :      A6," &
	"DDR_AC12            :      F7," &
	"DDR_AC13            :      D6," &
	"DDR_AC14            :      C6," &
	"DDR_AC15            :      F6," &
	"DDR_AC16            :      E6," &
	"DDR_AC17            :      E5," &
	"DDR_AC18            :      D8," &
	"DDR_AC19            :      D10," &
	"DDR_AC2             :      C9," &
	"DDR_AC20            :      E10," &
	"DDR_AC21            :      C10," &
	"DDR_AC22            :      F11," &
	"DDR_AC23            :      B10," &
	"DDR_AC24            :      D11," &
	"DDR_AC25            :      B11," &
	"DDR_AC26            :      C11," &
	"DDR_AC27            :      E11," &
	"DDR_AC28            :      E12," &
	"DDR_AC29            :      D12," &
	"DDR_AC3             :      E9," &
	"DDR_AC4             :      A9," &
	"DDR_AC5             :      E8," &
	"DDR_AC6             :      F8," &
	"DDR_AC7             :      C7," &
	"DDR_AC8             :      C8," &
	"DDR_AC9             :      D7," &
	"DDR_ALERTn          :      D5," &
	"RSV5	             :      C12," &
	"DDR_CK0P            :      A8," &
	"DDR_CK0N            :      B8," &
	"DDR_CK1P            :      A7," &
	"DDR_CK1N            :      B7," &
	"DDR_DQ0             :      A3," &
	"DDR_DQ1             :      B2," &
	"DDR_DQ9             :      C3," &
	"DDR_DQ10            :      D3," &
	"DDR_DQ11            :      B3," &
	"DDR_DQ12            :      D4," &
	"DDR_DQ13            :      C4," &
	"DDR_DQ14            :      B4," &
	"DDR_DQ15            :      B5," &
	"DDR_DM1             :      C5," &
	"DDR_DQ16            :      E13," &
	"DDR_DQ17            :      C14," &
	"DDR_DQ2             :      C2," &
	"DDR_DQ18            :      B14," &
	"DDR_DQ19            :      A14," &
	"DDR_DQ20            :      E14," &
	"DDR_DQ21            :      B13," &
	"DDR_DQ22            :      C13," &
	"DDR_DQ23            :      D13," &
	"DDR_DM2             :      D14," &
	"DDR_DQ24            :      D15," &
	"DDR_DQ25            :      C15," &
	"DDR_DQ26            :      E16," &
	"DDR_DQ3             :      D2," &
	"DDR_DQ27            :      E15," &
	"DDR_DQ28            :      D16," &
	"DDR_DQ29            :      B16," &
	"DDR_DQ30            :      C16," &
	"DDR_DQ31            :      A17," &
	"DDR_DM3             :      B17," &
	"DDR_ECC_D0          :      B19," &
	"DDR_ECC_D1          :      B18," &
	"DDR_ECC_D2          :      C18," &
	"DDR_ECC_D3          :      D18," &
	"DDR_DQ4             :      E2," &
	"DDR_ECC_D4          :      E18," &
	"DDR_ECC_D5          :      E17," &
	"DDR_ECC_D6          :      D17," &
	"DDR_ECC_DM          :      C17," &
	"DDR_DQ5             :      G1," &
	"DDR_DQ6             :      F2," &
	"DDR_DQ7             :      F1," &
	"DDR_DM0             :      E1," &
	"DDR_DQ8             :      E3," &
	"DDR_DQS0P           :      D1," &
	"DDR_DQS0N           :      C1," &
	"DDR_DQS1P           :      A5," &
	"DDR_DQS1N           :      A4," &
	"DDR_DQS2P           :      A13," &
	"DDR_DQS2N           :      A12," &
	"DDR_DQS3P           :      A15," &
	"DDR_DQS3N           :      A16," &
	"DDR_ECC_DQSP        :      A19," &
	"DDR_ECC_DQSN        :      A18," &
	"RSV6                :      F9," &
	"RSV7                :      F10," &
	"DDR_FS_RESETn       :      F16," &
	"DDR_RESETn          :      A11," &
	"DDR_VREF0           :      F12," &
	"DDR_VREF_ZQ         :      F15," &
	"DDR_VTP             :      F13," &
	"ECAP0_IN_APWM_OUT   :      D21," &
	"EXT_REFCLK1         :      A22," &
	"GPMC0_AD0           :      M27," &
	"GPMC0_AD1           :      M23," &
	"GPMC0_AD10          :      P28," &
	"GPMC0_AD11          :      P27," &
	"GPMC0_AD12          :      N26," &
	"GPMC0_AD13          :      N25," &
	"GPMC0_AD14          :      P24," &
	"GPMC0_AD15          :      R27," &
	"GPMC0_AD2           :      M28," &
	"GPMC0_AD3           :      M24," &
	"GPMC0_AD4           :      N24," &
	"GPMC0_AD5           :      N27," &
	"GPMC0_AD6           :      N28," &
	"GPMC0_AD7           :      M25," &
	"GPMC0_AD8           :      N23," &
	"GPMC0_AD9           :      M26," &
	"GPMC0_ADVn_ALE      :      P25," &
	"GPMC0_BE0n_CLE      :      T28," &
	"GPMC0_BE1n          :      P23," &
	"GPMC0_CLK           :      R28," &
	"GPMC0_CSn0          :      R24," &
	"GPMC0_CSn1          :      T23," &
	"GPMC0_CSn2          :      R25," &
	"GPMC0_CSn3          :      T27," &
	"GPMC0_DIR           :      T24," &
	"GPMC0_OEn_REn       :      P26," &
	"GPMC0_WAIT0         :      R26," &
	"GPMC0_WAIT1         :      R23," &
	"GPMC0_WEn           :      U28," &
	"GPMC0_WPn           :      T25," &
	"RSV10               :      B28," &
	"MCU_ADC0_AIN0       :      K5," &
	"MCU_ADC0_AIN1       :      J3," &
	"MCU_ADC0_AIN2       :      J1," &
	"MCU_ADC0_AIN3       :      J5," &
	"MCU_ADC0_AIN4       :      K4," &
	"MCU_ADC0_AIN5       :      J4," &
	"MCU_ADC0_AIN6       :      J2," &
	"MCU_ADC0_AIN7       :      J6," &
	"MCU_ADC0_REFN       :      K2," &
	"MCU_ADC0_REFP       :      K3," &
	"MCU_ADC1_AIN0       :      F4," &
	"MCU_ADC1_AIN1       :      G6," &
	"MCU_ADC1_AIN2       :      G4," &
	"MCU_ADC1_AIN3       :      H5," &
	"MCU_ADC1_AIN4       :      F5," &
	"MCU_ADC1_AIN5       :      G5," &
	"MCU_ADC1_AIN6       :      G3," &
	"MCU_ADC1_AIN7       :      H4," &
	"MCU_ADC1_REFN       :      H3," &
	"MCU_ADC1_REFP       :      H2," &
	"MCU_BYP_POR         :      V5," &
	"MCU_MCAN0_RX        :      W2," &
	"MCU_MCAN0_TX        :      W1," &
	"MCU_MDIO0_MDC       :      L1," &
	"MCU_MDIO0_MDIO      :      L4," &
	"MCU_OSPI0_CLK       :      V1," &
	"MCU_OSPI0_CSn0      :      R4," &
	"MCU_OSPI0_CSn1      :      R5," &
	"MCU_OSPI0_D0        :      U4," &
	"MCU_OSPI0_D1        :      U5," &
	"MCU_OSPI0_D2        :      T2," &
	"MCU_OSPI0_D3        :      T3," &
	"MCU_OSPI0_D4        :      T4," &
	"MCU_OSPI0_D5        :      T5," &
	"MCU_OSPI0_D6        :      R2," &
	"MCU_OSPI0_D7        :      R3," &
	"MCU_OSPI0_DQS       :      U2," &
	"MCU_OSPI0_LBCLKO    :      U1," &
	"MCU_OSPI1_CLK       :      T1," &
	"MCU_OSPI1_CSn0      :      N2," &
	"MCU_OSPI1_CSn1      :      N3," &
	"MCU_OSPI1_D0        :      P3," &
	"MCU_OSPI1_D1        :      P4," &
	"MCU_OSPI1_D2        :      P5," &
	"MCU_OSPI1_D3        :      P1," &
	"MCU_OSPI1_DQS       :      P2," &
	"MCU_OSPI1_LBCLKO    :      R1," &
	"MCU_PORz            :      W5," &
	"MCU_PORz_OUT        :      V2," &
	"MCU_RESETSTATz      :      V3," &
	"MCU_RESETz          :      W4," &
	"MCU_RGMII1_RXC      :      M1," &
	"MCU_RGMII1_RX_CTL   :      N5," &
	"MCU_RGMII1_RD0      :      L6," &
	"MCU_RGMII1_RD1      :      M6," &
	"MCU_RGMII1_RD2      :      L5," &
	"MCU_RGMII1_RD3      :      L2," &
	"MCU_RGMII1_TXC      :      N1," &
	"MCU_RGMII1_TX_CTL   :      N4," &
	"MCU_RGMII1_TD0      :      M5," &
	"MCU_RGMII1_TD1      :      M4," &
	"MCU_RGMII1_TD2      :      M3," &
	"MCU_RGMII1_TD3      :      M2," &
	"MCU_SAFETY_ERRORn   :      W3," &
	"MCU_I2C0_SCL        :      AD8," &
	"MCU_I2C0_SDA        :      AD7," &
	"MCU_SPI0_CLK        :      Y1," &
	"MCU_SPI0_D0         :      Y3," &
	"MCU_SPI0_D1         :      Y2," &
	"MCU_SPI0_CS0        :      Y4," &
	"MCU_TEST_POR        :      V4," &
	"MMC0_CALPAD         :      D24," &
	"MMC0_CLK            :      B25," &
	"MMC0_CMD            :      B27," &
	"MMC0_DAT0           :      A26," &
	"MMC0_DAT1           :      E25," &
	"MMC0_DAT2           :      C26," &
	"MMC0_DAT3           :      A25," &
	"MMC0_DAT4           :      E24," &
	"MMC0_DAT5           :      A24," &
	"MMC0_DAT6           :      B26," &
	"MMC0_DAT7           :      D25," &
	"MMC0_DS             :      C25," &
	"MMC0_SDCD           :      A23," &
	"MMC0_SDWP           :      B23," &
	"RSV12               :      D23," &
	"MMC1_CALPAD         :      F23," &
	"MMC1_CLK            :      C27," &
	"MMC1_CMD            :      C28," &
	"MMC1_DAT0           :      D28," &
	"MMC1_DAT1           :      E27," &
	"MMC1_DAT2           :      D26," &
	"MMC1_DAT3           :      D27," &
	"MMC1_SDCD           :      B24," &
	"MMC1_SDWP           :      C24," &
	"RSV13               :      E23," &
	"NMIn                :      F18," &
	"OLDI0_CLKP          :      K25," &
	"OLDI0_CLKN          :      L25," &
	"OLDI0_A0P           :      K28," &
	"OLDI0_A0N           :      J28," &
	"OLDI0_A1P           :      K27," &
	"OLDI0_A1N           :      L27," &
	"OLDI0_A2P           :      J24," &
	"OLDI0_A2N           :      K24," &
	"OLDI0_A3P           :      K26," &
	"OLDI0_A3N           :      J26," &
	"OSC1_XI             :      C22," &
	"OSC1_XO             :      E22," &
	"RSV9                :      AC13," &
	"SERDES1_REFCLKN     :      AH6," &
	"SERDES1_REFCLKP     :      AH7," &
	"SERDES1_REFRES      :      AC14," &
	"SERDES1_RXN0        :      AG9," &
	"SERDES1_RXP0        :      AH10," &
	"SERDES1_TXN0        :      AH9," &
	"SERDES1_TXP0        :      AG8," &
	"PMIC_POWER_EN0      :      Y5," &
	"PMIC_POWER_EN1      :      AA5," &
	"PORz                :      E19," &
	"PORz_OUT            :      C19," &
	"PRG0_MDIO0_MDIO     :      AE26," &
	"PRG0_MDIO0_MDC      :      AE28," &
	"PRG0_PRU0_GPO0      :      V24," &
	"PRG0_PRU0_GPO1      :      W25," &
	"PRG0_PRU0_GPO10     :      U25," &
	"PRG0_PRU0_GPO11     :      AB25," &
	"PRG0_PRU0_GPO12     :      AD27," &
	"PRG0_PRU0_GPO13     :      AC26," &
	"PRG0_PRU0_GPO14     :      AD26," &
	"PRG0_PRU0_GPO15     :      AA24," &
	"PRG0_PRU0_GPO16     :      AD28," &
	"PRG0_PRU0_GPO17     :      U26," &
	"PRG0_PRU0_GPO18     :      V25," &
	"PRG0_PRU0_GPO19     :      U24," &
	"PRG0_PRU0_GPO2      :      W24," &
	"PRG0_PRU0_GPO3      :      AA27," &
	"PRG0_PRU0_GPO4      :      Y24," &
	"PRG0_PRU0_GPO5      :      V28," &
	"PRG0_PRU0_GPO6      :      Y25," &
	"PRG0_PRU0_GPO7      :      U27," &
	"PRG0_PRU0_GPO8      :      V27," &
	"PRG0_PRU0_GPO9      :      V26," &
	"PRG0_PRU1_GPO0      :      AB28," &
	"PRG0_PRU1_GPO1      :      AC28," &
	"PRG0_PRU1_GPO10     :      AA28," &
	"PRG0_PRU1_GPO11     :      AB24," &
	"PRG0_PRU1_GPO12     :      AC25," &
	"PRG0_PRU1_GPO13     :      AD25," &
	"PRG0_PRU1_GPO14     :      AD24," &
	"PRG0_PRU1_GPO15     :      AE27," &
	"PRG0_PRU1_GPO16     :      AC24," &
	"PRG0_PRU1_GPO17     :      Y27," &
	"PRG0_PRU1_GPO18     :      Y26," &
	"PRG0_PRU1_GPO19     :      W26," &
	"PRG0_PRU1_GPO2      :      AC27," &
	"PRG0_PRU1_GPO3      :      AB26," &
	"PRG0_PRU1_GPO4      :      AA25," &
	"PRG0_PRU1_GPO5      :      U23," &
	"PRG0_PRU1_GPO6      :      AB27," &
	"PRG0_PRU1_GPO7      :      W28," &
	"PRG0_PRU1_GPO8      :      W27," &
	"PRG0_PRU1_GPO9      :      Y28," &
	"PRG1_MDIO0_MDIO     :      AD18," &
	"PRG1_MDIO0_MDC      :      AH18," &
	"PRG1_PRU0_GPO0      :      AE22," &
	"PRG1_PRU0_GPO1      :      AG24," &
	"PRG1_PRU0_GPO10     :      AH25," &
	"PRG1_PRU0_GPO11     :      AF21," &
	"PRG1_PRU0_GPO12     :      AH20," &
	"PRG1_PRU0_GPO13     :      AH21," &
	"PRG1_PRU0_GPO14     :      AG20," &
	"PRG1_PRU0_GPO15     :      AD19," &
	"PRG1_PRU0_GPO16     :      AD20," &
	"PRG1_PRU0_GPO17     :      AH26," &
	"PRG1_PRU0_GPO18     :      AG25," &
	"PRG1_PRU0_GPO19     :      AG26," &
	"PRG1_PRU0_GPO2      :      AF23," &
	"PRG1_PRU0_GPO3      :      AD21," &
	"PRG1_PRU0_GPO4      :      AG23," &
	"PRG1_PRU0_GPO5      :      AF27," &
	"PRG1_PRU0_GPO6      :      AF22," &
	"PRG1_PRU0_GPO7      :      AG27," &
	"PRG1_PRU0_GPO8      :      AF28," &
	"PRG1_PRU0_GPO9      :      AF26," &
	"PRG1_PRU1_GPO0      :      AH24," &
	"PRG1_PRU1_GPO1      :      AH23," &
	"PRG1_PRU1_GPO10     :      AF24," &
	"PRG1_PRU1_GPO11     :      AC20," &
	"PRG1_PRU1_GPO12     :      AE20," &
	"PRG1_PRU1_GPO13     :      AF19," &
	"PRG1_PRU1_GPO14     :      AH19," &
	"PRG1_PRU1_GPO15     :      AG19," &
	"PRG1_PRU1_GPO16     :      AE19," &
	"PRG1_PRU1_GPO17     :      AE23," &
	"PRG1_PRU1_GPO18     :      AD22," &
	"PRG1_PRU1_GPO19     :      AC21," &
	"PRG1_PRU1_GPO2      :      AG21," &
	"PRG1_PRU1_GPO3      :      AH22," &
	"PRG1_PRU1_GPO4      :      AE21," &
	"PRG1_PRU1_GPO5      :      AC22," &
	"PRG1_PRU1_GPO6      :      AG22," &
	"PRG1_PRU1_GPO7      :      AD23," &
	"PRG1_PRU1_GPO8      :      AE24," &
	"PRG1_PRU1_GPO9      :      AF25," &
	"PRG2_PRU0_GPO0      :      AF18," &
	"PRG2_PRU0_GPO1      :      AE18," &
	"PRG2_PRU0_GPO10     :      AF16," &
	"PRG2_PRU0_GPO11     :      AE16," &
	"PRG2_PRU0_GPO16     :      AD16," &
	"PRG2_PRU0_GPO2      :      AH17," &
	"PRG2_PRU0_GPO3      :      AG18," &
	"PRG2_PRU0_GPO4      :      AG17," &
	"PRG2_PRU0_GPO5      :      AF17," &
	"PRG2_PRU0_GPO6      :      AE17," &
	"PRG2_PRU0_GPO7      :      AC19," &
	"PRG2_PRU0_GPO8      :      AH16," &
	"PRG2_PRU0_GPO9      :      AG16," &
	"PRG2_PRU1_GPO0      :      AH15," &
	"PRG2_PRU1_GPO1      :      AC16," &
	"PRG2_PRU1_GPO10     :      AC15," &
	"PRG2_PRU1_GPO11     :      AD14," &
	"PRG2_PRU1_GPO16     :      AE14," &
	"PRG2_PRU1_GPO2      :      AD17," &
	"PRG2_PRU1_GPO3      :      AH14," &
	"PRG2_PRU1_GPO4      :      AG14," &
	"PRG2_PRU1_GPO5      :      AG15," &
	"PRG2_PRU1_GPO6      :      AC17," &
	"PRG2_PRU1_GPO7      :      AE15," &
	"PRG2_PRU1_GPO8      :      AD15," &
	"PRG2_PRU1_GPO9      :      AF14," &
	"REFCLK0N            :      AF9," &
	"REFCLK0P            :      AF10," &
	"REFCLK1N            :      AE8," &
	"REFCLK1P            :      AE9," &
	"RESETSTATz          :      D19," &
	"RESETz              :      F17," &
	"I2C0_SCL            :      D20," &
	"I2C1_SCL            :      B21," &
	"I2C0_SDA            :      C21," &
	"I2C1_SDA            :      E21," &
	"SOC_SAFETY_ERRORn   :      E20," &
	"SPI0_CLK            :      AH13," &
	"SPI0_D0             :      AE13," &
	"SPI0_D1             :      AD13," &
	"SPI0_CS0            :      AG13," &
	"SPI0_CS1            :      AF13," &
	"SPI1_CLK            :      AH12," &
	"SPI1_D0             :      AE12," &
	"SPI1_D1             :      AF12," &
	"SPI1_CS0            :      AD12," &
	"SPI1_CS1            :      AG12," &
	"TDI                 :      C20," &
	"TDO                 :      A20," &
	"TEMP_DIODE_P        :      W6," &
	"TIMER_IO0           :      B22," &
	"TIMER_IO1           :      C23," &
	"TMS                 :      A21," &
	"UART0_CTSn          :      AG11," &
	"UART0_RTSn          :      AD11," &
	"UART0_RXD           :      AF11," &
	"UART0_TXD           :      AE11," &
	"RSV8                :      AD10," &
	"USB0_DM             :      AE2," &
	"USB0_DP             :      AF1," &
	"USB0_DRVVBUS        :      AD9," &
	"USB0_ID             :      AF7," &
	"SERDES0_REFCLKN     :      AG5," &
	"SERDES0_REFCLKP     :      AG6," &
	"SERDES0_REFRES      :      AC9," &
	"SERDES0_RXN         :      AH3," &
	"SERDES0_RXP         :      AG2," &
	"SERDES0_TXN         :      AH4," &
	"SERDES0_TXP         :      AG3," &
	"USB0_VBUS           :      AE7," &
	"USB1_DM             :      AD2," &
	"USB1_DP             :      AE1," &
	"USB1_DRVVBUS        :      AC8," &
	"USB1_ID             :      AF5," &
	"USB1_VBUS           :      AF6," &
	"RSV11               :      A27," &
	"EMU0                :      AA2," &
	"EMU1                :      AA1," &
	"WKUP_GPIO0_0        :      AF4," &
	"WKUP_GPIO0_1        :      AF3," &
	"WKUP_GPIO0_10       :      AB3," &
	"WKUP_GPIO0_11       :      AB2," &
	"WKUP_GPIO0_2        :      AE3," &
	"WKUP_GPIO0_3        :      AD1," &
	"WKUP_GPIO0_4        :      AC3," &
	"WKUP_GPIO0_5        :      AD3," &
	"WKUP_GPIO0_6        :      AC2," &
	"WKUP_GPIO0_7        :      AC1," &
	"WKUP_GPIO0_8        :      AC5," &
	"WKUP_GPIO0_9        :      AB4," &
	"WKUP_LFOSC0_XI      :      AE4," &
	"WKUP_LFOSC0_XO      :      AC4," &
	"WKUP_OSC0_XI        :      AD5," &
	"WKUP_OSC0_XO        :      AE6," &
	"WKUP_I2C0_SCL       :      AC7," &
	"WKUP_I2C0_SDA       :      AD6," &
	"TCK                 :      AA4," &
	"TRSTn               :      AA3," &
	"WKUP_UART0_RXD      :      AB1," &
	"WKUP_UART0_TXD      :      AB5," &
	"VDD   		     :      (AA12,J10,J12,J14,J19,J8,K13,L14,L19,M13,N14,P13,P15,P19,R14,R16,R18,T13,T15,T17,T19,U14,U16,U18,V13,V15,V19,W14,W18,Y11,Y13,Y15) , " &
	"VSS        	     :      (A1,A2,A28,AA11,AA13,AA15,AA17,AA19,AA23,AA26,AA7,AB10,AB12,AB14,AB16,AB18,AB20,AB22,AD4,AE10,AE25,AE5,AF15,AF2,AF20,AF8,AG1,AG10,AG28,AG4,AG7,AH1,AH11,AH2,AH27,AH28,AH5,AH8,B12,B15,B20,B6,B9,D22,E26,E28,E4,F14,F19,F22,F25,F27,F3,G11,G13,G16,G2,G21,G23,G7,G9,H1,H10,H12,H14,H20,H22,H24,H26,H28,H6,H8,J11,J13,J15,J18,J21,J23,J25,J27,J7,J9,K1,K10,K12,K14,K17,K19,K22,K23,K6,K8,L11,L13,L16,L23,L24,L26,L28,L3,L7,L9,M10,M15,M17,M20,M8,N11,N13,N16,N19,N21,N7,N9,P10,P12,P14,P16,P18,P22,P6,P8,R11,R13,R15,R17,R19,R21,R7,R9,T10,T12,T14,T16,T18,T22,T26,T8,U11,U13,U15,U17,U19,U21,U3,U7,U9,V10,V12,V14,V18,V20,V22,V6,W11,W13,W15,W17,W19,W21,W23,W7,W9,Y12,Y14,Y16,Y18,Y22,Y6,Y8) , " &
	"VDDA_PLL1_DDR       :      H11, " &
	"VDDA_1P8_MON0       :      AC6, " &
	"VDDA_1P8_MON_WKUP   :      AB6, " &
	"VDDA_3P3_IOLDO0     :      G18, " &
	"VDDA_3P3_IOLDO1     :      AA21, " &
	"VDDA_3P3_IOLDO_WKUP :      AB9, " &
	"VDDA_3P3_SDIO       :      H17, " &
	"VDDA_3P3_MON0       :      AC10, " &
	"VDDA_3P3_USB        :      AC12, " &
	"VDDA_3P3_MON_WKUP   :      U6, " &
	"VDDA_SRAM_CORE0     :      M19, " &
	"VDDA_SRAM_CORE1     :      V16, " &
	"VDDA_ADC_MCU        :      (M7,M9), " &
	"VDDA_SRAM_MPU0      :      K7, " &
	"VDDA_SRAM_MPU1      :      L18, " &
	"VDDA_PLL_MPU0       :      L12, " &
	"VDDA_PLL_MPU1       :      K15, " &
	"VDDA_PLL0_DDR       :      H15, " &
	"VDDA_PLL_DSS        :      L21, " &
	"VDDA_PLL_CORE       :      Y17, " &
	"VDDA_PLL_PER0       :      AB7, " &
	"VDDA_VSYS_MON       :      AC11, " &
	"VDDA_LDO_WKUP       :      AB8, " &
	"VDDA_POR_WKUP       :      Y9, " &
	"VDDA_1P8_SDIO       :      G17, " &
	"VDDS8               :      AA10, " &
	"VDDA_1P8_SERDES0    :      (AA14,AB13,AB15), " &
	"VDDA_MCU            :      U12, " &
	"VDDA_WKUP           :      AA9, " &
	"VDDSHV0             :      (G15,H16), " &
	"VDDSHV1             :      (AA18,AB17), " &
	"VDDSHV2             :      (N20,N22,P21,R20,R22), " &
	"VDDSHV3             :      (T21,U20,U22,V21,V23), " &
	"VDDSHV4             :      (AA22,W20,W22,Y21,Y23), " &
	"VDDSHV5             :      (AA20,AB19,AB21,AB23), " &
	"VDDSHV6             :      (G20,H19,H21), " &
	"VDDSHV7             :      (J20,J22,K21), " &
	"VDDSHV8             :      AB11, " &
	"VDDSHV2_WKUP        :      (N6,P7,P9), " &
	"VDDSHV1_WKUP        :      (R6,R8,T7), " &
	"VDDSHV0_WKUP        :      (U8,V7,W8,Y7), " &
	"VDDS_DDR            :      (G10,G14,G8,H13,H7,H9), " &
	"VDDS0               :      G12, " &
	"VDDS1               :      AA16, " &
	"VDDA_1P8_CSI0       :      (L20,M21), " &
	"VDDS2               :      P20, " &
	"VDDS6               :      F20, " &
	"VDDS7               :      K20, " &
	"VDDA_1P8_OLDI0      :      L22, " &
	"VDDS3               :      T20, " &
	"VDDS4               :      Y20, " &
	"VDDS5               :      AC18, " &
	"VDDS_OSC0           :      J16, " &
	"VDDS2_WKUP          :      N8, " &
	"VDDS1_WKUP          :      T9, " &
	"VDDS0_WKUP          :      V8, " &
	"VDD_MCU             :      (N10,P11,R10,R12,T11), " &
        "VDD_MPU0            :      (K11,K9,L10,L8,M11), " &
        "VDD_MPU1            :      (K16,K18,L17,M16,M18,N17), " &
	"VDD_WKUP1           :      (M22), " &
	"VDD_WKUP0           :      (V11,W10,W12), " &
	"VPP_CORE            :      F21, " &
	"VPP_MCU             :      T6";



 attribute TAP_SCAN_CLOCK of TCK : signal is (30.00000000e+6, BOTH);
 attribute TAP_SCAN_IN of TDI : signal is true;
 attribute TAP_SCAN_OUT of TDO : signal is true;
 attribute TAP_SCAN_MODE of TMS : signal is true;
 attribute TAP_SCAN_RESET of TRSTn : signal is true;



 attribute COMPLIANCE_PATTERNS of AM65xx_DRA80xM : entity is "(PORz, RESETz, MCU_PORz, MCU_RESETz, EMU0, EMU1, MCU_BYP_POR)(1111101)";
 attribute INSTRUCTION_LENGTH  of AM65xx_DRA80xM : entity is 4;
 attribute INSTRUCTION_OPCODE  of AM65xx_DRA80xM : entity is
	"EXTEST			(0001),      "&
	"SAMPLE			(0010),      "&
	"PRELOAD		(0010),      "&
	"IDCODE			(1101),      "&
	"BYPASS			(0000,1111)";



 attribute INSTRUCTION_CAPTURE of AM65xx_DRA80xM : entity is "0001";

 attribute IDCODE_REGISTER of AM65xx_DRA80xM : entity is
		"0000"  &			-- Version Number
		"1011101101011010"  &		-- Part Number
		"00000010111"&			-- Manufacturer ID
		"1";				-- Required by IEEE Std. 1149.1-1990



 attribute REGISTER_ACCESS of AM65xx_DRA80xM : entity is
		"BOUNDARY (EXTEST, SAMPLE, PRELOAD), " &
		"DEVICE_ID (IDCODE), " &
		"BYPASS (BYPASS) ";



 attribute BOUNDARY_LENGTH of AM65xx_DRA80xM : entity is 714; 
 attribute BOUNDARY_REGISTER of AM65xx_DRA80xM : entity is
 -- num     cell      port    function   save [ccell disval rslt]
"713 (bc_1,MCU_I2C0_SCL, output2, 1, 713, 1, WEAK1)," & 
"712 (bc_1, *,internal, 0          )," &            
"711 (bc_3,MCU_I2C0_SCL, input, X)," & 
"710 (bc_1,MCU_I2C0_SDA, output2, 1, 710, 1, WEAK1)," & 
"709 (bc_1, *,internal, 0          )," & 
"708 (bc_3,MCU_I2C0_SDA, input, X)," & 
"707 (bc_1,WKUP_I2C0_SCL, output2, 1, 707, 1, WEAK1)," &
"706 (bc_1, *,internal, 0          )," &
"705 (bc_3,WKUP_I2C0_SCL, input, X)," &
"704 (bc_1,WKUP_I2C0_SDA, output2, 1, 704, 1, WEAK1)," &
"703 (bc_1, *,internal, 0          )," &
"702 (bc_3,WKUP_I2C0_SDA, input, X)," &
"701 (bc_7,WKUP_GPIO0_0, bidir, X, 700, 1, Z)," &
"700 (bc_2, *,control, 1          )," &
"699 (bc_7,WKUP_GPIO0_1, bidir, X, 698, 1, Z)," &
"698 (bc_2, *,control, 1          )," &
"697 (bc_7,WKUP_GPIO0_2, bidir, X, 696, 1, Z)," &
"696 (bc_2, *,control, 1          )," &
"695 (bc_7,WKUP_GPIO0_3, bidir, X, 694, 1, Z)," &
"694 (bc_2, *,control, 1          )," &
"693 (bc_7,WKUP_GPIO0_4, bidir, X, 692, 1, Z)," &
"692 (bc_2, *,control, 1          )," &
"691 (bc_7,WKUP_GPIO0_5, bidir, X, 690, 1, Z)," &
"690 (bc_2, *,control, 1          )," &
"689 (bc_7,WKUP_GPIO0_6, bidir, X, 688, 1, Z)," &
"688 (bc_2, *,control, 1          )," &
"687 (bc_7,WKUP_GPIO0_7, bidir, X, 686, 1, Z)," &
"686 (bc_2, *,control, 1          )," &
"685 (bc_7,WKUP_GPIO0_8, bidir, X, 684, 1, Z)," &
"684 (bc_2, *,control, 1          )," &
"683 (bc_7,WKUP_GPIO0_9, bidir, X, 682, 1, Z)," &
"682 (bc_2, *,control, 1          )," &
"681 (bc_7,WKUP_GPIO0_10, bidir, X, 680, 1, Z)," &
"680 (bc_2, *,control, 1          )," &
"679 (bc_7,WKUP_GPIO0_11, bidir, X, 678, 1, Z)," &
"678 (bc_2, *,control, 1          )," &
"677 (bc_7,WKUP_UART0_RXD, bidir, X, 676, 1, Z)," &
"676 (bc_2, *,control, 1          )," &
"675 (bc_7,WKUP_UART0_TXD, bidir, X, 674, 1, Z)," &
"674 (bc_2, *,control, 1          )," &
"673 (bc_7,PMIC_POWER_EN0, bidir, X, 672, 1, Z)," &
"672 (bc_2, *,control, 1          )," &
"671 (bc_7,PMIC_POWER_EN1, bidir, X, 670, 1, Z)," &
"670 (bc_2, *,control, 1          )," &
"669 (bc_7,MCU_SPI0_CLK, bidir, X, 668, 1, Z)," &
"668 (bc_2, *,control, 1          )," &
"667 (bc_7,MCU_SPI0_D0, bidir, X, 666, 1, Z)," &
"666 (bc_2, *,control, 1          )," &
"665 (bc_7,MCU_SPI0_D1, bidir, X, 664, 1, Z)," &
"664 (bc_2, *,control, 1          )," &
"663 (bc_7,MCU_SPI0_CS0, bidir, X, 662, 1, Z)," &
"662 (bc_2, *,control, 1          )," &
"661 (bc_7,MCU_MCAN0_TX, bidir, X, 660, 1, Z)," &
"660 (bc_2, *,control, 1          )," &
"659 (bc_7,MCU_MCAN0_RX, bidir, X, 658, 1, Z)," &
"658 (bc_2, *,control, 1          )," &
"657 (bc_7,MCU_SAFETY_ERRORn, bidir, X, 656, 1, Z)," &
"656 (bc_2, *,control, 1          )," &
"655 (bc_1,MCU_TEST_POR, input,X)," &
"654 (bc_7,MCU_RESETSTATz, bidir, X, 653, 1, Z)," &
"653 (bc_2, *,control, 1          )," &
"652 (bc_7,MCU_PORz_OUT, bidir, X, 651, 1, Z)," &
"651 (bc_2, *,control, 1          )," &
"650 (bc_7,MCU_OSPI0_CLK, bidir, X, 649, 1, Z)," &
"649 (bc_2, *,control, 1          )," &
"648 (bc_7,MCU_OSPI0_LBCLKO, bidir, X, 647, 1, Z)," &
"647 (bc_2, *,control, 1          )," &
"646 (bc_7,MCU_OSPI0_DQS, bidir, X, 645, 1, Z)," &
"645 (bc_2, *,control, 1          )," &
"644 (bc_7,MCU_OSPI0_D0, bidir, X, 643, 1, Z)," &
"643 (bc_2, *,control, 1          )," &
"642 (bc_7,MCU_OSPI0_D1, bidir, X, 641, 1, Z)," &
"641 (bc_2, *,control, 1          )," &
"640 (bc_7,MCU_OSPI0_D2, bidir, X, 639, 1, Z)," &
"639 (bc_2, *,control, 1          )," &
"638 (bc_7,MCU_OSPI0_D3, bidir, X, 637, 1, Z)," &
"637 (bc_2, *,control, 1          )," &
"636 (bc_7,MCU_OSPI0_D4, bidir, X, 635, 1, Z)," &
"635 (bc_2, *,control, 1          )," &
"634 (bc_7,MCU_OSPI0_D5, bidir, X, 633, 1, Z)," &
"633 (bc_2, *,control, 1          )," &
"632 (bc_7,MCU_OSPI0_D6, bidir, X, 631, 1, Z)," &
"631 (bc_2, *,control, 1          )," &
"630 (bc_7,MCU_OSPI0_D7, bidir, X, 629, 1, Z)," &
"629 (bc_2, *,control, 1          )," &
"628 (bc_7,MCU_OSPI0_CSn0, bidir, X, 627, 1, Z)," &
"627 (bc_2, *,control, 1          )," &
"626 (bc_7,MCU_OSPI0_CSn1, bidir, X, 625, 1, Z)," &
"625 (bc_2, *,control, 1          )," &
"624 (bc_7,MCU_OSPI1_CLK, bidir, X, 623, 1, Z)," &
"623 (bc_2, *,control, 1          )," &
"622 (bc_7,MCU_OSPI1_LBCLKO, bidir, X, 621, 1, Z)," &
"621 (bc_2, *,control, 1          )," &
"620 (bc_7,MCU_OSPI1_DQS, bidir, X, 619, 1, Z)," &
"619 (bc_2, *,control, 1          )," &
"618 (bc_7,MCU_OSPI1_D0, bidir, X, 617, 1, Z)," &
"617 (bc_2, *,control, 1          )," &
"616 (bc_7,MCU_OSPI1_D1, bidir, X, 615, 1, Z)," &
"615 (bc_2, *,control, 1          )," &
"614 (bc_7,MCU_OSPI1_D2, bidir, X, 613, 1, Z)," &
"613 (bc_2, *,control, 1          )," &
"612 (bc_7,MCU_OSPI1_D3, bidir, X, 611, 1, Z)," &
"611 (bc_2, *,control, 1          )," &
"610 (bc_7,MCU_OSPI1_CSn0, bidir, X, 609, 1, Z)," &
"609 (bc_2, *,control, 1          )," &
"608 (bc_7,MCU_OSPI1_CSn1, bidir, X, 607, 1, Z)," &
"607 (bc_2, *,control, 1          )," &
"606 (bc_7,MCU_RGMII1_TX_CTL, bidir, X, 605, 1, Z)," &
"605 (bc_2, *,control, 1          )," &
"604 (bc_7,MCU_RGMII1_RX_CTL, bidir, X, 603, 1, Z)," &
"603 (bc_2, *,control, 1          )," &
"602 (bc_7,MCU_RGMII1_TD3, bidir, X, 601, 1, Z)," &
"601 (bc_2, *,control, 1          )," &
"600 (bc_7,MCU_RGMII1_TD2, bidir, X, 599, 1, Z)," &
"599 (bc_2, *,control, 1          )," &
"598 (bc_7,MCU_RGMII1_TD1, bidir, X, 597, 1, Z)," &
"597 (bc_2, *,control, 1          )," &
"596 (bc_7,MCU_RGMII1_TD0, bidir, X, 595, 1, Z)," &
"595 (bc_2, *,control, 1          )," &
"594 (bc_7,MCU_RGMII1_TXC, bidir, X, 593, 1, Z)," &
"593 (bc_2, *,control, 1          )," &
"592 (bc_7,MCU_RGMII1_RXC, bidir, X, 591, 1, Z)," &
"591 (bc_2, *,control, 1          )," &
"590 (bc_7,MCU_RGMII1_RD3, bidir, X, 589, 1, Z)," &
"589 (bc_2, *,control, 1          )," &
"588 (bc_7,MCU_RGMII1_RD2, bidir, X, 587, 1, Z)," &
"587 (bc_2, *,control, 1          )," &
"586 (bc_7,MCU_RGMII1_RD1, bidir, X, 585, 1, Z)," &
"585 (bc_2, *,control, 1          )," &
"584 (bc_7,MCU_RGMII1_RD0, bidir, X, 583, 1, Z)," &
"583 (bc_2, *,control, 1          )," &
"582 (bc_7,MCU_MDIO0_MDIO, bidir, X, 581, 1, Z)," &
"581 (bc_2, *,control, 1          )," &
"580 (bc_7,MCU_MDIO0_MDC, bidir, X, 579, 1, Z)," &
"579 (bc_2, *,control, 1          )," &
"578 (bc_7,DDR_DQ0, bidir, X, 577, 1, Z)," &
"577 (bc_2, *,control, 1          )," &
"576 (bc_7,DDR_DQ1, bidir, X, 575, 1, Z)," &
"575 (bc_2, *,control, 1          )," &
"574 (bc_7,DDR_DQ2, bidir, X, 573, 1, Z)," &
"573 (bc_2, *,control, 1          )," &
"572 (bc_7,DDR_DQ3, bidir, X, 571, 1, Z)," &
"571 (bc_2, *,control, 1          )," &
"570 (bc_7,DDR_DQ4, bidir, X, 569, 1, Z)," &
"569 (bc_2, *,control, 1          )," &
"568 (bc_7,DDR_DQS0P, bidir, X, 567, 1, Z)," &
"567 (bc_2, *,control, 1          )," &
"566 (bc_7,DDR_DQS0N, bidir, X, 565, 1, Z)," &
"565 (bc_2, *,control, 1          )," &
"564 (bc_7,DDR_DQ5, bidir, X, 563, 1, Z)," &
"563 (bc_2, *,control, 1          )," &
"562 (bc_7,DDR_DQ6, bidir, X, 561, 1, Z)," &
"561 (bc_2, *,control, 1          )," &
"560 (bc_7,DDR_DQ7, bidir, X, 559, 1, Z)," &
"559 (bc_2, *,control, 1          )," &
"558 (bc_7,DDR_DM0, bidir, X, 557, 1, Z)," &
"557 (bc_2, *,control, 1          )," &
"556 (bc_7,DDR_DQ8, bidir, X, 555, 1, Z)," &
"555 (bc_2, *,control, 1          )," &
"554 (bc_7,DDR_DQ9, bidir, X, 553, 1, Z)," &
"553 (bc_2, *,control, 1          )," &
"552 (bc_7,DDR_DQ10, bidir, X, 551, 1, Z)," &
"551 (bc_2, *,control, 1          )," &
"550 (bc_7,DDR_DQ11, bidir, X, 549, 1, Z)," &
"549 (bc_2, *,control, 1          )," &
"548 (bc_7,DDR_DQS1N, bidir, X, 547, 1, Z)," &
"547 (bc_2, *,control, 1          )," &
"546 (bc_7,DDR_DQS1P, bidir, X, 545, 1, Z)," &
"545 (bc_2, *,control, 1          )," &
"544 (bc_7,DDR_DQ12, bidir, X, 543, 1, Z)," &
"543 (bc_2, *,control, 1          )," &
"542 (bc_7,DDR_DQ13, bidir, X, 541, 1, Z)," &
"541 (bc_2, *,control, 1          )," &
"540 (bc_7,DDR_DQ14, bidir, X, 539, 1, Z)," &
"539 (bc_2, *,control, 1          )," &
"538 (bc_7,DDR_DQ15, bidir, X, 537, 1, Z)," &
"537 (bc_2, *,control, 1          )," &
"536 (bc_7,DDR_DM1, bidir, X, 535, 1, Z)," &
"535 (bc_2, *,control, 1          )," &
"534 (bc_7,DDR_ALERTn, bidir, X, 533, 1, Z)," &
"533 (bc_2, *,control, 1          )," &
"532 (bc_7,DDR_AC0, bidir, X, 531, 1, Z)," &
"531 (bc_2, *,control, 1          )," &
"530 (bc_7,DDR_AC1, bidir, X, 529, 1, Z)," &
"529 (bc_2, *,control, 1          )," &
"528 (bc_7,DDR_AC2, bidir, X, 527, 1, Z)," &
"527 (bc_2, *,control, 1          )," &
"526 (bc_7,DDR_AC3, bidir, X, 525, 1, Z)," &
"525 (bc_2, *,control, 1          )," &
"524 (bc_7,DDR_AC4, bidir, X, 523, 1, Z)," &
"523 (bc_2, *,control, 1          )," &
"522 (bc_7,DDR_AC5, bidir, X, 521, 1, Z)," &
"521 (bc_2, *,control, 1          )," &
"520 (bc_7,DDR_AC6, bidir, X, 519, 1, Z)," &
"519 (bc_2, *,control, 1          )," &
"518 (bc_7,DDR_AC7, bidir, X, 517, 1, Z)," &
"517 (bc_2, *,control, 1          )," &
"516 (bc_7,DDR_AC8, bidir, X, 515, 1, Z)," &
"515 (bc_2, *,control, 1          )," &
"514 (bc_7,DDR_CK0P, bidir, X, 513, 1, Z)," &
"513 (bc_2, *,control, 1          )," &
"512 (bc_7,DDR_CK0N, bidir, X, 511, 1, Z)," &
"511 (bc_2, *,control, 1          )," &
"510 (bc_7,DDR_CK1P, bidir, X, 509, 1, Z)," &
"509 (bc_2, *,control, 1          )," &
"508 (bc_7,DDR_CK1N, bidir, X, 507, 1, Z)," &
"507 (bc_2, *,control, 1          )," &
"506 (bc_7,DDR_AC9, bidir, X, 505, 1, Z)," &
"505 (bc_2, *,control, 1          )," &
"504 (bc_7,DDR_AC10, bidir, X, 503, 1, Z)," &
"503 (bc_2, *,control, 1          )," &
"502 (bc_7,DDR_AC11, bidir, X, 501, 1, Z)," &
"501 (bc_2, *,control, 1          )," &
"500 (bc_7,DDR_AC12, bidir, X, 499, 1, Z)," &
"499 (bc_2, *,control, 1          )," &
"498 (bc_7,DDR_AC13, bidir, X, 497, 1, Z)," &
"497 (bc_2, *,control, 1          )," &
"496 (bc_7,DDR_AC14, bidir, X, 495, 1, Z)," &
"495 (bc_2, *,control, 1          )," &
"494 (bc_7,DDR_AC15, bidir, X, 493, 1, Z)," &
"493 (bc_2, *,control, 1          )," &
"492 (bc_7,DDR_AC16, bidir, X, 491, 1, Z)," &
"491 (bc_2, *,control, 1          )," &
"490 (bc_7,DDR_AC17, bidir, X, 489, 1, Z)," &
"489 (bc_2, *,control, 1          )," &
"488 (bc_7,DDR_AC18, bidir, X, 487, 1, Z)," &
"487 (bc_2, *,control, 1          )," &
"486 (bc_7,DDR_AC19, bidir, X, 485, 1, Z)," &
"485 (bc_2, *,control, 1          )," &
"484 (bc_7,DDR_AC20, bidir, X, 483, 1, Z)," &
"483 (bc_2, *,control, 1          )," &
"482 (bc_7,DDR_AC21, bidir, X, 481, 1, Z)," &
"481 (bc_2, *,control, 1          )," &
"480 (bc_7,RSV6, bidir, X, 479, 1, Z)," &
"479 (bc_2, *,control, 1          )," &
"478 (bc_7,DDR_AC22, bidir, X, 477, 1, Z)," &
"477 (bc_2, *,control, 1          )," &
"476 (bc_7,DDR_AC23, bidir, X, 475, 1, Z)," &
"475 (bc_2, *,control, 1          )," &
"474 (bc_7,DDR_AC24, bidir, X, 473, 1, Z)," &
"473 (bc_2, *,control, 1          )," &
"472 (bc_7,RSV7, bidir, X, 471, 1, Z)," &
"471 (bc_2, *,control, 1          )," &
"470 (bc_7,DDR_AC25, bidir, X, 469, 1, Z)," &
"469 (bc_2, *,control, 1          )," &
"468 (bc_7,DDR_AC26, bidir, X, 467, 1, Z)," &
"467 (bc_2, *,control, 1          )," &
"466 (bc_7,DDR_AC27, bidir, X, 465, 1, Z)," &
"465 (bc_2, *,control, 1          )," &
"464 (bc_7,DDR_AC28, bidir, X, 463, 1, Z)," &
"463 (bc_2, *,control, 1          )," &
"462 (bc_7,DDR_RESETn, bidir, X, 461, 1, Z)," &
"461 (bc_2, *,control, 1          )," &
"460 (bc_7,DDR_AC29, bidir, X, 459, 1, Z)," &
"459 (bc_2, *,control, 1          )," &
"458 (bc_7,DDR_DQ16, bidir, X, 457, 1, Z)," &
"457 (bc_2, *,control, 1          )," &
"456 (bc_7,DDR_DQ17, bidir, X, 455, 1, Z)," &
"455 (bc_2, *,control, 1          )," &
"454 (bc_7,DDR_DQ18, bidir, X, 453, 1, Z)," &
"453 (bc_2, *,control, 1          )," &
"452 (bc_7,DDR_DQ19, bidir, X, 451, 1, Z)," &
"451 (bc_2, *,control, 1          )," &
"450 (bc_7,DDR_DQS2P, bidir, X, 449, 1, Z)," &
"449 (bc_2, *,control, 1          )," &
"448 (bc_7,DDR_DQS2N, bidir, X, 447, 1, Z)," &
"447 (bc_2, *,control, 1          )," &
"446 (bc_7,DDR_DQ20, bidir, X, 445, 1, Z)," &
"445 (bc_2, *,control, 1          )," &
"444 (bc_7,DDR_DQ21, bidir, X, 443, 1, Z)," &
"443 (bc_2, *,control, 1          )," &
"442 (bc_7,DDR_DQ22, bidir, X, 441, 1, Z)," &
"441 (bc_2, *,control, 1          )," &
"440 (bc_7,DDR_DQ23, bidir, X, 439, 1, Z)," &
"439 (bc_2, *,control, 1          )," &
"438 (bc_7,DDR_DM2, bidir, X, 437, 1, Z)," &
"437 (bc_2, *,control, 1          )," &
"436 (bc_7,DDR_DQ24, bidir, X, 435, 1, Z)," &
"435 (bc_2, *,control, 1          )," &
"434 (bc_7,DDR_DQ25, bidir, X, 433, 1, Z)," &
"433 (bc_2, *,control, 1          )," &
"432 (bc_7,DDR_DQ26, bidir, X, 431, 1, Z)," &
"431 (bc_2, *,control, 1          )," &
"430 (bc_7,DDR_DQ27, bidir, X, 429, 1, Z)," &
"429 (bc_2, *,control, 1          )," &
"428 (bc_7,DDR_DQS3P, bidir, X, 427, 1, Z)," &
"427 (bc_2, *,control, 1          )," &
"426 (bc_7,DDR_DQS3N, bidir, X, 425, 1, Z)," &
"425 (bc_2, *,control, 1          )," &
"424 (bc_7,DDR_DQ28, bidir, X, 423, 1, Z)," &
"423 (bc_2, *,control, 1          )," &
"422 (bc_7,DDR_DQ29, bidir, X, 421, 1, Z)," &
"421 (bc_2, *,control, 1          )," &
"420 (bc_7,DDR_DQ30, bidir, X, 419, 1, Z)," &
"419 (bc_2, *,control, 1          )," &
"418 (bc_7,DDR_DQ31, bidir, X, 417, 1, Z)," &
"417 (bc_2, *,control, 1          )," &
"416 (bc_7,DDR_DM3, bidir, X, 415, 1, Z)," &
"415 (bc_2, *,control, 1          )," &
"414 (bc_7,DDR_ECC_D0, bidir, X, 413, 1, Z)," &
"413 (bc_2, *,control, 1          )," &
"412 (bc_7,DDR_ECC_D1, bidir, X, 411, 1, Z)," &
"411 (bc_2, *,control, 1          )," &
"410 (bc_7,DDR_ECC_D2, bidir, X, 409, 1, Z)," &
"409 (bc_2, *,control, 1          )," &
"408 (bc_7,DDR_ECC_D3, bidir, X, 407, 1, Z)," &
"407 (bc_2, *,control, 1          )," &
"406 (bc_7,DDR_ECC_DQSN, bidir, X, 405, 1, Z)," &
"405 (bc_2, *,control, 1          )," &
"404 (bc_7,DDR_ECC_DQSP, bidir, X, 403, 1, Z)," &
"403 (bc_2, *,control, 1          )," &
"402 (bc_7,DDR_ECC_D4, bidir, X, 401, 1, Z)," &
"401 (bc_2, *,control, 1          )," &
"400 (bc_7,DDR_ECC_D5, bidir, X, 399, 1, Z)," &
"399 (bc_2, *,control, 1          )," &
"398 (bc_7,DDR_ECC_D6, bidir, X, 397, 1, Z)," &
"397 (bc_2, *,control, 1          )," &
"396 (bc_7,DDR_ECC_DM, bidir, X, 395, 1, Z)," &
"395 (bc_2, *,control, 1          )," &
"394 (bc_7,NMIn, bidir, X, 393, 1, Z)," &
"393 (bc_2, *,control, 1          )," &
"392 (bc_7,RESETSTATz, bidir, X, 391, 1, Z)," &
"391 (bc_2, *,control, 1          )," &
"390 (bc_7,PORz_OUT, bidir, X, 389, 1, Z)," &
"389 (bc_2, *,control, 1          )," &
"388 (bc_7,SOC_SAFETY_ERRORn, bidir, X, 387, 1, Z)," &
"387 (bc_2, *,control, 1          )," &
"386 (bc_7,I2C0_SCL, bidir, X, 385, 1, Z)," &
"385 (bc_2, *,control, 1          )," &
"384 (bc_7,I2C0_SDA, bidir, X, 383, 1, Z)," &
"383 (bc_2, *,control, 1          )," &
"382 (bc_7,I2C1_SCL, bidir, X, 381, 1, Z)," &
"381 (bc_2, *,control, 1          )," &
"380 (bc_7,I2C1_SDA, bidir, X, 379, 1, Z)," &
"379 (bc_2, *,control, 1          )," &
"378 (bc_7,ECAP0_IN_APWM_OUT, bidir, X, 377, 1, Z)," &
"377 (bc_2, *,control, 1          )," &
"376 (bc_7,EXT_REFCLK1, bidir, X, 375, 1, Z)," &
"375 (bc_2, *,control, 1          )," &
"374 (bc_7,TIMER_IO0, bidir, X, 373, 1, Z)," &
"373 (bc_2, *,control, 1          )," &
"372 (bc_7,TIMER_IO1, bidir, X, 371, 1, Z)," &
"371 (bc_2, *,control, 1          )," &
"370 (bc_1, *,internal, X)," &
"369 (bc_1, *,internal, X)," &
"368 (bc_1, *,internal, X)," &
"367 (bc_1, *,internal, X)," &
"366 (bc_1, *,internal, X)," &
"365 (bc_1, *,internal, X)," &
"364 (bc_1, *,internal, X)," &
"363 (bc_1, *,internal, X)," &
"362 (bc_1, *,internal, X)," &
"361 (bc_1, *,internal, X)," &   
"360 (bc_1, *,internal, X)," &
"359 (bc_1, *,internal, X)," &
"358 (bc_1, *,internal, X)," &
"357 (bc_1, *,internal, X)," &
"356 (bc_1, *,internal, X)," &
"355 (bc_1, *,internal, X)," &
"354 (bc_1, *,internal, X)," &
"353 (bc_1, *,internal, X)," &
"352 (bc_1, *,internal, X)," &
"351 (bc_1, *,internal, X)," &
"350 (bc_1, *,internal, X)," &
"349 (bc_1, *,internal, X)," &
"348 (bc_1, *,internal, X)," &
"347 (bc_1, *,internal, X)," &
"346 (bc_1, *,internal, X)," &
"345 (bc_1, *,internal, X)," &
"344 (bc_1, *,internal, X)," &
"343 (bc_1, *,internal, X)," &
"342 (bc_1, *,internal, X)," &
"341 (bc_1, *,internal, X)," &
"340 (bc_1, *,internal, X)," &
"339 (bc_1, *,internal, X)," &   
"338 (bc_1, *,internal, X)," &
"337 (bc_1, *,internal, X)," &
"336 (bc_1, *,internal, X)," &
"335 (bc_1, *,internal, X)," &
"334 (bc_1, *,internal, X)," &
"333 (bc_1, *,internal, X)," &
"332 (bc_1, *,internal, X)," &
"331 (bc_1, *,internal, X)," &
"330 (bc_1, *,internal, X)," &
"329 (bc_1, *,internal, X)," &
"328 (bc_1, *,internal, X)," &
"327 (bc_1, *,internal, X)," &
"326 (bc_1, *,internal, X)," &
"325 (bc_1, *,internal, X)," &
"324 (bc_1, *,internal, X)," &
"323 (bc_1, *,internal, X)," &
"322 (bc_1, *,internal, X)," &
"321 (bc_1, *,internal, X)," &
"320 (bc_1, *,internal, X)," &
"319 (bc_1, *,internal, X)," &
"318 (bc_7,GPMC0_AD0, bidir, X, 317, 1, Z)," &
"317 (bc_2, *,control, 1          )," &
"316 (bc_7,GPMC0_AD1, bidir, X, 315, 1, Z)," &
"315 (bc_2, *,control, 1          )," &
"314 (bc_7,GPMC0_AD2, bidir, X, 313, 1, Z)," &
"313 (bc_2, *,control, 1          )," &
"312 (bc_7,GPMC0_AD3, bidir, X, 311, 1, Z)," &
"311 (bc_2, *,control, 1          )," &
"310 (bc_7,GPMC0_AD4, bidir, X, 309, 1, Z)," &
"309 (bc_2, *,control, 1          )," &
"308 (bc_7,GPMC0_AD5, bidir, X, 307, 1, Z)," &
"307 (bc_2, *,control, 1          )," &
"306 (bc_7,GPMC0_AD6, bidir, X, 305, 1, Z)," &
"305 (bc_2, *,control, 1          )," &
"304 (bc_7,GPMC0_AD7, bidir, X, 303, 1, Z)," &
"303 (bc_2, *,control, 1          )," &
"302 (bc_7,GPMC0_AD8, bidir, X, 301, 1, Z)," &
"301 (bc_2, *,control, 1          )," &
"300 (bc_7,GPMC0_AD9, bidir, X, 299, 1, Z)," &
"299 (bc_2, *,control, 1          )," &
"298 (bc_7,GPMC0_AD10, bidir, X, 297, 1, Z)," &
"297 (bc_2, *,control, 1          )," &
"296 (bc_7,GPMC0_AD11, bidir, X, 295, 1, Z)," &
"295 (bc_2, *,control, 1          )," &
"294 (bc_7,GPMC0_AD12, bidir, X, 293, 1, Z)," &
"293 (bc_2, *,control, 1          )," &
"292 (bc_7,GPMC0_AD13, bidir, X, 291, 1, Z)," &
"291 (bc_2, *,control, 1          )," &
"290 (bc_7,GPMC0_AD14, bidir, X, 289, 1, Z)," &
"289 (bc_2, *,control, 1          )," &
"288 (bc_7,GPMC0_AD15, bidir, X, 287, 1, Z)," &
"287 (bc_2, *,control, 1          )," &
"286 (bc_7,GPMC0_CLK, bidir, X, 285, 1, Z)," &
"285 (bc_2, *,control, 1          )," &
"284 (bc_7,GPMC0_ADVn_ALE, bidir, X, 283, 1, Z)," &
"283 (bc_2, *,control, 1          )," &
"282 (bc_7,GPMC0_OEn_REn, bidir, X, 281, 1, Z)," &
"281 (bc_2, *,control, 1          )," &
"280 (bc_7,GPMC0_WEn, bidir, X, 279, 1, Z)," &
"279 (bc_2, *,control, 1          )," &
"278 (bc_7,GPMC0_BE0n_CLE, bidir, X, 277, 1, Z)," &
"277 (bc_2, *,control, 1          )," &
"276 (bc_7,GPMC0_BE1n, bidir, X, 275, 1, Z)," &
"275 (bc_2, *,control, 1          )," &
"274 (bc_7,GPMC0_WAIT0, bidir, X, 273, 1, Z)," &
"273 (bc_2, *,control, 1          )," &
"272 (bc_7,GPMC0_WAIT1, bidir, X, 271, 1, Z)," &
"271 (bc_2, *,control, 1          )," &
"270 (bc_7,GPMC0_WPn, bidir, X, 269, 1, Z)," &
"269 (bc_2, *,control, 1          )," &
"268 (bc_7,GPMC0_DIR, bidir, X, 267, 1, Z)," &
"267 (bc_2, *,control, 1          )," &
"266 (bc_7,GPMC0_CSn0, bidir, X, 265, 1, Z)," &
"265 (bc_2, *,control, 1          )," &
"264 (bc_7,GPMC0_CSn1, bidir, X, 263, 1, Z)," &
"263 (bc_2, *,control, 1          )," &
"262 (bc_7,GPMC0_CSn2, bidir, X, 261, 1, Z)," &
"261 (bc_2, *,control, 1          )," &
"260 (bc_7,GPMC0_CSn3, bidir, X, 259, 1, Z)," &
"259 (bc_2, *,control, 1          )," &
"258 (bc_7,PRG0_PRU0_GPO5, bidir, X, 257, 1, Z)," &
"257 (bc_2, *,control, 1          )," &
"256 (bc_7,PRG0_PRU0_GPO7, bidir, X, 255, 1, Z)," &
"255 (bc_2, *,control, 1          )," &
"254 (bc_7,PRG0_PRU0_GPO8, bidir, X, 253, 1, Z)," &
"253 (bc_2, *,control, 1          )," &
"252 (bc_7,PRG0_PRU0_GPO9, bidir, X, 251, 1, Z)," &
"251 (bc_2, *,control, 1          )," &
"250 (bc_7,PRG0_PRU0_GPO10, bidir, X, 249, 1, Z)," &
"249 (bc_2, *,control, 1          )," &
"248 (bc_7,PRG0_PRU0_GPO17, bidir, X, 247, 1, Z)," &
"247 (bc_2, *,control, 1          )," &
"246 (bc_7,PRG0_PRU0_GPO18, bidir, X, 245, 1, Z)," &
"245 (bc_2, *,control, 1          )," &
"244 (bc_7,PRG0_PRU0_GPO19, bidir, X, 243, 1, Z)," &
"243 (bc_2, *,control, 1          )," &
"242 (bc_7,PRG0_PRU1_GPO5, bidir, X, 241, 1, Z)," &
"241 (bc_2, *,control, 1          )," &
"240 (bc_7,PRG0_PRU1_GPO7, bidir, X, 239, 1, Z)," &
"239 (bc_2, *,control, 1          )," &
"238 (bc_7,PRG0_PRU1_GPO8, bidir, X, 237, 1, Z)," &
"237 (bc_2, *,control, 1          )," &
"236 (bc_7,PRG0_PRU1_GPO9, bidir, X, 235, 1, Z)," &
"235 (bc_2, *,control, 1          )," &
"234 (bc_7,PRG0_PRU1_GPO10, bidir, X, 233, 1, Z)," &
"233 (bc_2, *,control, 1          )," &
"232 (bc_7,PRG0_PRU1_GPO17, bidir, X, 231, 1, Z)," &
"231 (bc_2, *,control, 1          )," &
"230 (bc_7,PRG0_PRU1_GPO18, bidir, X, 229, 1, Z)," &
"229 (bc_2, *,control, 1          )," &
"228 (bc_7,PRG0_PRU1_GPO19, bidir, X, 227, 1, Z)," &
"227 (bc_2, *,control, 1          )," &
"226 (bc_7,PRG0_PRU0_GPO0, bidir, X, 225, 1, Z)," &
"225 (bc_2, *,control, 1          )," &
"224 (bc_7,PRG0_PRU0_GPO1, bidir, X, 223, 1, Z)," &
"223 (bc_2, *,control, 1          )," &
"222 (bc_7,PRG0_PRU0_GPO6, bidir, X, 221, 1, Z)," &
"221 (bc_2, *,control, 1          )," &
"220 (bc_7,PRG0_PRU0_GPO2, bidir, X, 219, 1, Z)," &
"219 (bc_2, *,control, 1          )," &
"218 (bc_7,PRG0_PRU0_GPO3, bidir, X, 217, 1, Z)," &
"217 (bc_2, *,control, 1          )," &
"216 (bc_7,PRG0_PRU0_GPO4, bidir, X, 215, 1, Z)," &
"215 (bc_2, *,control, 1          )," &
"214 (bc_7,PRG0_PRU1_GPO0, bidir, X, 213, 1, Z)," &
"213 (bc_2, *,control, 1          )," &
"212 (bc_7,PRG0_PRU1_GPO1, bidir, X, 211, 1, Z)," &
"211 (bc_2, *,control, 1          )," &
"210 (bc_7,PRG0_PRU1_GPO6, bidir, X, 209, 1, Z)," &
"209 (bc_2, *,control, 1          )," &
"208 (bc_7,PRG0_PRU1_GPO2, bidir, X, 207, 1, Z)," &
"207 (bc_2, *,control, 1          )," &
"206 (bc_7,PRG0_PRU1_GPO3, bidir, X, 205, 1, Z)," &
"205 (bc_2, *,control, 1          )," &
"204 (bc_7,PRG0_PRU1_GPO4, bidir, X, 203, 1, Z)," &
"203 (bc_2, *,control, 1          )," &
"202 (bc_7,PRG0_PRU0_GPO11, bidir, X, 201, 1, Z)," &
"201 (bc_2, *,control, 1          )," &
"200 (bc_7,PRG0_PRU0_GPO12, bidir, X, 199, 1, Z)," &
"199 (bc_2, *,control, 1          )," &
"198 (bc_7,PRG0_PRU0_GPO13, bidir, X, 197, 1, Z)," &
"197 (bc_2, *,control, 1          )," &
"196 (bc_7,PRG0_PRU0_GPO16, bidir, X, 195, 1, Z)," &
"195 (bc_2, *,control, 1          )," &
"194 (bc_7,PRG0_PRU0_GPO14, bidir, X, 193, 1, Z)," &
"193 (bc_2, *,control, 1          )," &
"192 (bc_7,PRG0_PRU0_GPO15, bidir, X, 191, 1, Z)," &
"191 (bc_2, *,control, 1          )," &
"190 (bc_7,PRG0_PRU1_GPO11, bidir, X, 189, 1, Z)," &
"189 (bc_2, *,control, 1          )," &
"188 (bc_7,PRG0_PRU1_GPO12, bidir, X, 187, 1, Z)," &
"187 (bc_2, *,control, 1          )," &
"186 (bc_7,PRG0_PRU1_GPO13, bidir, X, 185, 1, Z)," &
"185 (bc_2, *,control, 1          )," &
"184 (bc_7,PRG0_PRU1_GPO16, bidir, X, 183, 1, Z)," &
"183 (bc_2, *,control, 1          )," &
"182 (bc_7,PRG0_PRU1_GPO14, bidir, X, 181, 1, Z)," &
"181 (bc_2, *,control, 1          )," &
"180 (bc_7,PRG0_PRU1_GPO15, bidir, X, 179, 1, Z)," &
"179 (bc_2, *,control, 1          )," &
"178 (bc_7,PRG0_MDIO0_MDIO, bidir, X, 177, 1, Z)," &
"177 (bc_2, *,control, 1          )," &
"176 (bc_7,PRG0_MDIO0_MDC, bidir, X, 175, 1, Z)," &
"175 (bc_2, *,control, 1          )," &
"174 (bc_7,PRG1_PRU0_GPO5, bidir, X, 173, 1, Z)," &
"173 (bc_2, *,control, 1          )," &
"172 (bc_7,PRG1_PRU0_GPO7, bidir, X, 171, 1, Z)," &
"171 (bc_2, *,control, 1          )," &
"170 (bc_7,PRG1_PRU0_GPO8, bidir, X, 169, 1, Z)," &
"169 (bc_2, *,control, 1          )," &
"168 (bc_7,PRG1_PRU0_GPO9, bidir, X, 167, 1, Z)," &
"167 (bc_2, *,control, 1          )," &
"166 (bc_7,PRG1_PRU0_GPO19, bidir, X, 165, 1, Z)," &
"165 (bc_2, *,control, 1          )," &
"164 (bc_7,PRG1_PRU0_GPO17, bidir, X, 163, 1, Z)," &
"163 (bc_2, *,control, 1          )," &
"162 (bc_7,PRG1_PRU0_GPO18, bidir, X, 161, 1, Z)," &
"161 (bc_2, *,control, 1          )," &
"160 (bc_7,PRG1_PRU0_GPO10, bidir, X, 159, 1, Z)," &
"159 (bc_2, *,control, 1          )," &
"158 (bc_7,PRG1_PRU1_GPO5, bidir, X, 157, 1, Z)," &
"157 (bc_2, *,control, 1          )," &
"156 (bc_7,PRG1_PRU1_GPO7, bidir, X, 155, 1, Z)," &
"155 (bc_2, *,control, 1          )," &
"154 (bc_7,PRG1_PRU1_GPO8, bidir, X, 153, 1, Z)," &
"153 (bc_2, *,control, 1          )," &
"152 (bc_7,PRG1_PRU1_GPO9, bidir, X, 151, 1, Z)," &
"151 (bc_2, *,control, 1          )," &
"150 (bc_7,PRG1_PRU1_GPO10, bidir, X, 149, 1, Z)," &
"149 (bc_2, *,control, 1          )," &
"148 (bc_7,PRG1_PRU1_GPO17, bidir, X, 147, 1, Z)," &
"147 (bc_2, *,control, 1          )," &
"146 (bc_7,PRG1_PRU1_GPO18, bidir, X, 145, 1, Z)," &
"145 (bc_2, *,control, 1          )," &
"144 (bc_7,PRG1_PRU1_GPO19, bidir, X, 143, 1, Z)," &
"143 (bc_2, *,control, 1          )," &
"142 (bc_7,PRG1_PRU0_GPO0, bidir, X, 141, 1, Z)," &
"141 (bc_2, *,control, 1          )," &
"140 (bc_7,PRG1_PRU0_GPO1, bidir, X, 139, 1, Z)," &
"139 (bc_2, *,control, 1          )," &
"138 (bc_7,PRG1_PRU0_GPO6, bidir, X, 137, 1, Z)," &
"137 (bc_2, *,control, 1          )," &
"136 (bc_7,PRG1_PRU0_GPO2, bidir, X, 135, 1, Z)," &
"135 (bc_2, *,control, 1          )," &
"134 (bc_7,PRG1_PRU0_GPO3, bidir, X, 133, 1, Z)," &
"133 (bc_2, *,control, 1          )," &
"132 (bc_7,PRG1_PRU0_GPO4, bidir, X, 131, 1, Z)," &
"131 (bc_2, *,control, 1          )," &
"130 (bc_7,PRG1_PRU1_GPO0, bidir, X, 129, 1, Z)," &
"129 (bc_2, *,control, 1          )," &
"128 (bc_7,PRG1_PRU1_GPO1, bidir, X, 127, 1, Z)," &
"127 (bc_2, *,control, 1          )," &
"126 (bc_7,PRG1_PRU1_GPO6, bidir, X, 125, 1, Z)," &
"125 (bc_2, *,control, 1          )," &
"124 (bc_7,PRG1_PRU1_GPO2, bidir, X, 123, 1, Z)," &
"123 (bc_2, *,control, 1          )," &
"122 (bc_7,PRG1_PRU1_GPO3, bidir, X, 121, 1, Z)," &
"121 (bc_2, *,control, 1          )," &
"120 (bc_7,PRG1_PRU1_GPO4, bidir, X, 119, 1, Z)," &
"119 (bc_2, *,control, 1          )," &
"118 (bc_7,PRG1_PRU0_GPO11, bidir, X, 117, 1, Z)," &
"117 (bc_2, *,control, 1          )," &
"116 (bc_7,PRG1_PRU0_GPO12, bidir, X, 115, 1, Z)," &
"115 (bc_2, *,control, 1          )," &
"114 (bc_7,PRG1_PRU0_GPO13, bidir, X, 113, 1, Z)," &
"113 (bc_2, *,control, 1          )," &
"112 (bc_7,PRG1_PRU0_GPO16, bidir, X, 111, 1, Z)," &
"111 (bc_2, *,control, 1          )," &
"110 (bc_7,PRG1_PRU0_GPO14, bidir, X, 109, 1, Z)," &
"109 (bc_2, *,control, 1          )," &
"108 (bc_7,PRG1_PRU0_GPO15, bidir, X, 107, 1, Z)," &
"107 (bc_2, *,control, 1          )," &
"106 (bc_7,PRG1_PRU1_GPO11, bidir, X, 105, 1, Z)," &
"105 (bc_2, *,control, 1          )," &
"104 (bc_7,PRG1_PRU1_GPO12, bidir, X, 103, 1, Z)," &
"103 (bc_2, *,control, 1          )," &
"102 (bc_7,PRG1_PRU1_GPO13, bidir, X, 101, 1, Z)," &
"101 (bc_2, *,control, 1          )," &
"100 (bc_7,PRG1_PRU1_GPO16, bidir, X, 99, 1, Z)," &
"99 (bc_2, *,control, 1          )," &
"98 (bc_7,PRG1_PRU1_GPO14, bidir, X, 97, 1, Z)," &
"97 (bc_2, *,control, 1          )," &
"96 (bc_7,PRG1_PRU1_GPO15, bidir, X, 95, 1, Z)," &
"95 (bc_2, *,control, 1          )," &
"94 (bc_7,PRG1_MDIO0_MDIO, bidir, X, 93, 1, Z)," &
"93 (bc_2, *,control, 1          )," &
"92 (bc_7,PRG1_MDIO0_MDC, bidir, X, 91, 1, Z)," &
"91 (bc_2, *,control, 1          )," &
"90 (bc_7,PRG2_PRU0_GPO0, bidir, X, 89, 1, Z)," &
"89 (bc_2, *,control, 1          )," &
"88 (bc_7,PRG2_PRU0_GPO1, bidir, X, 87, 1, Z)," &
"87 (bc_2, *,control, 1          )," &
"86 (bc_7,PRG2_PRU0_GPO2, bidir, X, 85, 1, Z)," &
"85 (bc_2, *,control, 1          )," &
"84 (bc_7,PRG2_PRU0_GPO3, bidir, X, 83, 1, Z)," &
"83 (bc_2, *,control, 1          )," &
"82 (bc_7,PRG2_PRU0_GPO4, bidir, X, 81, 1, Z)," &
"81 (bc_2, *,control, 1          )," &
"80 (bc_7,PRG2_PRU0_GPO5, bidir, X, 79, 1, Z)," &
"79 (bc_2, *,control, 1          )," &
"78 (bc_7,PRG2_PRU0_GPO6, bidir, X, 77, 1, Z)," &
"77 (bc_2, *,control, 1          )," &
"76 (bc_7,PRG2_PRU0_GPO7, bidir, X, 75, 1, Z)," &
"75 (bc_2, *,control, 1          )," &
"74 (bc_7,PRG2_PRU0_GPO8, bidir, X, 73, 1, Z)," &
"73 (bc_2, *,control, 1          )," &
"72 (bc_7,PRG2_PRU0_GPO9, bidir, X, 71, 1, Z)," &
"71 (bc_2, *,control, 1          )," &
"70 (bc_7,PRG2_PRU0_GPO10, bidir, X, 69, 1, Z)," &
"69 (bc_2, *,control, 1          )," &
"68 (bc_7,PRG2_PRU0_GPO11, bidir, X, 67, 1, Z)," &
"67 (bc_2, *,control, 1          )," &
"66 (bc_7,PRG2_PRU0_GPO16, bidir, X, 65, 1, Z)," &
"65 (bc_2, *,control, 1          )," &
"64 (bc_7,PRG2_PRU1_GPO0, bidir, X, 63, 1, Z)," &
"63 (bc_2, *,control, 1          )," &
"62 (bc_7,PRG2_PRU1_GPO1, bidir, X, 61, 1, Z)," &
"61 (bc_2, *,control, 1          )," &
"60 (bc_7,PRG2_PRU1_GPO2, bidir, X, 59, 1, Z)," &
"59 (bc_2, *,control, 1          )," &
"58 (bc_7,PRG2_PRU1_GPO3, bidir, X, 57, 1, Z)," &
"57 (bc_2, *,control, 1          )," &
"56 (bc_7,PRG2_PRU1_GPO4, bidir, X, 55, 1, Z)," &
"55 (bc_2, *,control, 1          )," &
"54 (bc_7,PRG2_PRU1_GPO5, bidir, X, 53, 1, Z)," &
"53 (bc_2, *,control, 1          )," &
"52 (bc_7,PRG2_PRU1_GPO6, bidir, X, 51, 1, Z)," &
"51 (bc_2, *,control, 1          )," &
"50 (bc_7,PRG2_PRU1_GPO7, bidir, X, 49, 1, Z)," &
"49 (bc_2, *,control, 1          )," &
"48 (bc_7,PRG2_PRU1_GPO8, bidir, X, 47, 1, Z)," &
"47 (bc_2, *,control, 1          )," &
"46 (bc_7,PRG2_PRU1_GPO9, bidir, X, 45, 1, Z)," &
"45 (bc_2, *,control, 1          )," &
"44 (bc_7,PRG2_PRU1_GPO10, bidir, X, 43, 1, Z)," &
"43 (bc_2, *,control, 1          )," &
"42 (bc_7,PRG2_PRU1_GPO11, bidir, X, 41, 1, Z)," &
"41 (bc_2, *,control, 1          )," &
"40 (bc_7,PRG2_PRU1_GPO16, bidir, X, 39, 1, Z)," &
"39 (bc_2, *,control, 1          )," &
"38 (bc_7,SPI0_CS0, bidir, X, 37, 1, Z)," &
"37 (bc_2, *,control, 1          )," &
"36 (bc_7,SPI0_CS1, bidir, X, 35, 1, Z)," &
"35 (bc_2, *,control, 1          )," &
"34 (bc_7,SPI0_CLK, bidir, X, 33, 1, Z)," &
"33 (bc_2, *,control, 1          )," &
"32 (bc_7,SPI0_D0, bidir, X, 31, 1, Z)," &
"31 (bc_2, *,control, 1          )," &
"30 (bc_7,SPI0_D1, bidir, X, 29, 1, Z)," &
"29 (bc_2, *,control, 1          )," &
"28 (bc_7,SPI1_CS0, bidir, X, 27, 1, Z)," &
"27 (bc_2, *,control, 1          )," &
"26 (bc_7,SPI1_CS1, bidir, X, 25, 1, Z)," &
"25 (bc_2, *,control, 1          )," &
"24 (bc_7,SPI1_CLK, bidir, X, 23, 1, Z)," &
"23 (bc_2, *,control, 1          )," &
"22 (bc_7,SPI1_D0, bidir, X, 21, 1, Z)," &
"21 (bc_2, *,control, 1          )," &
"20 (bc_7,SPI1_D1, bidir, X, 19, 1, Z)," &
"19 (bc_2, *,control, 1          )," &
"18 (bc_7,UART0_CTSn, bidir, X, 17, 1, Z)," &
"17 (bc_2, *,control, 1          )," &
"16 (bc_7,UART0_RTSn, bidir, X, 15, 1, Z)," &
"15 (bc_2, *,control, 1          )," &
"14 (bc_7,UART0_RXD, bidir, X, 13, 1, Z)," &
"13 (bc_2, *,control, 1          )," &
"12 (bc_7,UART0_TXD, bidir, X, 11, 1, Z)," &
"11 (bc_2, *,control, 1          )," &
"10 (bc_4, *,internal, X)," &
"9 (bc_4, *,internal, X)," &
"8 (bc_4, *,internal, X)," &
"7 (bc_1, *,internal, X)," &
"6 (bc_4, *,internal, X)," &
"5 (bc_4, *,internal, X)," &
"4 (bc_1, *,internal, X)," &
"3 (bc_7,USB0_DRVVBUS, bidir, X, 2, 1, Z)," &
"2 (bc_2, *,control, 1          )," &
"1 (bc_7,USB1_DRVVBUS, bidir, X, 0, 1, Z)," &
"0 (bc_2, *,control, 1)"; 



 attribute DESIGN_WARNING of AM65xx_DRA80xM : entity is
	" According to simulation, BSD JTAG TAP may not work correctly unless		"&
	" device has completed RESET sequence first.					"&
        "										"&
	" Forcing PORZ, RESETz, MCU_PORZ, MCU_RESETz low then release with clock        "&
	" applied to WKUP_OSC0_XI would meet the requirement.				"&
	"										"&
	" Note that boundary scan registers with disable result WEAK1 are		"&
	" open drain type pins, which will require external pull-ups for		"&
	" tests to perform correctly.							"&
	"										"&
	" In order to enter bscan mode correctly, tms must be low at the		"&
	" rising edge of wkup_trstz and at least one cycle after wkup_trstz is high.	"&
	"										";


end AM65xx_DRA80xM;