-- ***********************************************************************
-- BSDL file for design ds3112
-- Created by Synopsys Version 1999.10-3 (Oct 28, 1999)
-- Designer: Bob Gilkison
-- Company: Dallas Semiconductor
-- Date: Fri Mar 10 11:57:59 2000
-- ***********************************************************************
entity ds3112 is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "PBGA_256");
-- This section declares all the ports in the design.
port (
ale : in bit;
ccs_n : in bit;
cim : in bit;
cms : in bit;
crd_n : in bit;
cwr_n : in bit;
frmecu : in bit;
ftclk : in bit;
ftd : in bit;
ftmei : in bit;
g747e : in bit;
hrclk : in bit;
hrneg : in bit;
hrpos : in bit;
jtclk : in bit;
jtdi : in bit;
jtms : in bit;
jtrst_n : in bit;
lrcclk : in bit;
ltcclk : in bit;
ltclka : in bit;
ltclkb : in bit;
ltdata : in bit;
ltdatb : in bit;
rst_n : in bit;
t3e3ms : in bit;
test_n : in bit;
ca : in bit_vector (0 to 7);
ltclk : in bit_vector (1 to 28);
ltdat : in bit_vector (1 to 28);
ftsof : inout bit;
cd : inout bit_vector (0 to 15);
cint_n : out bit;
frclk : out bit;
frd : out bit;
frden : out bit;
frlof : out bit;
frlos : out bit;
frsof : out bit;
ftden : out bit;
htclk : out bit;
htneg : out bit;
htpos : out bit;
jtdo : out bit;
lrclka : out bit;
lrclkb : out bit;
lrdata : out bit;
lrdatb : out bit;
lrclk : out bit_vector (1 to 28);
lrdat : out bit_vector (1 to 28);
VDD : linkage bit_vector (1 to 16);
VSS : linkage bit_vector (1 to 17)
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of ds3112: entity is "STD_1149_1_1993";
attribute PIN_MAP of ds3112: entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information
-- is extracted from the port-to-pin map file that was read in using
-- the "read_pin_map" command.
constant PBGA_256: PIN_MAP_STRING :=
"ale : C7," &
"ccs_n : C4," &
"cim : B3," &
"cms : B2," &
"crd_n : D5," &
"cwr_n : A3," &
"frmecu : A7," &
"ftclk : A10," &
"ftd : B10," &
"ftmei : C11," &
"g747e : B6," &
"hrclk : A13," &
"hrneg : C12," &
"hrpos : B13," &
"jtclk : D7," &
"jtdi : B5," &
"jtms : A5," &
"jtrst_n : C6," &
"lrcclk : G20," &
"ltcclk : G19," &
"ltclka : L2," &
"ltclkb : M3," &
"ltdata : L1," &
"ltdatb : M2," &
"rst_n : C5," &
"t3e3ms : B4," &
"test_n : C3," &
"ca : (H3, H2, H1, J4, J3, J2, J1, K2)," &
"ltclk : (P1, R2, U1, T4, V3, V4, V5, U7, W7, Y8, Y9, Y11, W12, " &
"V13, V14, V15, W17, W18, Y20, U18, T18, P17, P19, N20, M20, K20, " &
"J19, H18)," &
"ltdat : (N3, P3, T2, V1, W1, W4, Y4, V6, V7, W8, W9, Y10, Y12, " &
"W13, Y15, U14, V16, V17, W19, U19, U20, R18, P18, N19, M19, L20, " &
"J20, H19)," &
"ftsof : A11," &
"cd : (C2, D2, D3, E4, C1, D1, E3, E2, E1, F3, G4, F2, F1, G3" &
", G2, G1)," &
"cint_n : A2," &
"frclk : A9," &
"frd : B9," &
"frden : C9," &
"frlof : C8," &
"frlos : B8," &
"frsof : A8," &
"ftden : C10," &
"htclk : B14," &
"htneg : A14," &
"htpos : C14," &
"jtdo : A4," &
"lrclka : K1," &
"lrclkb : M1," &
"lrdata : K3," &
"lrdatb : L3," &
"lrclk : (N2, R1, R3, U2, V2, Y2, Y3, Y5, Y6, V8, V9, V10, V11, " &
"Y13, W14, Y16, Y17, U16, V18, V19, V20, T20, R20, N18, M18, L18, " &
"K18, H20)," &
"lrdat : (N1, P2, P4, T3, U3, W3, U5, W5, W6, Y7, U9, W10, W11, " &
"V12, Y14, W15, W16, Y18, Y19, W20, T17, T19, R19, P20, M17, L19, " &
"K19, J18)," &
"VDD : (U6, U15, U11, U10, R4, R17, L4, L17, K4, K17, F4, F17" &
", D6, D15, D11, D10)," &
"VSS : (U8, U4, U17, U13, U12, N4, N17, M4, J17, H4, H17, D9, " &
"D8, D4, D17, D13, A1)";
-- This section specifies the TAP ports.
-- For the TAP TCK port, the parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of jtclk : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of jtdi : signal is true;
attribute TAP_SCAN_MODE of jtms : signal is true;
attribute TAP_SCAN_OUT of jtdo : signal is true;
attribute TAP_SCAN_RESET of jtrst_n: signal is true;
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of ds3112: entity is 3;
-- Specifies the boundary-scan instructions implemented in the
-- design and their opcodes.
attribute INSTRUCTION_OPCODE of ds3112: entity is
"BYPASS (111)," &
"EXTEST (000)," &
"SAMPLE (010)," &
"CLAMP (011)," &
"HIGHZ (100)," &
"USER1 (110)," &
"IDCODE (001)";
-- Specifies the bit pattern that is loaded into the instruction
-- register when the TAP controller passes through the Capture-IR
-- state. The standard mandates that the two LSBs must be "01".
-- The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of ds3112: entity is "001";
-- Specifies the bit pattern that is loaded into the DEVICE_ID
-- register during the IDCODE instruction when the TAP controller
-- passes through the Capture-DR state.
attribute IDCODE_REGISTER of ds3112: entity is
"0000" & -- 4-bit version number
"0000000000001011" & -- 16-bit part number
"00010100001" & -- 11-bit identity of the manufacturer
"1"; -- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI
-- and TDO for each implemented instruction.
attribute REGISTER_ACCESS of ds3112: entity is
"BYPASS (BYPASS, CLAMP, HIGHZ, USER1)," &
"BOUNDARY (EXTEST, SAMPLE)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of ds3112: entity is 197;
-- The following list specifies the characteristics of each cell
-- in the boundary scan register from TDI to TDO.
-- The following is a description of the label fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not
-- have a port name.
-- function: Is the function of the cell as defined by the
-- standard. Is one of input, output2, output3,
-- bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be
-- loaded with for safe operation when the software
-- might otherwise choose a random value.
-- ccell : The control cell number. Specifies the control
-- cell that drives the output enable for this port.
-- disval : Specifies the value that is loaded into the
-- control cell to disable the output enable for
-- the corresponding port.
-- rslt : Resulting state. Shows the state of the driver
-- when it is disabled.
attribute BOUNDARY_REGISTER of ds3112: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"196 (BC_1, *, control, 1), " &
"195 (BC_4, cd(0), observe_only, X), " &
"194 (BC_1, cd(0), output3, X, 196, 1, Z), " &
"193 (BC_4, cd(1), observe_only, X), " &
"192 (BC_1, cd(1), output3, X, 196, 1, Z), " &
"191 (BC_4, cd(2), observe_only, X), " &
"190 (BC_1, cd(2), output3, X, 196, 1, Z), " &
"189 (BC_4, cd(3), observe_only, X), " &
"188 (BC_1, cd(3), output3, X, 196, 1, Z), " &
"187 (BC_4, cd(4), observe_only, X), " &
"186 (BC_1, cd(4), output3, X, 196, 1, Z), " &
"185 (BC_4, cd(5), observe_only, X), " &
"184 (BC_1, cd(5), output3, X, 196, 1, Z), " &
"183 (BC_4, cd(6), observe_only, X), " &
"182 (BC_1, cd(6), output3, X, 196, 1, Z), " &
"181 (BC_4, cd(7), observe_only, X), " &
"180 (BC_1, cd(7), output3, X, 196, 1, Z), " &
"179 (BC_4, cd(8), observe_only, X), " &
"178 (BC_1, cd(8), output3, X, 196, 1, Z), " &
"177 (BC_4, cd(9), observe_only, X), " &
"176 (BC_1, cd(9), output3, X, 196, 1, Z), " &
"175 (BC_4, cd(10), observe_only, X), " &
"174 (BC_1, cd(10), output3, X, 196, 1, Z), " &
"173 (BC_4, cd(11), observe_only, X), " &
"172 (BC_1, cd(11), output3, X, 196, 1, Z), " &
"171 (BC_4, cd(12), observe_only, X), " &
"170 (BC_1, cd(12), output3, X, 196, 1, Z), " &
"169 (BC_4, cd(13), observe_only, X), " &
"168 (BC_1, cd(13), output3, X, 196, 1, Z), " &
"167 (BC_4, cd(14), observe_only, X), " &
"166 (BC_1, cd(14), output3, X, 196, 1, Z), " &
"165 (BC_4, cd(15), observe_only, X), " &
"164 (BC_1, cd(15), output3, X, 196, 1, Z), " &
"163 (BC_4, ca(0), observe_only, X), " &
"162 (BC_4, ca(1), observe_only, X), " &
"161 (BC_4, ca(2), observe_only, X), " &
"160 (BC_4, ca(3), observe_only, X), " &
"159 (BC_4, ca(4), observe_only, X), " &
"158 (BC_4, ca(5), observe_only, X), " &
"157 (BC_4, ca(6), observe_only, X), " &
"156 (BC_4, ca(7), observe_only, X), " &
"155 (BC_1, lrdata, output3, X, 0, 1, Z), " &
"154 (BC_1, lrclka, output3, X, 0, 1, Z), " &
"153 (BC_4, ltdata, observe_only, X), " &
"152 (BC_4, ltclka, observe_only, X), " &
"151 (BC_1, lrdatb, output3, X, 0, 1, Z), " &
"150 (BC_1, lrclkb, output3, X, 0, 1, Z), " &
"149 (BC_4, ltdatb, observe_only, X), " &
"148 (BC_4, ltclkb, observe_only, X), " &
"147 (BC_1, lrdat(1), output3, X, 0, 1, Z), " &
"146 (BC_1, lrclk(1), output3, X, 0, 1, Z), " &
"145 (BC_4, ltdat(1), observe_only, X), " &
"144 (BC_4, ltclk(1), observe_only, X), " &
"143 (BC_1, lrdat(2), output3, X, 0, 1, Z), " &
"142 (BC_1, lrclk(2), output3, X, 0, 1, Z), " &
"141 (BC_4, ltdat(2), observe_only, X), " &
"140 (BC_4, ltclk(2), observe_only, X), " &
"139 (BC_1, lrdat(3), output3, X, 0, 1, Z), " &
"138 (BC_1, lrclk(3), output3, X, 0, 1, Z), " &
"137 (BC_4, ltdat(3), observe_only, X), " &
"136 (BC_4, ltclk(3), observe_only, X), " &
"135 (BC_1, lrdat(4), output3, X, 0, 1, Z), " &
"134 (BC_1, lrclk(4), output3, X, 0, 1, Z), " &
"133 (BC_4, ltdat(4), observe_only, X), " &
"132 (BC_4, ltclk(4), observe_only, X), " &
"131 (BC_1, lrdat(5), output3, X, 0, 1, Z), " &
"130 (BC_1, lrclk(5), output3, X, 0, 1, Z), " &
"129 (BC_4, ltdat(5), observe_only, X), " &
"128 (BC_4, ltclk(5), observe_only, X), " &
"127 (BC_1, lrdat(6), output3, X, 0, 1, Z), " &
"126 (BC_1, lrclk(6), output3, X, 0, 1, Z), " &
"125 (BC_4, ltdat(6), observe_only, X), " &
"124 (BC_4, ltclk(6), observe_only, X), " &
"123 (BC_1, lrdat(7), output3, X, 0, 1, Z), " &
"122 (BC_1, lrclk(7), output3, X, 0, 1, Z), " &
"121 (BC_4, ltdat(7), observe_only, X), " &
"120 (BC_4, ltclk(7), observe_only, X), " &
"119 (BC_1, lrdat(8), output3, X, 0, 1, Z), " &
"118 (BC_1, lrclk(8), output3, X, 0, 1, Z), " &
"117 (BC_4, ltdat(8), observe_only, X), " &
"116 (BC_4, ltclk(8), observe_only, X), " &
"115 (BC_1, lrdat(9), output3, X, 0, 1, Z), " &
"114 (BC_1, lrclk(9), output3, X, 0, 1, Z), " &
"113 (BC_4, ltdat(9), observe_only, X), " &
"112 (BC_4, ltclk(9), observe_only, X), " &
"111 (BC_1, lrdat(10), output3, X, 0, 1, Z), " &
"110 (BC_1, lrclk(10), output3, X, 0, 1, Z), " &
"109 (BC_4, ltdat(10), observe_only, X), " &
"108 (BC_4, ltclk(10), observe_only, X), " &
"107 (BC_1, lrdat(11), output3, X, 0, 1, Z), " &
"106 (BC_1, lrclk(11), output3, X, 0, 1, Z), " &
"105 (BC_4, ltdat(11), observe_only, X), " &
"104 (BC_4, ltclk(11), observe_only, X), " &
"103 (BC_1, lrdat(12), output3, X, 0, 1, Z), " &
"102 (BC_1, lrclk(12), output3, X, 0, 1, Z), " &
"101 (BC_4, ltdat(12), observe_only, X), " &
"100 (BC_4, ltclk(12), observe_only, X), " &
"99 (BC_1, lrdat(13), output3, X, 0, 1, Z), " &
"98 (BC_1, lrclk(13), output3, X, 0, 1, Z), " &
"97 (BC_4, ltdat(13), observe_only, X), " &
"96 (BC_4, ltclk(13), observe_only, X), " &
"95 (BC_1, lrdat(14), output3, X, 0, 1, Z), " &
"94 (BC_1, lrclk(14), output3, X, 0, 1, Z), " &
"93 (BC_4, ltdat(14), observe_only, X), " &
"92 (BC_4, ltclk(14), observe_only, X), " &
"91 (BC_1, lrdat(15), output3, X, 0, 1, Z), " &
"90 (BC_1, lrclk(15), output3, X, 0, 1, Z), " &
"89 (BC_4, ltdat(15), observe_only, X), " &
"88 (BC_4, ltclk(15), observe_only, X), " &
"87 (BC_1, lrdat(16), output3, X, 0, 1, Z), " &
"86 (BC_1, lrclk(16), output3, X, 0, 1, Z), " &
"85 (BC_4, ltdat(16), observe_only, X), " &
"84 (BC_4, ltclk(16), observe_only, X), " &
"83 (BC_1, lrdat(17), output3, X, 0, 1, Z), " &
"82 (BC_1, lrclk(17), output3, X, 0, 1, Z), " &
"81 (BC_4, ltdat(17), observe_only, X), " &
"80 (BC_4, ltclk(17), observe_only, X), " &
"79 (BC_1, lrdat(18), output3, X, 0, 1, Z), " &
"78 (BC_1, lrclk(18), output3, X, 0, 1, Z), " &
"77 (BC_4, ltdat(18), observe_only, X), " &
"76 (BC_4, ltclk(18), observe_only, X), " &
"75 (BC_1, lrdat(19), output3, X, 0, 1, Z), " &
"74 (BC_1, lrclk(19), output3, X, 0, 1, Z), " &
"73 (BC_4, ltdat(19), observe_only, X), " &
"72 (BC_4, ltclk(19), observe_only, X), " &
"71 (BC_1, lrdat(20), output3, X, 0, 1, Z), " &
"70 (BC_1, lrclk(20), output3, X, 0, 1, Z), " &
"69 (BC_4, ltdat(20), observe_only, X), " &
"68 (BC_4, ltclk(20), observe_only, X), " &
"67 (BC_1, lrdat(21), output3, X, 0, 1, Z), " &
"66 (BC_1, lrclk(21), output3, X, 0, 1, Z), " &
"65 (BC_4, ltdat(21), observe_only, X), " &
"64 (BC_4, ltclk(21), observe_only, X), " &
"63 (BC_1, lrdat(22), output3, X, 0, 1, Z), " &
"62 (BC_1, lrclk(22), output3, X, 0, 1, Z), " &
"61 (BC_4, ltdat(22), observe_only, X), " &
"60 (BC_4, ltclk(22), observe_only, X), " &
"59 (BC_1, lrdat(23), output3, X, 0, 1, Z), " &
"58 (BC_1, lrclk(23), output3, X, 0, 1, Z), " &
"57 (BC_4, ltdat(23), observe_only, X), " &
"56 (BC_4, ltclk(23), observe_only, X), " &
"55 (BC_1, lrdat(24), output3, X, 0, 1, Z), " &
"54 (BC_1, lrclk(24), output3, X, 0, 1, Z), " &
"53 (BC_4, ltdat(24), observe_only, X), " &
"52 (BC_4, ltclk(24), observe_only, X), " &
"51 (BC_1, lrdat(25), output3, X, 0, 1, Z), " &
"50 (BC_1, lrclk(25), output3, X, 0, 1, Z), " &
"49 (BC_4, ltdat(25), observe_only, X), " &
"48 (BC_4, ltclk(25), observe_only, X), " &
"47 (BC_1, lrdat(26), output3, X, 0, 1, Z), " &
"46 (BC_1, lrclk(26), output3, X, 0, 1, Z), " &
"45 (BC_4, ltdat(26), observe_only, X), " &
"44 (BC_4, ltclk(26), observe_only, X), " &
"43 (BC_1, lrdat(27), output3, X, 0, 1, Z), " &
"42 (BC_1, lrclk(27), output3, X, 0, 1, Z), " &
"41 (BC_4, ltdat(27), observe_only, X), " &
"40 (BC_4, ltclk(27), observe_only, X), " &
"39 (BC_1, lrdat(28), output3, X, 0, 1, Z), " &
"38 (BC_1, lrclk(28), output3, X, 0, 1, Z), " &
"37 (BC_4, ltdat(28), observe_only, X), " &
"36 (BC_4, ltclk(28), observe_only, X), " &
"35 (BC_4, lrcclk, observe_only, X), " &
"34 (BC_4, ltcclk, observe_only, X), " &
"33 (BC_1, htpos, output3, X, 0, 1, Z), " &
"32 (BC_1, htclk, output3, X, 0, 1, Z), " &
"31 (BC_1, htneg, output3, X, 0, 1, Z), " &
"30 (BC_4, hrpos, observe_only, X), " &
"29 (BC_4, hrclk, observe_only, X), " &
"28 (BC_4, hrneg, observe_only, X), " &
"27 (BC_4, ftmei, observe_only, X), " &
"26 (BC_4, ftsof, observe_only, X), " &
"25 (BC_1, ftsof, output3, X, 24, 1, Z), " &
"24 (BC_1, *, controlr, 1), " &
"23 (BC_4, ftclk, observe_only, X), " &
"22 (BC_4, ftd, observe_only, X), " &
"21 (BC_1, ftden, output3, X, 0, 1, Z), " &
"20 (BC_1, frclk, output3, X, 0, 1, Z), " &
"19 (BC_1, frd, output3, X, 0, 1, Z), " &
"18 (BC_1, frden, output3, X, 0, 1, Z), " &
"17 (BC_1, frsof, output3, X, 0, 1, Z), " &
"16 (BC_1, frlos, output3, X, 0, 1, Z), " &
"15 (BC_1, frlof, output3, X, 0, 1, Z), " &
"14 (BC_4, frmecu, observe_only, X), " &
"13 (BC_4, ale, observe_only, X), " &
"12 (BC_4, g747e, observe_only, X), " &
"11 (BC_4, rst_n, observe_only, X), " &
"10 (BC_4, t3e3ms, observe_only, X), " &
"9 (BC_4, cwr_n, observe_only, X), " &
"8 (BC_4, crd_n, observe_only, X), " &
"7 (BC_4, ccs_n, observe_only, X), " &
"6 (BC_4, cim, observe_only, X), " &
"5 (BC_4, cms, observe_only, X), " &
"4 (BC_0, *, internal, X), " &
"3 (BC_1, cint_n, output3, X, 2, 1, Z), " &
"2 (BC_1, *, controlr, 1), " &
"1 (BC_4, test_n, observe_only, X), " &
"0 (BC_1, *, control, 1) ";
end ds3112;