--*******************************************************************************************************
--** Copyright (c) 2002 Cypress Semiconductor
--** All rights reserved.
--**
--** File Name: 1445AV25_x18_165.bsdl
--** Release: 1.1
--** Last Updated: April 23 2006
--** Part #: CY7C1445AV25
--** Package: 165 Ball FBGA
--** Function: 2M x 18 Synchronous Pipelined DCD SRAM, BSDL file for JTAG
--** Notes: IMPORTANT NOTE: Please be aware that the CY7C1445AV25 device --is fully IEEE
--** 1149.1 compliant.
--** This revision of the model is different from the previous revision Rev
--1.0) in that the port type for the Data bits is declared as "inout"
--to comply with the IEEE 1149.1 standard.
--** Ref CY7C1445AV25 Datasheet at www.cypress.com
--**
--** Queries ? :contact Cypress MPD Applications
--** Written by : Cypress MPD Applications
--*******************************************************************************************************
entity CY7C1445AV25_165 is
generic (PHYSICAL_PIN_MAP : string := "FBGA");
port (
A: in bit_vector(0 to 20);
ADSP_b: in bit;
ADSC_b: in bit;
ADV_b: in bit;
BW_A_b: in bit;
BW_B_b: in bit;
BWE_b: in bit;
CE1_b: in bit;
CE2: in bit;
CE3_b: in bit;
CLK: in bit;
DP_A: in bit;
DP_B: in bit;
DQ_A: inout bit_vector(0 to 7);
DQ_B: inout bit_vector(0 to 7);
GW_b: in bit;
OE_b: in bit;
MODE: in bit;
TMS: in bit;
TDI: in bit;
TCK: in bit;
TDO: out bit;
ZZ: in bit;
VDD: linkage bit_vector(0 to 17);
VSS: linkage bit_vector(0 to 33);
VDDQ: linkage bit_vector(0 to 19);
NC: linkage bit_vector(0 to 35)
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of CY7C1445AV25_165 : entity is
"STD_1149_1_1993";
attribute PIN_MAP of CY7C1445AV25_165 : entity is PHYSICAL_PIN_MAP;
constant FBGA:PIN_MAP_STRING:=
"A:(R6,P6,N6,P11,P8,R8,R9,P9,P10,R10,R11,A11,A10,B10,A2, " &
" B2,R2,P3,R3,R4,P4), " & -- Address
"ADSP_b: B9, " &
"ADSC_b: A8, " &
"ADV_b: A9, " &
"BW_A_b: B5, " &
"BW_B_b: A4, " &--Byte Write
"BWE_b: A7, " &-- Write Enable
"CE1_b: A3, " &
"CE2: B3, " &
"CE3_b: A6, " &
"CLK: B6, " & -- Clock
"DP_A: C11, " &
"DP_B: N1, " &
"DQ_A:(M10,L10,K10,J10,G11,F11,E11,D11), " &
"DQ_B:(D2,E2,F2,G2,J1,K1,L1,M1), " &
"GW_b: B7, " &
"OE_b: B8, " &
"MODE: R1, " &
"TMS: R5, " &
"TDI: P5, " &
"TCK: R7, " &
"TDO: P7, " &
"VDD:(D4,D8,E4,E8,F4,F8,G4,G8,H4,H8,J4,J8, " &
"K4,K8,L4,L8,M4,M8)," &
"VDDQ:(C3,C9,D3,D9,E3,E9,F3,F9,G3,G9,J3,J9,K3, " &
"K9,L3,L9,M3,M9,N3,N9),"&
"VSS:(C4,C5,C6,C7,C8,D5,D6,D7,E5,E6,E7,F5,F6,F7, " &
"G5,G6,G7,H5,H6,H7,J5,J6,J7,K5,K6,K7,L5,L6,L7, " &
"M5,M6,M7,N4,N8),"&
"ZZ: H11, " &
"NC:(A1,A5,B1,B4,B11,C1,C2,C10,D1,D10,E1,E10,F1," &
"F10,G1,G10,H1,H2,H3,H9,H10,J2,J11,K2,K11,L2," &
"L11,M2,M11,N2,N5,N7,N10,N11,P1,P2) ";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (50.0e6, BOTH);
attribute INSTRUCTION_LENGTH of CY7C1445AV25_165 : entity is 3;
attribute INSTRUCTION_OPCODE of CY7C1445AV25_165 : entity is
"EXTEST (000)," &
"IDCODE (001)," &
"SAMPLE (010)," &-- Sample-Z
"SAMPLD (100)," &-- Sample/Preload
"BYPASS (111) ";
attribute INSTRUCTION_CAPTURE of CY7C1445AV25_165: entity is "001";
attribute IDCODE_REGISTER of CY7C1445AV25_165 : entity is
"000"& -- Revision number
"01011000110010111"& -- Defines the device depth
"00000110100"& -- Cypress JEDEC Manufacturer identity
"1";-- ID register Presence indicator
attribute REGISTER_ACCESS of CY7C1445AV25_165 : entity is
"BOUNDARY (EXTEST,SAMPLE,SAMPLD)," &
"BYPASS (BYPASS)";
attribute BOUNDARY_LENGTH of CY7C1445AV25_165 : entity is 89;
attribute BOUNDARY_REGISTER of CY7C1445AV25_165 : entity is
"0 (BC_4, A(2), input, X)," &
"1 (BC_4, *, internal, X)," &
"2 (BC_4, *, internal, X)," &
"3 (BC_4, A(3), input, X)," &
"4 (BC_4, A(4), input, X)," &
"5 (BC_4, A(5), input, X)," &
"6 (BC_4, A(6), input, X)," &
"7 (BC_4, A(7), input, X)," &
"8 (BC_4, A(8), input, X)," &
"9 (BC_4, A(9), input, X)," &
"10 (BC_4, A(10), input, X)," &
"11 (BC_4, ZZ, input, X)," &
"12 (BC_4, *, internal, X)," &
"13 (BC_4, *, internal, X)," &
"14 (BC_4, *, internal, X)," &
"15 (BC_4, *, internal, X)," &
"16 (BC_4, *, internal, X)," &
"17 (BC_7, DQ_A(0), bidir, X, 88, 0, Z), " &
"18 (BC_7, DQ_A(1), bidir, X, 88, 0, Z), " &
"19 (BC_7, DQ_A(2), bidir, X, 88, 0, Z), " &
"20 (BC_7, DQ_A(3), bidir, X, 88, 0, Z), " &
"21 (BC_4, *, internal, X)," &
"22 (BC_4, *, internal, X)," &
"23 (BC_7, DQ_A(4), bidir, X, 88, 0, Z), " &
"24 (BC_7, DQ_A(5), bidir, X, 88, 0, Z), " &
"25 (BC_7, DQ_A(6), bidir, X, 88, 0, Z), " &
"26 (BC_7, DQ_A(7), bidir, X, 88, 0, Z), " &
"27 (BC_4, *, internal, X)," &
"28 (BC_4, *, internal, X)," &
"29 (BC_4, *, internal, X)," &
"30 (BC_4, *, internal, X)," &
"31 (BC_4, DP_A, input, X)," &
"32 (BC_4, A(11), input, X)," &
"33 (BC_4, *, internal, X)," &
"34 (BC_4, A(12), input, X)," &
"35 (BC_4, A(13), input, X)," &
"36 (BC_4, ADV_b, input, X)," &
"37 (BC_4, ADSP_b, input, X)," &
"38 (BC_4, *, internal, X)," &
"39 (BC_4, ADSC_b, input, X)," &
"40 (BC_4, OE_b, input, X)," &
"41 (BC_4, BWE_b, input, X)," &
"42 (BC_4, GW_b, input, X)," &
"43 (BC_4, CLK, input, X)," &
"44 (BC_4, CE3_b, input, X)," &
"45 (BC_4, BW_A_b, input, X)," &
"46 (BC_4, *, internal, X)," &
"47 (BC_4, BW_B_b, input, X)," &
"48 (BC_4, *, internal, X)," &
"49 (BC_4, CE2, input, X)," &
"50 (BC_4, CE1_b, input, X)," &
"51 (BC_4, A(14), input, X)," &
"52 (BC_4, A(15), input, X)," &
"53 (BC_4, *, internal, X)," &
"54 (BC_4, *, internal, X)," &
"55 (BC_4, *, internal, X)," &
"56 (BC_4, *, internal, X)," &
"57 (BC_4, *, internal, X)," &
"58 (BC_4, *, internal, X)," &
"59 (BC_4, *, internal, X)," &
"60 (BC_4, *, internal, X)," &
"61 (BC_7, DQ_B(0), bidir, X, 88, 0, Z), " &
"62 (BC_7, DQ_B(1), bidir, X, 88, 0, Z), " &
"63 (BC_7, DQ_B(2), bidir, X, 88, 0, Z), " &
"64 (BC_7, DQ_B(3), bidir, X, 88, 0, Z), " &
"65 (BC_4, *, internal, X)," &
"66 (BC_4, *, internal, X)," &
"67 (BC_7, DQ_B(4), bidir, X, 88, 0, Z), " &
"68 (BC_7, DQ_B(5), bidir, X, 88, 0, Z), " &
"69 (BC_7, DQ_B(6), bidir, X, 88, 0, Z), " &
"70 (BC_7, DQ_B(7), bidir, X, 88, 0, Z), " &
"71 (BC_4, *, internal, X)," &
"72 (BC_4, *, internal, X)," &
"73 (BC_4, *, internal, X)," &
"74 (BC_4, *, internal, X)," &
"75 (BC_4, DP_B, input, X)," &
"76 (BC_4, *, internal, X)," &
"77 (BC_4, *, internal, X)," &
"78 (BC_4, MODE, input, X)," &
"79 (BC_4, A(16), input, X)," &
"80 (BC_4, A(17), input, X)," &
"81 (BC_4, A(18), input, X)," &
"82 (BC_4, *, internal, X)," &
"83 (BC_4, A(19), input, X)," &
"84 (BC_4, A(20), input, X)," &
"85 (BC_4, *, internal, X)," &
"86 (BC_4, A(1), input, X)," &
"87 (BC_4, A(0), input, X)," &
"88 (BC_2, *, controlr, X)" ;
end CY7C1445AV25_165;