-- Copyright Intel Corporation 1993
--****************************************************************************
-- Intel Corporation makes no warranty for the use of its products
-- and assumes no responsibility for any errors which may appear in
-- this document nor does it make a commitment to update the information
-- contained herein.
--****************************************************************************
-- Boundary-Scan Description Language (BSDL Version 0.0) is a de-facto
-- standard means of describing essential features of ANSI/IEEE 1149.1-1990
-- compliant devices. This language is under consideration by the IEEE for
-- formal inclusion within a supplement to the 1149.1-1990 standard. The
-- generation of the supplement entails an extensive IEEE review and a formal
-- acceptance balloting procedure which may cP2Pnge the resultant form of the
-- language. Be aware tP2Pt this process may extend well into 1993, and at
-- this time the IEEE does not endorse or hold an opinion on the language.
--****************************************************************************
-- The attribute Idcode_Register value will change depending on the voltage
-- and stepping of the Rx processor. Uncomment the appropiate attribute
-- Idcode_Register value in the attribute section. Default is
-- 80960RP 66/3.3 A-0.
--****************************************************************************
-- i960Rx (TM) Processor BSDL Model
-- Project code Rx
-- File **NOT** verified electrically
-- ---------------------------------------------------------
-- Rev 0.0 14 Nov 1995
entity Rx_Processor is
generic(PHYSICAL_PIN_MAP : string:= "BGA");
port (AD : inout bit_vector(0 to 31);
ADSBAR : inout bit;
ALE : out bit;
BEBAR : inout bit_vector(0 to 3);
BLASTEBMBAR : inout bit;
CASBAR : out bit_vector(0 to 7);
CEBAR : out bit_vector(0 to 1);
DACKBAR : out bit;
DALE : out bit_vector(0 to 1);
DCRST_MODEBAR : inout bit;
DENBIBAR : inout bit;
DP : inout bit_vector(0 to 3);
DREQBAR : in bit;
DTRBAR : out bit;
DWEBAR : out bit_vector(0 to 1);
DX2MODEBAR : in bit;
FAILBAR : out bit;
HOLD : in bit;
HOLDA : out bit;
ICEADSBAR : out bit;
ICEBRKBAR : in bit;
ICEBUS : inout bit_vector(0 to 7);
ICECLK : out bit;
ICELOCKBAR : in bit;
ICEMSGBAR : in bit;
ICESELBAR : in bit;
ICEVLDBAR : out bit;
IONC2 : in bit;
LEAFBAR : out bit_vector(0 to 1);
LOCKONCEBAR : inout bit;
LRDYRCVBAR : out bit;
LRSTBAR : out bit;
MA : out bit_vector(0 to 11);
MSGFRMBAR : out bit;
MWEBAR : out bit_vector(0 to 3);
NMIBAR : in bit;
P_AD : inout bit_vector(0 to 31);
P_CLK : in bit;
P_CXBE_BAR : inout bit_vector(0 to 3);
P_DEVSEL_BAR : inout bit;
P_FRAME_BAR : inout bit;
P_GNT_BAR : in bit;
P_IDSEL : in bit;
P_INTA_BAR : out bit;
P_INTB_BAR : out bit;
P_INTC_BAR : out bit;
P_INTD_BAR : out bit;
P_IRDY_BAR : inout bit;
P_LOCK_BAR : in bit;
P_PAR : inout bit;
P_PERR_BAR : inout bit;
P_REQ_BAR : out bit;
P_RST_BAR : in bit;
P_SERR_BAR : out bit;
P_STOP_BAR : inout bit;
P_TRDY_BAR : inout bit;
PICCLK : in bit;
PICD : inout bit_vector(0 to 1);
PLLEN : in bit;
RASBAR : out bit_vector(0 to 3);
RDYRCVBAR : inout bit;
S_AD : inout bit_vector(0 to 31);
S_CLK : in bit;
S_CXBE_BAR : inout bit_vector(0 to 3);
S_DEVSEL_BAR : inout bit;
S_FRAME_BAR : inout bit;
S_GNT_BAR : out bit_vector(0 to 4);
S_GNT0S_REQ_BAR : out bit;
S_IDSEL : in bit;
S_INTAXINTBAR0 : in bit;
S_INTBXINTBAR1 : in bit;
S_INTCXINTBAR2 : in bit;
S_INTDXINTBAR3 : in bit;
S_IRDY_BAR : inout bit;
S_LOCK_BAR : inout bit;
S_PAR : inout bit;
S_PERR_BAR : inout bit;
S_REQ_BAR : in bit_vector(0 to 4);
S_REQ0S_GNT_BAR : in bit;
S_RST_BAR : out bit;
S_SERR_BAR : inout bit;
S_STOP_BAR : inout bit;
S_TRDY_BAR : inout bit;
SCBOD : in bit;
SCL : inout bit;
SDA : inout bit;
STEST : in bit;
TCK : in bit;
TDI : in bit;
TDO : out bit;
TMS : in bit;
TRSTBAR : in bit;
WAITBAR : inout bit;
WIDTHHLTD0SYNC : inout bit;
WIDTHHLTD1RETRY : inout bit;
WRBAR : inout bit;
XINTBAR4 : in bit;
XINTBAR5 : in bit;
XINTBAR6 : in bit;
XINTBAR7 : in bit;
VCC : linkage bit_vector(0 to 59);
VCCPLL : linkage bit_vector(0 to 2);
VSS : linkage bit_vector(0 to 75)
);
use STD_1149_1_1990.all;
use i960Rx_a.all;
--This list describes the physical pin layout of all signals
attribute PIN_MAP of Rx_Processor : entity is PHYSICAL_PIN_MAP;
constant BGA:PIN_MAP_STRING :=
"AD : (A18, B18, C17, A17, B17, C16, A16, B16, C15, A15,"&
" B15, C14, A14, B14, C13, A13, B13, C12, A12, B12,"&
" C11, A11, B11, C10, A10, B10, C9, A9, B9, C8,"&
" A8, B8),"&
"ADSBAR : B21,"&
"ALE : C20,"&
"BEBAR : (A22, B22, C21, A21),"&
"BLASTEBMBAR : C23,"&
"CASBAR : (F1, F2, G3, G1, G2, H3, H1, H2),"&
"CEBAR : (L3, L1),"&
"DACKBAR : AD3,"&
"DALE : (M1, M2),"&
"DCRST_MODEBAR : AF4,"&
"DENBIBAR : A23,"&
"DP : (C2, D3, D1, D2),"&
"DREQBAR : AD2,"&
"DTRBAR : B23,"&
"DWEBAR : (K1, K2),"&
"DX2MODEBAR : B20,"&
"FAILBAR : AD5,"&
"HOLD : V1,"&
"HOLDA : V3,"&
"ICEADSBAR : AC1,"&
"ICEBRKBAR : AA1,"&
"ICEBUS : (V2, W3, W1, W2, Y3, Y1, Y2, AA3),"&
"ICECLK : AB2,"&
"ICELOCKBAR : AB3,"&
"ICEMSGBAR : AA2,"&
"ICESELBAR : AC2,"&
"ICEVLDBAR : AB1,"&
"IONC2 : AE4,"&
"LEAFBAR : (L2, M3),"&
"LOCKONCEBAR : AD4,"&
"LRDYRCVBAR : C19,"&
"LRSTBAR : AD6,"&
"MA : (C7, A7, B7, C6, B6, C5, A5, B5, C4, B4,"&
" C3, B3),"&
"MSGFRMBAR : AC3,"&
"MWEBAR : (J3, J1, J2, K3),"&
"NMIBAR : T3,"&
"P_AD : (AD24, AE23, AF23, AD23, AE22, AF22, AD22, AE21,"&
" AD21, AE20, AF20, AD20, AE19, AF19, AD19, AE18,"&
" AE14, AF14, AD14, AE13, AF13, AD13, AE12, AF12,"&
" AF11, AD11, AE10, AF10, AD10, AE9, AF9, AD9),"&
"P_CLK : AD8,"&
"P_CXBE_BAR : (AF21, AF18, AD15, AE11),"&
"P_DEVSEL_BAR : AF16,"&
"P_FRAME_BAR : AF15,"&
"P_GNT_BAR : AF8,"&
"P_IDSEL : AD12,"&
"P_INTA_BAR : AF6,"&
"P_INTB_BAR : AE6,"&
"P_INTC_BAR : AD7,"&
"P_INTD_BAR : AF7,"&
"P_IRDY_BAR : AE15,"&
"P_LOCK_BAR : AD17,"&
"P_PAR : AD18,"&
"P_PERR_BAR : AF17,"&
"P_REQ_BAR : AE8,"&
"P_RST_BAR : AE7,"&
"P_SERR_BAR : AE17,"&
"P_STOP_BAR : AE16,"&
"P_TRDY_BAR : AD16,"&
"PICCLK : U3,"&
"PICD : (T1, T2),"&
"PLLEN : A20,"&
"RASBAR : (E3, E1, E2, F3),"&
"RDYRCVBAR : B19,"&
"S_AD : (AE24, AD25, AC24, AC26, AC25, AB24, AB26, AB25,"&
" AA26, AA25, Y24, Y26, Y25, W24, W26, W25, R25, P24,"&
" P26, P25, N24, N26, N25, M24, L24, L26, L25, K24,"&
" K26, K25, J24, J26),"&
"S_CLK : F25,"&
"S_CXBE_BAR : (AA24, V24, R26, M25),"&
"S_DEVSEL_BAR : T24,"&
"S_FRAME_BAR : R24,"&
"S_GNT_BAR : (G24, G25, F26, E26, D24),"&
"S_GNT0S_REQ_BAR : H26,"&
"S_IDSEL : M26,"&
"S_INTAXINTBAR0 : N1,"&
"S_INTBXINTBAR1 : N2,"&
"S_INTCXINTBAR2 : P3,"&
"S_INTDXINTBAR3 : P1,"&
"S_IRDY_BAR : T25,"&
"S_LOCK_BAR : U26,"&
"S_PAR : V26,"&
"S_PERR_BAR : U24,"&
"S_REQ_BAR : (H25, G26, F24, E24, E25),"&
"S_REQ0S_GNT_BAR : H24,"&
"S_RST_BAR : J25,"&
"S_SERR_BAR : V25,"&
"S_STOP_BAR : U25,"&
"S_TRDY_BAR : T26,"&
"SCBOD : C18,"&
"SCL : U1,"&
"SDA : U2,"&
"STEST : AE3,"&
"TCK : B24,"&
"TDI : D26,"&
"TDO : D25,"&
"TMS : C24,"&
"TRSTBAR : C25,"&
"WAITBAR : N3,"&
"WIDTHHLTD0SYNC : AF5,"&
"WIDTHHLTD1RETRY : AE5,"&
"WRBAR : C22,"&
"XINTBAR4 : P2,"&
"XINTBAR5 : R3,"&
"XINTBAR6 : R1,"&
"XINTBAR7 : R2,"&
"VCC : (A1, A2, A3, A24, A25, A26, B1, B2, B25, B26,"&
" C1, C26, D5, D7, D9, D11, D13, D15, D17, D19,"&
" D21, E23, F4, G23, H4, J23, K4, L23, M4, N23,"&
" P4, R23, T4, U23, V4, W23, Y4, AA23, AB4, AC6,"&
" AC8, AC10, AC12, AC14, AC16, AC18, AC20, AC22, AD1,"&
" AD26, AE1, AE2, AE25, AE26, AF1, AF2, AF3, AF24,"&
" AF25, AF26),"&
"VCCPLL : (A19, A6, A4),"&
"VSS : (AA4, AB23, AC4, AC5, AC7, AC9, AC11, AC13, AC15,"&
" AC17, AC19, AC21, AC23, D4, D6, D8, D10, D12,"&
" D14, D16, D18, D20, D22, D23, E4, F23, G4, H23,"&
" J4, K23, L4, L11, L12, L13, L14, L15, L16, M11,"&
" M12, M13, M14, M15, M16, M23, N4, N11, N12, N13,"&
" N14, N15, N16, P11, P12, P13, P14, P15, P16, P23,"&
" R4, R11, R12, R13, R14, R15, R16, T11, T12, T13,"&
" T14, T15, T16, T23, U4, V23, W4, Y23)";
attribute Tap_Scan_In of TDI : signal is true;
attribute Tap_Scan_Mode of TMS : signal is true;
attribute Tap_Scan_Out of TDO : signal is true;
attribute Tap_Scan_Reset of TRSTBAR : signal is true;
attribute Tap_Scan_Clock of TCK : signal is (33.0e6, BOTH);
attribute Instruction_Length of Rx_Processor: entity is 4;
attribute Instruction_Opcode of Rx_Processor: entity is
"BYPASS (1111)," &
"EXTEST (0000)," &
"SAMPLE (0001)," &
"IDCODE (0010)," &
"RUBIST (0111)," &
"CLAMP (0100)," &
"HIGHZ (1000)," &
"Reserved (1011, 1100, 0101, 0110)";
attribute Instruction_Capture of Rx_Processor : entity is "0001";
attribute Instruction_Private of Rx_Processor : entity is "Reserved" ;
--****************************************************************************
-- The Idcode_Register value below is the value found in the JTAG Device ID
-- Register and the Processor Device ID Register at 80960 Local Address
-- 00001710H. The attribute Idcode_Register value will change depending on
-- the voltage and stepping of the Rx processor. Uncomment the appropiate
-- attribute Idcode_Register value. Default is 80960RP 66/3.3 A-0.
--****************************************************************************
attribute Idcode_Register of Rx_Processor : entity is
--****************************************************************************
-- 80960RP 33/5.0 A-0 (33MHz 5 volt A-0 step)
--****************************************************************************
-- "0000" & --version = 0H
-- "0000100001100000" & --part number = 0860H
-- "00000001001" & --manufacturers identity
-- "1"; --required by the standard
--****************************************************************************
-- 80960RP 33/5.0 A-1 (33MHz 5 volt A-1 step)
--****************************************************************************
-- "0001" & --version = 1H
-- "0000100001100000" & --part number = 0860H
-- "00000001001" & --manufacturers identity
-- "1"; --required by the standard
--****************************************************************************
-- 80960RP 33/3.3 A-0 (33MHz 3.3 volt A-0 step)
--****************************************************************************
-- "0000" & --version = 0H
-- "1000100001100001" & --part number = 8861H
-- "00000001001" & --manufacturers identity
-- "1"; --required by the standard
--****************************************************************************
-- 80960RD 66/3.3 A-0 (66MHz 3.3 volt A-0 step) DEFAULT
--****************************************************************************
"0000" & --version = 0H
"1000100001100001" & --part number = 8861H
"00000001001" & --manufacturers identity
"1"; --required by the standard
--****************************************************************************
-- 80960RP 33/3.3 B-0 (33MHz 3.3 volt B-0 step)
--****************************************************************************
-- "0001" & --version = 1H
-- "1000100001100001" & --part number = 8861H
-- "00000001001" & --manufacturers identity
-- "1"; --required by the standard
--****************************************************************************
-- 80960RD 66/3.3 B-0 (66MHz 3.3 volt B-0 step)
--****************************************************************************
-- "0001" & --version = 1H
-- "1000100001100001" & --part number = 8861H
-- "00000001001" & --manufacturers identity
-- "1"; --required by the standard
attribute Register_Access of Rx_Processor: entity is
"Runbist[1] (RUBIST)," &
"Bypass (CLAMP, HIGHZ)";
--{*******************************************************************}
--{ The first cell, cell 0, is closest to TDO }
--{ BC_1:Control, Output3 CBSC_1:Bidir BC_4: Input, Clock }
--{*******************************************************************}
attribute Boundary_Cells of Rx_Processor: entity is "BC_4, BC_1, CBSC_1";
attribute Boundary_Length of Rx_Processor: entity is 264;
attribute Boundary_Register of Rx_Processor: entity is
"0 (CBSC_1, BLASTEBMBAR, bidir, X, 6, 1, Z)," &
"1 (CBSC_1, DENBIBAR, bidir, X, 6, 1, Z)," &
"2 (BC_1, DTRBAR, output3, X, 7, 1, Z)," &
"3 (CBSC_1, WRBAR, bidir, X, 7, 1, Z)," &
"4 (CBSC_1, BEBAR(0), bidir, X, 7, 1, Z)," &
"5 (CBSC_1, BEBAR(1), bidir, X, 7, 1, Z)," &
"6 (BC_1, *, control, 1)," &
"7 (BC_1, *, control, 1)," &
"8 (BC_1, *, control, 1)," &
"9 (CBSC_1, BEBAR(2), bidir, X, 7, 1, Z)," &
"10 (CBSC_1, BEBAR(3), bidir, X, 7, 1, Z)," &
"11 (CBSC_1, ADSBAR, bidir, X, 7, 1, Z)," &
"12 (BC_1, ALE, output3, X, 7, 1, Z)," &
"13 (BC_1, LRDYRCVBAR, output3, X, 8, 1, Z)," &
"14 (CBSC_1, RDYRCVBAR, bidir, X, 15, 1, Z)," &
"15 (BC_1, *, control, 1)," &
"16 (CBSC_1, AD(0), bidir, X, 32, 1, Z)," &
"17 (CBSC_1, AD(1), bidir, X, 32, 1, Z)," &
"18 (CBSC_1, AD(2), bidir, X, 32, 1, Z)," &
"19 (CBSC_1, AD(3), bidir, X, 32, 1, Z)," &
"20 (CBSC_1, AD(4), bidir, X, 32, 1, Z)," &
"21 (CBSC_1, AD(5), bidir, X, 32, 1, Z)," &
"22 (CBSC_1, AD(6), bidir, X, 32, 1, Z)," &
"23 (CBSC_1, AD(7), bidir, X, 32, 1, Z)," &
"24 (CBSC_1, AD(8), bidir, X, 32, 1, Z)," &
"25 (CBSC_1, AD(9), bidir, X, 32, 1, Z)," &
"26 (CBSC_1, AD(10), bidir, X, 32, 1, Z)," &
"27 (CBSC_1, AD(11), bidir, X, 32, 1, Z)," &
"28 (CBSC_1, AD(12), bidir, X, 32, 1, Z)," &
"29 (CBSC_1, AD(13), bidir, X, 32, 1, Z)," &
"30 (CBSC_1, AD(14), bidir, X, 32, 1, Z)," &
"31 (CBSC_1, AD(15), bidir, X, 32, 1, Z)," &
"32 (BC_1, *, control, 1)," &
"33 (CBSC_1, AD(16), bidir, X, 32, 1, Z)," &
"34 (CBSC_1, AD(17), bidir, X, 32, 1, Z)," &
"35 (CBSC_1, AD(18), bidir, X, 32, 1, Z)," &
"36 (CBSC_1, AD(19), bidir, X, 32, 1, Z)," &
"37 (CBSC_1, AD(20), bidir, X, 32, 1, Z)," &
"38 (CBSC_1, AD(21), bidir, X, 32, 1, Z)," &
"39 (CBSC_1, AD(22), bidir, X, 32, 1, Z)," &
"40 (CBSC_1, AD(23), bidir, X, 32, 1, Z)," &
"41 (CBSC_1, AD(24), bidir, X, 32, 1, Z)," &
"42 (CBSC_1, AD(25), bidir, X, 32, 1, Z)," &
"43 (CBSC_1, AD(26), bidir, X, 32, 1, Z)," &
"44 (CBSC_1, AD(27), bidir, X, 32, 1, Z)," &
"45 (CBSC_1, AD(28), bidir, X, 32, 1, Z)," &
"46 (CBSC_1, AD(29), bidir, X, 32, 1, Z)," &
"47 (CBSC_1, AD(30), bidir, X, 32, 1, Z)," &
"48 (CBSC_1, AD(31), bidir, X, 32, 1, Z)," &
"49 (BC_1, *, control, 1)," &
"50 (BC_1, MA(0), output3, X, 49, 1, Z)," &
"51 (BC_1, MA(1), output3, X, 49, 1, Z)," &
"52 (BC_1, MA(2), output3, X, 49, 1, Z)," &
"53 (BC_1, MA(3), output3, X, 49, 1, Z)," &
"54 (BC_1, MA(4), output3, X, 49, 1, Z)," &
"55 (BC_1, MA(5), output3, X, 49, 1, Z)," &
"56 (BC_1, MA(6), output3, X, 49, 1, Z)," &
"57 (BC_1, MA(7), output3, X, 49, 1, Z)," &
"58 (BC_1, MA(8), output3, X, 49, 1, Z)," &
"59 (BC_1, MA(9), output3, X, 49, 1, Z)," &
"60 (BC_1, MA(10), output3, X, 49, 1, Z)," &
"61 (BC_1, MA(11), output3, X, 49, 1, Z)," &
"62 (BC_1, *, control, 1)," &
"63 (CBSC_1, DP(0), bidir, X, 62, 1, Z)," &
"64 (CBSC_1, DP(1), bidir, X, 62, 1, Z)," &
"65 (CBSC_1, DP(2), bidir, X, 62, 1, Z)," &
"66 (CBSC_1, DP(3), bidir, X, 62, 1, Z)," &
"67 (BC_1, RASBAR(0), output3, X, 49, 1, Z)," &
"68 (BC_1, RASBAR(1), output3, X, 49, 1, Z)," &
"69 (BC_1, RASBAR(2), output3, X, 49, 1, Z)," &
"70 (BC_1, RASBAR(3), output3, X, 49, 1, Z)," &
"71 (BC_1, CASBAR(0), output3, X, 49, 1, Z)," &
"72 (BC_1, CASBAR(1), output3, X, 49, 1, Z)," &
"73 (BC_1, CASBAR(2), output3, X, 49, 1, Z)," &
"74 (BC_1, CASBAR(3), output3, X, 49, 1, Z)," &
"75 (BC_1, CASBAR(4), output3, X, 49, 1, Z)," &
"76 (BC_1, CASBAR(5), output3, X, 49, 1, Z)," &
"77 (BC_1, CASBAR(6), output3, X, 49, 1, Z)," &
"78 (BC_1, CASBAR(7), output3, X, 49, 1, Z)," &
"79 (BC_1, MWEBAR(0), output3, X, 49, 1, Z)," &
"80 (BC_1, MWEBAR(1), output3, X, 49, 1, Z)," &
"81 (BC_1, MWEBAR(2), output3, X, 49, 1, Z)," &
"82 (BC_1, MWEBAR(3), output3, X, 49, 1, Z)," &
"83 (BC_1, DWEBAR(0), output3, X, 49, 1, Z)," &
"84 (BC_1, DWEBAR(1), output3, X, 49, 1, Z)," &
"85 (BC_1, CEBAR(0), output3, X, 49, 1, Z)," &
"86 (BC_1, CEBAR(1), output3, X, 49, 1, Z)," &
"87 (BC_1, LEAFBAR(0), output3, X, 49, 1, Z)," &
"88 (BC_1, LEAFBAR(1), output3, X, 49, 1, Z)," &
"89 (BC_1, DALE(0), output3, X, 49, 1, Z)," &
"90 (BC_1, DALE(1), output3, X, 49, 1, Z)," &
"91 (CBSC_1, WAITBAR, bidir, X, 96, 1, Z)," &
"92 (BC_4, S_INTAXINTBAR0, input, X)," &
"93 (BC_4, S_INTBXINTBAR1, input, X)," &
"94 (BC_4, S_INTCXINTBAR2, input, X)," &
"95 (BC_4, S_INTDXINTBAR3, input, X)," &
"96 (BC_1, *, control, 1)," &
"97 (BC_4, XINTBAR4, input, X)," &
"98 (BC_4, XINTBAR5, input, X)," &
"99 (BC_4, XINTBAR6, input, X)," &
"100 (BC_4, XINTBAR7, input, X)," &
"101 (BC_4, NMIBAR, input, X)," &
"102 (BC_1, *, control, 1)," &
"103 (BC_1, *, control, 1)," &
"104 (BC_1, *, control, 1)," &
"105 (BC_1, *, control, 1)," &
"106 (CBSC_1, PICD(0), bidir, X, 102, 1, Z)," &
"107 (CBSC_1, PICD(1), bidir, X, 103, 1, Z)," &
"108 (BC_4, PICCLK, input, X)," &
"109 (CBSC_1, SCL, bidir, X, 104, 1, Z)," &
"110 (CBSC_1, SDA, bidir, X, 105, 1, Z)," &
"111 (BC_1, HOLDA, output3, X, 122, 1, Z)," &
"112 (BC_4, HOLD, input, X)," &
"113 (BC_1, DACKBAR, output3, X, 122, 1, Z)," &
"114 (BC_4, DREQBAR, input, X)," &
"115 (BC_4, STEST, input, X)," &
"116 (CBSC_1, LOCKONCEBAR, bidir, X, 123, 1, Z)," &
"117 (CBSC_1, DCRST_MODEBAR, bidir, X, 123, 1, Z)," &
"118 (BC_1, FAILBAR, output3, X, 122, 1, Z)," &
"119 (CBSC_1, WIDTHHLTD0SYNC, bidir, X, 123, 1, Z)," &
"120 (CBSC_1, WIDTHHLTD1RETRY, bidir, X, 123, 1, Z)," &
"121 (BC_1, LRSTBAR, output3, X, 122, 1, Z)," &
"122 (BC_1, *, control, 1)," &
"123 (BC_1, *, control, 1)," &
"124 (BC_1, P_INTA_BAR, output3, X, 132, 1, Z)," &
"125 (BC_1, P_INTB_BAR, output3, X, 133, 1, Z)," &
"126 (BC_1, P_INTC_BAR, output3, X, 134, 1, Z)," &
"127 (BC_1, P_INTD_BAR, output3, X, 135, 1, Z)," &
"128 (BC_4, P_RST_BAR, input, X)," &
"129 (BC_4, P_CLK, input, X)," &
"130 (BC_4, P_GNT_BAR, input, X)," &
"131 (BC_1, P_REQ_BAR, output3, X, 136, 1, Z)," &
"132 (BC_1, *, control, 1)," &
"133 (BC_1, *, control, 1)," &
"134 (BC_1, *, control, 1)," &
"135 (BC_1, *, control, 1)," &
"136 (BC_1, *, control, 1)," &
"137 (CBSC_1, P_AD(31), bidir, X, 146, 1, Z)," &
"138 (CBSC_1, P_AD(30), bidir, X, 146, 1, Z)," &
"139 (CBSC_1, P_AD(29), bidir, X, 146, 1, Z)," &
"140 (CBSC_1, P_AD(28), bidir, X, 146, 1, Z)," &
"141 (CBSC_1, P_AD(27), bidir, X, 146, 1, Z)," &
"142 (CBSC_1, P_AD(26), bidir, X, 146, 1, Z)," &
"143 (CBSC_1, P_AD(25), bidir, X, 146, 1, Z)," &
"144 (CBSC_1, P_AD(24), bidir, X, 146, 1, Z)," &
"145 (CBSC_1, P_CXBE_BAR(3), bidir, X, 157, 1, Z)," &
"146 (BC_1, *, control, 1)," &
"147 (BC_4, P_IDSEL, input, X)," &
"148 (CBSC_1, P_AD(23), bidir, X, 146, 1, Z)," &
"149 (CBSC_1, P_AD(22), bidir, X, 146, 1, Z)," &
"150 (CBSC_1, P_AD(21), bidir, X, 146, 1, Z)," &
"151 (CBSC_1, P_AD(20), bidir, X, 146, 1, Z)," &
"152 (CBSC_1, P_AD(19), bidir, X, 146, 1, Z)," &
"153 (CBSC_1, P_AD(18), bidir, X, 146, 1, Z)," &
"154 (CBSC_1, P_AD(17), bidir, X, 146, 1, Z)," &
"155 (CBSC_1, P_AD(16), bidir, X, 146, 1, Z)," &
"156 (BC_1, *, control, 1)," &
"157 (BC_1, *, control, 1)," &
"158 (CBSC_1, P_CXBE_BAR(2), bidir, X, 157, 1, Z)," &
"159 (CBSC_1, P_FRAME_BAR, bidir, X, 156, 1, Z)," &
"160 (BC_1, *, control, 1)," &
"161 (BC_1, *, control, 1)," &
"162 (CBSC_1, P_IRDY_BAR, bidir, X, 160, 1, Z)," &
"163 (CBSC_1, P_TRDY_BAR, bidir, X, 161, 1, Z)," &
"164 (CBSC_1, P_DEVSEL_BAR, bidir, X, 161, 1, Z)," &
"165 (CBSC_1, P_STOP_BAR, bidir, X, 161, 1, Z)," &
"166 (BC_4, P_LOCK_BAR, input, X)," &
"167 (CBSC_1, P_PERR_BAR, bidir, X, 171, 1, Z)," &
"168 (BC_1, P_SERR_BAR, output3, X, 172, 1, Z)," &
"169 (CBSC_1, P_PAR, bidir, X, 173, 1, Z)," &
"170 (CBSC_1, P_CXBE_BAR(1), bidir, X, 157, 1, Z)," &
"171 (BC_1, *, control, 1)," &
"172 (BC_1, *, control, 1)," &
"173 (BC_1, *, control, 1)," &
"174 (CBSC_1, P_AD(15), bidir, X, 182, 1, Z)," &
"175 (CBSC_1, P_AD(14), bidir, X, 182, 1, Z)," &
"176 (CBSC_1, P_AD(13), bidir, X, 182, 1, Z)," &
"177 (CBSC_1, P_AD(12), bidir, X, 182, 1, Z)," &
"178 (CBSC_1, P_AD(11), bidir, X, 182, 1, Z)," &
"179 (CBSC_1, P_AD(10), bidir, X, 182, 1, Z)," &
"180 (CBSC_1, P_AD(9), bidir, X, 182, 1, Z)," &
"181 (CBSC_1, P_AD(8), bidir, X, 182, 1, Z)," &
"182 (BC_1, *, control, 1)," &
"183 (CBSC_1, P_CXBE_BAR(0), bidir, X, 157, 1, Z)," &
"184 (CBSC_1, P_AD(7), bidir, X, 182, 1, Z)," &
"185 (CBSC_1, P_AD(6), bidir, X, 182, 1, Z)," &
"186 (CBSC_1, P_AD(5), bidir, X, 182, 1, Z)," &
"187 (CBSC_1, P_AD(4), bidir, X, 182, 1, Z)," &
"188 (CBSC_1, P_AD(3), bidir, X, 182, 1, Z)," &
"189 (CBSC_1, P_AD(2), bidir, X, 182, 1, Z)," &
"190 (CBSC_1, P_AD(1), bidir, X, 182, 1, Z)," &
"191 (CBSC_1, P_AD(0), bidir, X, 182, 1, Z)," &
"192 (CBSC_1, S_AD(0), bidir, X, 200, 1, Z)," &
"193 (CBSC_1, S_AD(1), bidir, X, 200, 1, Z)," &
"194 (CBSC_1, S_AD(2), bidir, X, 200, 1, Z)," &
"195 (CBSC_1, S_AD(3), bidir, X, 200, 1, Z)," &
"196 (CBSC_1, S_AD(4), bidir, X, 200, 1, Z)," &
"197 (CBSC_1, S_AD(5), bidir, X, 200, 1, Z)," &
"198 (CBSC_1, S_AD(6), bidir, X, 200, 1, Z)," &
"199 (CBSC_1, S_AD(7), bidir, X, 200, 1, Z)," &
"200 (BC_1, *, control, 1)," &
"201 (CBSC_1, S_CXBE_BAR(0), bidir, X, 215, 1, Z)," &
"202 (CBSC_1, S_AD(8), bidir, X, 200, 1, Z)," &
"203 (CBSC_1, S_AD(9), bidir, X, 200, 1, Z)," &
"204 (CBSC_1, S_AD(10), bidir, X, 200, 1, Z)," &
"205 (CBSC_1, S_AD(11), bidir, X, 200, 1, Z)," &
"206 (CBSC_1, S_AD(12), bidir, X, 200, 1, Z)," &
"207 (CBSC_1, S_AD(13), bidir, X, 200, 1, Z)," &
"208 (CBSC_1, S_AD(14), bidir, X, 200, 1, Z)," &
"209 (CBSC_1, S_AD(15), bidir, X, 200, 1, Z)," &
"210 (CBSC_1, S_CXBE_BAR(1), bidir, X, 215, 1, Z)," &
"211 (CBSC_1, S_PAR, bidir, X, 213, 1, Z)," &
"212 (CBSC_1, S_SERR_BAR, bidir, X, 214, 1, Z)," &
"213 (BC_1, *, control, 1)," &
"214 (BC_1, *, control, 1)," &
"215 (BC_1, *, control, 1)," &
"216 (CBSC_1, S_PERR_BAR, bidir, X, 224, 1, Z)," &
"217 (CBSC_1, S_LOCK_BAR, bidir, X, 225, 1, Z)," &
"218 (CBSC_1, S_STOP_BAR, bidir, X, 226, 1, Z)," &
"219 (CBSC_1, S_DEVSEL_BAR, bidir, X, 226, 1, Z)," &
"220 (CBSC_1, S_TRDY_BAR, bidir, X, 226, 1, Z)," &
"221 (CBSC_1, S_IRDY_BAR, bidir, X, 227, 1, Z)," &
"222 (CBSC_1, S_FRAME_BAR, bidir, X, 228, 1, Z)," &
"223 (CBSC_1, S_CXBE_BAR(2), bidir, X, 215, 1, Z)," &
"224 (BC_1, *, control, 1)," &
"225 (BC_1, *, control, 1)," &
"226 (BC_1, *, control, 1)," &
"227 (BC_1, *, control, 1)," &
"228 (BC_1, *, control, 1)," &
"229 (CBSC_1, S_AD(16), bidir, X, 237, 1, Z)," &
"230 (CBSC_1, S_AD(17), bidir, X, 237, 1, Z)," &
"231 (CBSC_1, S_AD(18), bidir, X, 237, 1, Z)," &
"232 (CBSC_1, S_AD(19), bidir, X, 237, 1, Z)," &
"233 (CBSC_1, S_AD(20), bidir, X, 237, 1, Z)," &
"234 (CBSC_1, S_AD(21), bidir, X, 237, 1, Z)," &
"235 (CBSC_1, S_AD(22), bidir, X, 237, 1, Z)," &
"236 (CBSC_1, S_AD(23), bidir, X, 237, 1, Z)," &
"237 (BC_1, *, control, 1)," &
"238 (BC_4, S_IDSEL, input, X)," &
"239 (CBSC_1, S_CXBE_BAR(3), bidir, X, 215, 1, Z)," &
"240 (CBSC_1, S_AD(24), bidir, X, 237, 1, Z)," &
"241 (CBSC_1, S_AD(25), bidir, X, 237, 1, Z)," &
"242 (CBSC_1, S_AD(26), bidir, X, 237, 1, Z)," &
"243 (CBSC_1, S_AD(27), bidir, X, 237, 1, Z)," &
"244 (CBSC_1, S_AD(28), bidir, X, 237, 1, Z)," &
"245 (CBSC_1, S_AD(29), bidir, X, 237, 1, Z)," &
"246 (CBSC_1, S_AD(30), bidir, X, 237, 1, Z)," &
"247 (CBSC_1, S_AD(31), bidir, X, 237, 1, Z)," &
"248 (BC_1, S_RST_BAR, output3, X, 8, 1, Z)," &
"249 (BC_4, S_REQ0S_GNT_BAR, input, X)," &
"250 (BC_1, S_GNT0S_REQ_BAR, output3, X, 258, 1, Z)," &
"251 (BC_4, S_REQ_BAR(0), input, X)," &
"252 (BC_1, S_GNT_BAR(0), output3, X, 257, 1, Z)," &
"253 (BC_4, S_REQ_BAR(1), input, X)," &
"254 (BC_1, S_GNT_BAR(1), output3, X, 257, 1, Z)," &
"255 (BC_4, S_REQ_BAR(2), input, X)," &
"256 (BC_1, S_GNT_BAR(2), output3, X, 257, 1, Z)," &
"257 (BC_1, *, control, 1)," &
"258 (BC_1, *, control, 1)," &
"259 (BC_4, S_CLK, input, X)," &
"260 (BC_4, S_REQ_BAR(3), input, X)," &
"261 (BC_1, S_GNT_BAR(3), output3, X, 257, 1, Z)," &
"262 (BC_4, S_REQ_BAR(4), input, X)," &
"263 (BC_1, S_GNT_BAR(4), output3, X, 257, 1, Z)";
end Rx_Processor;
