-- ****************** (C) COPYRIGHT 2015 STMicroelectronics **************************
-- * File Name : CortexMx.bsd *
-- * Author : STMicroelectronics www.st.com *
-- * Version : V1.0 *
-- * Date : 23-November-2015 *
-- * Description : Boundary Scan Description Language (BSDL) file for the *
-- * Cortex M4 Core TAP in STM32xxx Microcontrollers. *
-- ***********************************************************************************
-- * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS *
-- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.*
-- * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, *
-- * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE *
-- * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING *
-- * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. *
-- ***********************************************************************************
-- * This BSDL file has been syntaxed checked and validated by: *
-- * GOEPEL SyntaxChecker Version 3.1.2 *
-- ***********************************************************************************
entity CortexMx is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "NONE");
-- This section declares all the ports in the design.
port (
JTDI : in bit;
JTMS : in bit;
JTCK : in bit;
JTRST : in bit;
JTDO : out bit
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of CortexMx: entity is "STD_1149_1_2001";
attribute PIN_MAP of CortexMx : entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information is extracted from the
-- port-to-pin map file that was read in using the "read_pin_map" command.
constant NONE: PIN_MAP_STRING :=
"JTDI : 1," &
"JTMS : 2," &
"JTCK : 3," &
"JTRST : 4," &
"JTDO : 5 " ;
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of JTCK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of JTDI : signal is true;
attribute TAP_SCAN_MODE of JTMS : signal is true;
attribute TAP_SCAN_OUT of JTDO : signal is true;
attribute TAP_SCAN_RESET of JTRST : signal is true;
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of CortexMx : entity is 4;
-- Specifies the boundary-scan instructions implemented in the design and their
-- opcodes.
attribute INSTRUCTION_OPCODE of CortexMx : entity is
"EXTEST (0000)," &
"INTEST (0001)," &
"SAMPLE (0010)," &
"PRELOAD (0010)," &
"IDCODE (1110)," &
"BYPASS (1111)";
attribute INSTRUCTION_CAPTURE of CortexMx : entity is "0001";
attribute IDCODE_REGISTER of CortexMx : entity is
"XXXX" & -- Version
"1011101000000000" & -- Part number (ARM Cortex M3/M4)
"01000111011" & -- Manufacturer Identity (ARM)
"1"; -- Mandatory LSB
-- IDCODE = XBA00477
-- Specifies the length of the boundary scan register
attribute BOUNDARY_LENGTH of CortexMx: entity is 1;
attribute BOUNDARY_REGISTER of CortexMx: entity is
"0 (BC_0, *, internal, X) " ;
end CortexMx;
-- ******************* (C) COPYRIGHT 2015 STMicroelectronics *****END OF FILE********