BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: TMS320VC5410

--  TI TMS320VC5410 16-Bit 144-pin Fixed-Point DSP's with Boundary Scan      --
-------------------------------------------------------------------------------
--  Supported Devices: TMS320VC5410PGE  144-pin  Revision 1.0                --
-------------------------------------------------------------------------------
--  Created by    : Texas Instruments Incorporated                           --
--  Documentation : TMS320LC54x Users Guides                                 --
--  BSDL Revision : 1.0                                                      --
--  BSDL status   : Preliminary                                              --
--  Date created  : 09/02/98                                                 --
-------------------------------------------------------------------------------
--                                                                           --
--                          IMPORTANT NOTICE                                 --
--  Texas Instruments Incorporated (TI) reserves the right to make changes   --
--  to its products or to discontinue any semiconductor product or service   --
--  without notice, and advises its customers to obtain the latest version   --
--  of the relevant information to verify, before placing orders, that the   --
--  information being relied on is current.                                  --
--                                                                           --
--  TI warrants performance of its semiconductor products and related        --
--  software to the specifications applicable at the time of sale in         --
--  accordance with TI's standard warranty. Testing and other quality control--
--  techniques are utilized to the extent TI deems necessary to support this --
--  warranty. Specific testing of all parameters of each device is not       --
--  necessarily performed, except those mandated by government requirements. --
--                                                                           --
--  Certain applications using semiconductor devices may involve potential   --
--  risks of death, personal injury, or severe property or environmental     --
--  damage ("Critical Applications").                                        --
--                                                                           --
--    TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED,      --
--    OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS,      --
--    DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS.                     --
--                                                                           --
--  Inclusion of TI products in such applications is understood to be fully  --
--  at the risk of the customer.  Use of TI products in such applications    --
--  requires the written approval of an appropriate TI officer.  Questions   --
--  concerning potential risk applications should be directed to TI through  --
--  a local SC sales office.                                                 --
--                                                                           --
--  In order to minimize risks associated with the customer's applications,  --
--  adequate design and operating safeguards should be provided by the       --
--  customer to minimize inherent or procedural hazards.                     --
--                                                                           --
--  TI assumes no liability for applications assistance, customer product    --
--  design, software performance, or infringement of patents or services     --
--  described herein.  Nor does TI warrant or represent that any license,    --
--  either express or implied, is granted under any patent right, copyright, --
--  mask work right, or other intellectual property right of TI covering or  --
--  relating to any combination, machine, or process in which such           --
--  semiconductor products or services might be or are used.                 --
--                                                                           --
--            Copyright (c) 1996, Texas Instruments Incorporated             --
-------------------------------------------------------------------------------

entity TMS320VC5410 is
    generic (PHYSICAL_PIN_MAP : string := "PGE");

    port (A : out bit_vector(0 to 22);
          D : inout bit_vector(0 to 15);
          INT_NEG : in bit_vector(0 to 3);
          NMI_NEG : in bit;
          IACK_NEG : out bit;
          BDX : out bit_vector(0 to 2);
          BFSX : inout bit_vector(0 to 2);
          BCLKX : inout bit_vector(0 to 2);
          BDR : in bit_vector(0 to 2);
          BFSR : inout bit_vector(0 to 2); 
          BCLKR : inout bit_vector(0 to 2); 
          MP_MC_NEG : in bit;
          BIO_NEG : in bit;
          HOLD_NEG : in bit;
          IAQ_NEG : out bit;
          HOLDA_NEG : out bit;
          XF : out bit;
          MSC_NEG : out bit;
          IOSTRB_NEG : out bit;
          MSTRB_NEG : out bit;
          R_W_NEG : out bit;
          IS_NEG : out bit;
          DS_NEG : out bit;
          PS_NEG : out bit;
          READY : in bit;
          RS_NEG : in bit;
          HD : inout bit_vector(0 to 7);
          HBIL : in bit;
          HRDY : out bit;
          HINT : out bit;
          HCNTL : in bit_vector(0 to 1);
          HRW_NEG : in bit;
          HCS_NEG : in bit;
          HAS_NEG : in bit;
          HDS2_NEG : in bit;
          HDS1_NEG : in bit;
          HPIENA : in bit;
          X2_CLKIN : in bit;
          X1 : linkage bit;
          CLKOUT : out bit;
          EMU1_OFF_NEG : inout bit;
          EMU0 : inout bit;
          TOUT : out bit;
          TEST1 : in bit;
          CLKMD : in bit_vector(1 to 3);
          CGND : linkage bit_vector(1 to 10);
          DGND : linkage bit_vector(1 to 9);
          CVDD : linkage bit_vector(1 to 7);
          DVDD : linkage bit_vector(1 to 6);
          TCK : in bit;
          TDI : in bit;
          TDO : out bit;
          TMS : in bit;
          TRST_NEG : in bit);

    use STD_1149_1_1990.all; -- Get standard attributes and definitions
    use TI_BIDIR.all;        -- Get C54X BIDIR cell attributes

----------------------------------------------------------------------
--  This package type TI_BIDIR must be available to your toolset.   --
--  In most cases this text should be placed in a separate file     --
--  named 'TI_BIDIR' that can be referenced via the previous        --
--  'use TI_BIDIR.all' statement.                                   --
--
--    package TI_BIDIR is
--        use STD_1149_1_1990.all;
--        constant BC_BIDIR : CELL_INFO;
--    end TI_BIDIR;
--
--    package body TI_BIDIR is
--        constant BC_BIDIR : CELL_INFO :=
--         ((BIDIR_IN, EXTEST,  PI),  (BIDIR_OUT, EXTEST,  PI),
--          (BIDIR_IN, SAMPLE,  PI),  (BIDIR_OUT, SAMPLE,  PI),
--          (BIDIR_IN, INTEST,  PI),  (BIDIR_OUT, INTEST,  PI));
--    end TI_BIDIR;
----------------------------------------------------------------------

    attribute PIN_MAP of TMS320VC5410 : entity is PHYSICAL_PIN_MAP;

    constant PGE : PIN_MAP_STRING :=
                                                  --Address and Data
      " A:(131,132,133,134,136,137,138,139,        " &
      "    140,141,  5,  7,  8,  9, 10, 11,       " &
      "    105,107,108,109,110,143,  2),          " &
      " D:( 99,100,101,102,103,104,113,114,       " &
      "    115,116,117,118,119,121,122,123),      " &
                                                  --Control Signals
      " DS_NEG: 21,   PS_NEG: 20,  IS_NEG: 22,    " &
      " READY: 19,    R_W_NEG:23,                 " &
      " MSTRB_NEG:24, IOSTRB_NEG:25,              " &
      " HOLD_NEG:30,  HOLDA_NEG:28,               " &
      " IAQ_NEG:29,   MSC_NEG:26,                 " &
                                                  --General Purpose I/O
      " BIO_NEG:31,   XF:27,                      " &
                                                  --Init., Int. and Reset
      " IACK_NEG:61,                              " &
      " NMI_NEG:63,   INT_NEG:(64,65,66,67),      " &
      " RS_NEG:98,    MP_MC_NEG:32,               " &
                                                    --Ocillator Signals
      " X1:96,     X2_CLKIN:97,                   " &
      " CLKOUT:94, CLKMD:(77,78,79),              " &
                                                    --Timer Signal
      " TOUT:82,                                  " &
                                           --Multi-channel Buffered Serial Port
      " BCLKR:(41,38,42), BCLKX:(48,71,49),       " &
      " BDR:(45,35,47),   BDX:(59,74,60),         " &
      " BFSR:(43,36,44),  BFSX:(53,73 ,54),       " &
                                                  --Host Port Interface
      " HPIENA:92,                                " &
      " HD:(58,69,81,95,120,124,135,6),           " &
      " HINT:51,      HCNTL:(39,46), HRW_NEG:18,  " &
      " HCS_NEG:17,   HAS_NEG:13,    HBIL:62,     " &
      " HDS1_NEG:127, HDS2_NEG:129,  HRDY:55,     " &
                                                  --JTAG Signals
      " TCK:88,      TDI:86,       TDO:85,        " &
      " TMS:89,      TRST_NEG:87,                 " &
                                                  --Emulation Signals
      " EMU0:83,     EMU1_OFF_NEG:84,             " &
                                                  -- TEST
      " TEST1:80,                                 " &
                                                  --Power and Ground
   "CGND:(1,3,15,34,37,50,70,90,111,126)," &
   "DGND:(14,40,57,72,76,93,106,128,144)," &
   "CVDD:(12,16,52,68,91,125,142),"&
   "DVDD:(4,33,56,75,112,130)";

    attribute TAP_SCAN_IN    of TDI      : signal is true;
    attribute TAP_SCAN_MODE  of TMS      : signal is true;
    attribute TAP_SCAN_OUT   of TDO      : signal is true;
    attribute TAP_SCAN_RESET of TRST_NEG : signal is true;
    attribute TAP_SCAN_CLOCK of TCK      : signal is (25.00e6, BOTH);

    attribute INSTRUCTION_LENGTH of TMS320VC5410 : entity is 8;
    attribute INSTRUCTION_OPCODE of TMS320VC5410 : entity is
              "EXTEST    (00000000), " &
              "BYPASS    (11111111), " &
              "SAMPLE    (00000010), " &
              "HIGHZ     (00000110)  " ;
    attribute INSTRUCTION_CAPTURE of TMS320VC5410 : entity is "XXXXXX01";

    attribute REGISTER_ACCESS of TMS320VC5410 : entity is
              "BOUNDARY (EXTEST, SAMPLE)," &
              "BYPASS   (BYPASS, HIGHZ)  " ;

    attribute BOUNDARY_CELLS of TMS320VC5410 : entity is
              "BC_1, BC_2, BC_4, BC_BIDIR";

    attribute BOUNDARY_LENGTH   of TMS320VC5410 : entity is 130;
    attribute BOUNDARY_REGISTER of TMS320VC5410 : entity is

    "0   (BC_1     ,A(18)        ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "1   (BC_1     ,A(17)        ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "2   (BC_1     ,A(16)        ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "3   (BC_BIDIR ,D(5)         ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "4   (BC_BIDIR ,D(4)         ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "5   (BC_BIDIR ,D(3)         ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "6   (BC_BIDIR ,D(2)         ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "7   (BC_BIDIR ,D(1)         ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "8   (BC_BIDIR ,D(0)         ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "9   (BC_2     ,RS_NEG       ,INPUT   ,X             ), "  &
    "10  (BC_4     ,X2_CLKIN     ,CLOCK   ,X             ), "  &
    "11  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "12  (BC_BIDIR ,HD(3)        ,BIDIR   ,X ,11    ,1 ,Z), "  &
    "13  (BC_1     ,CLKOUT       ,OUTPUT3 ,X ,17    ,1 ,Z), "  &
    "14  (BC_2     ,HPIENA       ,INPUT   ,X             ), "  &
    "15  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "16  (BC_BIDIR ,EMU1_OFF_NEG ,BIDIR   ,X ,15    ,1 ,Z), "  &
    "17  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "18  (BC_BIDIR ,EMU0         ,BIDIR   ,X ,19    ,1 ,Z), "  &
    "19  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "20  (BC_1     ,TOUT         ,OUTPUT3 ,X ,17    ,1 ,Z), "  &
    "21  (BC_BIDIR ,HD(2)        ,BIDIR   ,X ,11    ,1 ,Z), "  &
    "22  (BC_2     ,TEST1        ,INPUT   ,X             ), "  &
    "23  (BC_2     ,CLKMD(3)     ,INPUT   ,X             ), "  &
    "24  (BC_2     ,CLKMD(2)     ,INPUT   ,X             ), "  &
    "25  (BC_2     ,CLKMD(1)     ,INPUT   ,X             ), "  &
    "26  (BC_1     ,BDX(1)       ,OUTPUT3 ,X ,27    ,1 ,Z), "  &
    "27  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "28  (BC_BIDIR ,BFSX(1)      ,BIDIR   ,X ,29    ,1 ,Z), "  &
    "29  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "30  (BC_BIDIR ,BCLKX(1)     ,BIDIR   ,X ,31    ,1 ,Z), "  &
    "31  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "32  (BC_BIDIR ,HD(1)        ,BIDIR   ,X ,11    ,1 ,Z), "  &
    "33  (BC_2     ,INT_NEG(3)   ,INPUT   ,X             ), "  &
    "34  (BC_2     ,INT_NEG(2)   ,INPUT   ,X             ), "  &
    "35  (BC_2     ,INT_NEG(1)   ,INPUT   ,X             ), "  &
    "36  (BC_2     ,INT_NEG(0)   ,INPUT   ,X             ), "  &
    "37  (BC_2     ,NMI_NEG      ,INPUT   ,X             ), "  &
    "38  (BC_2     ,HBIL         ,INPUT   ,X             ), "  &
    "39  (BC_1     ,IACK_NEG     ,OUTPUT3 ,X ,17    ,1 ,Z), "  &
    "40  (BC_1     ,BDX(2)       ,OUTPUT3 ,X ,41    ,1 ,Z), "  &
    "41  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "42  (BC_1     ,BDX(0)       ,OUTPUT3 ,X ,43    ,1 ,Z), "  &
    "43  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "44  (BC_BIDIR ,HD(0)        ,BIDIR   ,X ,11    ,1 ,Z), "  &
    "45  (BC_1     ,HRDY         ,OUTPUT3 ,X ,17    ,1 ,Z), "  &
    "46  (BC_BIDIR ,BFSX(2)      ,BIDIR   ,X ,47    ,1 ,Z), "  &
    "47  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "48  (BC_BIDIR ,BFSX(0)      ,BIDIR   ,X ,49    ,1 ,Z), "  &
    "49  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "50  (BC_1     ,HINT         ,OUTPUT3 ,X ,17    ,1 ,Z), "  &
    "51  (BC_2     ,*            ,INTERNAL,X             ), "  &
    "52  (BC_BIDIR ,BCLKX(2)     ,BIDIR   ,X ,53    ,1 ,Z), "  &
    "53  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "54  (BC_BIDIR ,BCLKX(0)     ,BIDIR   ,X ,55    ,1 ,Z), "  &
    "55  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "56  (BC_2     ,BDR(2)       ,INPUT   ,X             ), "  &
    "57  (BC_2     ,HCNTL(1)     ,INPUT   ,X             ), "  &
    "58  (BC_2     ,BDR(0)       ,INPUT   ,X             ), "  &
    "59  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "60  (BC_BIDIR ,BFSR(2)      ,BIDIR   ,X ,59    ,1 ,Z), "  &
    "61  (BC_2     ,*            ,INTERNAL,X             ), "  &
    "62  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "63  (BC_BIDIR ,BFSR(0)      ,BIDIR   ,X ,62    ,1 ,Z), "  &
    "64  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "65  (BC_BIDIR ,BCLKR(2)     ,BIDIR   ,X ,64    ,1 ,Z), "  &
    "66  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "67  (BC_BIDIR ,BCLKR(0)     ,BIDIR   ,X, 66    ,1 ,Z), "  &
    "68  (BC_2     ,HCNTL(0)     ,INPUT   ,X             ), "  &
    "69  (BC_1     ,*            ,CONTROL ,1             ), "  &
    "70  (BC_BIDIR ,BCLKR(1)     ,BIDIR   ,X ,69    ,1 ,Z), "  &
    "71  (BC_BIDIR ,BFSR(1)      ,BIDIR   ,X,72     ,1 ,Z), "  &
    "72  (BC_1     ,*            ,CONTROL ,1             ),"   &
    "73  (BC_2     ,BDR(1)       ,INPUT   ,X             ), "  &
    "74  (BC_2     ,*            ,INTERNAL,X             ), "  &
    "75  (BC_2     ,MP_MC_NEG    ,INPUT   ,X             ), "  &
    "76  (BC_2     ,BIO_NEG      ,INPUT   ,X             ), "  &
    "77  (BC_2     ,HOLD_NEG     ,INPUT   ,X             ), "  &
    "78  (BC_1     ,IAQ_NEG      ,OUTPUT3 ,X ,17    ,1 ,Z), "  &
    "79  (BC_1     ,HOLDA_NEG    ,OUTPUT3 ,X ,17    ,1 ,Z), "  &
    "80  (BC_1     ,XF           ,OUTPUT3 ,X ,17    ,1 ,Z), "  &
    "81  (BC_1     ,MSC_NEG      ,OUTPUT3 ,X ,17    ,1 ,Z), "  &
    "82  (BC_1     ,IOSTRB_NEG   ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "83  (BC_1     ,MSTRB_NEG    ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "84  (BC_1     ,R_W_NEG      ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "85  (BC_1     ,IS_NEG       ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "86  (BC_1     ,DS_NEG       ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "87  (BC_1     ,PS_NEG       ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "88  (BC_2     ,READY        ,INPUT   ,X             ), "  &
    "89  (BC_2     ,HRW_NEG      ,INPUT   ,X             ), "  &
    "90  (BC_2     ,HCS_NEG      ,INPUT   ,X             ), "  &
    "91  (BC_2     ,HAS_NEG      ,INPUT   ,X             ), "  &
    "92  (BC_1     ,A(15)        ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "93  (BC_1     ,A(14)        ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "94  (BC_1     ,A(13)        ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "95  (BC_1     ,A(12)        ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "96  (BC_1     ,A(11)        ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "97  (BC_BIDIR ,HD(7)        ,BIDIR   ,X ,11    ,1 ,Z), "  &
    "98  (BC_1     ,A(10)        ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "99  (BC_1     ,A(22)        ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "100  (BC_1    ,A(21)        ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "101  (BC_1    ,A(9)         ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "102  (BC_1    ,A(8)         ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "103  (BC_1    ,A(7)         ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "104  (BC_1    ,A(6)         ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "105  (BC_1    ,*            ,CONTROL ,1             ), "  &
    "106  (BC_1    ,A(5)         ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "107 (BC_1     ,A(4)         ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "108 (BC_BIDIR ,HD(6)        ,BIDIR   ,X ,11    ,1 ,Z), "  &
    "109 (BC_1     ,A(3)         ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "110 (BC_1     ,A(2)         ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "111 (BC_1     ,A(1)         ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "112 (BC_1     ,A(0)         ,OUTPUT3 ,X ,105   ,1 ,Z), "  &
    "113 (BC_2     ,HDS2_NEG     ,INPUT   ,X             ), "  &
    "114 (BC_2     ,HDS1_NEG     ,INPUT   ,X             ), "  &
    "115 (BC_BIDIR ,HD(5)        ,BIDIR   ,X ,11    ,1 ,Z), "  &
    "116 (BC_BIDIR ,D(15)        ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "117 (BC_BIDIR ,D(14)        ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "118 (BC_BIDIR ,D(13)        ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "119 (BC_BIDIR ,HD(4)        ,BIDIR   ,X ,11    ,1 ,Z), "  &
    "120 (BC_BIDIR ,D(12)        ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "121 (BC_BIDIR ,D(11)        ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "122 (BC_BIDIR ,D(10)        ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "123 (BC_BIDIR ,D(9)         ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "124 (BC_BIDIR ,D(8)         ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "125 (BC_BIDIR ,D(7)         ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "126 (BC_BIDIR ,D(6)         ,BIDIR   ,X ,127   ,1 ,Z), "  &
    "127 (BC_1     ,*            ,CONTROL ,1             ), "  &
    "128 (BC_1     ,A(20)        ,OUTPUT3 ,X ,105    ,1 ,Z), "  &
    "129 (BC_1     ,A(19)        ,OUTPUT3 ,X ,105    ,1 ,Z)  "  ; 

end TMS320VC5410;