-- *********************************************************************** -- BSDL file for design IDT82V2058 -- Company: IDT_NEWAVE -- Date: Tue Jul 17 19:06:13 2001 -- *********************************************************************** entity IDT82V2058 is -- This section identifies the default device package selected. generic (PHYSICAL_PIN_MAP: string:= "IDT82V2058DA"); -- This section declares all the ports in the design. port ( A0 : in bit; A1 : in bit; A2 : in bit; A3 : in bit; A4 : in bit; SCLK_ALE_ASB : in bit; CLKE : in bit; CSB : in bit; SDI_WRB_DSB : in bit; MCLK : in bit; MODE2 : in bit; MODE0 : in bit; MODE1 : in bit; OE : in bit; RDB_RWB : in bit; TCK : in bit; TCLK0 : in bit; TCLK1 : in bit; TCLK2 : in bit; TCLK3 : in bit; TCLK4 : in bit; TCLK5 : in bit; TCLK6 : in bit; TCLK7 : in bit; TDI : in bit; TMS : in bit; TDN0 : in bit; TDN1 : in bit; TDN2 : in bit; TDN3 : in bit; TDN4 : in bit; TDN5 : in bit; TDN6 : in bit; TDN7 : in bit; TDP0 : in bit; TDP1 : in bit; TDP2 : in bit; TDP3 : in bit; TDP4 : in bit; TDP5 : in bit; TDP6 : in bit; TDP7 : in bit; TRSTB : in bit; LOOP0_D0 : inout bit; LOOP1_D1 : inout bit; LOOP2_D2 : inout bit; LOOP3_D3 : inout bit; LOOP4_D4 : inout bit; LOOP5_D5 : inout bit; LOOP6_D6 : inout bit; LOOP7_D7 : inout bit; SDO_RDY_ACKB : out bit; RCLK0 : out bit; RCLK1 : out bit; RCLK2 : out bit; RCLK3 : out bit; RCLK4 : out bit; RCLK5 : out bit; RCLK6 : out bit; RCLK7 : out bit; RDN0 : out bit; RDN1 : out bit; RDN2 : out bit; RDN3 : out bit; RDN4 : out bit; RDN5 : out bit; RDN6 : out bit; RDN7 : out bit; RDP0 : out bit; RDP1 : out bit; RDP2 : out bit; RDP3 : out bit; RDP4 : out bit; RDP5 : out bit; RDP6 : out bit; RDP7 : out bit; TDO : out bit; INTB : buffer bit; LOS0 : buffer bit; LOS1 : buffer bit; LOS2 : buffer bit; LOS3 : buffer bit; LOS4 : buffer bit; LOS5 : buffer bit; LOS6 : buffer bit; LOS7 : buffer bit; IC0 : linkage bit; IC1 : linkage bit; GNDD : linkage bit; GNDA : linkage bit; GNDIO : linkage bit_vector (0 to 1); GNDT : linkage bit_vector (0 to 7); RRING : linkage bit_vector (0 to 7); RTIP : linkage bit_vector (0 to 7); TRING : linkage bit_vector (0 to 7); TTIP : linkage bit_vector (0 to 7); VDDD : linkage bit; VDDA : linkage bit; VDDIO : linkage bit_vector (0 to 1); VDDT : linkage bit_vector (0 to 7) ); use STD_1149_1_1994.all; attribute COMPONENT_CONFORMANCE of IDT82V2058: entity is "STD_1149_1_1993"; attribute PIN_MAP of IDT82V2058: entity is PHYSICAL_PIN_MAP; -- This section specifies the pin map for each port. This information -- is extracted from the port-to-pin map file that was read in using -- the "read_pin_map" command. constant IDT82V2058DA: PIN_MAP_STRING := "A0 : 16," & "A1 : 15," & "A2 : 14," & "A3 : 13," & "A4 : 12," & "SCLK_ALE_ASB : 86," & "CLKE : 115," & "CSB : 87," & "SDI_WRB_DSB : 84," & "MCLK : 10," & "MODE2 : 11," & "MODE0 : 88," & "MODE1 : 43," & "OE : 114," & "RDB_RWB : 85," & "TCK : 97," & "TCLK0 : 36," & "TCLK1 : 29," & "TCLK2 : 81," & "TCLK3 : 74," & "TCLK4 : 107," & "TCLK5 : 100," & "TCLK6 : 9," & "TCLK7 : 2," & "TDI : 99," & "TMS : 96," & "TDN0 : 38," & "TDN1 : 31," & "TDN2 : 79," & "TDN3 : 72," & "TDN4 : 109," & "TDN5 : 102," & "TDN6 : 7," & "TDN7 : 144," & "TDP0 : 37," & "TDP1 : 30," & "TDP2 : 80," & "TDP3 : 73," & "TDP4 : 108," & "TDP5 : 101," & "TDP6 : 8," & "TDP7 : 1," & "TRSTB : 95," & "LOOP0_D0 : 21," & "LOOP1_D1 : 22," & "LOOP2_D2 : 23," & "LOOP3_D3 : 24," & "LOOP4_D4 : 25," & "LOOP5_D5 : 26," & "LOOP6_D6 : 27," & "LOOP7_D7 : 28," & "SDO_RDY_ACKB : 83," & "RCLK0 : 39," & "RCLK1 : 32," & "RCLK2 : 78," & "RCLK3 : 71," & "RCLK4 : 110," & "RCLK5 : 103," & "RCLK6 : 6," & "RCLK7 : 143," & "RDN0 : 41," & "RDN1 : 34," & "RDN2 : 76," & "RDN3 : 69," & "RDN4 : 112," & "RDN5 : 105," & "RDN6 : 4," & "RDN7 : 141," & "RDP0 : 40," & "RDP1 : 33," & "RDP2 : 77," & "RDP3 : 70," & "RDP4 : 111," & "RDP5 : 104," & "RDP6 : 5," & "RDP7 : 142," & "TDO : 98," & "INTB : 82," & "LOS0 : 42," & "LOS1 : 35," & "LOS2 : 75," & "LOS3 : 68," & "LOS4 : 113," & "LOS5 : 106," & "LOS6 : 3," & "LOS7 : 140," & "IC1 : 94," & "IC0 : 93," & "GNDD : 20," & "GNDA : 89," & "GNDIO : (18, 91)," & "GNDT : (47, 50, 59, 62, 119, 122, 131, 134)," & "RRING : (49, 54, 61, 66, 121, 126, 133, 138)," & "RTIP : (48, 55, 60, 67, 120, 127, 132, 139)," & "TRING : (46, 51, 58, 63, 118, 123, 130, 135)," & "TTIP : (45, 52, 57, 64, 117, 124, 129, 136)," & "VDDD : 19," & "VDDA : 90," & "VDDIO : (17, 92)," & "VDDT : (44, 53, 56, 65, 116, 125, 128, 137)"; -- This section specifies the TAP ports. -- For the TAP TCK port, the parameters in the brackets are: -- First Field : Maximum TCK frequency. -- Second Field: Allowable states TCK may be stopped in. attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH); attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_RESET of TRSTB: signal is true; -- Specifies the number of bits in the instruction register. attribute INSTRUCTION_LENGTH of IDT82V2058: entity is 3; -- Specifies the boundary-scan instructions implemented in the -- design and their opcodes. attribute INSTRUCTION_OPCODE of IDT82V2058: entity is "BYPASS (111)," & "EXTEST (000)," & "SAMPLE (100)," & "IDCODE (110)," & "USER1 (010)"; -- Specifies the bit pattern that is loaded into the instruction -- register when the TAP controller passes through the Capture-IR -- state. The standard mandates that the two LSBs must be "01". -- The remaining bits are design specific. attribute INSTRUCTION_CAPTURE of IDT82V2058: entity is "001"; -- Specifies the bit pattern that is loaded into the DEVICE_ID -- register during the IDCODE instruction when the TAP controller -- passes through the Capture-DR state. attribute IDCODE_REGISTER of IDT82V2058: entity is "0011" & -- 4-bit version number "0010000001001000" & -- 16-bit part number "00000110011" & -- 11-bit identity of the manufacturer "1"; -- Required by IEEE Std 1149.1 -- This section specifies the test data register placed between TDI -- and TDO for each implemented instruction. attribute REGISTER_ACCESS of IDT82V2058: entity is "BYPASS (BYPASS)," & "BOUNDARY (EXTEST, SAMPLE)," & "DEVICE_ID (IDCODE)," & "UTDR1[5] (USER1)"; -- Specifies the length of the boundary scan register. attribute BOUNDARY_LENGTH of IDT82V2058: entity is 99; -- The following list specifies the characteristics of each cell -- in the boundary scan register from TDI to TDO. -- The following is a description of the label fields: -- num : Is the cell number. -- cell : Is the cell type as defined by the standard. -- port : Is the design port name. Control cells do not -- have a port name. -- function: Is the function of the cell as defined by the -- standard. Is one of input, output2, output3, -- bidir, control or controlr. -- safe : Specifies the value that the BSR cell should be -- loaded with for safe operation when the software -- might otherwise choose a random value. -- ccell : The control cell number. Specifies the control -- cell that drives the output enable for this port. -- disval : Specifies the value that is loaded into the -- control cell to disable the output enable for -- the corresponding port. -- rslt : Resulting state. Shows the state of the driver -- when it is disabled. attribute BOUNDARY_REGISTER of IDT82V2058: entity is -- -- num cell port function safe [ccell disval rslt] -- "98 (BC_4, A0, observe_only, X), " & "97 (BC_4, A1, observe_only, X), " & "96 (BC_4, A2, observe_only, X), " & "95 (BC_4, A3, observe_only, X), " & "94 (BC_4, A4, observe_only, X), " & "93 (BC_4, MODE2, observe_only, X), " & "92 (BC_4, MCLK, observe_only, X), " & "91 (BC_4, TCLK6, observe_only, X), " & "90 (BC_4, TDP6, observe_only, X), " & "89 (BC_4, TDN6, observe_only, X), " & "88 (BC_1, RCLK6, output3, X, 87, 1, Z), " & "87 (BC_1, *, control, 1), " & "86 (BC_1, RDP6, output3, X, 87, 1, Z), " & "85 (BC_1, RDN6, output3, X, 87, 1, Z), " & "84 (BC_1, LOS6, output2, X), " & "83 (BC_4, TCLK7, observe_only, X), " & "82 (BC_4, TDP7, observe_only, X), " & "81 (BC_4, TDN7, observe_only, X), " & "80 (BC_1, RCLK7, output3, X, 79, 1, Z), " & "79 (BC_1, *, control, 1), " & "78 (BC_1, RDP7, output3, X, 79, 1, Z), " & "77 (BC_1, RDN7, output3, X, 79, 1, Z), " & "76 (BC_1, LOS7, output2, X), " & "75 (BC_4, CLKE, observe_only, X), " & "74 (BC_4, OE, observe_only, X), " & "73 (BC_1, LOS4, output2, X), " & "72 (BC_1, *, control, 1), " & "71 (BC_1, RDN4, output3, X, 72, 1, Z), " & "70 (BC_1, RDP4, output3, X, 72, 1, Z), " & "69 (BC_1, RCLK4, output3, X, 72, 1, Z), " & "68 (BC_4, TDN4, observe_only, X), " & "67 (BC_4, TDP4, observe_only, X), " & "66 (BC_4, TCLK4, observe_only, X), " & "65 (BC_1, LOS5, output2, X), " & "64 (BC_1, *, control, 1), " & "63 (BC_1, RDN5, output3, X, 64, 1, Z), " & "62 (BC_1, RDP5, output3, X, 64, 1, Z), " & "61 (BC_1, RCLK5, output3, X, 64, 1, Z), " & "60 (BC_4, TDN5, observe_only, X), " & "59 (BC_4, TDP5, observe_only, X), " & "58 (BC_4, TCLK5, observe_only, X), " & "57 (BC_4, MODE0, observe_only, X), " & "56 (BC_4, CSB, observe_only, X), " & "55 (BC_4, SCLK_ALE_ASB,observe_only, X), " & "54 (BC_4, RDB_RWB, observe_only, X), " & "53 (BC_4, SDI_WRB_DSB, observe_only, X), " & "52 (BC_1, *, control, 1), " & "51 (BC_1, SDO_RDY_ACKB,output3, X, 52, 1, Z), " & "50 (BC_1, INTB, output2, X), " & "49 (BC_4, TCLK2, observe_only, X), " & "48 (BC_4, TDP2, observe_only, X), " & "47 (BC_4, TDN2, observe_only, X), " & "46 (BC_1, RCLK2, output3, X, 45, 1, Z), " & "45 (BC_1, *, control, 1), " & "44 (BC_1, RDP2, output3, X, 45, 1, Z), " & "43 (BC_1, RDN2, output3, X, 45, 1, Z), " & "42 (BC_1, LOS2, output2, X), " & "41 (BC_4, TCLK3, observe_only, X), " & "40 (BC_4, TDP3, observe_only, X), " & "39 (BC_4, TDN3, observe_only, X), " & "38 (BC_1, RCLK3, output3, X, 37, 1, Z), " & "37 (BC_1, *, control, 1), " & "36 (BC_1, RDP3, output3, X, 37, 1, Z), " & "35 (BC_1, RDN3, output3, X, 37, 1, Z), " & "34 (BC_1, LOS3, output2, X), " & "33 (BC_4, MODE1, observe_only, X), " & "32 (BC_1, LOS0, output2, X), " & "31 (BC_1, *, control, 1), " & "30 (BC_1, RDN0, output3, X, 31, 1, Z), " & "29 (BC_1, RDP0, output3, X, 31, 1, Z), " & "28 (BC_1, RCLK0, output3, X, 31, 1, Z), " & "27 (BC_4, TDN0, observe_only, X), " & "26 (BC_4, TDP0, observe_only, X), " & "25 (BC_4, TCLK0, observe_only, X), " & "24 (BC_1, LOS1, output2, X), " & "23 (BC_1, *, control, 1), " & "22 (BC_1, RDN1, output3, X, 23, 1, Z), " & "21 (BC_1, RDP1, output3, X, 23, 1, Z), " & "20 (BC_1, RCLK1, output3, X, 23, 1, Z), " & "19 (BC_4, TDN1, observe_only, X), " & "18 (BC_4, TDP1, observe_only, X), " & "17 (BC_4, TCLK1, observe_only, X), " & "16 (BC_1, *, control, 1), " & "15 (BC_4, LOOP7_D7, observe_only, X), " & "14 (BC_1, LOOP7_D7, output3, X, 16, 1, Z), " & "13 (BC_4, LOOP6_D6, observe_only, X), " & "12 (BC_1, LOOP6_D6, output3, X, 16, 1, Z), " & "11 (BC_4, LOOP5_D5, observe_only, X), " & "10 (BC_1, LOOP5_D5, output3, X, 16, 1, Z), " & "9 (BC_4, LOOP4_D4, observe_only, X), " & "8 (BC_1, LOOP4_D4, output3, X, 16, 1, Z), " & "7 (BC_4, LOOP3_D3, observe_only, X), " & "6 (BC_1, LOOP3_D3, output3, X, 16, 1, Z), " & "5 (BC_4, LOOP2_D2, observe_only, X), " & "4 (BC_1, LOOP2_D2, output3, X, 16, 1, Z), " & "3 (BC_4, LOOP1_D1, observe_only, X), " & "2 (BC_1, LOOP1_D1, output3, X, 16, 1, Z), " & "1 (BC_4, LOOP0_D0, observe_only, X), " & "0 (BC_1, LOOP0_D0, output3, X, 16, 1, Z) "; end IDT82V2058;