BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: STM32L412_422_LQFP32

-- ****************** (C) COPYRIGHT 2018 STMicroelectronics **************************
-- * File Name          : STM32L412_422_LQFP32.bsd                                   *
-- * Author             : STMicroelectronics www.st.com                              *
-- * Version            : V1.0                                                       *
-- * Date               : 30-August-2018                                             *
-- * Description        : Boundary Scan Description Language (BSDL) file for the     * 
-- *                      STM32L412_422_LQFP32 Microcontrollers.                     *
-- ***********************************************************************************
-- * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS     *
-- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.*
-- * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,        *
-- * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE   *
-- * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING         *
-- * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.                 *
-- ***********************************************************************************
-- * This BSDL file has been syntaxed checked and validated by:                      *                                                                 
-- * GOEPEL SyntaxChecker Version 3.1.2                                              *
-- ***********************************************************************************

 entity STM32L412_422_LQFP32 is					
 -- This section identifies the default device package selected.
 generic (PHYSICAL_PIN_MAP: string:= "LQFP32_PACKAGE");
 -- This section declares all the ports in the design.	 
   port ( 
      JTMS              : in    bit;				  
      JTCK              : in    bit;
      JTDI              : in    bit;	
      JTDO              : out   bit;			  
      JTRST             : in    bit;				  				  
      NRST              : in    bit;    
      PC14_OSC32_IN     : inout bit;
      PC15_OSC32_OUT    : inout bit;
      PA0_CK_IN         : inout bit;
      PA1               : inout bit;
      PA2               : inout bit;
      PA3               : inout bit;
      PA4               : inout bit;
      PA5               : inout bit;
      PA6               : inout bit;
      PA7               : inout bit;
      PB0               : inout bit;
      PB1               : inout bit;
      PA8               : inout bit;
      PA9               : inout bit;
      PA10              : inout bit;
      PA11              : inout bit;
      PA12              : inout bit;
      PB5               : inout bit;
      PB6               : inout bit;
      PB7               : inout bit;
      PH3_BOOT0         : inout bit;
      VDDA_VREFP        : linkage bit;
      VDD               : linkage bit_vector(0 to 1);
      VSS               : linkage bit_vector(0 to 1)
    );

--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
    use STD_1149_1_2001.all;

    attribute COMPONENT_CONFORMANCE of STM32L412_422_LQFP32: entity is "STD_1149_1_2001";

    attribute PIN_MAP of STM32L412_422_LQFP32 : entity is PHYSICAL_PIN_MAP;

-- This section specifies the pin map for each port. This information is extracted from the
-- port-to-pin map file that was read in using the "read_pin_map" command.

    constant LQFP32_PACKAGE: PIN_MAP_STRING :=  
      "JTMS             : 23  ," & 
      "JTCK             : 24  ," & 
      "JTDI             : 25  ," & 
      "JTDO             : 26  ," & 
      "JTRST            : 27  ," & 
      "NRST             : 4  ," & 
      "PC14_OSC32_IN    : 2  ," & 
      "PC15_OSC32_OUT   : 3  ," & 
      "PA0_CK_IN        : 6  ," & 
      "PA1              : 7  ," & 
      "PA2              : 8  ," & 
      "PA3              : 9  ," & 
      "PA4              : 10  ," & 
      "PA5              : 11  ," & 
      "PA6              : 12  ," & 
      "PA7              : 13  ," &
      "PB0              : 14  ," & 
      "PB1              : 15  ," & 
      "PA8              : 18  ," & 
      "PA9              : 19  ," & 
      "PA10             : 20  ," & 
      "PA11             : 21  ," & 
      "PA12             : 22  ," &
      "PB5              : 28  ," & 
      "PB6              : 29  ," &
      "PB7              : 30  ," & 
      "PH3_BOOT0        : 31  ," & 
      "VDDA_VREFP       : 5  ," &	   	   
      "VDD              : (1, 17)," &
      "VSS              : (16, 32) " ;  


-- This section specifies the TAP ports. For the TAP TCK port, the parameters in the brackets are:
--        First Field : Maximum  TCK frequency.
--        Second Field: Allowable states TCK may be stopped in.
   
   attribute TAP_SCAN_CLOCK of JTCK  : signal is (10.0e6, BOTH);
   attribute TAP_SCAN_IN    of JTDI  : signal is true;
   attribute TAP_SCAN_MODE  of JTMS  : signal is true;
   attribute TAP_SCAN_OUT   of JTDO  : signal is true;
   attribute TAP_SCAN_RESET of JTRST : signal is true;
   
-- Specifies the compliance enable patterns for the design. It lists a set of 
-- design ports and the values that they should be set to, in order to enable 
-- compliance to IEEE Std 1149.1

   
   attribute COMPLIANCE_PATTERNS of STM32L412_422_LQFP32: entity is 
        "(NRST) (0)";

   
-- Specifies the number of bits in the instruction register.

   attribute INSTRUCTION_LENGTH of STM32L412_422_LQFP32: entity is 5;

-- Specifies the boundary-scan instructions implemented in the design and their opcodes.
   
   attribute INSTRUCTION_OPCODE of STM32L412_422_LQFP32: entity is 
     "BYPASS  (11111)," &
     "EXTEST  (00000)," &
     "SAMPLE  (00010)," &
     "PRELOAD (00010)," &
     "IDCODE  (00001)";
   
-- Specifies the bit pattern that is loaded into the instruction register when the TAP controller 
-- passes through the Capture-IR state. The standard mandates that the two LSBs must be "01". The 
-- remaining bits are design specific.
   
   attribute INSTRUCTION_CAPTURE of STM32L412_422_LQFP32: entity is "XXX01";

-- Specifies the bit pattern that is loaded into the DEVICE_ID register during the IDCODE 
-- instruction when the TAP controller passes through the Capture-DR state.
   
   attribute IDCODE_REGISTER of STM32L412_422_LQFP32: entity is 
     "XXXX" &              -- 4-bit version number
    "0110010001100100" &   -- 16-bit part number
     "00000100000" &       -- 11-bit identity of the manufacturer
     "1";                  -- Required by IEEE Std 1149.1

 -- This section specifies the test data register placed between TDI and TDO for each implemented 
-- instruction.
   
  attribute REGISTER_ACCESS of STM32L412_422_LQFP32: entity is 
       "BYPASS    (BYPASS)," &
       "BOUNDARY  (EXTEST, SAMPLE, PRELOAD)," &
       "DEVICE_ID (IDCODE)";

-- Specifies the length of the boundary scan register.
   
   attribute BOUNDARY_LENGTH of STM32L412_422_LQFP32: entity is 141;
 
-- The following list specifies the characteristics of each cell in the boundary scan register from 
-- TDI to TDO. The following is a description of the label fields:
--      num     : Is the cell number.
--      cell    : Is the cell type as defined by the standard.
--      port    : Is the design port name. Control cells do not have a port name.
--      function: Is the function of the cell as defined by the standard. Is one of input, output2, 
--                output3, bidir, control or controlr.
--      safe    : Specifies the value that the BSR cell should be loaded with for safe operation 
--                when the software might otherwise choose a random value.
--      ccell   : The control cell number. Specifies the control cell that drives the output enable 
--                for this port.
--      disval  : Specifies the value that is loaded into the control cell to disable the output 
--                enable for the corresponding port.
--      rslt    : Resulting state. Shows the state of the driver when it is disabled.
   
   attribute BOUNDARY_REGISTER of STM32L412_422_LQFP32: entity is 
--     
--    num	cell	port		function	safe  [ccell  disval  rslt]
--     
--------------------------------------------------------------------------------	

      "140	(BC_1,	*,		internal,	0)				," &
      "139	(BC_1,	*,		internal,	0)				," &
      "138	(BC_1,	*,		internal,	0)				," &
      "137	(BC_1,	*,		CONTROL,	1)				," &
      "136	(BC_1,	PC14_OSC32_IN,	OUTPUT3,	X,	137,	1,	Z)	," &
      "135	(BC_4,	PC14_OSC32_IN,	INPUT,  	X)				," &
      "134	(BC_1,	*,		CONTROL,	1)				," &
      "133	(BC_1,	PC15_OSC32_OUT,	OUTPUT3,	X,	134,	1,	Z)	," &
      "132	(BC_4,	PC15_OSC32_OUT,	INPUT,  	X)				," &
      "131	(BC_1,	*,		internal,	0)				," &
      "130	(BC_1,	*,		internal,	0)				," &
      "129	(BC_1,	*,		internal,	0)				," &
      "128	(BC_1,	*,		internal,	0)				," &
      "127	(BC_1,	*,		internal,	0)				," &
      "126	(BC_1,	*,		internal,	0)				," &
      "125	(BC_1,	*,		internal,	0)				," &
      "124	(BC_1,	*,		internal,	0)				," &
      "123	(BC_1,	*,		internal,	0)				," &
      "122	(BC_1,	*,		internal,	0)				," &
      "121	(BC_1,	*,		internal,	0)				," &
      "120	(BC_1,	*,		internal,	0)				," &
      "119	(BC_1,	*,		internal,	0)				," &
      "118	(BC_1,	*,		internal,	0)				," &
      "117	(BC_1,	*,		internal,	0)				," &
      "116	(BC_1,	*,		internal,	0)				," &
      "115	(BC_1,	*,		internal,	0)				," &
      "114	(BC_1,	*,		internal,	0)				," &
      "113	(BC_1,	*,		CONTROL,	1)				," &
      "112	(BC_1,	PA0_CK_IN,		OUTPUT3,	X,	113,	1,	Z)	," &
      "111	(BC_4,	PA0_CK_IN,		INPUT,  	X)				," &
      "110	(BC_1,	*,		CONTROL,	1)				," &
      "109	(BC_1,	PA1,		OUTPUT3,	X,	110,	1,	Z)	," &
      "108	(BC_4,	PA1,		INPUT,  	X)				," &
      "107	(BC_1,	*,		CONTROL,	1)				," &
      "106	(BC_1,	PA2,		OUTPUT3,	X,	107,	1,	Z)	," &
      "105	(BC_4,	PA2,		INPUT,  	X)				," &
      "104	(BC_1,	*,		CONTROL,	1)				," &
      "103	(BC_1,	PA3,		OUTPUT3,	X,	104,	1,	Z)	," &
      "102	(BC_4,	PA3,		INPUT,  	X)				," &
      "101	(BC_1,	*,		CONTROL,	1)				," &
      "100	(BC_1,	PA4,		OUTPUT3,	X,	101,	1,	Z)	," &
      "99	(BC_4,	PA4,		INPUT,  	X)				," &
      "98	(BC_1,	*,		CONTROL,	1)				," &
      "97	(BC_1,	PA5,		OUTPUT3,	X,	98,	1,	Z)	," &
      "96	(BC_4,	PA5,		INPUT,  	X)				," &
      "95	(BC_1,	*,		CONTROL,	1)				," &
      "94	(BC_1,	PA6,		OUTPUT3,	X,	95,	1,	Z)	," &
      "93	(BC_4,	PA6,		INPUT,  	X)				," &
      "92	(BC_1,	*,		CONTROL,	1)				," &
      "91	(BC_1,	PA7,		OUTPUT3,	X,	92,	1,	Z)	," &
      "90	(BC_4,	PA7,		INPUT,  	X)				," &
      "89	(BC_1,	*,		internal,	0)				," &
      "88	(BC_1,	*,		internal,	0)				," &
      "87	(BC_1,	*,		internal,	0)				," &
      "86	(BC_1,	*,		internal,	0)				," &
      "85	(BC_1,	*,		internal,	0)				," &
      "84	(BC_1,	*,		internal,	0)				," &
      "83	(BC_1,	*,		CONTROL,	1)				," &
      "82	(BC_1,	PB0,		OUTPUT3,	X,	83,	1,	Z)	," &
      "81	(BC_4,	PB0,		INPUT,  	X)				," &
      "80	(BC_1,	*,		CONTROL,	1)				," &
      "79	(BC_1,	PB1,		OUTPUT3,	X,	80,	1,	Z)	," &
      "78	(BC_4,	PB1,		INPUT,  	X)				," &
      "77	(BC_1,	*,		internal,	0)				," &
      "76	(BC_1,	*,		internal,	0)				," &
      "75	(BC_1,	*,		internal,	0)				," &
      "74	(BC_1,	*,		internal,	0)				," &
      "73	(BC_1,	*,		internal,	0)				," &
      "72	(BC_1,	*,		internal,	0)				," &
      "71	(BC_1,	*,		internal,	0)				," &
      "70	(BC_1,	*,		internal,	0)				," &
      "69	(BC_1,	*,		internal,	0)				," &
      "68	(BC_1,	*,		internal,	0)				," &
      "67	(BC_1,	*,		internal,	0)				," &
      "66	(BC_1,	*,		internal,	0)				," &
      "65	(BC_1,	*,		internal,	0)				," &
      "64	(BC_1,	*,		internal,	0)				," &
      "63	(BC_1,	*,		internal,	0)				," &
      "62	(BC_1,	*,		internal,	0)				," &
      "61	(BC_1,	*,		internal,	0)				," &
      "60	(BC_1,	*,		internal,	0)				," &
      "59	(BC_1,	*,		internal,	0)				," &
      "58	(BC_1,	*,		internal,	0)				," &
      "57	(BC_1,	*,		internal,	0)				," &
      "56	(BC_1,	*,		internal,	0)				," &
      "55	(BC_1,	*,		internal,	0)				," &
      "54	(BC_1,	*,		internal,	0)				," &
      "53	(BC_1,	*,		internal,	0)				," &
      "52	(BC_1,	*,		internal,	0)				," &
      "51	(BC_1,	*,		internal,	0)				," &
      "50	(BC_1,	*,		internal,	0)				," &
      "49	(BC_1,	*,		internal,	0)				," &
      "48	(BC_1,	*,		internal,	0)				," &
      "47	(BC_1,	*,		internal,	0)				," &
      "46	(BC_1,	*,		internal,	0)				," &
      "45	(BC_1,	*,		internal,	0)				," &
      "44	(BC_1,	*,		CONTROL,	1)				," &
      "43	(BC_1,	PA8,		OUTPUT3,	X,	44,	1,	Z)	," &
      "42	(BC_4,	PA8,		INPUT,  	X)				," &
      "41	(BC_1,	*,		CONTROL,	1)				," &
      "40	(BC_1,	PA9,		OUTPUT3,	X,	41,	1,	Z)	," &
      "39	(BC_4,	PA9,		INPUT,  	X)				," &
      "38	(BC_1,	*,		CONTROL,	1)				," &
      "37	(BC_1,	PA10,		OUTPUT3,	X,	38,	1,	Z)	," &
      "36	(BC_4,	PA10,		INPUT,  	X)				," &
      "35	(BC_1,	*,		CONTROL,	1)				," &
      "34	(BC_1,	PA11,		OUTPUT3,	X,	35,	1,	Z)	," &
      "33	(BC_4,	PA11,		INPUT,  	X)				," &
      "32	(BC_1,	*,		CONTROL,	1)				," &
      "31	(BC_1,	PA12,		OUTPUT3,	X,	32,	1,	Z)	," &
      "30	(BC_4,	PA12,		INPUT,  	X)				," &
      "29	(BC_1,	*,		internal,	0)				," &
      "28	(BC_1,	*,		internal,	0)				," &
      "27	(BC_1,	*,		internal,	0)				," &
      "26	(BC_1,	*,		internal,	0)				," &
      "25	(BC_1,	*,		internal,	0)				," &
      "24	(BC_1,	*,		internal,	0)				," &
      "23	(BC_1,	*,		internal,	0)				," &
      "22	(BC_1,	*,		internal,	0)				," &
      "21	(BC_1,	*,		internal,	0)				," &
      "20	(BC_1,	*,		internal,	0)				," &
      "19	(BC_1,	*,		internal,	0)				," &
      "18	(BC_1,	*,		internal,	0)				," &
      "17	(BC_1,	*,		CONTROL,	1)				," &
      "16	(BC_1,	PB5,		OUTPUT3,	X,	17,	1,	Z)	," &
      "15	(BC_4,	PB5,		INPUT,  	X)				," &
      "14	(BC_1,	*,		CONTROL,	1)				," &
      "13	(BC_1,	PB6,		OUTPUT3,	X,	14,	1,	Z)	," &
      "12	(BC_4,	PB6,		INPUT,  	X)				," &
      "11	(BC_1,	*,		CONTROL,	1)				," &
      "10	(BC_1,	PB7,		OUTPUT3,	X,	11,	1,	Z)	," &
      "9	(BC_4,	PB7,		INPUT,  	X)				," &
      "8	(BC_1,	*,		CONTROL,	1)				," &
      "7	(BC_1,	PH3_BOOT0,	OUTPUT3,	X,	8,	1,	Z)	," &
      "6	(BC_4,	PH3_BOOT0,	INPUT,  	X)				," &
      "5	(BC_1,	*,		internal,	0)				," &
      "4	(BC_1,	*,		internal,	0)				," &
      "3	(BC_1,	*,		internal,	0)				," &
      "2	(BC_1,	*,		internal,	0)				," &
      "1	(BC_1,	*,		internal,	0)				," &
      "0	(BC_1,	*,		internal,	0)				 " ;
        									      
    attribute DESIGN_WARNING of STM32L412_422_LQFP32: entity is 				      
      "Device configuration can effect boundary scan behavior. " &		      
      "Keep the NRST pin low to ensure default boundary scan operation " &	      
      "as described in this file." ;

					      
end STM32L412_422_LQFP32;

									      
-- ******************* (C) COPYRIGHT 2018 STMicroelectronics *****END OF FILE********