BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: AM79C940

	
-- -------- 04 November 1996 -----------
-- JWB 13-AUG-1996 changed "TQFP_PACKAGE" to "TQFP"
-- 31-OCT-1996 corrected reversed bit subscripts for ADD, DBUS !
--    and bumped chip rev version from 2 to 3
-- A separate file for TQFP only, had to be created due to the missing 
--    four pins/functions on the TQFP version.
-- The compiler does not know how to handle the missing four pins/functions
--    in the TQFP version while at the same time, available for the PQFP
--    and PLCC versions. We have no further plans for going back to 
--    combining both files into a single BSDL file. 
--      Network Products Division Product Marketing Group
-- -------------------------------------
-- BSDL File created/edited by AT&T BSD Editor
--
-- BSDE:Revision: Silicon Rev. C0; File REV A3
-- BSDE:Description: BSDL File for the AM79C940 MACE Rev C0 Product
-- BSDE:Comments: /* BSDL file for the TQFP Definition only.
--                * BSDL file checked by AT&T's BCAD2 BSD Editor on 04/03/96
--                */

entity AM79C940 is

generic (PHYSICAL_PIN_MAP : string := "TQFP" );

port (
 ADD: in bit_vector (4 downto 0);
 AVDD1: linkage bit;
 AVDD2: linkage bit;
 AVDD3: linkage bit;
 AVDD4: linkage bit;
 AVSS1: linkage bit;
 AVSS2: linkage bit;
 BE0_L: in bit;
 BE1_L: in bit;
 CI0: linkage bit;
 CI1: in bit;
 CLSN: inout bit;
 CS_L: in bit;
 DBUS: inout bit_vector (15 downto 0);
 DI0: linkage bit;
 DI1: in bit;
 DO0: linkage bit;
 DO1: out bit;
 DVDD1: linkage bit;
 DVDD2: linkage bit;
 DVDDN: linkage bit;
 DVDDP: linkage bit;
 DVSS1: linkage bit;
 DVSS2: linkage bit;
 DVSSN1: linkage bit;
 DVSSN2: linkage bit;
 DVSSN3: linkage bit;
 DVSSP: linkage bit;
 DXRCV_L: out bit;
 EAM_R_L: in bit;
 EDSEL: in bit;
 EOF_L: inout bit;
 FDS_L: in bit;
 INTR_L: out bit;
 LNKST_L: out bit;
 RDTREQ_L: out bit;
 RESET_L: in bit;
 RXCRS: inout bit;
 RXD0: linkage bit;
 RXD1: in bit;
 RXDAT: inout bit;
 R_W_L: in bit;
 SCLK: in bit;
 SF_BD: out bit;
 SLEEP_L: in bit;
 SRDCLK: inout bit;
 STDCLK: inout bit;
 TCK: in bit;
 TC_L: in bit;
 TDI: in bit;
 TDO: out bit;
 TDTREQ_L: out bit;
 TMS: in bit;
 TXD0: linkage bit;
 TXD1: out bit;
 TXDAT1: inout bit;
 TXEN_L: inout bit;
 TXP0: linkage bit;
 TXP1: out bit;
 XTAL1: in bit;
 XTAL2: linkage bit
);

use STD_1149_1_1990.all;

attribute PIN_MAP of AM79C940 : entity is PHYSICAL_PIN_MAP;

constant TQFP: PIN_MAP_STRING:=
 "ADD:(40,39,38,37,36)," &
 "AVDD1:52," &
 "AVDD2:57," &
 "AVDD3:64," &
 "AVDD4:69," &
 "AVSS1:59," &
 "AVSS2:61," &
 "BE0_L:31," &
 "BE1_L:32," &
 "CI0:67," &
 "CI1:68," &
 "CLSN:78," &
 "CS_L:42," &
 "DBUS:(27,26,24,23,22,21,20,19,18,17," &
 "16,14,13,12,11,9)," &
 "DI0:65," &
 "DI1:66," &
 "DO0:62," &
 "DO1:63," &
 "DVDD1:49," &
 "DVDD2:70," &
 "DVDDN:25," &
 "DVDDP:6," &
 "DVSS1:47," &
 "DVSS2:73," &
 "DVSSN1:10," &
 "DVSSN2:15," &
 "DVSSN3:28," &
 "DVSSP:75," &
 "DXRCV_L:71," &
 "EAM_R_L:2," &
 "EDSEL:72," &
 "EOF_L:29," &
 "FDS_L:30," &
 "INTR_L:7," &
 "LNKST_L:43," &
 "RDTREQ_L:35," &
 "RESET_L:4," &
 "RXCRS:80," &
 "RXD0:50," &
 "RXD1:51," &
 "RXDAT:79," &
 "R_W_L:41," &
 "SCLK:33," &
 "SF_BD:3," &
 "SLEEP_L:5," &
 "SRDCLK:1," &
 "STDCLK:76," &
 "TCK:46," &
 "TC_L:8," &
 "TDI:48," &
 "TDO:44," &
 "TDTREQ_L:34," &
 "TMS:45," &
 "TXD0:54," &
 "TXD1:56," &
 "TXDAT1:74," &
 "TXEN_L:77," &
 "TXP0:53," &
 "TXP1:55," &
 "XTAL1:58," &
 "XTAL2:60";

attribute TAP_SCAN_IN    of TDI : signal is true;
attribute TAP_SCAN_OUT   of TDO : signal is true;
attribute TAP_SCAN_MODE  of TMS : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (1.00e+07, BOTH);
attribute INSTRUCTION_LENGTH of AM79C940 : entity is 4;

attribute INSTRUCTION_OPCODE of AM79C940 : entity is
 "BYPASS ( 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110," &
 " 1111)," &
 "EXTEST ( 0000)," &
 "IDCODE ( 0001)," &
 "SAMPLE ( 0010)," &
 "SELFTST ( 0101)," &
 "SETBYP ( 0100)," &
 "TRIBYP ( 0011)" ;

attribute INSTRUCTION_CAPTURE of AM79C940 : entity is "0001";

attribute INSTRUCTION_DISABLE of AM79C940 : entity is "TRIBYP";

attribute INSTRUCTION_PRIVATE of AM79C940 : entity is
 " SELFTST";

attribute IDCODE_REGISTER of AM79C940 : entity is
 "0011" &---- version    31-OCT-1996 bumped version from 2 to 3 !
 "1001010000000000" &--- part number
 "00000000001" &---- manufacturer's id
 "1";----- required by standard

attribute REGISTER_ACCESS of AM79C940 : entity is
 "BYPASS ( BYPASS, SETBYP, TRIBYP)," &
 "BOUNDARY ( EXTEST, SAMPLE, SELFTST)," &
 "IDCODE ( IDCODE)";

attribute BOUNDARY_CELLS of AM79C940 : entity is
 " BC_1, BC_4";

attribute BOUNDARY_LENGTH of AM79C940 : entity is 99;

attribute BOUNDARY_REGISTER of AM79C940 : entity is
 "   0 (BC_1, *, control, 0)," &
 "   1 (BC_1, LNKST_L, output3, X, 0, 0, Weak1)," &
 "   2 (BC_1, *, internal, 0)," &
 "   3 (BC_1, CS_L, input, 1)," &
 "   4 (BC_1, R_W_L, input, 1)," &
 "   5 (BC_1, ADD(4), input, 0)," &
 "   6 (BC_1, ADD(3), input, 0)," &
 "   7 (BC_1, ADD(2), input, 0)," &
 "   8 (BC_1, ADD(1), input, 0)," &
 "   9 (BC_1, ADD(0), input, 0)," &
 "  10 (BC_1, *, control, 0)," &
 "  11 (BC_1, RDTREQ_L, output3, X, 10, 0, Z)," &
 "  12 (BC_1, TDTREQ_L, output3, X, 10, 0, Z)," &
 "  13 (BC_4, SCLK, clock, 1)," &
 "  14 (BC_1, BE1_L, input, 1)," &
 "  15 (BC_1, BE0_L, input, 1)," &
 "  16 (BC_1, FDS_L, input, 1)," &
 "  17 (BC_1, *, internal, 0)," &
 "  18 (BC_1, *, internal, 0)," &
 "  19 (BC_1, *, control, 0)," &
 "  20 (BC_1, EOF_L, output3, X, 19, 0, Z)," &
 "  21 (BC_1, EOF_L, input, 1)," &
 "  22 (BC_1, *, control, 0)," &
 "  23 (BC_1, DBUS(15), output3, X, 22, 0, Z)," &
 "  24 (BC_1, DBUS(15), input, 0)," &
 "  25 (BC_1, DBUS(14), output3, X, 22, 0, Z)," &
 "  26 (BC_1, DBUS(14), input, 0)," &
 "  27 (BC_1, DBUS(13), output3, X, 22, 0, Z)," &
 "  28 (BC_1, DBUS(13), input, 0)," &
 "  29 (BC_1, DBUS(12), output3, X, 22, 0, Z)," &
 "  30 (BC_1, DBUS(12), input, 0)," &
 "  31 (BC_1, DBUS(11), output3, X, 22, 0, Z)," &
 "  32 (BC_1, DBUS(11), input, 0)," &
 "  33 (BC_1, DBUS(10), output3, X, 22, 0, Z)," &
 "  34 (BC_1, DBUS(10), input, 0)," &
 "  35 (BC_1, *, control, 0)," &
 "  36 (BC_1, DBUS(9), output3, X, 35, 0, Z)," &
 "  37 (BC_1, DBUS(9), input, 0)," &
 "  38 (BC_1, DBUS(8), output3, X, 35, 0, Z)," &
 "  39 (BC_1, DBUS(8), input, 0)," &
 "  40 (BC_1, DBUS(7), output3, X, 35, 0, Z)," &
 "  41 (BC_1, DBUS(7), input, 0)," &
 "  42 (BC_1, DBUS(6), output3, X, 35, 0, Z)," &
 "  43 (BC_1, DBUS(6), input, 0)," &
 "  44 (BC_1, DBUS(5), output3, X, 35, 0, Z)," &
 "  45 (BC_1, DBUS(5), input, 0)," &
 "  46 (BC_1, DBUS(4), output3, X, 35, 0, Z)," &
 "  47 (BC_1, DBUS(4), input, 0)," &
 "  48 (BC_1, DBUS(3), output3, X, 35, 0, Z)," &
 "  49 (BC_1, DBUS(3), input, 0)," &
 "  50 (BC_1, DBUS(2), output3, X, 35, 0, Z)," &
 "  51 (BC_1, DBUS(2), input, 0)," &
 "  52 (BC_1, DBUS(1), output3, X, 35, 0, Z)," &
 "  53 (BC_1, DBUS(1), input, 0)," &
 "  54 (BC_1, DBUS(0), output3, X, 35, 0, Z)," &
 "  55 (BC_1, DBUS(0), input, 0)," &
 "  56 (BC_1, TC_L, input, 1)," &
 "  57 (BC_1, *, control, 0)," &
 "  58 (BC_1, INTR_L, output3, 1, 57, 0, Weak1)," &
 "  59 (BC_1, SLEEP_L, input, 1)," &
 "  60 (BC_1, RESET_L, input, 1)," &
 "  61 (BC_1, *, control, 0)," &
 "  62 (BC_1, SF_BD, output3, X, 61, 0, Z)," &
 "  63 (BC_1, *, internal, 0)," &
 "  64 (BC_1, EAM_R_L, input, 0)," &
 "  65 (BC_1, *, control, 0)," &
 "  66 (BC_1, SRDCLK, output3, X, 65, 0, Z)," &
 "  67 (BC_1, SRDCLK, input, 0)," &
 "  68 (BC_1, *, control, 0)," &
 "  69 (BC_1, RXCRS, output3, X, 68, 0, Z)," &
 "  70 (BC_1, RXCRS, input, 0)," &
 "  71 (BC_1, *, control, 0)," &
 "  72 (BC_1, RXDAT, output3, X, 71, 0, Z)," &
 "  73 (BC_1, RXDAT, input, 0)," &
 "  74 (BC_1, *, control, 0)," &
 "  75 (BC_1, CLSN, output3, X, 74, 0, Z)," &
 "  76 (BC_1, CLSN, input, 0)," &
 "  77 (BC_1, *, control, 0)," &
 "  78 (BC_1, TXEN_L, output3, X, 77, 0, Z)," &
 "  79 (BC_1, TXEN_L, input, 0)," &
 "  80 (BC_1, *, control, 0)," &
 "  81 (BC_1, STDCLK, output3, X, 80, 0, Z)," &
 "  82 (BC_1, STDCLK, input, 0)," &
 "  83 (BC_1, *, control, 0)," &
 "  84 (BC_1, *, internal, 0)," &
 "  85 (BC_1, TXDAT1, output3, X, 83, 0, Z)," &
 "  86 (BC_1, TXDAT1, input, 1)," &
 "  87 (BC_1, EDSEL, input, 1)," &
 "  88 (BC_1, *, control, 0)," &
 "  89 (BC_1, DXRCV_L, output3, X, 88, 0, Z)," &
 "  90 (BC_4, XTAL1, clock, 0)," &
 "  91 (BC_1, RXD1, input, 1)," &
 "  92 (BC_1, *, control, 0)," &
 "  93 (BC_1, TXP1, output3, X, 92, 0, Z)," &
 "  94 (BC_1, TXD1, output3, X, 92, 0, Z)," &
 "  95 (BC_1, *, control, 0)," &
 "  96 (BC_1, DO1, output3, X, 95, 0, Z)," &
 "  97 (BC_4, DI1, input, 1)," &
 "  98 (BC_4, CI1, input, 1)";

end AM79C940;



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