-- ===================================================================
-- $Id: MAX24287.bsdl.rca 1.1 Tue Jun 8 12:39:51 2010 rabell Experimental $
-- ===================================================================
-- Copyright (c) 2010 Microsemi Corporation
-- All Rights Reserved.
--
-- THIS MATERIAL IS CONSIDERED PROPRIETARY BY
-- Microsemi Corporation. UNAUTHORIZED ACCESS OR USE IS PROHIBITED.
-- ===================================================================
-- $RCSfile: MAX24287.bsdl.rca $
--
-- $Author: rabell $
-- ===================================================================
--
-- Abstract :
--
-- Detail :
--
-- Usage :
--
-- File usage :
-- Script name: "../../../design/hq88/src/create_jtag_and_pads", Version 1.2
-- (This script is maintained in /design/telecom/DS31IP38/users/release)
-- BSDL Script name: "../../../design/hq88/src/bsdl.pm", Version 1.1, Thu Apr 8 10:18:36 2010
-- (This script is maintained in /design/telecom/DS31IP38/users/release)
-- Library name:"/design/telecom/DS31IP38/users/release/design/scripts/library.tsmc_13_3p3v.pm", Version 1.115
-- Pindef file: "max24287.pindef", Version unknown
--
--
--
-- This file was script-generated.
--
-- ===================================================================
-- ===================================================================
-- BSDL file for design MAX24287
-- Created by DS31IP38 JTAG generator
-- Date:
-- ***********************************************************************
entity MAX24287 is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "T6888");
-- This section declares all the ports in the design.
port (
ALOS : in bit;
COL : inout bit;
CRS : inout bit;
CVDD12 : linkage bit;
CVDD33 : linkage bit;
CVSS : linkage bit;
GPIO1 : inout bit;
GPIO2 : inout bit;
GPIO3 : inout bit;
GPO1 : inout bit;
GPO2 : inout bit;
GTXCLK : in bit;
GVDD12 : linkage bit;
GVSS : linkage bit;
JTCLK : in bit;
JTDI : in bit;
JTDO : out bit;
JTMS : in bit;
JTRST_N : in bit;
MDC : in bit;
MDIO : inout bit;
NC : linkage bit_vector (0 to 6);
RDN : linkage bit;
RDP : linkage bit;
REFCLK : linkage bit;
RST_N : in bit;
RVDD12 : linkage bit;
RVDD33 : linkage bit;
RVSS : linkage bit;
RXCLK : inout bit;
RXD0 : inout bit;
RXD1 : inout bit;
RXD2 : inout bit;
RXD3 : inout bit;
RXD4 : inout bit;
RXD5 : inout bit;
RXD6 : inout bit;
RXD7 : inout bit;
RXDV : inout bit;
RXER : inout bit;
TCLKN : linkage bit;
TCLKP : linkage bit;
TDN : linkage bit;
TDP : linkage bit;
TVDD12 : linkage bit;
TVDD33 : linkage bit;
TVSS : linkage bit;
TXCLK : inout bit;
TXD0 : in bit;
TXD1 : in bit;
TXD2 : in bit;
TXD3 : in bit;
TXD4 : inout bit;
TXD5 : inout bit;
TXD6 : inout bit;
TXD7 : inout bit;
TXEN : in bit;
TXER : in bit;
VDD12 : linkage bit_vector (0 to 1);
VDD33 : linkage bit;
VSS : linkage bit
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of MAX24287: entity is "STD_1149_1_1993";
attribute PIN_MAP of MAX24287: entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information
-- is extracted from the port-to-pin map file that was read in using
-- the "read_pin_map" command.
constant T6888: PIN_MAP_STRING :=
"ALOS : 19," &
"COL : 27," &
"CRS : 26," &
"CVDD12 : 3," &
"CVDD33 : 2," &
"CVSS : 4," &
"GPIO1 : 61," &
"GPIO2 : 60," &
"GPIO3 : 59," &
"GPO1 : 24," &
"GPO2 : 25," &
"GTXCLK : 66," &
"GVDD12 : 18," &
"GVSS : 1," &
"JTCLK : 21," &
"JTDI : 23," &
"JTDO : 44," &
"JTMS : 22," &
"JTRST_N : 43," &
"MDC : 41," &
"MDIO : 42," &
"NC : (17,20,45,62,63,64,65)," &
"RDN : 14," &
"RDP : 13," &
"REFCLK : 68," &
"RST_N : 67," &
"RVDD12 : 16," &
"RVDD33 : 12," &
"RVSS : 15," &
"RXCLK : 40," &
"RXD0 : 38," &
"RXD1 : 37," &
"RXD2 : 36," &
"RXD3 : 35," &
"RXD4 : 34," &
"RXD5 : 33," &
"RXD6 : 32," &
"RXD7 : 31," &
"RXDV : 29," &
"RXER : 28," &
"TCLKN : 5," &
"TCLKP : 6," &
"TDN : 8," &
"TDP : 9," &
"TVDD12 : 11," &
"TVDD33 : 7," &
"TVSS : 10," &
"TXCLK : 46," &
"TXD0 : 48," &
"TXD1 : 49," &
"TXD2 : 50," &
"TXD3 : 51," &
"TXD4 : 52," &
"TXD5 : 53," &
"TXD6 : 54," &
"TXD7 : 55," &
"TXEN : 57," &
"TXER : 58," &
"VDD12 : (30,56)," &
"VDD33 : 39," &
"VSS : 47 " ;
-- This section specifies the TAP ports.
-- For the TAP TCK port, the parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of JTCLK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of JTDI : signal is true;
attribute TAP_SCAN_MODE of JTMS : signal is true;
attribute TAP_SCAN_OUT of JTDO : signal is true;
attribute TAP_SCAN_RESET of JTRST_N : signal is true;
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of MAX24287: entity is 3;
-- Specifies the boundary-scan instructions implemented in the
-- design and their opcodes.
attribute INSTRUCTION_OPCODE of MAX24287: entity is
"BYPASS (111)," &
"EXTEST (000)," &
"SAMPLE (010)," &
"CLAMP (011)," &
"HIGHZ (100)," &
"USER1 (101)," &
"USER2 (110)," &
"IDCODE (001)";
-- Specifies the bit pattern that is loaded into the instruction
-- register when the TAP controller passes through the Capture-IR
-- state. The standard mandates that the two LSBs must be "01".
-- The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of MAX24287: entity is "001";
-- Specifies the bit pattern that is loaded into the DEVICE_ID
-- register during the IDCODE instruction when the TAP controller
-- passes through the Capture-DR state.
attribute IDCODE_REGISTER of MAX24287: entity is
"0001" & -- 4-bit version number
"0101111011011111" & -- 16-bit part number
"00010100001" & -- 11-bit identity of the manufacturer
"1"; -- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI
-- and TDO for each implemented instruction.
attribute REGISTER_ACCESS of MAX24287: entity is
"BYPASS (BYPASS, CLAMP, HIGHZ, USER1, USER2)," &
"BOUNDARY (EXTEST, SAMPLE)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of MAX24287: entity is 63;
-- The following list specifies the characteristics of each cell
-- in the boundary scan register from TDI to TDO.
-- The following is a description of the label fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not
-- have a port name.
-- function: Is the function of the cell as defined by the
-- standard. Is one of input, output2, output3,
-- bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be
-- loaded with for safe operation when the software
-- might otherwise choose a random value.
-- ccell : The control cell number. Specifies the control
-- cell that drives the output enable for this port.
-- disval : Specifies the value that is loaded into the
-- control cell to disable the output enable for
-- the corresponding port.
-- rslt : Resulting state. Shows the state of the driver
-- when it is disabled.
attribute BOUNDARY_REGISTER of MAX24287: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"62 (BC_1, ALOS, input, X), " &
"61 (BC_1, *, controlr, 0), " &
"60 (BC_0, GPO1, bidir, X, 61 , 0, Z), " &
"59 (BC_1, *, controlr, 0), " &
"58 (BC_0, GPO2, bidir, X, 59 , 0, Z), " &
"57 (BC_1, *, controlr, 0), " &
"56 (BC_0, CRS, bidir, X, 57 , 0, Z), " &
"55 (BC_1, *, controlr, 0), " &
"54 (BC_0, COL, bidir, X, 55 , 0, Z), " &
"53 (BC_1, *, controlr, 0), " &
"52 (BC_0, RXER, bidir, X, 53 , 0, Z), " &
"51 (BC_1, *, controlr, 0), " &
"50 (BC_0, RXDV, bidir, X, 51 , 0, Z), " &
"49 (BC_1, *, controlr, 0), " &
"48 (BC_0, RXD7, bidir, X, 49 , 0, Z), " &
"47 (BC_1, *, controlr, 0), " &
"46 (BC_0, RXD6, bidir, X, 47 , 0, Z), " &
"45 (BC_1, *, controlr, 0), " &
"44 (BC_0, RXD5, bidir, X, 45 , 0, Z), " &
"43 (BC_1, *, controlr, 0), " &
"42 (BC_0, RXD4, bidir, X, 43 , 0, Z), " &
"41 (BC_1, *, controlr, 0), " &
"40 (BC_0, RXD3, bidir, X, 41 , 0, Z), " &
"39 (BC_1, *, controlr, 0), " &
"38 (BC_0, RXD2, bidir, X, 39 , 0, Z), " &
"37 (BC_1, *, controlr, 0), " &
"36 (BC_0, RXD1, bidir, X, 37 , 0, Z), " &
"35 (BC_1, *, controlr, 0), " &
"34 (BC_0, RXD0, bidir, X, 35 , 0, Z), " &
"33 (BC_1, *, controlr, 0), " &
"32 (BC_0, RXCLK, bidir, X, 33 , 0, Z), " &
"31 (BC_1, MDC, input, X), " &
"30 (BC_1, *, controlr, 0), " &
"29 (BC_0, MDIO, bidir, X, 30 , 0, Z), " &
"28 (BC_1, *, internal, X), " &
"27 (BC_1, *, controlr, 0), " &
"26 (BC_0, TXCLK, bidir, X, 27 , 0, Z), " &
"25 (BC_1, TXD0, input, X), " &
"24 (BC_1, TXD1, input, X), " &
"23 (BC_1, TXD2, input, X), " &
"22 (BC_1, TXD3, input, X), " &
"21 (BC_1, *, controlr, 0), " &
"20 (BC_0, TXD4, bidir, X, 21 , 0, Z), " &
"19 (BC_1, *, controlr, 0), " &
"18 (BC_0, TXD5, bidir, X, 19 , 0, Z), " &
"17 (BC_1, *, controlr, 0), " &
"16 (BC_0, TXD6, bidir, X, 17 , 0, Z), " &
"15 (BC_1, *, controlr, 0), " &
"14 (BC_0, TXD7, bidir, X, 15 , 0, Z), " &
"13 (BC_1, TXEN, input, X), " &
"12 (BC_1, TXER, input, X), " &
"11 (BC_1, *, controlr, 0), " &
"10 (BC_0, GPIO3, bidir, X, 11 , 0, Z), " &
"9 (BC_1, *, controlr, 0), " &
"8 (BC_0, GPIO2, bidir, X, 9 , 0, Z), " &
"7 (BC_1, *, controlr, 0), " &
"6 (BC_0, GPIO1, bidir, X, 7 , 0, Z), " &
"5 (BC_0, *, internal, 0), " &
"4 (BC_0, *, internal, X), " &
"3 (BC_1, *, internal, X), " &
"2 (BC_1, *, internal, X), " &
"1 (BC_1, GTXCLK, input, X), " &
"0 (BC_1, RST_N, input, X) " ;
end MAX24287;
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