This BSDL contains syntax errors!
-- PMC_Sierra_Cells VHDL Package and Package Body
-- for PMC - Sierra
--
-- revision : 1.0
--
-- created by : James Lamond (Hewlett Packard Canada Ltd)
--
-- date : 20 December 1995
package PMC_Sierra_Cells is
use STD_1149_1_1990.all;
constant cele0 : CELL_INFO;
end PMC_Sierra_Cells;
package body PMC_Sierra_Cells is
constant cele0 : CELL_INFO :=
((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, PO),
(BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI),
(BIDIR_IN, RUNBIST, PI), (BIDIR_OUT, RUNBIST, PO) );
end PMC_Sierra_Cells; -- End of PMC_Sierra_Cells Package Body
--------------------------------------------------------------
--
-- PMC Sierra PM7364 FREEDM - 32 BSDL description
--
--
-- Written by: James Lamond
-- Verified electrically against PM7364 FREEDM-32
-- Using HP3070 Boundary Scan S/W revision B.02.54
--
-- PM7364 BSDL Revison: 04
--
-- Hewlett Packard (Canada) Ltd
--
-- Revised for Rev D device by Richard Steedman, PMC
-- Date : Mar 10, 1998
--
--
-------------------------------------------------------------------------------
entity pm7364 is
generic(PHYSICAL_PIN_MAP : string := "LSI_PACKAGE");
port ( RCLK : in bit_vector(0 to 31);
RD : in bit_vector(0 to 31);
RBD : out bit;
RBCLK : out bit;
TCLK : in bit_vector(0 to 31);
TD : out bit_vector(0 to 31);
TBD : in bit;
TBCLK : out bit;
PCICLK : in bit;
PCICLKO : out bit;
AD : inout bit_vector(0 to 31);
C_BEB : inout bit_vector(0 to 3);
PAR : inout bit;
FRAMEB : inout bit;
TRDYB : inout bit;
IRDYB : inout bit;
STOPB : inout bit;
IDSEL : in bit;
DEVSELB : inout bit;
LOCKB : in bit;
REQB : out bit;
GNTB : in bit;
PCIINTB : out bit;
PERRB : inout bit;
SERRB : out bit;
SYSCLK : in bit;
RSTB : in bit;
PMCTEST : in bit;
TCK : in bit;
TMS : in bit;
TDI : in bit;
TDO : out bit;
TRSTB : in bit;
VBIAS : linkage bit_vector(0 to 2);
VDD : linkage bit_vector(1 to 28);
VSS : linkage bit_vector(1 to 32);
EN5V : linkage bit;
NC : linkage bit);
use STD_1149_1_1990.all;
use PMC_Sierra_Cells.all;
attribute PIN_MAP of pm7364 : entity is PHYSICAL_PIN_MAP;
constant LSI_PACKAGE : PIN_MAP_STRING := -- Define pin out of BGA
"RCLK : (H17,F20,F18,E19,E18,D19,D18,D16,A17,D15,A16,B15,C14,B14,C13,B13,B12,D11,B11,C10,B9,A8,B8,A7,D8,A6,C6,B5,C5,B4,U5,Y4)," &
"RD : (G19,G18,F19,E20,F17,D20,E17,C17,B17,C16,B16,C15,A15,D13,A14,D12,C12,A12,C11,A11,B10,C9,D9,C8,B7,C7,B6,A5,D6,A4,V4,W4)," &
"RBD : H18," &
"RBCLK : G20," &
"TCLK : (L19,L17,M19,N19,N18,P19,P18,R19,T20,R17,U20,T17,V17,W17,V16,W16,V15,Y15,U13,Y14,W13,Y13,W12,V11,W10,U10,W9,W8,V8,W7,V7,W6)," &
"TD : (L20,L18,M20,M18,M17,P20,N17,R20,R18,T19,T18,U19,U18,U16,Y17,U15,Y16,W15,V14,W14,V13,U12,V12,W11,Y10,V10,Y9,V9,U9,Y7,U8,Y6)," &
"TBD : V6," &
"TBCLK : Y5," &
"PCICLK : C4," &
"PCICLKO : D5," &
"AD : (U3,T4,U2,U1,T3,R4,T2,T1,R2,R1,P3,N4,P2,P1,N3,N2,J2,J3,H2,J4,H3,G1,G2,H4,F2,F3,E1,E2,F4,E3,D1,D2)," &
"C_BEB : (R3,M4,J1,F1)," &
"PAR : N1," &
"FRAMEB : K4," &
"TRDYB : K2," &
"IRDYB : K3," &
"STOPB : L3," &
"IDSEL : G3," &
"DEVSELB : K1," &
"LOCKB : L2," &
"REQB : E4," &
"GNTB : D3," &
"PCIINTB : V5," &
"PERRB : M2," &
"SERRB : M3," &
"SYSCLK : H19," &
"RSTB : W5," &
"PMCTEST : U6," &
"TCK : J19," &
"TMS : J18," &
"TDI : K19," &
"TDO : K18," &
"TRSTB : J17," &
"VBIAS : (U4,D4,H20)," &
"VDD : (B2,B3,B18,B19,C2,C3,C18,C19,D7,D10,D14,G4,G17,K17,L4,P4,P17,U7,U11,U14,V2,V3,V18,V19,W2,W3,W18,W19)," &
"VSS : (A1,A2,A3,A9,A10,A13,A18,A19,A20,B1,B20,C1,C20,H1,J20,K20,L1,M1,N20,V1,V20,W1,W20,Y1,Y2,Y3,Y8,Y11,Y12,Y18,Y19,Y20)," &
"EN5V : D17," &
"NC : U17";
attribute Tap_Scan_In of TDI : signal is true;
attribute Tap_Scan_Mode of TMS : signal is true;
attribute Tap_Scan_Out of TDO : signal is true;
attribute Tap_Scan_Reset of TRSTB : signal is true;
attribute Tap_Scan_Clock of TCK : signal is (1.0e6,BOTH);
attribute Instruction_Length of pm7364: entity is 3;
attribute Instruction_Opcode of pm7364: entity is
"EXTEST (000)," &
"SAMPLE (010)," &
"IDCODE (001)," &
"BYPASS (011)," &
"BYPASS (100)," &
"BYPASS (110)," &
"BYPASS (111)," &
"STCTEST (101)";
attribute Instruction_Capture of pm7364: entity is "001";
attribute Idcode_Register of pm7364: entity is
"0001" & -- 4 bit version = 01H
"0111001101100100" & -- 16 bit part number = 7364H
"00001100110" & -- 11 bit manufacturer`s code
"1"; -- mandatory LSB by the standard
attribute Register_Access of pm7364: entity is
"Boundary (STCTEST)";
attribute Boundary_Length of pm7364: entity is 268;
attribute Boundary_Cells of pm7364: entity is "BC_1,BC_4,cele0";
attribute Boundary_Register of pm7364: entity is
-- num cell port function safe[ccell disval rslt]
"0 (BC_1, *, control, 1)," &
"1 (BC_1, RBCLK, output3, X, 0, 1, Z)," &
"2 (BC_1, *, control, 1)," &
"3 (BC_1, RBD, output3, X, 2, 1, Z)," &
"4 (BC_4, SYSCLK, input, X)," &
"5 (BC_1, *, control, 1)," &
"6 (BC_1, TD(0), output3, X, 5, 1, Z)," &
"7 (BC_4, TCLK(0), input, X)," &
"8 (BC_1, *, control, 1)," &
"9 (BC_1, TD(1), output3, X, 8, 1, Z)," &
"10 (BC_4, TCLK(1), input, X)," &
"11 (BC_1, *, control, 1)," &
"12 (BC_1, TD(2), output3, X, 11, 1, Z)," &
"13 (BC_4, TCLK(2), input, X)," &
"14 (BC_1, *, control, 1)," &
"15 (BC_1, TD(3), output3, X, 14, 1, Z)," &
"16 (BC_4, TCLK(3), input, X)," &
"17 (BC_1, *, control, 1)," &
"18 (BC_1, TD(4), output3, X, 17, 1, Z)," &
"19 (BC_4, TCLK(4), input, X)," &
"20 (BC_1, *, control, 1)," &
"21 (BC_1, TD(5), output3, X, 20, 1, Z)," &
"22 (BC_4, TCLK(5), input, X)," &
"23 (BC_1, *, control, 1)," &
"24 (BC_1, TD(6), output3, X, 23, 1, Z)," &
"25 (BC_4, TCLK(6), input, X)," &
"26 (BC_1, *, control, 1)," &
"27 (BC_1, TD(7), output3, X, 26, 1, Z)," &
"28 (BC_4, TCLK(7), input, X)," &
"29 (BC_1, *, control, 1)," &
"30 (BC_1, TD(8), output3, X, 29, 1, Z)," &
"31 (BC_4, TCLK(8), input, X)," &
"32 (BC_1, *, control, 1)," &
"33 (BC_1, TD(9), output3, X, 32, 1, Z)," &
"34 (BC_4, TCLK(9), input, X)," &
"35 (BC_1, *, control, 1)," &
"36 (BC_1, TD(10), output3, X, 35, 1, Z)," &
"37 (BC_4, TCLK(10), input, X)," &
"38 (BC_1, *, control, 1)," &
"39 (BC_1, TD(11), output3, X, 38, 1, Z)," &
"40 (BC_4, TCLK(11), input, X)," &
"41 (BC_1, *, control, 1)," &
"42 (BC_1, TD(12), output3, X, 41, 1, Z)," &
"43 (BC_4, TCLK(12), input, X)," &
"44 (BC_1, *, control, 1)," &
"45 (BC_1, TD(13), output3, X, 44, 1, Z)," &
"46 (BC_4, TCLK(13), input, X)," &
"47 (BC_1, *, control, 1)," &
"48 (BC_1, TD(14), output3, X, 47, 1, Z)," &
"49 (BC_4, TCLK(14), input, X)," &
"50 (BC_1, *, control, 1)," &
"51 (BC_1, TD(15), output3, X, 50, 1, Z)," &
"52 (BC_4, TCLK(15), input, X)," &
"53 (BC_1, *, control, 1)," &
"54 (BC_1, TD(16), output3, X, 53, 1, Z)," &
"55 (BC_4, TCLK(16), input, X)," &
"56 (BC_1, *, control, 1)," &
"57 (BC_1, TD(17), output3, X, 56, 1, Z)," &
"58 (BC_4, TCLK(17), input, X)," &
"59 (BC_1, *, control, 1)," &
"60 (BC_1, TD(18), output3, X, 59, 1, Z)," &
"61 (BC_4, TCLK(18), input, X)," &
"62 (BC_1, *, control, 1)," &
"63 (BC_1, TD(19), output3, X, 62, 1, Z)," &
"64 (BC_4, TCLK(19), input, X)," &
"65 (BC_1, *, control, 1)," &
"66 (BC_1, TD(20), output3, X, 65, 1, Z)," &
"67 (BC_4, TCLK(20), input, X)," &
"68 (BC_1, *, control, 1)," &
"69 (BC_1, TD(21), output3, X, 68, 1, Z)," &
"70 (BC_4, TCLK(21), input, X)," &
"71 (BC_1, *, control, 1)," &
"72 (BC_1, TD(22), output3, X, 71, 1, Z)," &
"73 (BC_4, TCLK(22), input, X)," &
"74 (BC_1, *, control, 1)," &
"75 (BC_1, TD(23), output3, X, 74, 1, Z)," &
"76 (BC_4, TCLK(23), input, X)," &
"77 (BC_1, *, control, 1)," &
"78 (BC_1, TD(24), output3, X, 77, 1, Z)," &
"79 (BC_4, TCLK(24), input, X)," &
"80 (BC_1, *, control, 1)," &
"81 (BC_1, TD(25), output3, X, 80, 1, Z)," &
"82 (BC_4, TCLK(25), input, X)," &
"83 (BC_1, *, control, 1)," &
"84 (BC_1, TD(26), output3, X, 83, 1, Z)," &
"85 (BC_4, TCLK(26), input, X)," &
"86 (BC_1, *, control, 1)," &
"87 (BC_1, TD(27), output3, X, 86, 1, Z)," &
"88 (BC_4, TCLK(27), input, X)," &
"89 (BC_1, *, control, 1)," &
"90 (BC_1, TD(28), output3, X, 89, 1, Z)," &
"91 (BC_4, TCLK(28), input, X)," &
"92 (BC_1, *, control, 1)," &
"93 (BC_1, TD(29), output3, X, 92, 1, Z)," &
"94 (BC_4, TCLK(29), input, X)," &
"95 (BC_1, *, control, 1)," &
"96 (BC_1, TD(30), output3, X, 95, 1, Z)," &
"97 (BC_4, TCLK(30), input, X)," &
"98 (BC_1, *, control, 1)," &
"99 (BC_1, TD(31), output3, X, 98, 1, Z)," &
"100 (BC_4, TCLK(31), input, X)," &
"101 (BC_4, TBD, input, X)," &
"102 (BC_1, *, control, 1)," &
"103 (BC_1, TBCLK, output3, X, 102, 1, Z)," &
"104 (BC_4, RSTB, input, X)," &
"105 (BC_4, PMCTEST, input, X)," &
"106 (BC_1, *, control, 1)," &
"107 (BC_1, PCIINTB, output3, X, 106, 1, Z)," &
"108 (BC_4, RCLK(31), input, X)," &
"109 (BC_4, RD(31), input, X)," &
"110 (BC_4, RCLK(30), input, X)," &
"111 (BC_4, RD(30), input, X)," &
"112 (BC_1, *, control, 1)," &
"113 (cele0, AD(0), bidir, X, 112, 1, Z)," &
"114 (BC_1, *, control, 1)," &
"115 (cele0, AD(1), bidir, X, 114, 1, Z)," &
"116 (BC_1, *, control, 1)," &
"117 (cele0, AD(2), bidir, X, 116, 1, Z)," &
"118 (BC_1, *, control, 1)," &
"119 (cele0, AD(3), bidir, X, 118, 1, Z)," &
"120 (BC_1, *, control, 1)," &
"121 (cele0, AD(4), bidir, X, 120, 1, Z)," &
"122 (BC_1, *, control, 1)," &
"123 (cele0, AD(5), bidir, X, 122, 1, Z)," &
"124 (BC_1, *, control, 1)," &
"125 (cele0, AD(6), bidir, X, 124, 1, Z)," &
"126 (BC_1, *, control, 1)," &
"127 (cele0, AD(7), bidir, X, 126, 1, Z)," &
"128 (BC_1, *, control, 1)," &
"129 (cele0, C_BEB(0), bidir, X, 128, 1, Z)," &
"130 (BC_1, *, control, 1)," &
"131 (cele0, AD(8), bidir, X, 130, 1, Z)," &
"132 (BC_1, *, control, 1)," &
"133 (cele0, AD(9), bidir, X, 132, 1, Z)," &
"134 (BC_1, *, control, 1)," &
"135 (cele0, AD(10), bidir, X, 134, 1, Z)," &
"136 (BC_1, *, control, 1)," &
"137 (cele0, AD(11), bidir, X, 136, 1, Z)," &
"138 (BC_1, *, control, 1)," &
"139 (cele0, AD(12), bidir, X, 138, 1, Z)," &
"140 (BC_1, *, control, 1)," &
"141 (cele0, AD(13), bidir, X, 140, 1, Z)," &
"142 (BC_1, *, control, 1)," &
"143 (cele0, AD(14), bidir, X, 142, 1, Z)," &
"144 (BC_1, *, control, 1)," &
"145 (cele0, AD(15), bidir, X, 144, 1, Z)," &
"146 (BC_1, *, control, 1)," &
"147 (cele0, C_BEB(1), bidir, X, 146, 1, Z)," &
"148 (BC_1, *, control, 1)," &
"149 (cele0, PAR, bidir, X, 148, 1, Z)," &
"150 (BC_1, *, control, 1)," &
"151 (cele0, SERRB, bidir, X, 150, 1, Z)," &
"152 (BC_1, *, control, 1)," &
"153 (cele0, PERRB, bidir, X, 152, 1, Z)," &
"154 (BC_4, LOCKB, input, X)," &
"155 (BC_1, *, control, 1)," &
"156 (cele0, STOPB, bidir, X, 155, 1, Z)," &
"157 (BC_1, *, control, 1)," &
"158 (cele0, DEVSELB, bidir, X, 157, 1, Z)," &
"159 (BC_1, *, control, 1)," &
"160 (cele0, TRDYB, bidir, X, 159, 1, Z)," &
"161 (BC_1, *, control, 1)," &
"162 (cele0, IRDYB, bidir, X, 161, 1, Z)," &
"163 (BC_1, *, control, 1)," &
"164 (cele0, FRAMEB, bidir, X, 163, 1, Z)," &
"165 (BC_1, *, control, 1)," &
"166 (cele0, C_BEB(2), bidir, X, 165, 1, Z)," &
"167 (BC_1, *, control, 1)," &
"168 (cele0, AD(16), bidir, X, 167, 1, Z)," &
"169 (BC_1, *, control, 1)," &
"170 (cele0, AD(17), bidir, X, 169, 1, Z)," &
"171 (BC_1, *, control, 1)," &
"172 (cele0, AD(18), bidir, X, 171, 1, Z)," &
"173 (BC_1, *, control, 1)," &
"174 (cele0, AD(19), bidir, X, 173, 1, Z)," &
"175 (BC_1, *, control, 1)," &
"176 (cele0, AD(20), bidir, X, 175, 1, Z)," &
"177 (BC_1, *, control, 1)," &
"178 (cele0, AD(21), bidir, X, 177, 1, Z)," &
"179 (BC_1, *, control, 1)," &
"180 (cele0, AD(22), bidir, X, 179, 1, Z)," &
"181 (BC_1, *, control, 1)," &
"182 (cele0, AD(23), bidir, X, 181, 1, Z)," &
"183 (BC_4, IDSEL, input, X)," &
"184 (BC_1, *, control, 1)," &
"185 (cele0, C_BEB(3), bidir, X, 184, 1, Z)," &
"186 (BC_1, *, control, 1)," &
"187 (cele0, AD(24), bidir, X, 186, 1, Z)," &
"188 (BC_1, *, control, 1)," &
"189 (cele0, AD(25), bidir, X, 188, 1, Z)," &
"190 (BC_1, *, control, 1)," &
"191 (cele0, AD(26), bidir, X, 190, 1, Z)," &
"192 (BC_1, *, control, 1)," &
"193 (cele0, AD(27), bidir, X, 192, 1, Z)," &
"194 (BC_1, *, control, 1)," &
"195 (cele0, AD(28), bidir, X, 194, 1, Z)," &
"196 (BC_1, *, control, 1)," &
"197 (cele0, AD(29), bidir, X, 196, 1, Z)," &
"198 (BC_1, *, control, 1)," &
"199 (cele0, AD(30), bidir, X, 198, 1, Z)," &
"200 (BC_1, *, control, 1)," &
"201 (cele0, AD(31), bidir, X, 200, 1, Z)," &
"202 (BC_1, *, control, 1)," &
"203 (BC_1, REQB, output3, X, 202, 1, Z)," &
"204 (BC_4, GNTB, input, X)," &
"205 (BC_4, PCICLK, input, X)," &
"206 (BC_1, *, control, 1)," &
"207 (BC_1, PCICLKO, output3, X, 206, 1, Z)," &
"208 (BC_4, RCLK(29), input, X)," &
"209 (BC_4, RD(29), input, X)," &
"210 (BC_4, RCLK(28), input, X)," &
"211 (BC_4, RD(28), input, X)," &
"212 (BC_4, RCLK(27), input, X)," &
"213 (BC_4, RD(27), input, X)," &
"214 (BC_4, RCLK(26), input, X)," &
"215 (BC_4, RD(26), input, X)," &
"216 (BC_4, RCLK(25), input, X)," &
"217 (BC_4, RD(25), input, X)," &
"218 (BC_4, RCLK(24), input, X)," &
"219 (BC_4, RD(24), input, X)," &
"220 (BC_4, RCLK(23), input, X)," &
"221 (BC_4, RD(23), input, X)," &
"222 (BC_4, RCLK(22), input, X)," &
"223 (BC_4, RD(22), input, X)," &
"224 (BC_4, RCLK(21), input, X)," &
"225 (BC_4, RD(21), input, X)," &
"226 (BC_4, RCLK(20), input, X)," &
"227 (BC_4, RD(20), input, X)," &
"228 (BC_4, RCLK(19), input, X)," &
"229 (BC_4, RD(19), input, X)," &
"230 (BC_4, RCLK(18), input, X)," &
"231 (BC_4, RD(18), input, X)," &
"232 (BC_4, RCLK(17), input, X)," &
"233 (BC_4, RD(17), input, X)," &
"234 (BC_4, RCLK(16), input, X)," &
"235 (BC_4, RD(16), input, X)," &
"236 (BC_4, RCLK(15), input, X)," &
"237 (BC_4, RD(15), input, X)," &
"238 (BC_4, RCLK(14), input, X)," &
"239 (BC_4, RD(14), input, X)," &
"240 (BC_4, RCLK(13), input, X)," &
"241 (BC_4, RD(13), input, X)," &
"242 (BC_4, RCLK(12), input, X)," &
"243 (BC_4, RD(12), input, X)," &
"244 (BC_4, RCLK(11), input, X)," &
"245 (BC_4, RD(11), input, X)," &
"246 (BC_4, RCLK(10), input, X)," &
"247 (BC_4, RD(10), input, X)," &
"248 (BC_4, RCLK(9), input, X)," &
"249 (BC_4, RD(9), input, X)," &
"250 (BC_4, RCLK(8), input, X)," &
"251 (BC_4, RD(8), input, X)," &
"252 (BC_4, RCLK(7), input, X)," &
"253 (BC_4, RD(7), input, X)," &
"254 (BC_4, RCLK(6), input, X)," &
"255 (BC_4, RD(6), input, X)," &
"256 (BC_4, RCLK(5), input, X)," &
"257 (BC_4, RD(5), input, X)," &
"258 (BC_4, RCLK(4), input, X)," &
"259 (BC_4, RD(4), input, X)," &
"260 (BC_4, RCLK(3), input, X)," &
"261 (BC_4, RD(3), input, X)," &
"262 (BC_4, RCLK(2), input, X)," &
"263 (BC_4, RD(2), input, X)," &
"264 (BC_4, RCLK(1), input, X)," &
"265 (BC_4, RD(1), input, X)," &
"266 (BC_4, RCLK(0), input, X)," &
"267 (BC_4, RD(0), input, X)";
end pm7364;