----------------------------------------------------------------------
-- Filename: VSC7420XJG_v1.3.bsdl --
-- Version: 1.3 --
-- Date: Jun 29 2018 --
-- Chip: VSC7420XJG --
-- Project: --
-- Generated by: jsa (Jorgen Abrahamsen) --
-- Notes: --
-- THIS FILE IS AUTO-GENERATED! --
-- IF YOU FIND ANY ERRORS OR EMMISIONS, PLEASE --
-- CONTACT THE PERSON LISTED ABOVE. --
-- --
-- Note. The following pins may not be toggled during JTAG test: --
-- Reserved_4, Reserved_29. --
-- Reserved_29 must be driven HIGH --
-- Note: The SerDes signals do NOT support INTEST. This does --
-- not have any effect normal EXTEST functionality. --
-- --
----------------------------------------------------------------------
-- [DISCLAIMER] --
-- Absolutely no guarantees, for modeling purposes only --
-- --
-- (C) Copyright Microchip Corporation 2018 --
-- All Rights Reserved --
-- --
-- --
-- Microchip Corporation hereby grants the user of this BSDL model --
-- a non-exclusive, nontransferable license to use this BSDL model --
-- under the following terms. --
-- Before using this BSDL model, the user should read this --
-- license. If the user does not accept these terms, the --
-- BSDL model should be returned to Microchip within 30 days. --
-- --
-- The user is granted this license only to use the --
-- BSDL model and is not granted rights to sell, load, rent, --
-- lease or license the BSDL model in whole or in part, or in --
-- modified form to anyone other than user. User may modify --
-- the BSDL model to suit its specific applications but rights --
-- to derivative works and such modifications shall belong to --
-- Microchip. --
-- --
-- This BSDL model is provided on an "AS IS" basis and --
-- Microchip makes absolutely no warranty with respect to the --
-- information contained herein. --
-- Microchip DISCLAIMS AND CUSTOMER WAIVES ALL WARRANTIES, --
-- EXPRESS OR IMPLIED, INCLUDING WARRANTIES OF MERCHANTABILITY --
-- OR FITNESS FOR A PARTICULAR PURPOSE. --
-- The entire risk as to quality and performance is with the --
-- Customer. --
-- ACCORDINGLY, IN NO EVENT SHALL THE COMPANY BE LIABLE FOR --
-- ANY DAMAGES, WHETHER IN CONTRACT OR TORT,INCLUDING ANY LOST --
-- PROFITS OR OTHER INCIDENTAL,CONSEQUENTIAL, EXEMPLARY, OR --
-- PUNITIVE DAMAGES ARISING OUT OF THE USE OR APPLICATION OF --
-- THE BSDL MODEL PROVIDED IN THIS PACKAGE. --
-- Further, Microchip reserves the right to make changes without --
-- notice to any product herein to improve reliability, --
-- function, or design. Microchip does not convey any license --
-- under patent rights or any other intellectual property --
-- rights, including those of third parties. --
-- --
-- Microchip is not obligated to provide maintenance or support --
-- for the licensed BSDL model. --
-- --
-- [Copyright] Microchip, Inc. --
----------------------------------------------------------------------
entity VSC7420XJG is
generic(PHYSICAL_PIN_MAP : string := "HSBGA672");
port (
------------------------------------------------------------
-- Inputs
------------------------------------------------------------
Reserved_5 : in bit;
Reserved_6 : in bit;
Reserved_7 : in bit;
Reserved_8 : in bit;
JTAG_CLK : in bit;
JTAG_DI : in bit;
JTAG_TMS : in bit;
JTAG_TRST : in bit;
RefClk_Sel0 : in bit;
RefClk_Sel1 : in bit;
RefClk_Sel2 : in bit;
nRESET : in bit;
SerDes_E0_RxN : in bit;
SerDes_E0_RxP : in bit;
SerDes_E1_RxN : in bit;
SerDes_E1_RxP : in bit;
Reserved_125 : in bit;
Reserved_124 : in bit;
Reserved_138 : in bit;
Reserved_139 : in bit;
RefClk_N : in bit;
RefClk_P : in bit;
Reserved_213 : in bit;
Reserved_214 : in bit;
Reserved_221 : in bit;
Reserved_203 : in bit;
Reserved_106 : in bit;
Reserved_107 : in bit;
Reserved_109 : in bit;
Reserved_108 : in bit;
Reserved_117 : in bit;
Reserved_116 : in bit;
Reserved_122 : in bit;
Reserved_123 : in bit;
Reserved_130 : in bit;
Reserved_131 : in bit;
Reserved_133 : in bit;
Reserved_132 : in bit;
Reserved_142 : in bit;
Reserved_143 : in bit;
Reserved_145 : in bit;
Reserved_144 : in bit;
VSS_178 : in bit;
VCORE_CFG0 : in bit;
VCORE_CFG1 : in bit;
VCORE_CFG2 : in bit;
Reserved_24 : in bit;
Reserved_240 : in bit;
Reserved_241 : in bit;
Reserved_242 : in bit;
Reserved_243 : in bit;
Reserved_244 : in bit;
Reserved_245 : in bit;
Reserved_246 : in bit;
Reserved_247 : in bit;
Reserved_248 : in bit;
------------------------------------------------------------
-- Outputs
------------------------------------------------------------
Reserved_23 : buffer bit;
Reserved_22 : buffer bit;
SerDes_E0_TxN : buffer bit;
SerDes_E0_TxP : buffer bit;
SerDes_E1_TxN : buffer bit;
SerDes_E1_TxP : buffer bit;
Reserved_127 : buffer bit;
Reserved_126 : buffer bit;
Reserved_136 : buffer bit;
Reserved_137 : buffer bit;
Reserved_104 : buffer bit;
Reserved_105 : buffer bit;
Reserved_111 : buffer bit;
Reserved_110 : buffer bit;
Reserved_119 : buffer bit;
Reserved_118 : buffer bit;
Reserved_120 : buffer bit;
Reserved_121 : buffer bit;
Reserved_128 : buffer bit;
Reserved_129 : buffer bit;
Reserved_135 : buffer bit;
Reserved_134 : buffer bit;
Reserved_140 : buffer bit;
Reserved_141 : buffer bit;
Reserved_147 : buffer bit;
Reserved_146 : buffer bit;
JTAG_DO : out bit;
------------------------------------------------------------
-- InOuts
------------------------------------------------------------
COMA_MODE : inout bit;
Reserved_153 : inout bit;
Reserved_154 : inout bit;
Reserved_155 : inout bit;
Reserved_156 : inout bit;
Reserved_157 : inout bit;
Reserved_158 : inout bit;
Reserved_159 : inout bit;
Reserved_160 : inout bit;
Reserved_161 : inout bit;
Reserved_162 : inout bit;
Reserved_163 : inout bit;
Reserved_164 : inout bit;
Reserved_165 : inout bit;
Reserved_166 : inout bit;
Reserved_167 : inout bit;
Reserved_168 : inout bit;
Reserved_169 : inout bit;
Reserved_150 : inout bit;
Reserved_152 : inout bit;
Reserved_20 : inout bit;
Reserved_21 : inout bit;
Reserved_174 : inout bit;
Reserved_177 : inout bit;
Reserved_178 : inout bit;
Reserved_179 : inout bit;
Reserved_180 : inout bit;
Reserved_181 : inout bit;
Reserved_182 : inout bit;
Reserved_183 : inout bit;
Reserved_184 : inout bit;
Reserved_175 : inout bit;
Reserved_171 : inout bit;
Reserved_172 : inout bit;
Reserved_173 : inout bit;
Reserved_170 : inout bit;
Reserved_151 : inout bit;
Reserved_176 : inout bit;
GPIO_0 : inout bit;
GPIO_1 : inout bit;
GPIO_2 : inout bit;
GPIO_3 : inout bit;
GPIO_4 : inout bit;
GPIO_5 : inout bit;
GPIO_6 : inout bit;
GPIO_7 : inout bit;
GPIO_8 : inout bit;
Reserved_31 : inout bit;
Reserved_32 : inout bit;
Reserved_33 : inout bit;
Reserved_34 : inout bit;
Reserved_35 : inout bit;
Reserved_36 : inout bit;
GPIO_15 : inout bit;
GPIO_16 : inout bit;
Reserved_37 : inout bit;
Reserved_38 : inout bit;
Reserved_39 : inout bit;
Reserved_40 : inout bit;
Reserved_41 : inout bit;
Reserved_98 : inout bit;
Reserved_99 : inout bit;
Reserved_186 : inout bit;
Reserved_187 : inout bit;
Reserved_188 : inout bit;
Reserved_189 : inout bit;
Reserved_190 : inout bit;
GPIO_29 : inout bit;
GPIO_30 : inout bit;
GPIO_31 : inout bit;
MDC : inout bit;
MDIO : inout bit;
Reserved_17 : inout bit;
Reserved_18 : inout bit;
Reserved_201 : inout bit;
Reserved_202 : inout bit;
Reserved_204 : inout bit;
Reserved_205 : inout bit;
Reserved_206 : inout bit;
Reserved_207 : inout bit;
Reserved_208 : inout bit;
Reserved_209 : inout bit;
Reserved_211 : inout bit;
Reserved_212 : inout bit;
Reserved_215 : inout bit;
Reserved_216 : inout bit;
Reserved_217 : inout bit;
Reserved_218 : inout bit;
Reserved_219 : inout bit;
Reserved_220 : inout bit;
Reserved_223 : inout bit;
Reserved_225 : inout bit;
Reserved_232 : inout bit;
Reserved_233 : inout bit;
Reserved_234 : inout bit;
Reserved_235 : inout bit;
Reserved_236 : inout bit;
Reserved_237 : inout bit;
SI_Clk : inout bit;
SI_DI : inout bit;
SI_DO : inout bit;
SI_nEn : inout bit;
------------------------------------------------------------
-- Linkage
------------------------------------------------------------
Reserved_148 : linkage bit;
VSS_179 : linkage bit;
P0_D0N : linkage bit;
P0_D0P : linkage bit;
P0_D1N : linkage bit;
P0_D1P : linkage bit;
P0_D2N : linkage bit;
P0_D2P : linkage bit;
P0_D3N : linkage bit;
P0_D3P : linkage bit;
Reserved_72 : linkage bit;
Reserved_73 : linkage bit;
Reserved_70 : linkage bit;
Reserved_71 : linkage bit;
Reserved_68 : linkage bit;
Reserved_69 : linkage bit;
Reserved_66 : linkage bit;
Reserved_67 : linkage bit;
Reserved_80 : linkage bit;
Reserved_81 : linkage bit;
Reserved_78 : linkage bit;
Reserved_79 : linkage bit;
Reserved_76 : linkage bit;
Reserved_77 : linkage bit;
Reserved_74 : linkage bit;
Reserved_75 : linkage bit;
P1_D0N : linkage bit;
P1_D0P : linkage bit;
P1_D1N : linkage bit;
P1_D1P : linkage bit;
P1_D2N : linkage bit;
P1_D2P : linkage bit;
P1_D3N : linkage bit;
P1_D3P : linkage bit;
P2_D0N : linkage bit;
P2_D0P : linkage bit;
P2_D1N : linkage bit;
P2_D1P : linkage bit;
P2_D2N : linkage bit;
P2_D2P : linkage bit;
P2_D3N : linkage bit;
P2_D3P : linkage bit;
P3_D0N : linkage bit;
P3_D0P : linkage bit;
P3_D1N : linkage bit;
P3_D1P : linkage bit;
P3_D2N : linkage bit;
P3_D2P : linkage bit;
P3_D3N : linkage bit;
P3_D3P : linkage bit;
P4_D0N : linkage bit;
P4_D0P : linkage bit;
P4_D1N : linkage bit;
P4_D1P : linkage bit;
P4_D2N : linkage bit;
P4_D2P : linkage bit;
P4_D3N : linkage bit;
P4_D3P : linkage bit;
P5_D0N : linkage bit;
P5_D0P : linkage bit;
P5_D1N : linkage bit;
P5_D1P : linkage bit;
P5_D2N : linkage bit;
P5_D2P : linkage bit;
P5_D3N : linkage bit;
P5_D3P : linkage bit;
P6_D0N : linkage bit;
P6_D0P : linkage bit;
P6_D1N : linkage bit;
P6_D1P : linkage bit;
P6_D2N : linkage bit;
P6_D2P : linkage bit;
P6_D3N : linkage bit;
P6_D3P : linkage bit;
P7_D0N : linkage bit;
P7_D0P : linkage bit;
P7_D1N : linkage bit;
P7_D1P : linkage bit;
P7_D2N : linkage bit;
P7_D2P : linkage bit;
P7_D3N : linkage bit;
P7_D3P : linkage bit;
Reserved_56 : linkage bit;
Reserved_57 : linkage bit;
Reserved_54 : linkage bit;
Reserved_55 : linkage bit;
Reserved_52 : linkage bit;
Reserved_53 : linkage bit;
Reserved_50 : linkage bit;
Reserved_51 : linkage bit;
Reserved_64 : linkage bit;
Reserved_65 : linkage bit;
Reserved_62 : linkage bit;
Reserved_63 : linkage bit;
Reserved_60 : linkage bit;
Reserved_61 : linkage bit;
Reserved_58 : linkage bit;
Reserved_59 : linkage bit;
Ref_filt_0 : linkage bit;
Ref_filt_1 : linkage bit;
Ref_filt_2 : linkage bit;
Ref_rext_0 : linkage bit;
Ref_rext_1 : linkage bit;
Ref_rext_2 : linkage bit;
Reserved_29 : linkage bit;
Reserved_4 : linkage bit;
Reserved_10 : linkage bit;
Reserved_11 : linkage bit;
Reserved_12 : linkage bit;
Reserved_13 : linkage bit;
Reserved_14 : linkage bit;
Reserved_15 : linkage bit;
Reserved_19 : linkage bit;
SerDes_Rext_0 : linkage bit;
SerDes_Rext_1 : linkage bit;
Reserved_192 : linkage bit;
Reserved_191 : linkage bit;
VDD_1 : linkage bit;
VDD_2 : linkage bit;
VDD_3 : linkage bit;
VDD_4 : linkage bit;
VDD_5 : linkage bit;
VDD_6 : linkage bit;
VDD_7 : linkage bit;
VDD_8 : linkage bit;
VDD_9 : linkage bit;
VDD_10 : linkage bit;
VDD_11 : linkage bit;
VDD_12 : linkage bit;
VDD_13 : linkage bit;
VDD_14 : linkage bit;
VDD_15 : linkage bit;
VDD_16 : linkage bit;
VDD_17 : linkage bit;
VDD_18 : linkage bit;
VDD_19 : linkage bit;
VDD_20 : linkage bit;
VDD_21 : linkage bit;
VDD_22 : linkage bit;
VDD_23 : linkage bit;
VDD_24 : linkage bit;
VDD_25 : linkage bit;
VDD_26 : linkage bit;
VDD_27 : linkage bit;
VDD_28 : linkage bit;
VDD_29 : linkage bit;
VDD_30 : linkage bit;
VDD_31 : linkage bit;
VDD_32 : linkage bit;
VDD_33 : linkage bit;
VDD_34 : linkage bit;
VDD_35 : linkage bit;
VDD_36 : linkage bit;
VDD_37 : linkage bit;
VDD_38 : linkage bit;
VDD_39 : linkage bit;
VDD_40 : linkage bit;
VDD_41 : linkage bit;
VDD_42 : linkage bit;
VDD_43 : linkage bit;
VDD_44 : linkage bit;
VDD_45 : linkage bit;
VDD_46 : linkage bit;
VDD_47 : linkage bit;
VDD_48 : linkage bit;
VDD_49 : linkage bit;
VDD_50 : linkage bit;
VDD_51 : linkage bit;
VDD_52 : linkage bit;
VDD_53 : linkage bit;
VDD_54 : linkage bit;
VDD_55 : linkage bit;
VDD_56 : linkage bit;
VDD_57 : linkage bit;
VDD_58 : linkage bit;
VDD_59 : linkage bit;
VDD_60 : linkage bit;
VDD_61 : linkage bit;
VDD_62 : linkage bit;
VDD_63 : linkage bit;
VDD_64 : linkage bit;
VDD_65 : linkage bit;
VDD_66 : linkage bit;
VDD_67 : linkage bit;
VDD_68 : linkage bit;
VDD_69 : linkage bit;
VDD_70 : linkage bit;
VDD_71 : linkage bit;
VDD_72 : linkage bit;
VDD_73 : linkage bit;
VDD_74 : linkage bit;
VDD_75 : linkage bit;
VDD_76 : linkage bit;
VDD_77 : linkage bit;
VDD_78 : linkage bit;
VDD_79 : linkage bit;
VDD_80 : linkage bit;
VDD_A_1 : linkage bit;
VDD_A_2 : linkage bit;
VDD_A_3 : linkage bit;
VDD_A_4 : linkage bit;
VDD_A_5 : linkage bit;
VDD_A_6 : linkage bit;
VDD_A_7 : linkage bit;
VDD_A_8 : linkage bit;
VDD_A_9 : linkage bit;
VDD_A_10 : linkage bit;
VDD_A_11 : linkage bit;
VDD_A_12 : linkage bit;
VDD_A_13 : linkage bit;
VDD_A_14 : linkage bit;
VDD_A_15 : linkage bit;
VDD_A_16 : linkage bit;
VDD_AH_1 : linkage bit;
VDD_AH_2 : linkage bit;
VDD_AH_3 : linkage bit;
VDD_AH_4 : linkage bit;
VDD_AH_5 : linkage bit;
VDD_AH_6 : linkage bit;
VDD_AH_7 : linkage bit;
VDD_AH_8 : linkage bit;
VDD_AH_9 : linkage bit;
VDD_AH_10 : linkage bit;
VDD_AH_11 : linkage bit;
VDD_AH_12 : linkage bit;
VDD_AH_13 : linkage bit;
VDD_AH_14 : linkage bit;
VDD_AH_15 : linkage bit;
VDD_AH_16 : linkage bit;
VDD_AH_17 : linkage bit;
VDD_AH_18 : linkage bit;
VDD_AH_19 : linkage bit;
VDD_AH_20 : linkage bit;
VDD_AH_21 : linkage bit;
VDD_AH_22 : linkage bit;
VDD_AH_23 : linkage bit;
VDD_AH_24 : linkage bit;
VDD_AH_25 : linkage bit;
VDD_AH_26 : linkage bit;
VDD_AH_27 : linkage bit;
VDD_AH_28 : linkage bit;
VDD_AH_29 : linkage bit;
VDD_AH_30 : linkage bit;
VDD_AH_31 : linkage bit;
VDD_AH_32 : linkage bit;
VDD_AH_33 : linkage bit;
VDD_AH_34 : linkage bit;
VDD_AH_35 : linkage bit;
VDD_AH_36 : linkage bit;
VDD_AL_1 : linkage bit;
VDD_AL_2 : linkage bit;
VDD_AL_3 : linkage bit;
VDD_AL_4 : linkage bit;
VDD_AL_5 : linkage bit;
VDD_AL_6 : linkage bit;
VDD_AL_7 : linkage bit;
VDD_AL_8 : linkage bit;
VDD_AL_9 : linkage bit;
VDD_AL_10 : linkage bit;
VDD_AL_11 : linkage bit;
VDD_AL_12 : linkage bit;
VDD_AL_13 : linkage bit;
VDD_AL_14 : linkage bit;
VDD_AL_15 : linkage bit;
VDD_AL_16 : linkage bit;
VDD_AL_17 : linkage bit;
VDD_AL_18 : linkage bit;
VDD_AL_19 : linkage bit;
VDD_AL_20 : linkage bit;
VDD_AL_21 : linkage bit;
VDD_AL_22 : linkage bit;
VDD_AL_23 : linkage bit;
VDD_AL_24 : linkage bit;
VDD_IO_1 : linkage bit;
VDD_IO_2 : linkage bit;
VDD_IO_3 : linkage bit;
VDD_IO_4 : linkage bit;
VDD_IO_5 : linkage bit;
VDD_IO_6 : linkage bit;
VDD_IO_7 : linkage bit;
VDD_IO_8 : linkage bit;
VDD_IO_9 : linkage bit;
VDD_IO_10 : linkage bit;
VDD_IO_11 : linkage bit;
VDD_IO_12 : linkage bit;
VDD_IO_13 : linkage bit;
VDD_IO_14 : linkage bit;
VDD_IO_15 : linkage bit;
VDD_IO_16 : linkage bit;
VDD_IO_17 : linkage bit;
VDD_IO_18 : linkage bit;
VDD_IO_19 : linkage bit;
VDD_IO_20 : linkage bit;
VDD_IO_21 : linkage bit;
VDD_IODDR_1 : linkage bit;
VDD_IODDR_2 : linkage bit;
VDD_IODDR_3 : linkage bit;
VDD_IODDR_4 : linkage bit;
VDD_IODDR_5 : linkage bit;
VDD_IODDR_6 : linkage bit;
VDD_IODDR_7 : linkage bit;
VDD_IODDR_8 : linkage bit;
VDD_IODDR_9 : linkage bit;
VDD_IODDR_10 : linkage bit;
VDD_IODDR_11 : linkage bit;
VDD_IODDR_12 : linkage bit;
VDD_IODDR_13 : linkage bit;
VDD_IODDR_14 : linkage bit;
VDD_VS_1 : linkage bit;
VDD_VS_2 : linkage bit;
VDD_VS_3 : linkage bit;
VDD_VS_4 : linkage bit;
VDD_VS_5 : linkage bit;
VDD_VS_6 : linkage bit;
VDD_VS_7 : linkage bit;
VDD_VS_8 : linkage bit;
VDD_VS_9 : linkage bit;
VDD_VS_10 : linkage bit;
VDD_VS_11 : linkage bit;
VDD_VS_12 : linkage bit;
VDD_VS_13 : linkage bit;
VDD_VS_14 : linkage bit;
VDD_VS_15 : linkage bit;
VDD_VS_16 : linkage bit;
VSS_1 : linkage bit;
VSS_2 : linkage bit;
VSS_3 : linkage bit;
VSS_4 : linkage bit;
VSS_5 : linkage bit;
VSS_6 : linkage bit;
VSS_7 : linkage bit;
VSS_8 : linkage bit;
VSS_9 : linkage bit;
VSS_10 : linkage bit;
VSS_11 : linkage bit;
VSS_12 : linkage bit;
VSS_13 : linkage bit;
VSS_14 : linkage bit;
VSS_15 : linkage bit;
VSS_16 : linkage bit;
VSS_17 : linkage bit;
VSS_18 : linkage bit;
VSS_19 : linkage bit;
VSS_20 : linkage bit;
VSS_21 : linkage bit;
VSS_22 : linkage bit;
VSS_23 : linkage bit;
VSS_24 : linkage bit;
VSS_25 : linkage bit;
VSS_26 : linkage bit;
VSS_27 : linkage bit;
VSS_28 : linkage bit;
VSS_29 : linkage bit;
VSS_30 : linkage bit;
VSS_31 : linkage bit;
VSS_32 : linkage bit;
VSS_33 : linkage bit;
VSS_34 : linkage bit;
VSS_35 : linkage bit;
VSS_36 : linkage bit;
VSS_37 : linkage bit;
VSS_38 : linkage bit;
VSS_39 : linkage bit;
VSS_40 : linkage bit;
VSS_41 : linkage bit;
VSS_42 : linkage bit;
VSS_43 : linkage bit;
VSS_44 : linkage bit;
VSS_45 : linkage bit;
VSS_46 : linkage bit;
VSS_47 : linkage bit;
VSS_48 : linkage bit;
VSS_49 : linkage bit;
VSS_50 : linkage bit;
VSS_51 : linkage bit;
VSS_52 : linkage bit;
VSS_53 : linkage bit;
VSS_54 : linkage bit;
VSS_55 : linkage bit;
VSS_56 : linkage bit;
VSS_57 : linkage bit;
VSS_58 : linkage bit;
VSS_59 : linkage bit;
VSS_60 : linkage bit;
VSS_61 : linkage bit;
VSS_62 : linkage bit;
VSS_63 : linkage bit;
VSS_64 : linkage bit;
VSS_65 : linkage bit;
VSS_66 : linkage bit;
VSS_67 : linkage bit;
VSS_68 : linkage bit;
VSS_69 : linkage bit;
VSS_70 : linkage bit;
VSS_71 : linkage bit;
VSS_72 : linkage bit;
VSS_73 : linkage bit;
VSS_74 : linkage bit;
VSS_75 : linkage bit;
VSS_76 : linkage bit;
VSS_77 : linkage bit;
VSS_78 : linkage bit;
VSS_79 : linkage bit;
VSS_80 : linkage bit;
VSS_81 : linkage bit;
VSS_82 : linkage bit;
VSS_83 : linkage bit;
VSS_84 : linkage bit;
VSS_85 : linkage bit;
VSS_86 : linkage bit;
VSS_87 : linkage bit;
VSS_88 : linkage bit;
VSS_89 : linkage bit;
VSS_90 : linkage bit;
VSS_91 : linkage bit;
VSS_92 : linkage bit;
VSS_93 : linkage bit;
VSS_94 : linkage bit;
VSS_95 : linkage bit;
VSS_96 : linkage bit;
VSS_97 : linkage bit;
VSS_98 : linkage bit;
VSS_99 : linkage bit;
VSS_100 : linkage bit;
VSS_101 : linkage bit;
VSS_102 : linkage bit;
VSS_103 : linkage bit;
VSS_104 : linkage bit;
VSS_105 : linkage bit;
VSS_106 : linkage bit;
VSS_107 : linkage bit;
VSS_108 : linkage bit;
VSS_109 : linkage bit;
VSS_110 : linkage bit;
VSS_111 : linkage bit;
VSS_112 : linkage bit;
VSS_113 : linkage bit;
VSS_114 : linkage bit;
VSS_115 : linkage bit;
VSS_116 : linkage bit;
VSS_117 : linkage bit;
VSS_118 : linkage bit;
VSS_119 : linkage bit;
VSS_120 : linkage bit;
VSS_121 : linkage bit;
VSS_122 : linkage bit;
VSS_123 : linkage bit;
VSS_124 : linkage bit;
VSS_125 : linkage bit;
VSS_126 : linkage bit;
VSS_127 : linkage bit;
VSS_128 : linkage bit;
VSS_129 : linkage bit;
VSS_130 : linkage bit;
VSS_131 : linkage bit;
VSS_132 : linkage bit;
VSS_133 : linkage bit;
VSS_134 : linkage bit;
VSS_135 : linkage bit;
VSS_136 : linkage bit;
VSS_137 : linkage bit;
VSS_138 : linkage bit;
VSS_139 : linkage bit;
VSS_140 : linkage bit;
VSS_141 : linkage bit;
VSS_142 : linkage bit;
VSS_143 : linkage bit;
VSS_144 : linkage bit;
VSS_145 : linkage bit;
VSS_146 : linkage bit;
VSS_147 : linkage bit;
VSS_148 : linkage bit;
VSS_149 : linkage bit;
VSS_150 : linkage bit;
VSS_151 : linkage bit;
VSS_152 : linkage bit;
VSS_153 : linkage bit;
VSS_154 : linkage bit;
VSS_155 : linkage bit;
VSS_156 : linkage bit;
VSS_157 : linkage bit;
VSS_158 : linkage bit;
VSS_159 : linkage bit;
VSS_160 : linkage bit;
VSS_161 : linkage bit;
VSS_162 : linkage bit;
VSS_163 : linkage bit
);
use STD_1149_1_2001.all; -- Get IEEE 1149.1-2001 attributes and definitions
attribute COMPONENT_CONFORMANCE of VSC7420XJG : entity is "STD_1149_1_2001";
attribute PIN_MAP of VSC7420XJG : entity is PHYSICAL_PIN_MAP;
constant HSBGA672 : PIN_MAP_STRING :=
"Reserved_5: C18," &
"Reserved_6: C17," &
"Reserved_7: C16," &
"Reserved_8: C15," &
"JTAG_CLK: D17," &
"JTAG_DI: D18," &
"JTAG_TMS: D20," &
"JTAG_TRST: D21," &
"RefClk_Sel0: C12," &
"RefClk_Sel1: C13," &
"RefClk_Sel2: C14," &
"nRESET: C4," &
"SerDes_E0_RxN: AF21," &
"SerDes_E0_RxP: AE21," &
"SerDes_E1_RxN: AF17," &
"SerDes_E1_RxP: AE17," &
"Reserved_125: AF13," &
"Reserved_124: AE13," &
"Reserved_138: AF9," &
"Reserved_139: AE9," &
"RefClk_N: AA8," &
"RefClk_P: Y8," &
"Reserved_213: D22," &
"Reserved_214: D23," &
"Reserved_221: F24," &
"Reserved_203: C21," &
"Reserved_106: AF19," &
"Reserved_107: AE19," &
"Reserved_109: AF18," &
"Reserved_108: AE18," &
"Reserved_117: AF15," &
"Reserved_116: AE15," &
"Reserved_122: AF14," &
"Reserved_123: AE14," &
"Reserved_130: AF11," &
"Reserved_131: AE11," &
"Reserved_133: AF10," &
"Reserved_132: AE10," &
"Reserved_142: AF7," &
"Reserved_143: AE7," &
"Reserved_145: AF6," &
"Reserved_144: AE6," &
"VDD_IO_21: C5," &
"Reserved_29: C10," &
"Reserved_4: C11," &
"VCORE_CFG0: C7," &
"VCORE_CFG1: C8," &
"VCORE_CFG2: C9," &
"VSS_178: C6," &
"Reserved_23: AF8," &
"Reserved_22: AE8," &
"SerDes_E0_TxN: AA21," &
"SerDes_E0_TxP: Y21," &
"SerDes_E1_TxN: AA17," &
"SerDes_E1_TxP: Y17," &
"Reserved_127: AA13," &
"Reserved_126: Y13," &
"Reserved_136: AA9," &
"Reserved_137: Y9," &
"Reserved_104: AA19," &
"Reserved_105: Y19," &
"Reserved_111: AA18," &
"Reserved_110: Y18," &
"Reserved_119: AA15," &
"Reserved_118: Y15," &
"Reserved_120: AA14," &
"Reserved_121: Y14," &
"Reserved_128: AA11," &
"Reserved_129: Y11," &
"Reserved_135: AA10," &
"Reserved_134: Y10," &
"Reserved_140: AA7," &
"Reserved_141: Y7," &
"Reserved_147: AA6," &
"Reserved_146: Y6," &
"Reserved_240: J8," &
"Reserved_241: J9," &
"Reserved_242: J10," &
"Reserved_243: J11," &
"Reserved_244: J12," &
"Reserved_245: J13," &
"Reserved_246: H13," &
"Reserved_247: G13," &
"Reserved_248: D10," &
"COMA_MODE: C3," &
"Reserved_153: W26," &
"Reserved_154: W24," &
"Reserved_155: V25," &
"Reserved_156: V23," &
"Reserved_157: V26," &
"Reserved_158: V24," &
"Reserved_159: U25," &
"Reserved_160: U23," &
"Reserved_161: U26," &
"Reserved_162: U24," &
"Reserved_163: W23," &
"Reserved_164: T26," &
"Reserved_165: T25," &
"Reserved_166: T24," &
"Reserved_167: Y23," &
"Reserved_168: Y24," &
"Reserved_169: AA24," &
"Reserved_150: AA25," &
"Reserved_152: AB24," &
"Reserved_174: AE25," &
"Reserved_177: AC26," &
"Reserved_178: AC23," &
"Reserved_179: AB25," &
"Reserved_180: AB23," &
"Reserved_181: AC24," &
"Reserved_182: AB26," &
"Reserved_183: AD24," &
"Reserved_184: AC25," &
"Reserved_175: AD25," &
"Reserved_171: W25," &
"Reserved_172: Y26," &
"Reserved_173: AA23," &
"Reserved_170: Y25," &
"Reserved_151: AA26," &
"Reserved_176: AD26," &
"GPIO_0: AB4," &
"GPIO_1: AB3," &
"GPIO_2: AB2," &
"GPIO_3: AB1," &
"GPIO_4: AA4," &
"GPIO_5: AA3," &
"GPIO_6: AA2," &
"GPIO_7: AA1," &
"GPIO_8: Y4," &
"Reserved_31: Y3," &
"Reserved_32: Y2," &
"Reserved_33: Y1," &
"Reserved_34: W4," &
"Reserved_35: W3," &
"Reserved_36: W2," &
"GPIO_15: W1," &
"GPIO_16: V4," &
"Reserved_37: V3," &
"Reserved_38: V2," &
"Reserved_39: V1," &
"Reserved_40: U4," &
"Reserved_41: U3," &
"Reserved_98: U2," &
"Reserved_99: U1," &
"Reserved_186: T4," &
"Reserved_187: T3," &
"Reserved_188: T2," &
"Reserved_189: T1," &
"Reserved_190: R4," &
"GPIO_29: R3," &
"GPIO_30: R2," &
"GPIO_31: R1," &
"JTAG_DO: D19," &
"MDC: AF4," &
"MDIO: AF3," &
"P0_D0N: L25," &
"P0_D0P: L26," &
"P0_D1N: M25," &
"P0_D1P: M26," &
"P0_D2N: N25," &
"P0_D2P: N26," &
"P0_D3N: P25," &
"P0_D3P: P26," &
"P1_D0N: G25," &
"P1_D0P: G26," &
"P1_D1N: H25," &
"P1_D1P: H26," &
"P1_D2N: J25," &
"P1_D2P: J26," &
"P1_D3N: K25," &
"P1_D3P: K26," &
"P2_D0N: C25," &
"P2_D0P: C26," &
"P2_D1N: D25," &
"P2_D1P: D26," &
"P2_D2N: E25," &
"P2_D2P: E26," &
"P2_D3N: F25," &
"P2_D3P: F26," &
"P3_D0N: B22," &
"P3_D0P: A22," &
"P3_D1N: B23," &
"P3_D1P: A23," &
"P3_D2N: B24," &
"P3_D2P: A24," &
"P3_D3N: B25," &
"P3_D3P: A25," &
"P4_D0N: B18," &
"P4_D0P: A18," &
"P4_D1N: B19," &
"P4_D1P: A19," &
"P4_D2N: B20," &
"P4_D2P: A20," &
"P4_D3N: B21," &
"P4_D3P: A21," &
"P5_D0N: B14," &
"P5_D0P: A14," &
"P5_D1N: B15," &
"P5_D1P: A15," &
"P5_D2N: B16," &
"P5_D2P: A16," &
"P5_D3N: B17," &
"P5_D3P: A17," &
"P6_D0N: B10," &
"P6_D0P: A10," &
"P6_D1N: B11," &
"P6_D1P: A11," &
"P6_D2N: B12," &
"P6_D2P: A12," &
"P6_D3N: B13," &
"P6_D3P: A13," &
"P7_D0N: B6," &
"P7_D0P: A6," &
"P7_D1N: B7," &
"P7_D1P: A7," &
"P7_D2N: B8," &
"P7_D2P: A8," &
"P7_D3N: B9," &
"P7_D3P: A9," &
"Reserved_56: B2," &
"Reserved_57: A2," &
"Reserved_54: B3," &
"Reserved_55: A3," &
"Reserved_52: B4," &
"Reserved_53: A4," &
"Reserved_50: B5," &
"Reserved_51: A5," &
"Reserved_64: F2," &
"Reserved_65: F1," &
"Reserved_62: E2," &
"Reserved_63: E1," &
"Reserved_60: D2," &
"Reserved_61: D1," &
"Reserved_58: C2," &
"Reserved_59: C1," &
"Reserved_72: K2," &
"Reserved_73: K1," &
"Reserved_70: J2," &
"Reserved_71: J1," &
"Reserved_68: H2," &
"Reserved_69: H1," &
"Reserved_66: G2," &
"Reserved_67: G1," &
"Reserved_80: P2," &
"Reserved_81: P1," &
"Reserved_78: N2," &
"Reserved_79: N1," &
"Reserved_76: M2," &
"Reserved_77: M1," &
"Reserved_74: L2," &
"Reserved_75: L1," &
"Reserved_17: AE2," &
"Reserved_18: AD3," &
"Reserved_201: C19," &
"Reserved_202: C20," &
"Reserved_204: C24," &
"Reserved_205: D3," &
"Reserved_206: D6," &
"Reserved_207: D7," &
"Reserved_208: D8," &
"Reserved_209: D9," &
"Reserved_211: D12," &
"Reserved_212: D15," &
"Reserved_215: D24," &
"Reserved_216: E3," &
"Reserved_217: E24," &
"Reserved_218: F3," &
"Reserved_219: F13," &
"Reserved_220: F14," &
"Reserved_223: G14," &
"Reserved_225: H14," &
"Reserved_232: J14," &
"Reserved_233: J15," &
"Reserved_234: J16," &
"Reserved_235: J17," &
"Reserved_236: J18," &
"Reserved_237: J19," &
"SI_Clk: AD1," &
"SI_DI: AD2," &
"SI_DO: AC1," &
"SI_nEn: AC2," &
"Reserved_24: P4," &
"Reserved_192: C23," &
"Reserved_191: C22," &
"Reserved_148: R25," &
"VSS_179: R26," &
"Ref_filt_0: L23," &
"Ref_filt_1: E14," &
"Ref_filt_2: L4," &
"Ref_rext_0: K23," &
"Ref_rext_1: E13," &
"Ref_rext_2: K4," &
"Reserved_10: G23," &
"Reserved_11: H23," &
"Reserved_12: D14," &
"Reserved_13: D13," &
"Reserved_14: H4," &
"Reserved_15: G4," &
"Reserved_19: R24," &
"Reserved_20: R23," &
"Reserved_21: T23," &
"SerDes_Rext_0: AE22," &
"SerDes_Rext_1: AF22," &
"VDD_1: G6," &
"VDD_2: G7," &
"VDD_3: G8," &
"VDD_4: G11," &
"VDD_5: G12," &
"VDD_6: G15," &
"VDD_7: G16," &
"VDD_8: G19," &
"VDD_9: G20," &
"VDD_10: G21," &
"VDD_11: H6," &
"VDD_12: H7," &
"VDD_13: H8," &
"VDD_14: H9," &
"VDD_15: H10," &
"VDD_16: H11," &
"VDD_17: H12," &
"VDD_18: H15," &
"VDD_19: H16," &
"VDD_20: H17," &
"VDD_21: H18," &
"VDD_22: H19," &
"VDD_23: H20," &
"VDD_24: H21," &
"VDD_25: L6," &
"VDD_26: L7," &
"VDD_27: L20," &
"VDD_28: L21," &
"VDD_29: M6," &
"VDD_30: M7," &
"VDD_31: M20," &
"VDD_32: M21," &
"VDD_33: N6," &
"VDD_34: N7," &
"VDD_35: N20," &
"VDD_36: N21," &
"VDD_37: P6," &
"VDD_38: P7," &
"VDD_39: P20," &
"VDD_40: P21," &
"VDD_41: R6," &
"VDD_42: R7," &
"VDD_43: R20," &
"VDD_44: R21," &
"VDD_45: T6," &
"VDD_46: T7," &
"VDD_47: T20," &
"VDD_48: T21," &
"VDD_49: V6," &
"VDD_50: V7," &
"VDD_51: V8," &
"VDD_52: V9," &
"VDD_53: V10," &
"VDD_54: V11," &
"VDD_55: V12," &
"VDD_56: V13," &
"VDD_57: V14," &
"VDD_58: V15," &
"VDD_59: V16," &
"VDD_60: V17," &
"VDD_61: V18," &
"VDD_62: V19," &
"VDD_63: V20," &
"VDD_64: V21," &
"VDD_65: W6," &
"VDD_66: W7," &
"VDD_67: W8," &
"VDD_68: W9," &
"VDD_69: W10," &
"VDD_70: W11," &
"VDD_71: W12," &
"VDD_72: W13," &
"VDD_73: W14," &
"VDD_74: W15," &
"VDD_75: W16," &
"VDD_76: W17," &
"VDD_77: W18," &
"VDD_78: W19," &
"VDD_79: W20," &
"VDD_80: W21," &
"VDD_A_1: AC6," &
"VDD_A_2: AC7," &
"VDD_A_3: AC8," &
"VDD_A_4: AC9," &
"VDD_A_5: AC10," &
"VDD_A_6: AC11," &
"VDD_A_7: AC12," &
"VDD_A_8: AC13," &
"VDD_A_9: AC14," &
"VDD_A_10: AC15," &
"VDD_A_11: AC16," &
"VDD_A_12: AC17," &
"VDD_A_13: AC18," &
"VDD_A_14: AC19," &
"VDD_A_15: AC20," &
"VDD_A_16: AC21," &
"VDD_AH_1: D4," &
"VDD_AH_2: D5," &
"VDD_AH_3: F7," &
"VDD_AH_4: D11," &
"VDD_AH_5: D16," &
"VDD_AH_6: F20," &
"VDD_AH_7: E4," &
"VDD_AH_8: E5," &
"VDD_AH_9: E8," &
"VDD_AH_10: E11," &
"VDD_AH_11: E12," &
"VDD_AH_12: E15," &
"VDD_AH_13: E16," &
"VDD_AH_14: E19," &
"VDD_AH_15: E22," &
"VDD_AH_16: E23," &
"VDD_AH_17: F4," &
"VDD_AH_18: F5," &
"VDD_AH_19: F8," &
"VDD_AH_20: F11," &
"VDD_AH_21: F12," &
"VDD_AH_22: F15," &
"VDD_AH_23: F16," &
"VDD_AH_24: F19," &
"VDD_AH_25: F22," &
"VDD_AH_26: F23," &
"VDD_AH_27: J3," &
"VDD_AH_28: J4," &
"VDD_AH_29: J23," &
"VDD_AH_30: J24," &
"VDD_AH_31: M3," &
"VDD_AH_32: M4," &
"VDD_AH_33: M5," &
"VDD_AH_34: M22," &
"VDD_AH_35: M23," &
"VDD_AH_36: M24," &
"VDD_AL_1: E9," &
"VDD_AL_2: E10," &
"VDD_AL_3: E17," &
"VDD_AL_4: E18," &
"VDD_AL_5: F9," &
"VDD_AL_6: F10," &
"VDD_AL_7: F17," &
"VDD_AL_8: F18," &
"VDD_AL_9: G9," &
"VDD_AL_10: G10," &
"VDD_AL_11: G17," &
"VDD_AL_12: G18," &
"VDD_AL_13: J5," &
"VDD_AL_14: J6," &
"VDD_AL_15: J7," &
"VDD_AL_16: J20," &
"VDD_AL_17: J21," &
"VDD_AL_18: J22," &
"VDD_AL_19: K5," &
"VDD_AL_20: K6," &
"VDD_AL_21: K7," &
"VDD_AL_22: K20," &
"VDD_AL_23: K21," &
"VDD_AL_24: K22," &
"VDD_IO_1: E6," &
"VDD_IO_2: E7," &
"VDD_IO_3: E20," &
"VDD_IO_4: E21," &
"VDD_IO_5: F6," &
"VDD_IO_6: F21," &
"VDD_IO_7: P5," &
"VDD_IO_8: R5," &
"VDD_IO_9: T5," &
"VDD_IO_10: U5," &
"VDD_IO_11: V5," &
"VDD_IO_12: W5," &
"VDD_IO_13: Y5," &
"VDD_IO_14: AA5," &
"VDD_IO_15: AB5," &
"VDD_IO_16: AC4," &
"VDD_IO_17: AC5," &
"VDD_IO_18: AD4," &
"VDD_IO_19: AE3," &
"VDD_IO_20: AF2," &
"VDD_IODDR_1: P22," &
"VDD_IODDR_2: R22," &
"VDD_IODDR_3: T22," &
"VDD_IODDR_4: U22," &
"VDD_IODDR_5: V22," &
"VDD_IODDR_6: W22," &
"VDD_IODDR_7: Y22," &
"VDD_IODDR_8: AA22," &
"VDD_IODDR_9: AB22," &
"VDD_IODDR_10: AC22," &
"VDD_IODDR_11: AD23," &
"VDD_IODDR_12: AE24," &
"VDD_IODDR_13: AF25," &
"VDD_IODDR_14: AF24," &
"VDD_VS_1: AD6," &
"VDD_VS_2: AD7," &
"VDD_VS_3: AD8," &
"VDD_VS_4: AD9," &
"VDD_VS_5: AD10," &
"VDD_VS_6: AD11," &
"VDD_VS_7: AD12," &
"VDD_VS_8: AD13," &
"VDD_VS_9: AD14," &
"VDD_VS_10: AD15," &
"VDD_VS_11: AD16," &
"VDD_VS_12: AD17," &
"VDD_VS_13: AD18," &
"VDD_VS_14: AD19," &
"VDD_VS_15: AD20," &
"VDD_VS_16: AD21," &
"VSS_1: B1," &
"VSS_2: B26," &
"VSS_3: G3," &
"VSS_4: G5," &
"VSS_5: G22," &
"VSS_6: G24," &
"VSS_7: H3," &
"VSS_8: H5," &
"VSS_9: H22," &
"VSS_10: H24," &
"VSS_11: K3," &
"VSS_12: K8," &
"VSS_13: K9," &
"VSS_14: K10," &
"VSS_15: K11," &
"VSS_16: K12," &
"VSS_17: K13," &
"VSS_18: K14," &
"VSS_19: K15," &
"VSS_20: K16," &
"VSS_21: K17," &
"VSS_22: K18," &
"VSS_23: K19," &
"VSS_24: K24," &
"VSS_25: L3," &
"VSS_26: L5," &
"VSS_27: L8," &
"VSS_28: L9," &
"VSS_29: L10," &
"VSS_30: L11," &
"VSS_31: L12," &
"VSS_32: L13," &
"VSS_33: L14," &
"VSS_34: L15," &
"VSS_35: L16," &
"VSS_36: L17," &
"VSS_37: L18," &
"VSS_38: L19," &
"VSS_39: L22," &
"VSS_40: L24," &
"VSS_41: M8," &
"VSS_42: M9," &
"VSS_43: M10," &
"VSS_44: M11," &
"VSS_45: M12," &
"VSS_46: M13," &
"VSS_47: M14," &
"VSS_48: M15," &
"VSS_49: M16," &
"VSS_50: M17," &
"VSS_51: M18," &
"VSS_52: M19," &
"VSS_53: N3," &
"VSS_54: N4," &
"VSS_55: N5," &
"VSS_56: N8," &
"VSS_57: N9," &
"VSS_58: N10," &
"VSS_59: N11," &
"VSS_60: N12," &
"VSS_61: N13," &
"VSS_62: N14," &
"VSS_63: N15," &
"VSS_64: N16," &
"VSS_65: N17," &
"VSS_66: N18," &
"VSS_67: N19," &
"VSS_68: N22," &
"VSS_69: N23," &
"VSS_70: N24," &
"VSS_71: P3," &
"VSS_72: P8," &
"VSS_73: P9," &
"VSS_74: P10," &
"VSS_75: P11," &
"VSS_76: P12," &
"VSS_77: P13," &
"VSS_78: P14," &
"VSS_79: P15," &
"VSS_80: P16," &
"VSS_81: P17," &
"VSS_82: P18," &
"VSS_83: P19," &
"VSS_84: P23," &
"VSS_85: P24," &
"VSS_86: R8," &
"VSS_87: R9," &
"VSS_88: R10," &
"VSS_89: R11," &
"VSS_90: R12," &
"VSS_91: R13," &
"VSS_92: R14," &
"VSS_93: R15," &
"VSS_94: R16," &
"VSS_95: R17," &
"VSS_96: R18," &
"VSS_97: R19," &
"VSS_98: T8," &
"VSS_99: T9," &
"VSS_100: T10," &
"VSS_101: T11," &
"VSS_102: T12," &
"VSS_103: T13," &
"VSS_104: T14," &
"VSS_105: T15," &
"VSS_106: T16," &
"VSS_107: T17," &
"VSS_108: T18," &
"VSS_109: T19," &
"VSS_110: U6," &
"VSS_111: U7," &
"VSS_112: U8," &
"VSS_113: U9," &
"VSS_114: U10," &
"VSS_115: U11," &
"VSS_116: U12," &
"VSS_117: U13," &
"VSS_118: U14," &
"VSS_119: U15," &
"VSS_120: U16," &
"VSS_121: U17," &
"VSS_122: U18," &
"VSS_123: U19," &
"VSS_124: U20," &
"VSS_125: U21," &
"VSS_126: Y12," &
"VSS_127: Y16," &
"VSS_128: Y20," &
"VSS_129: AB6," &
"VSS_130: AB7," &
"VSS_131: AB8," &
"VSS_132: AB9," &
"VSS_133: AB10," &
"VSS_134: AB11," &
"VSS_135: AB12," &
"VSS_136: AB13," &
"VSS_137: AB14," &
"VSS_138: AB15," &
"VSS_139: AB16," &
"VSS_140: AB17," &
"VSS_141: AB18," &
"VSS_142: AB19," &
"VSS_143: AB20," &
"VSS_144: AB21," &
"VSS_145: AA12," &
"VSS_146: AA16," &
"VSS_147: AA20," &
"VSS_148: AC3," &
"VSS_149: AD5," &
"VSS_150: AD22," &
"VSS_151: AE1," &
"VSS_152: AE5," &
"VSS_153: AE12," &
"VSS_154: AE16," &
"VSS_155: AE20," &
"VSS_156: AE23," &
"VSS_157: AE26," &
"VSS_158: AF5," &
"VSS_159: AF12," &
"VSS_160: AF16," &
"VSS_161: AF20," &
"VSS_162: AF23," &
"VSS_163: AE4";
attribute PORT_GROUPING of VSC7420XJG : entity is
"Differential_Voltage ( (SerDes_E0_RxP, SerDes_E0_RxN), " &
"(SerDes_E0_TxP, SerDes_E0_TxN), " &
"(SerDes_E1_TxP, SerDes_E1_TxN), " &
"(SerDes_E1_RxP, SerDes_E1_RxN), " &
"(Reserved_124, Reserved_125), " &
"(Reserved_126, Reserved_127), " &
"(Reserved_137, Reserved_136), " &
"(Reserved_139, Reserved_138), " &
"(Reserved_107, Reserved_106), " &
"(Reserved_105, Reserved_104), " &
"(Reserved_110, Reserved_111), " &
"(Reserved_108, Reserved_109), " &
"(Reserved_116, Reserved_117), " &
"(Reserved_118, Reserved_119), " &
"(Reserved_121, Reserved_120), " &
"(Reserved_123, Reserved_122), " &
"(Reserved_129, Reserved_128), " &
"(Reserved_131, Reserved_130), " &
"(Reserved_132, Reserved_133), " &
"(Reserved_134, Reserved_135), " &
"(Reserved_143, Reserved_142), " &
"(Reserved_141, Reserved_140), " &
"(Reserved_146, Reserved_147), " &
"(Reserved_144, Reserved_145), " &
"(RefClk_P, RefClk_N), " &
"(Reserved_22, Reserved_23))" ;
attribute TAP_SCAN_IN of JTAG_DI : signal is true;
attribute TAP_SCAN_MODE of JTAG_TMS : signal is true;
attribute TAP_SCAN_OUT of JTAG_DO : signal is true;
attribute TAP_SCAN_CLOCK of JTAG_CLK : signal is (1.04000000e+07, BOTH);
attribute TAP_SCAN_RESET of JTAG_TRST : signal is true;
attribute INSTRUCTION_LENGTH of VSC7420XJG : entity is 6;
attribute INSTRUCTION_OPCODE of VSC7420XJG : entity is
"extest (000000)," &
"bypass (111111)," &
"sample (000001)," &
"preload (000001)," &
"intest (000010)," &
"idcode (100100)," &
"usercode (100101)," &
"highz (000101)";
attribute INSTRUCTION_CAPTURE of VSC7420XJG : entity is "000001";
attribute IDCODE_REGISTER of VSC7420XJG : entity is
"0000" & -- Version Number
"1011000000000001" & -- Part Number
"00001110100" & -- Manufacturer ID
"1"; -- Required by IEEE Std. 1149.1-1990
attribute USERCODE_REGISTER of VSC7420XJG : entity is
"0000" & "0111" & "0100" & "0010" & -- Start of USERCODE 32-bit pattern
"XXXX" & "0000" & "1110" & "1001"; -- End of USERCODE 32-bit pattern
attribute REGISTER_ACCESS of VSC7420XJG : entity is
"BOUNDARY (extest, sample, preload, intest), " &
"DEVICE_ID (idcode, usercode), " &
"BYPASS (bypass, highz)";
attribute BOUNDARY_LENGTH of VSC7420XJG : entity is 283;
attribute BOUNDARY_REGISTER of VSC7420XJG : entity is
--- num cell port function safe [ccell disval rslt]
"0 ( bc_2, *, control, 0)," &
"1 ( bc_7, Reserved_20, bidir, X, 0, 0, Z)," &
"2 ( bc_2, *, control, 0)," &
"3 ( bc_7, Reserved_21, bidir, X, 2, 0, Z)," &
"4 ( bc_2, *, control, 0)," &
"5 ( bc_7, Reserved_166, bidir, X, 4, 0, Z)," &
"6 ( bc_2, *, control, 0)," &
"7 ( bc_7, Reserved_165, bidir, X, 6, 0, Z)," &
"8 ( bc_2, *, control, 0)," &
"9 ( bc_7, Reserved_164, bidir, X, 8, 0, Z)," &
"10 ( bc_2, *, control, 0)," &
"11 ( bc_7, Reserved_162, bidir, X, 10, 0, Z)," &
"12 ( bc_2, *, control, 0)," &
"13 ( bc_7, Reserved_161, bidir, X, 12, 0, Z)," &
"14 ( bc_2, *, control, 0)," &
"15 ( bc_7, Reserved_160, bidir, X, 14, 0, Z)," &
"16 ( bc_2, *, control, 0)," &
"17 ( bc_7, Reserved_159, bidir, X, 16, 0, Z)," &
"18 ( bc_2, *, control, 0)," &
"19 ( bc_7, Reserved_158, bidir, X, 18, 0, Z)," &
"20 ( bc_2, *, control, 0)," &
"21 ( bc_7, Reserved_157, bidir, X, 20, 0, Z)," &
"22 ( bc_2, *, control, 0)," &
"23 ( bc_7, Reserved_156, bidir, X, 22, 0, Z)," &
"24 ( bc_2, *, control, 0)," &
"25 ( bc_7, Reserved_155, bidir, X, 24, 0, Z)," &
"26 ( bc_2, *, control, 0)," &
"27 ( bc_7, Reserved_150, bidir, X, 26, 0, Z)," &
"28 ( bc_2, *, control, 0)," &
"29 ( bc_7, Reserved_151, bidir, X, 28, 0, Z)," &
"30 ( bc_2, *, control, 0)," &
"31 ( bc_7, Reserved_163, bidir, X, 30, 0, Z)," &
"32 ( bc_2, *, control, 0)," &
"33 ( bc_7, Reserved_154, bidir, X, 32, 0, Z)," &
"34 ( bc_2, *, control, 0)," &
"35 ( bc_7, Reserved_153, bidir, X, 34, 0, Z)," &
"36 ( bc_2, *, control, 0)," &
"37 ( bc_7, Reserved_169, bidir, X, 36, 0, Z)," &
"38 ( bc_2, *, control, 0)," &
"39 ( bc_7, Reserved_168, bidir, X, 38, 0, Z)," &
"40 ( bc_2, *, control, 0)," &
"41 ( bc_7, Reserved_167, bidir, X, 40, 0, Z)," &
"42 ( bc_2, *, control, 0)," &
"43 ( bc_7, Reserved_171, bidir, X, 42, 0, Z)," &
"44 ( bc_2, *, control, 0)," &
"45 ( bc_7, Reserved_152, bidir, X, 44, 0, Z)," &
"46 ( bc_2, *, control, 0)," &
"47 ( bc_7, Reserved_173, bidir, X, 46, 0, Z)," &
"48 ( bc_2, *, control, 0)," &
"49 ( bc_7, Reserved_172, bidir, X, 48, 0, Z)," &
"50 ( bc_2, *, control, 0)," &
"51 ( bc_7, Reserved_170, bidir, X, 50, 0, Z)," &
"52 ( bc_2, *, control, 0)," &
"53 ( bc_7, Reserved_182, bidir, X, 52, 0, Z)," &
"54 ( bc_2, *, control, 0)," &
"55 ( bc_7, Reserved_181, bidir, X, 54, 0, Z)," &
"56 ( bc_2, *, control, 0)," &
"57 ( bc_7, Reserved_180, bidir, X, 56, 0, Z)," &
"58 ( bc_2, *, control, 0)," &
"59 ( bc_7, Reserved_179, bidir, X, 58, 0, Z)," &
"60 ( bc_2, *, control, 0)," &
"61 ( bc_7, Reserved_176, bidir, X, 60, 0, Z)," &
"62 ( bc_2, *, control, 0)," &
"63 ( bc_7, Reserved_175, bidir, X, 62, 0, Z)," &
"64 ( bc_2, *, control, 0)," &
"65 ( bc_7, Reserved_178, bidir, X, 64, 0, Z)," &
"66 ( bc_2, *, control, 0)," &
"67 ( bc_7, Reserved_177, bidir, X, 66, 0, Z)," &
"68 ( bc_2, *, control, 0)," &
"69 ( bc_7, Reserved_184, bidir, X, 68, 0, Z)," &
"70 ( bc_2, *, control, 0)," &
"71 ( bc_7, Reserved_183, bidir, X, 70, 0, Z)," &
"72 ( bc_2, *, control, 0)," &
"73 ( bc_7, Reserved_174, bidir, X, 72, 0, Z)," &
"74 ( bc_4, SerDes_E0_RxP, observe_only, X)," &
"75 ( BC_4, SerDes_E0_RxP, input, X)," &
"76 ( bc_0, *, internal, X)," &
"77 ( BC_1, SerDes_E0_TxP, output2, X)," &
"78 ( bc_4, Reserved_107, observe_only, X)," &
"79 ( BC_4, Reserved_107, input, X)," &
"80 ( bc_0, *, internal, X)," &
"81 ( BC_1, Reserved_105, output2, X)," &
"82 ( bc_4, Reserved_108, observe_only, X)," &
"83 ( BC_4, Reserved_108, input, X)," &
"84 ( bc_0, *, internal, X)," &
"85 ( BC_1, Reserved_110, output2, X)," &
"86 ( bc_4, SerDes_E1_RxP, observe_only, X)," &
"87 ( BC_4, SerDes_E1_RxP, input, X)," &
"88 ( bc_0, *, internal, X)," &
"89 ( BC_1, SerDes_E1_TxP, output2, X)," &
"90 ( bc_4, Reserved_116, observe_only, X)," &
"91 ( BC_4, Reserved_116, input, X)," &
"92 ( bc_0, *, internal, X)," &
"93 ( BC_1, Reserved_118, output2, X)," &
"94 ( bc_4, Reserved_123, observe_only, X)," &
"95 ( BC_4, Reserved_123, input, X)," &
"96 ( bc_0, *, internal, X)," &
"97 ( BC_1, Reserved_121, output2, X)," &
"98 ( bc_4, Reserved_124, observe_only, X)," &
"99 ( BC_4, Reserved_124, input, X)," &
"100 ( bc_0, *, internal, X)," &
"101 ( BC_1, Reserved_126, output2, X)," &
"102 ( bc_4, Reserved_131, observe_only, X)," &
"103 ( BC_4, Reserved_131, input, X)," &
"104 ( bc_0, *, internal, X)," &
"105 ( BC_1, Reserved_129, output2, X)," &
"106 ( bc_4, Reserved_132, observe_only, X)," &
"107 ( BC_4, Reserved_132, input, X)," &
"108 ( bc_0, *, internal, X)," &
"109 ( BC_1, Reserved_134, output2, X)," &
"110 ( bc_4, Reserved_139, observe_only, X)," &
"111 ( BC_4, Reserved_139, input, X)," &
"112 ( bc_0, *, internal, X)," &
"113 ( BC_1, Reserved_137, output2, X)," &
"114 ( bc_4, RefClk_P, observe_only, X)," &
"115 ( BC_4, RefClk_P, input, X)," &
"116 ( bc_0, *, internal, X)," &
"117 ( BC_1, Reserved_22, output2, X)," &
"118 ( bc_4, Reserved_143, observe_only, X)," &
"119 ( BC_4, Reserved_143, input, X)," &
"120 ( bc_0, *, internal, X)," &
"121 ( BC_1, Reserved_141, output2, X)," &
"122 ( bc_4, Reserved_144, observe_only, X)," &
"123 ( BC_4, Reserved_144, input, X)," &
"124 ( bc_0, *, internal, X)," &
"125 ( BC_1, Reserved_146, output2, X)," &
"126 ( bc_2, *, control, 1)," &
"127 ( bc_7, MDIO, bidir, X, 126, 1, Z)," &
"128 ( bc_2, *, control, 1)," &
"129 ( bc_7, MDC, bidir, X, 128, 1, Z)," &
"130 ( bc_2, *, control, 1)," &
"131 ( bc_7, Reserved_17, bidir, X, 130, 1, Z)," &
"132 ( bc_2, *, control, 1)," &
"133 ( bc_7, Reserved_18, bidir, X, 132, 1, Z)," &
"134 ( bc_2, *, control, 1)," &
"135 ( bc_7, SI_Clk, bidir, X, 134, 1, Z)," &
"136 ( bc_2, *, control, 1)," &
"137 ( bc_7, SI_DI, bidir, X, 136, 1, Z)," &
"138 ( bc_2, *, control, 1)," &
"139 ( bc_7, SI_DO, bidir, X, 138, 1, Z)," &
"140 ( bc_2, *, control, 1)," &
"141 ( bc_7, SI_nEn, bidir, X, 140, 1, Z)," &
"142 ( bc_2, *, control, 1)," &
"143 ( bc_7, GPIO_0, bidir, X, 142, 1, Z)," &
"144 ( bc_2, *, control, 1)," &
"145 ( bc_7, GPIO_1, bidir, X, 144, 1, Z)," &
"146 ( bc_2, *, control, 1)," &
"147 ( bc_7, GPIO_2, bidir, X, 146, 1, Z)," &
"148 ( bc_2, *, control, 1)," &
"149 ( bc_7, GPIO_3, bidir, X, 148, 1, Z)," &
"150 ( bc_2, *, control, 1)," &
"151 ( bc_7, GPIO_4, bidir, X, 150, 1, Z)," &
"152 ( bc_2, *, control, 1)," &
"153 ( bc_7, GPIO_5, bidir, X, 152, 1, Z)," &
"154 ( bc_2, *, control, 1)," &
"155 ( bc_7, GPIO_6, bidir, X, 154, 1, Z)," &
"156 ( bc_2, *, control, 1)," &
"157 ( bc_7, GPIO_7, bidir, X, 156, 1, Z)," &
"158 ( bc_2, *, control, 1)," &
"159 ( bc_7, GPIO_8, bidir, X, 158, 1, Z)," &
"160 ( bc_2, *, control, 1)," &
"161 ( bc_7, Reserved_31, bidir, X, 160, 1, Z)," &
"162 ( bc_2, *, control, 1)," &
"163 ( bc_7, Reserved_32, bidir, X, 162, 1, Z)," &
"164 ( bc_2, *, control, 1)," &
"165 ( bc_7, Reserved_33, bidir, X, 164, 1, Z)," &
"166 ( bc_2, *, control, 1)," &
"167 ( bc_7, Reserved_34, bidir, X, 166, 1, Z)," &
"168 ( bc_2, *, control, 1)," &
"169 ( bc_7, Reserved_35, bidir, X, 168, 1, Z)," &
"170 ( bc_2, *, control, 1)," &
"171 ( bc_7, Reserved_36, bidir, X, 170, 1, Z)," &
"172 ( bc_2, *, control, 1)," &
"173 ( bc_7, GPIO_15, bidir, X, 172, 1, Z)," &
"174 ( bc_2, *, control, 1)," &
"175 ( bc_7, GPIO_16, bidir, X, 174, 1, Z)," &
"176 ( bc_2, *, control, 1)," &
"177 ( bc_7, Reserved_37, bidir, X, 176, 1, Z)," &
"178 ( bc_2, *, control, 1)," &
"179 ( bc_7, Reserved_38, bidir, X, 178, 1, Z)," &
"180 ( bc_2, *, control, 1)," &
"181 ( bc_7, Reserved_39, bidir, X, 180, 1, Z)," &
"182 ( bc_2, *, control, 1)," &
"183 ( bc_7, Reserved_40, bidir, X, 182, 1, Z)," &
"184 ( bc_2, *, control, 1)," &
"185 ( bc_7, Reserved_41, bidir, X, 184, 1, Z)," &
"186 ( bc_2, *, control, 1)," &
"187 ( bc_7, Reserved_98, bidir, X, 186, 1, Z)," &
"188 ( bc_2, *, control, 1)," &
"189 ( bc_7, Reserved_99, bidir, X, 188, 1, Z)," &
"190 ( bc_2, *, control, 1)," &
"191 ( bc_7, Reserved_186, bidir, X, 190, 1, Z)," &
"192 ( bc_2, *, control, 1)," &
"193 ( bc_7, Reserved_187, bidir, X, 192, 1, Z)," &
"194 ( bc_2, *, control, 1)," &
"195 ( bc_7, Reserved_188, bidir, X, 194, 1, Z)," &
"196 ( bc_2, *, control, 1)," &
"197 ( bc_7, Reserved_189, bidir, X, 196, 1, Z)," &
"198 ( bc_2, *, control, 1)," &
"199 ( bc_7, Reserved_190, bidir, X, 198, 1, Z)," &
"200 ( bc_2, *, control, 1)," &
"201 ( bc_7, GPIO_29, bidir, X, 200, 1, Z)," &
"202 ( bc_2, *, control, 1)," &
"203 ( bc_7, GPIO_30, bidir, X, 202, 1, Z)," &
"204 ( bc_2, *, control, 1)," &
"205 ( bc_7, GPIO_31, bidir, X, 204, 1, Z)," &
"206 ( bc_1, Reserved_24, input, X)," &
"207 ( bc_1, nRESET, input, X)," &
"208 ( bc_0, *, internal, X)," &
"209 ( bc_1, VSS_178, input, X)," &
"210 ( bc_1, VCORE_CFG0, input, X)," &
"211 ( bc_1, VCORE_CFG1, input, X)," &
"212 ( bc_1, VCORE_CFG2, input, X)," &
"213 ( bc_1, RefClk_Sel0, input, X)," &
"214 ( bc_1, RefClk_Sel1, input, X)," &
"215 ( bc_1, RefClk_Sel2, input, X)," &
"216 ( bc_1, Reserved_8, input, X)," &
"217 ( bc_1, Reserved_7, input, X)," &
"218 ( bc_1, Reserved_6, input, X)," &
"219 ( bc_1, Reserved_5, input, X)," &
"220 ( bc_2, *, control, 1)," &
"221 ( bc_7, COMA_MODE, bidir, X, 220, 1, Z)," &
"222 ( bc_2, *, control, 1)," &
"223 ( bc_7, Reserved_201, bidir, X, 222, 1, Z)," &
"224 ( bc_2, *, control, 1)," &
"225 ( bc_7, Reserved_202, bidir, X, 224, 1, Z)," &
"226 ( bc_1, Reserved_203, input, X)," &
"227 ( bc_2, *, control, 1)," &
"228 ( bc_7, Reserved_204, bidir, X, 227, 1, Z)," &
"229 ( bc_2, *, control, 1)," &
"230 ( bc_7, Reserved_205, bidir, X, 229, 1, Z)," &
"231 ( bc_2, *, control, 1)," &
"232 ( bc_7, Reserved_206, bidir, X, 231, 1, Z)," &
"233 ( bc_2, *, control, 1)," &
"234 ( bc_7, Reserved_207, bidir, X, 233, 1, Z)," &
"235 ( bc_2, *, control, 1)," &
"236 ( bc_7, Reserved_208, bidir, X, 235, 1, Z)," &
"237 ( bc_2, *, control, 1)," &
"238 ( bc_7, Reserved_209, bidir, X, 237, 1, Z)," &
"239 ( bc_2, *, control, 1)," &
"240 ( bc_7, Reserved_211, bidir, X, 239, 1, Z)," &
"241 ( bc_2, *, control, 1)," &
"242 ( bc_7, Reserved_212, bidir, X, 241, 1, Z)," &
"243 ( bc_1, Reserved_213, input, X)," &
"244 ( bc_1, Reserved_214, input, X)," &
"245 ( bc_2, *, control, 1)," &
"246 ( bc_7, Reserved_215, bidir, X, 245, 1, Z)," &
"247 ( bc_2, *, control, 1)," &
"248 ( bc_7, Reserved_216, bidir, X, 247, 1, Z)," &
"249 ( bc_2, *, control, 1)," &
"250 ( bc_7, Reserved_217, bidir, X, 249, 1, Z)," &
"251 ( bc_2, *, control, 1)," &
"252 ( bc_7, Reserved_218, bidir, X, 251, 1, Z)," &
"253 ( bc_2, *, control, 1)," &
"254 ( bc_7, Reserved_219, bidir, X, 253, 1, Z)," &
"255 ( bc_2, *, control, 1)," &
"256 ( bc_7, Reserved_220, bidir, X, 255, 1, Z)," &
"257 ( bc_1, Reserved_221, input, X)," &
"258 ( bc_2, *, control, 1)," &
"259 ( bc_7, Reserved_223, bidir, X, 258, 1, Z)," &
"260 ( bc_2, *, control, 1)," &
"261 ( bc_7, Reserved_225, bidir, X, 260, 1, Z)," &
"262 ( bc_2, *, control, 1)," &
"263 ( bc_7, Reserved_232, bidir, X, 262, 1, Z)," &
"264 ( bc_2, *, control, 1)," &
"265 ( bc_7, Reserved_233, bidir, X, 264, 1, Z)," &
"266 ( bc_2, *, control, 1)," &
"267 ( bc_7, Reserved_234, bidir, X, 266, 1, Z)," &
"268 ( bc_2, *, control, 1)," &
"269 ( bc_7, Reserved_235, bidir, X, 268, 1, Z)," &
"270 ( bc_2, *, control, 1)," &
"271 ( bc_7, Reserved_236, bidir, X, 270, 1, Z)," &
"272 ( bc_2, *, control, 1)," &
"273 ( bc_7, Reserved_237, bidir, X, 272, 1, Z)," &
"274 ( bc_1, Reserved_248, input, X)," &
"275 ( bc_1, Reserved_240, input, X)," &
"276 ( bc_1, Reserved_241, input, X)," &
"277 ( bc_1, Reserved_242, input, X)," &
"278 ( bc_1, Reserved_243, input, X)," &
"279 ( bc_1, Reserved_244, input, X)," &
"280 ( bc_1, Reserved_245, input, X)," &
"281 ( bc_1, Reserved_246, input, X)," &
"282 ( bc_1, Reserved_247, input, X)";
end VSC7420XJG;
