-- *****************************************************************************
-- BSDL file for design top
-- Created by Synopsys Version B-2008.09-SP4 (Feb 27, 2009)
-- Designer:
-- Company:
-- Date: Tue Mar 31 14:52:23 2009
-- *****************************************************************************
entity top is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "R_TFBGA324_J_339x340");
-- This section declares all the ports in the design.
port (
bms : in bit;
jtagsel : in bit;
ntrst : in bit;
tck : in bit;
tdi : in bit;
tms : in bit;
tst : in bit;
ebi_cas : inout bit;
ebi_ncs0 : inout bit;
ebi_ncs1_sdcs : inout bit;
ebi_nrd_cfoe : inout bit;
ebi_nwr0_nwe_cfwe : inout bit;
ebi_nwr1_nbs1_cfior : inout bit;
ebi_nwr3_nbs3_cfiow : inout bit;
ebi_ras : inout bit;
ebi_sda10 : inout bit;
ebi_sdcke : inout bit;
ebi_sdwe : inout bit;
nrst : inout bit;
ddr2_add : inout bit_vector (0 to 13);
ddr2_dq : inout bit_vector (0 to 15);
ddr2_dqm : buffer bit_vector (0 to 1);
ddr2_dqs : inout bit_vector (0 to 1);
ebi_a : inout bit_vector (0 to 18);
ebi_d : inout bit_vector (0 to 15);
ebi_dqs : inout bit_vector (0 to 1);
pa : inout bit_vector (0 to 31);
pb : inout bit_vector (0 to 31);
pc : inout bit_vector (0 to 31);
pd : inout bit_vector (0 to 31);
pe : inout bit_vector (0 to 31);
ddr2_ba0 : out bit;
ddr2_clkn : out bit;
ebi_nandoe : out bit;
ebi_nandwe : out bit;
ebi_sdckn : out bit;
tdo : out bit;
ebi_dqm : out bit_vector (0 to 1);
ddr2_ba1 : buffer bit;
ddr2_cas : buffer bit;
ddr2_cke : buffer bit;
ddr2_clk : buffer bit;
ddr2_cs : buffer bit;
ddr2_ras : buffer bit;
ddr2_we : buffer bit;
ebi_sdck : buffer bit;
rtck : buffer bit;
GNDANA : linkage bit;
GNDBU : linkage bit;
GNDOSC : linkage bit;
GNDUTMI : linkage bit;
VDDANA : linkage bit;
VDDBU : linkage bit;
VDDIOP1 : linkage bit;
VDDIOP2 : linkage bit;
VDDOSC : linkage bit;
VDDPLLA : linkage bit;
VDDPLLUTMI : linkage bit;
VDDUTMIC : linkage bit;
VDDUTMII : linkage bit;
advrefp : linkage bit;
bias : linkage bit;
ddr_vref : linkage bit;
dfsdm : linkage bit;
dfsdp : linkage bit;
dhsdm : linkage bit;
dhsdp : linkage bit;
hfsdm : linkage bit;
hfsdp : linkage bit;
hhsdm : linkage bit;
hhsdp : linkage bit;
osc16m_xin : linkage bit;
osc16m_xout : linkage bit;
osc32k_xin : linkage bit;
osc32k_xout : linkage bit;
shdn : linkage bit;
wkup : linkage bit;
GNDCORE : linkage bit_vector (1 to 4);
GNDIOM : linkage bit_vector (1 to 7);
GNDIOP : linkage bit_vector (1 to 2);
VDDCORE : linkage bit_vector (1 to 4);
VDDIOM0 : linkage bit_vector (1 to 4);
VDDIOM1 : linkage bit_vector (1 to 4);
VDDIOP0 : linkage bit_vector (1 to 2)
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of top: entity is "STD_1149_1_2001";
attribute PIN_MAP of top: entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information is
-- extracted from the port-to-pin map file that was read in using the
-- "read_pin_map" command.
constant R_TFBGA324_J_339x340: PIN_MAP_STRING :=
"bms : T11," &
"jtagsel : E4," &
"ntrst : N10," &
"tck : U10," &
"tdi : R10," &
"tms : P10," &
"tst : E5," &
"ebi_cas : C11," &
"ebi_ncs0 : A10," &
"ebi_ncs1_sdcs : F10," &
"ebi_nrd_cfoe : F11," &
"ebi_nwr0_nwe_cfwe : C9," &
"ebi_nwr1_nbs1_cfior : D9," &
"ebi_nwr3_nbs3_cfiow : A9," &
"ebi_ras : A12," &
"ebi_sda10 : B9," &
"ebi_sdcke : B12," &
"ebi_sdwe : F12," &
"nrst : M10," &
"ddr2_add : (M17, L14, M18, L15, L16, L18, L17, K14, K15" &
", K16, K18, K17, J14, J15)," &
"ddr2_dq : (R16, R15, T14, P15, P16, P17, R14, P14, N15" &
", N16, P18, N17, N18, N14, M15, M16)," &
"ddr2_dqm : (G14, H16)," &
"ddr2_dqs : (G18, G15)," &
"ebi_a : (F13, F14, F18, F15, E14, F17, F16, E17, E15" &
", E16, D18, D17, C18, B18, A18, B17, C10, B10, C17)," &
"ebi_d : (A17, D15, C15, B16, B15, D14, C14, A15, B14" &
", D13, C13, E13, B13, E12, D12, C12)," &
"ebi_dqs : (A11, E11)," &
"pa : (L1, M1, L5, N1, L6, M2, M3, M4, L7, N2, M5, " &
"P1, N3, P2, M6, N4, N5, N6, R1, P3, R2, P4, T1, P5, R3, T2, T3, U1" &
", U3, U2, R4, V1)," &
"pb : (T4, V2, V3, U4, R5, V4, T5, U5, T12, N11, " &
"U13, M11, P6, R6, M7, V5, T6, U6, N7, P7, P12, T15, R12, T16, N12, " &
"M12, U14, M13, N13, R13, T13, P13)," &
"pc : (A8, E9, B8, C8, F9, A7, D8, A6, E8, C7, B6, " &
"B7, A5, D7, F8, C6, E7, B5, D6, F7, A4, C5, B4, E6, D5, A3, C4, A1" &
", A2, B2, B3, B1)," &
"pd : (R7, T7, L8, V6, M8, V7, N8, U7, P8, R8, U8, " &
"T8, V8, L9, U9, M9, N9, V9, R9, T9, D2, E1, F1, G2, F2, G1, H1, H2" &
", P9, L10, T10, L11)," &
"pe : (G4, F4, G5, F5, G7, H5, G3, H6, G6, H7, H8, " &
"G8, J5, H4, J3, J4, J2, J6, J7, J1, J8, K1, K4, K2, K5, K6, K3, K7" &
", K8, L3, L2, L4)," &
"ddr2_ba0 : G17," &
"ddr2_clkn : H18," &
"ebi_nandoe : D10," &
"ebi_nandwe : E10," &
"ebi_sdckn : A14," &
"tdo : V10," &
"ebi_dqm : (B11, D11)," &
"ddr2_ba1 : G16," &
"ddr2_cas : H17," &
"ddr2_cke : J16," &
"ddr2_clk : J18," &
"ddr2_cs : H14," &
"ddr2_ras : J17," &
"ddr2_we : H15," &
"ebi_sdck : A13," &
"rtck : R11," &
"GNDANA : C2," &
"GNDBU : D3," &
"GNDOSC : U12," &
"GNDUTMI : U17," &
"VDDANA : E3," &
"VDDBU : D4," &
"VDDIOP1 : H3," &
"VDDIOP2 : V14," &
"VDDOSC : U11," &
"VDDPLLA : P11," &
"VDDPLLUTMI : V13," &
"VDDUTMIC : U18," &
"VDDUTMII : V17," &
"advrefp : E2," &
"bias : V18," &
"ddr_vref : A16," &
"dfsdm : V16," &
"dfsdp : V15," &
"dhsdm : U16," &
"dhsdp : U15," &
"hfsdm : R18," &
"hfsdp : T18," &
"hhsdm : R17," &
"hhsdp : T17," &
"osc16m_xin : V12," &
"osc16m_xout : V11," &
"osc32k_xin : C1," &
"osc32k_xout : D1," &
"shdn : F3," &
"wkup : C3," &
"GNDCORE : (G9, H9, J10, J9)," &
"GNDIOM : (C16, H12, H13, J12, J13, K11, K12)," &
"GNDIOP : (H10, J11)," &
"VDDCORE : (E18, G12, G13, H11)," &
"VDDIOM0 : (K13, L12, L13, M14)," &
"VDDIOM1 : (D16, F6, G10, G11)," &
"VDDIOP0 : (K10, K9)";
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in
-- the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of tck : signal is (1.000000e+06, BOTH);
attribute TAP_SCAN_IN of tdi : signal is true;
attribute TAP_SCAN_MODE of tms : signal is true;
attribute TAP_SCAN_OUT of tdo : signal is true;
attribute TAP_SCAN_RESET of ntrst: signal is true;
-- Specifies the compliance enable patterns for the design. It lists a set of
-- design ports and the values that they should be set to, in order to enable
-- compliance to IEEE Std 1149.1
attribute COMPLIANCE_PATTERNS of top: entity is
"(jtagsel, tst) (10)";
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of top: entity is 3;
-- Specifies the boundary-scan instructions implemented in the design and their
-- opcodes.
attribute INSTRUCTION_OPCODE of top: entity is
"BYPASS (111, 100, 101, 110)," &
"EXTEST (000)," &
"PRELOAD (011)," &
"SAMPLE (011)," &
"INTEST (001)," &
"IDCODE (010)";
-- Specifies the bit pattern that is loaded into the instruction register when
-- the TAP controller passes through the Capture-IR state. The standard mandates
-- that the two LSBs must be "01". The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of top: entity is "001";
-- Specifies the bit pattern that is loaded into the DEVICE_ID register during
-- the IDCODE instruction when the TAP controller passes through the Capture-DR
-- state.
attribute IDCODE_REGISTER of top: entity is
"0000" &
-- 4-bit version number
"0101101100100111" &
-- 16-bit part number
"00000011111" &
-- 11-bit identity of the manufacturer
"1";
-- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI and TDO for
-- each implemented instruction.
attribute REGISTER_ACCESS of top: entity is
"BYPASS (BYPASS)," &
"BOUNDARY (EXTEST, SAMPLE, INTEST)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of top: entity is 505;
-- The following list specifies the characteristics of each cell in the boundary
-- scan register from TDI to TDO. The following is a description of the label
-- fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not have a port
-- name.
-- function: Is the function of the cell as defined by the standard. Is one
-- of input, output2, output3, bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be loaded with
-- for safe operation when the software might otherwise choose a
-- random value.
-- ccell : The control cell number. Specifies the control cell that
-- drives the output enable for this port.
-- disval : Specifies the value that is loaded into the control cell to
-- disable the output enable for the corresponding port.
-- rslt : Resulting state. Shows the state of the driver when it is
-- disabled.
attribute BOUNDARY_REGISTER of top: entity is
--
-- num cell port function safe [ccell disval
-- rslt]
--
"504 (BC_1, *, control, " &
"0), " &
"503 (BC_7, pb(0), bidir, X, 504, 0, " &
"Z), " &
"502 (BC_1, *, control, " &
"0), " &
"501 (BC_7, pb(1), bidir, X, 502, 0, " &
"Z), " &
"500 (BC_1, *, control, " &
"0), " &
"499 (BC_7, pb(2), bidir, X, 500, 0, " &
"Z), " &
"498 (BC_1, *, control, " &
"0), " &
"497 (BC_7, pb(3), bidir, X, 498, 0, " &
"Z), " &
"496 (BC_1, *, control, " &
"0), " &
"495 (BC_7, pb(4), bidir, X, 496, 0, " &
"Z), " &
"494 (BC_1, *, control, " &
"0), " &
"493 (BC_7, pb(5), bidir, X, 494, 0, " &
"Z), " &
"492 (BC_1, *, control, " &
"0), " &
"491 (BC_7, pb(6), bidir, X, 492, 0, " &
"Z), " &
"490 (BC_1, *, control, " &
"0), " &
"489 (BC_7, pb(7), bidir, X, 490, 0, " &
"Z), " &
"488 (BC_1, *, control, " &
"0), " &
"487 (BC_7, pb(12), bidir, X, 488, 0, " &
"Z), " &
"486 (BC_1, *, control, " &
"0), " &
"485 (BC_7, pb(13), bidir, X, 486, 0, " &
"Z), " &
"484 (BC_1, *, control, " &
"0), " &
"483 (BC_7, pb(14), bidir, X, 484, 0, " &
"Z), " &
"482 (BC_1, *, control, " &
"0), " &
"481 (BC_7, pb(15), bidir, X, 482, 0, " &
"Z), " &
"480 (BC_1, *, control, " &
"0), " &
"479 (BC_7, pb(16), bidir, X, 480, 0, " &
"Z), " &
"478 (BC_1, *, control, " &
"0), " &
"477 (BC_7, pb(17), bidir, X, 478, 0, " &
"Z), " &
"476 (BC_1, *, control, " &
"0), " &
"475 (BC_7, pb(18), bidir, X, 476, 0, " &
"Z), " &
"474 (BC_1, *, control, " &
"0), " &
"473 (BC_7, pb(19), bidir, X, 474, 0, " &
"Z), " &
"472 (BC_1, *, control, " &
"0), " &
"471 (BC_7, pd(0), bidir, X, 472, 0, " &
"Z), " &
"470 (BC_1, *, control, " &
"0), " &
"469 (BC_7, pd(1), bidir, X, 470, 0, " &
"Z), " &
"468 (BC_1, *, control, " &
"0), " &
"467 (BC_7, pd(2), bidir, X, 468, 0, " &
"Z), " &
"466 (BC_1, *, control, " &
"0), " &
"465 (BC_7, pd(3), bidir, X, 466, 0, " &
"Z), " &
"464 (BC_1, *, control, " &
"0), " &
"463 (BC_7, pd(4), bidir, X, 464, 0, " &
"Z), " &
"462 (BC_1, *, control, " &
"0), " &
"461 (BC_7, pd(5), bidir, X, 462, 0, " &
"Z), " &
"460 (BC_1, *, control, " &
"0), " &
"459 (BC_7, pd(6), bidir, X, 460, 0, " &
"Z), " &
"458 (BC_1, *, control, " &
"0), " &
"457 (BC_7, pd(7), bidir, X, 458, 0, " &
"Z), " &
"456 (BC_1, *, control, " &
"0), " &
"455 (BC_7, pd(8), bidir, X, 456, 0, " &
"Z), " &
"454 (BC_1, *, control, " &
"0), " &
"453 (BC_7, pd(9), bidir, X, 454, 0, " &
"Z), " &
"452 (BC_1, *, control, " &
"0), " &
"451 (BC_7, pd(10), bidir, X, 452, 0, " &
"Z), " &
"450 (BC_1, *, control, " &
"0), " &
"449 (BC_7, pd(11), bidir, X, 450, 0, " &
"Z), " &
"448 (BC_1, *, control, " &
"0), " &
"447 (BC_7, pd(12), bidir, X, 448, 0, " &
"Z), " &
"446 (BC_1, *, control, " &
"0), " &
"445 (BC_7, pd(13), bidir, X, 446, 0, " &
"Z), " &
"444 (BC_1, *, control, " &
"0), " &
"443 (BC_7, pd(14), bidir, X, 444, 0, " &
"Z), " &
"442 (BC_1, *, control, " &
"0), " &
"441 (BC_7, pd(15), bidir, X, 442, 0, " &
"Z), " &
"440 (BC_1, *, control, " &
"0), " &
"439 (BC_7, pd(16), bidir, X, 440, 0, " &
"Z), " &
"438 (BC_1, *, control, " &
"0), " &
"437 (BC_7, pd(17), bidir, X, 438, 0, " &
"Z), " &
"436 (BC_1, *, control, " &
"0), " &
"435 (BC_7, pd(18), bidir, X, 436, 0, " &
"Z), " &
"434 (BC_1, *, control, " &
"0), " &
"433 (BC_7, pd(19), bidir, X, 434, 0, " &
"Z), " &
"432 (BC_1, *, control, " &
"0), " &
"431 (BC_7, pd(28), bidir, X, 432, 0, " &
"Z), " &
"430 (BC_1, *, control, " &
"0), " &
"429 (BC_7, pd(29), bidir, X, 430, 0, " &
"Z), " &
"428 (BC_1, *, control, " &
"0), " &
"427 (BC_7, pd(30), bidir, X, 428, 0, " &
"Z), " &
"426 (BC_1, *, control, " &
"0), " &
"425 (BC_7, pd(31), bidir, X, 426, 0, " &
"Z), " &
"424 (BC_2, bms, input, " &
"X), " &
"423 (BC_1, *, control, " &
"0), " &
"422 (BC_7, nrst, bidir, X, 423, 0, " &
"Z), " &
"421 (BC_1, rtck, output2, " &
"X), " &
"420 (BC_1, *, control, " &
"0), " &
"419 (BC_7, pb(8), bidir, X, 420, 0, " &
"Z), " &
"418 (BC_1, *, control, " &
"0), " &
"417 (BC_7, pb(9), bidir, X, 418, 0, " &
"Z), " &
"416 (BC_1, *, control, " &
"0), " &
"415 (BC_7, pb(10), bidir, X, 416, 0, " &
"Z), " &
"414 (BC_1, *, control, " &
"0), " &
"413 (BC_7, pb(11), bidir, X, 414, 0, " &
"Z), " &
"412 (BC_1, *, control, " &
"0), " &
"411 (BC_7, pb(20), bidir, X, 412, 0, " &
"Z), " &
"410 (BC_1, *, control, " &
"0), " &
"409 (BC_7, pb(21), bidir, X, 410, 0, " &
"Z), " &
"408 (BC_1, *, control, " &
"0), " &
"407 (BC_7, pb(22), bidir, X, 408, 0, " &
"Z), " &
"406 (BC_1, *, control, " &
"0), " &
"405 (BC_7, pb(23), bidir, X, 406, 0, " &
"Z), " &
"404 (BC_1, *, control, " &
"0), " &
"403 (BC_7, pb(24), bidir, X, 404, 0, " &
"Z), " &
"402 (BC_1, *, control, " &
"0), " &
"401 (BC_7, pb(25), bidir, X, 402, 0, " &
"Z), " &
"400 (BC_1, *, control, " &
"0), " &
"399 (BC_7, pb(26), bidir, X, 400, 0, " &
"Z), " &
"398 (BC_1, *, control, " &
"0), " &
"397 (BC_7, pb(27), bidir, X, 398, 0, " &
"Z), " &
"396 (BC_1, *, control, " &
"0), " &
"395 (BC_7, pb(28), bidir, X, 396, 0, " &
"Z), " &
"394 (BC_1, *, control, " &
"0), " &
"393 (BC_7, pb(29), bidir, X, 394, 0, " &
"Z), " &
"392 (BC_1, *, control, " &
"0), " &
"391 (BC_7, pb(30), bidir, X, 392, 0, " &
"Z), " &
"390 (BC_1, *, control, " &
"0), " &
"389 (BC_7, pb(31), bidir, X, 390, 0, " &
"Z), " &
"388 (BC_1, *, control, " &
"1), " &
"387 (BC_7, ddr2_dq(0), bidir, X, 388, 1, " &
"Z), " &
"386 (BC_1, *, control, " &
"1), " &
"385 (BC_7, ddr2_dq(1), bidir, X, 386, 1, " &
"Z), " &
"384 (BC_1, *, control, " &
"1), " &
"383 (BC_7, ddr2_dq(2), bidir, X, 384, 1, " &
"Z), " &
"382 (BC_1, *, control, " &
"1), " &
"381 (BC_7, ddr2_dq(3), bidir, X, 382, 1, " &
"Z), " &
"380 (BC_1, *, control, " &
"1), " &
"379 (BC_7, ddr2_dq(4), bidir, X, 380, 1, " &
"Z), " &
"378 (BC_1, *, control, " &
"1), " &
"377 (BC_7, ddr2_dq(5), bidir, X, 378, 1, " &
"Z), " &
"376 (BC_1, *, control, " &
"1), " &
"375 (BC_7, ddr2_dq(6), bidir, X, 376, 1, " &
"Z), " &
"374 (BC_1, *, control, " &
"1), " &
"373 (BC_7, ddr2_dq(7), bidir, X, 374, 1, " &
"Z), " &
"372 (BC_1, *, control, " &
"1), " &
"371 (BC_7, ddr2_dq(8), bidir, X, 372, 1, " &
"Z), " &
"370 (BC_1, *, control, " &
"1), " &
"369 (BC_7, ddr2_dq(9), bidir, X, 370, 1, " &
"Z), " &
"368 (BC_1, *, control, " &
"1), " &
"367 (BC_7, ddr2_dq(10), bidir, X, 368, 1, " &
"Z), " &
"366 (BC_1, *, control, " &
"1), " &
"365 (BC_7, ddr2_dq(11), bidir, X, 366, 1, " &
"Z), " &
"364 (BC_1, *, control, " &
"1), " &
"363 (BC_7, ddr2_dq(12), bidir, X, 364, 1, " &
"Z), " &
"362 (BC_1, *, control, " &
"1), " &
"361 (BC_7, ddr2_dq(13), bidir, X, 362, 1, " &
"Z), " &
"360 (BC_1, *, control, " &
"1), " &
"359 (BC_7, ddr2_dq(14), bidir, X, 360, 1, " &
"Z), " &
"358 (BC_1, *, control, " &
"1), " &
"357 (BC_7, ddr2_dq(15), bidir, X, 358, 1, " &
"Z), " &
"356 (BC_1, *, control, " &
"1), " &
"355 (BC_7, ddr2_add(0), bidir, X, 356, 1, " &
"Z), " &
"354 (BC_1, *, control, " &
"1), " &
"353 (BC_7, ddr2_add(1), bidir, X, 354, 1, " &
"Z), " &
"352 (BC_1, *, control, " &
"1), " &
"351 (BC_7, ddr2_add(2), bidir, X, 352, 1, " &
"Z), " &
"350 (BC_1, *, control, " &
"1), " &
"349 (BC_7, ddr2_add(3), bidir, X, 350, 1, " &
"Z), " &
"348 (BC_1, *, control, " &
"1), " &
"347 (BC_7, ddr2_add(4), bidir, X, 348, 1, " &
"Z), " &
"346 (BC_1, *, control, " &
"1), " &
"345 (BC_7, ddr2_add(5), bidir, X, 346, 1, " &
"Z), " &
"344 (BC_1, *, control, " &
"1), " &
"343 (BC_7, ddr2_add(6), bidir, X, 344, 1, " &
"Z), " &
"342 (BC_1, *, control, " &
"1), " &
"341 (BC_7, ddr2_add(7), bidir, X, 342, 1, " &
"Z), " &
"340 (BC_1, *, control, " &
"1), " &
"339 (BC_7, ddr2_add(8), bidir, X, 340, 1, " &
"Z), " &
"338 (BC_1, *, control, " &
"1), " &
"337 (BC_7, ddr2_add(9), bidir, X, 338, 1, " &
"Z), " &
"336 (BC_1, *, control, " &
"1), " &
"335 (BC_7, ddr2_add(10), bidir, X, 336, 1, " &
"Z), " &
"334 (BC_1, *, control, " &
"1), " &
"333 (BC_7, ddr2_add(11), bidir, X, 334, 1, " &
"Z), " &
"332 (BC_1, *, control, " &
"1), " &
"331 (BC_7, ddr2_add(12), bidir, X, 332, 1, " &
"Z), " &
"330 (BC_1, *, control, " &
"1), " &
"329 (BC_7, ddr2_add(13), bidir, X, 330, 1, " &
"Z), " &
"328 (BC_1, ddr2_clk, output2, " &
"X), " &
"327 (BC_0, *, internal, " &
"X), " &
"326 (BC_1, ddr2_cke, output2, " &
"X), " &
"325 (BC_1, ddr2_cs, output2, " &
"X), " &
"324 (BC_1, ddr2_we, output2, " &
"X), " &
"323 (BC_1, ddr2_ras, output2, " &
"X), " &
"322 (BC_1, ddr2_cas, output2, " &
"X), " &
"321 (BC_1, ddr2_dqm(0), output2, " &
"X), " &
"320 (BC_1, ddr2_dqm(1), output2, " &
"X), " &
"319 (BC_1, *, control, " &
"1), " &
"318 (BC_7, ddr2_dqs(0), bidir, X, 319, 1, " &
"Z), " &
"317 (BC_1, *, control, " &
"1), " &
"316 (BC_7, ddr2_dqs(1), bidir, X, 317, 1, " &
"Z), " &
"315 (BC_1, *, control, " &
"1), " &
"314 (BC_1, ddr2_ba0, output3, X, 315, 1, " &
"Z), " &
"313 (BC_1, ddr2_ba1, output2, " &
"X), " &
"312 (BC_1, *, control, " &
"1), " &
"311 (BC_7, ebi_a(0), bidir, X, 312, 1, " &
"Z), " &
"310 (BC_1, *, control, " &
"1), " &
"309 (BC_7, ebi_a(1), bidir, X, 310, 1, " &
"Z), " &
"308 (BC_1, *, control, " &
"1), " &
"307 (BC_7, ebi_a(2), bidir, X, 308, 1, " &
"Z), " &
"306 (BC_1, *, control, " &
"1), " &
"305 (BC_7, ebi_a(3), bidir, X, 306, 1, " &
"Z), " &
"304 (BC_1, *, control, " &
"1), " &
"303 (BC_7, ebi_a(4), bidir, X, 304, 1, " &
"Z), " &
"302 (BC_1, *, control, " &
"1), " &
"301 (BC_7, ebi_a(5), bidir, X, 302, 1, " &
"Z), " &
"300 (BC_1, *, control, " &
"1), " &
"299 (BC_7, ebi_a(6), bidir, X, 300, 1, " &
"Z), " &
"298 (BC_1, *, control, " &
"1), " &
"297 (BC_7, ebi_a(7), bidir, X, 298, 1, " &
"Z), " &
"296 (BC_1, *, control, " &
"1), " &
"295 (BC_7, ebi_a(8), bidir, X, 296, 1, " &
"Z), " &
"294 (BC_1, *, control, " &
"1), " &
"293 (BC_7, ebi_a(9), bidir, X, 294, 1, " &
"Z), " &
"292 (BC_1, *, control, " &
"1), " &
"291 (BC_7, ebi_a(10), bidir, X, 292, 1, " &
"Z), " &
"290 (BC_1, *, control, " &
"1), " &
"289 (BC_7, ebi_a(11), bidir, X, 290, 1, " &
"Z), " &
"288 (BC_1, *, control, " &
"1), " &
"287 (BC_7, ebi_a(12), bidir, X, 288, 1, " &
"Z), " &
"286 (BC_1, *, control, " &
"1), " &
"285 (BC_7, ebi_a(13), bidir, X, 286, 1, " &
"Z), " &
"284 (BC_1, *, control, " &
"1), " &
"283 (BC_7, ebi_a(14), bidir, X, 284, 1, " &
"Z), " &
"282 (BC_1, *, control, " &
"1), " &
"281 (BC_7, ebi_a(15), bidir, X, 282, 1, " &
"Z), " &
"280 (BC_1, *, control, " &
"1), " &
"279 (BC_7, ebi_a(18), bidir, X, 280, 1, " &
"Z), " &
"278 (BC_1, *, control, " &
"1), " &
"277 (BC_7, ebi_d(0), bidir, X, 278, 1, " &
"Z), " &
"276 (BC_1, *, control, " &
"1), " &
"275 (BC_7, ebi_d(1), bidir, X, 276, 1, " &
"Z), " &
"274 (BC_1, *, control, " &
"1), " &
"273 (BC_7, ebi_d(2), bidir, X, 274, 1, " &
"Z), " &
"272 (BC_1, *, control, " &
"1), " &
"271 (BC_7, ebi_d(3), bidir, X, 272, 1, " &
"Z), " &
"270 (BC_1, *, control, " &
"1), " &
"269 (BC_7, ebi_d(4), bidir, X, 270, 1, " &
"Z), " &
"268 (BC_1, *, control, " &
"1), " &
"267 (BC_7, ebi_d(5), bidir, X, 268, 1, " &
"Z), " &
"266 (BC_1, *, control, " &
"1), " &
"265 (BC_7, ebi_d(6), bidir, X, 266, 1, " &
"Z), " &
"264 (BC_1, *, control, " &
"1), " &
"263 (BC_7, ebi_d(7), bidir, X, 264, 1, " &
"Z), " &
"262 (BC_1, *, control, " &
"1), " &
"261 (BC_7, ebi_d(8), bidir, X, 262, 1, " &
"Z), " &
"260 (BC_1, *, control, " &
"1), " &
"259 (BC_7, ebi_d(9), bidir, X, 260, 1, " &
"Z), " &
"258 (BC_1, *, control, " &
"1), " &
"257 (BC_7, ebi_d(10), bidir, X, 258, 1, " &
"Z), " &
"256 (BC_1, *, control, " &
"1), " &
"255 (BC_7, ebi_d(11), bidir, X, 256, 1, " &
"Z), " &
"254 (BC_1, *, control, " &
"1), " &
"253 (BC_7, ebi_d(12), bidir, X, 254, 1, " &
"Z), " &
"252 (BC_1, *, control, " &
"1), " &
"251 (BC_7, ebi_d(13), bidir, X, 252, 1, " &
"Z), " &
"250 (BC_1, *, control, " &
"1), " &
"249 (BC_7, ebi_d(14), bidir, X, 250, 1, " &
"Z), " &
"248 (BC_1, *, control, " &
"1), " &
"247 (BC_7, ebi_d(15), bidir, X, 248, 1, " &
"Z), " &
"246 (BC_1, ebi_sdck, output2, " &
"X), " &
"245 (BC_0, *, internal, " &
"X), " &
"244 (BC_1, *, control, " &
"1), " &
"243 (BC_7, ebi_sdcke, bidir, X, 244, 1, " &
"Z), " &
"242 (BC_1, *, control, " &
"1), " &
"241 (BC_7, ebi_sdwe, bidir, X, 242, 1, " &
"Z), " &
"240 (BC_1, *, control, " &
"1), " &
"239 (BC_7, ebi_ras, bidir, X, 240, 1, " &
"Z), " &
"238 (BC_1, *, control, " &
"1), " &
"237 (BC_7, ebi_cas, bidir, X, 238, 1, " &
"Z), " &
"236 (BC_1, *, control, " &
"1), " &
"235 (BC_1, ebi_dqm(0), output3, X, 236, 1, " &
"Z), " &
"234 (BC_1, ebi_dqm(1), output2, " &
"X), " &
"233 (BC_1, *, control, " &
"1), " &
"232 (BC_7, ebi_dqs(0), bidir, X, 233, 1, " &
"Z), " &
"231 (BC_1, *, control, " &
"1), " &
"230 (BC_7, ebi_dqs(1), bidir, X, 231, 1, " &
"Z), " &
"229 (BC_1, *, control, " &
"1), " &
"228 (BC_7, ebi_a(16), bidir, X, 229, 1, " &
"Z), " &
"227 (BC_1, *, control, " &
"1), " &
"226 (BC_7, ebi_a(17), bidir, X, 227, 1, " &
"Z), " &
"225 (BC_1, *, control, " &
"1), " &
"224 (BC_7, ebi_ncs0, bidir, X, 225, 1, " &
"Z), " &
"223 (BC_1, *, control, " &
"1), " &
"222 (BC_7, ebi_nrd_cfoe, bidir, X, 223, 1, " &
"Z), " &
"221 (BC_1, *, control, " &
"1), " &
"220 (BC_0, ebi_nandoe, output3, X, 221, 1, " &
"Z), " &
"219 (BC_1, *, control, " &
"1), " &
"218 (BC_0, ebi_nandwe, output3, X, 219, 1, " &
"Z), " &
"217 (BC_1, *, control, " &
"1), " &
"216 (BC_7, ebi_nwr0_nwe_cfwe, bidir, X, 217, 1, " &
"Z), " &
"215 (BC_1, *, control, " &
"1), " &
"214 (BC_7, ebi_sda10, bidir, X, 215, 1, " &
"Z), " &
"213 (BC_1, *, control, " &
"1), " &
"212 (BC_7, ebi_nwr3_nbs3_cfiow, bidir, X, 213, 1, " &
"Z), " &
"211 (BC_1, *, control, " &
"1), " &
"210 (BC_7, ebi_nwr1_nbs1_cfior, bidir, X, 211, 1, " &
"Z), " &
"209 (BC_1, *, control, " &
"1), " &
"208 (BC_7, ebi_ncs1_sdcs, bidir, X, 209, 1, " &
"Z), " &
"207 (BC_1, *, control, " &
"1), " &
"206 (BC_7, pc(0), bidir, X, 207, 1, " &
"Z), " &
"205 (BC_1, *, control, " &
"1), " &
"204 (BC_7, pc(1), bidir, X, 205, 1, " &
"Z), " &
"203 (BC_1, *, control, " &
"1), " &
"202 (BC_7, pc(2), bidir, X, 203, 1, " &
"Z), " &
"201 (BC_1, *, control, " &
"1), " &
"200 (BC_7, pc(3), bidir, X, 201, 1, " &
"Z), " &
"199 (BC_1, *, control, " &
"1), " &
"198 (BC_7, pc(4), bidir, X, 199, 1, " &
"Z), " &
"197 (BC_1, *, control, " &
"1), " &
"196 (BC_7, pc(5), bidir, X, 197, 1, " &
"Z), " &
"195 (BC_1, *, control, " &
"1), " &
"194 (BC_7, pc(6), bidir, X, 195, 1, " &
"Z), " &
"193 (BC_1, *, control, " &
"1), " &
"192 (BC_7, pc(7), bidir, X, 193, 1, " &
"Z), " &
"191 (BC_1, *, control, " &
"1), " &
"190 (BC_7, pc(8), bidir, X, 191, 1, " &
"Z), " &
"189 (BC_1, *, control, " &
"1), " &
"188 (BC_7, pc(9), bidir, X, 189, 1, " &
"Z), " &
"187 (BC_1, *, control, " &
"1), " &
"186 (BC_7, pc(10), bidir, X, 187, 1, " &
"Z), " &
"185 (BC_1, *, control, " &
"1), " &
"184 (BC_7, pc(11), bidir, X, 185, 1, " &
"Z), " &
"183 (BC_1, *, control, " &
"1), " &
"182 (BC_7, pc(12), bidir, X, 183, 1, " &
"Z), " &
"181 (BC_1, *, control, " &
"1), " &
"180 (BC_7, pc(13), bidir, X, 181, 1, " &
"Z), " &
"179 (BC_1, *, control, " &
"1), " &
"178 (BC_7, pc(14), bidir, X, 179, 1, " &
"Z), " &
"177 (BC_1, *, control, " &
"1), " &
"176 (BC_7, pc(15), bidir, X, 177, 1, " &
"Z), " &
"175 (BC_1, *, control, " &
"1), " &
"174 (BC_7, pc(16), bidir, X, 175, 1, " &
"Z), " &
"173 (BC_1, *, control, " &
"1), " &
"172 (BC_7, pc(17), bidir, X, 173, 1, " &
"Z), " &
"171 (BC_1, *, control, " &
"1), " &
"170 (BC_7, pc(18), bidir, X, 171, 1, " &
"Z), " &
"169 (BC_1, *, control, " &
"1), " &
"168 (BC_7, pc(19), bidir, X, 169, 1, " &
"Z), " &
"167 (BC_1, *, control, " &
"1), " &
"166 (BC_7, pc(20), bidir, X, 167, 1, " &
"Z), " &
"165 (BC_1, *, control, " &
"1), " &
"164 (BC_7, pc(21), bidir, X, 165, 1, " &
"Z), " &
"163 (BC_1, *, control, " &
"1), " &
"162 (BC_7, pc(22), bidir, X, 163, 1, " &
"Z), " &
"161 (BC_1, *, control, " &
"1), " &
"160 (BC_7, pc(23), bidir, X, 161, 1, " &
"Z), " &
"159 (BC_1, *, control, " &
"1), " &
"158 (BC_7, pc(24), bidir, X, 159, 1, " &
"Z), " &
"157 (BC_1, *, control, " &
"1), " &
"156 (BC_7, pc(25), bidir, X, 157, 1, " &
"Z), " &
"155 (BC_1, *, control, " &
"1), " &
"154 (BC_7, pc(26), bidir, X, 155, 1, " &
"Z), " &
"153 (BC_1, *, control, " &
"1), " &
"152 (BC_7, pc(27), bidir, X, 153, 1, " &
"Z), " &
"151 (BC_1, *, control, " &
"1), " &
"150 (BC_7, pc(28), bidir, X, 151, 1, " &
"Z), " &
"149 (BC_1, *, control, " &
"1), " &
"148 (BC_7, pc(29), bidir, X, 149, 1, " &
"Z), " &
"147 (BC_1, *, control, " &
"1), " &
"146 (BC_7, pc(30), bidir, X, 147, 1, " &
"Z), " &
"145 (BC_1, *, control, " &
"1), " &
"144 (BC_7, pc(31), bidir, X, 145, 1, " &
"Z), " &
"143 (BC_1, *, control, " &
"1), " &
"142 (BC_7, pd(20), bidir, X, 143, 1, " &
"Z), " &
"141 (BC_1, *, control, " &
"1), " &
"140 (BC_7, pd(21), bidir, X, 141, 1, " &
"Z), " &
"139 (BC_1, *, control, " &
"1), " &
"138 (BC_7, pd(22), bidir, X, 139, 1, " &
"Z), " &
"137 (BC_1, *, control, " &
"1), " &
"136 (BC_7, pd(23), bidir, X, 137, 1, " &
"Z), " &
"135 (BC_1, *, control, " &
"1), " &
"134 (BC_7, pd(24), bidir, X, 135, 1, " &
"Z), " &
"133 (BC_1, *, control, " &
"1), " &
"132 (BC_7, pd(25), bidir, X, 133, 1, " &
"Z), " &
"131 (BC_1, *, control, " &
"1), " &
"130 (BC_7, pd(26), bidir, X, 131, 1, " &
"Z), " &
"129 (BC_1, *, control, " &
"1), " &
"128 (BC_7, pd(27), bidir, X, 129, 1, " &
"Z), " &
"127 (BC_1, *, control, " &
"0), " &
"126 (BC_7, pe(0), bidir, X, 127, 0, " &
"Z), " &
"125 (BC_1, *, control, " &
"0), " &
"124 (BC_7, pe(1), bidir, X, 125, 0, " &
"Z), " &
"123 (BC_1, *, control, " &
"0), " &
"122 (BC_7, pe(2), bidir, X, 123, 0, " &
"Z), " &
"121 (BC_1, *, control, " &
"0), " &
"120 (BC_7, pe(3), bidir, X, 121, 0, " &
"Z), " &
"119 (BC_1, *, control, " &
"0), " &
"118 (BC_7, pe(4), bidir, X, 119, 0, " &
"Z), " &
"117 (BC_1, *, control, " &
"0), " &
"116 (BC_7, pe(5), bidir, X, 117, 0, " &
"Z), " &
"115 (BC_1, *, control, " &
"0), " &
"114 (BC_7, pe(6), bidir, X, 115, 0, " &
"Z), " &
"113 (BC_1, *, control, " &
"0), " &
"112 (BC_7, pe(7), bidir, X, 113, 0, " &
"Z), " &
"111 (BC_1, *, control, " &
"0), " &
"110 (BC_7, pe(8), bidir, X, 111, 0, " &
"Z), " &
"109 (BC_1, *, control, " &
"0), " &
"108 (BC_7, pe(9), bidir, X, 109, 0, " &
"Z), " &
"107 (BC_1, *, control, " &
"0), " &
"106 (BC_7, pe(10), bidir, X, 107, 0, " &
"Z), " &
"105 (BC_1, *, control, " &
"0), " &
"104 (BC_7, pe(11), bidir, X, 105, 0, " &
"Z), " &
"103 (BC_1, *, control, " &
"0), " &
"102 (BC_7, pe(12), bidir, X, 103, 0, " &
"Z), " &
"101 (BC_1, *, control, " &
"0), " &
"100 (BC_7, pe(13), bidir, X, 101, 0, " &
"Z), " &
"99 (BC_1, *, control, " &
"0), " &
"98 (BC_7, pe(14), bidir, X, 99, 0, " &
"Z), " &
"97 (BC_1, *, control, " &
"0), " &
"96 (BC_7, pe(15), bidir, X, 97, 0, " &
"Z), " &
"95 (BC_1, *, control, " &
"0), " &
"94 (BC_7, pe(16), bidir, X, 95, 0, " &
"Z), " &
"93 (BC_1, *, control, " &
"0), " &
"92 (BC_7, pe(17), bidir, X, 93, 0, " &
"Z), " &
"91 (BC_1, *, control, " &
"0), " &
"90 (BC_7, pe(18), bidir, X, 91, 0, " &
"Z), " &
"89 (BC_1, *, control, " &
"0), " &
"88 (BC_7, pe(19), bidir, X, 89, 0, " &
"Z), " &
"87 (BC_1, *, control, " &
"0), " &
"86 (BC_7, pe(20), bidir, X, 87, 0, " &
"Z), " &
"85 (BC_1, *, control, " &
"0), " &
"84 (BC_7, pe(21), bidir, X, 85, 0, " &
"Z), " &
"83 (BC_1, *, control, " &
"0), " &
"82 (BC_7, pe(22), bidir, X, 83, 0, " &
"Z), " &
"81 (BC_1, *, control, " &
"0), " &
"80 (BC_7, pe(23), bidir, X, 81, 0, " &
"Z), " &
"79 (BC_1, *, control, " &
"0), " &
"78 (BC_7, pe(24), bidir, X, 79, 0, " &
"Z), " &
"77 (BC_1, *, control, " &
"0), " &
"76 (BC_7, pe(25), bidir, X, 77, 0, " &
"Z), " &
"75 (BC_1, *, control, " &
"0), " &
"74 (BC_7, pe(26), bidir, X, 75, 0, " &
"Z), " &
"73 (BC_1, *, control, " &
"0), " &
"72 (BC_7, pe(27), bidir, X, 73, 0, " &
"Z), " &
"71 (BC_1, *, control, " &
"0), " &
"70 (BC_7, pe(28), bidir, X, 71, 0, " &
"Z), " &
"69 (BC_1, *, control, " &
"0), " &
"68 (BC_7, pe(29), bidir, X, 69, 0, " &
"Z), " &
"67 (BC_1, *, control, " &
"0), " &
"66 (BC_7, pe(30), bidir, X, 67, 0, " &
"Z), " &
"65 (BC_1, *, control, " &
"0), " &
"64 (BC_7, pe(31), bidir, X, 65, 0, " &
"Z), " &
"63 (BC_0, *, control, " &
"0), " &
"62 (BC_6, pa(0), bidir, X, 63, 0, " &
"Z), " &
"61 (BC_1, *, control, " &
"0), " &
"60 (BC_7, pa(1), bidir, X, 61, 0, " &
"Z), " &
"59 (BC_1, *, control, " &
"0), " &
"58 (BC_7, pa(2), bidir, X, 59, 0, " &
"Z), " &
"57 (BC_1, *, control, " &
"0), " &
"56 (BC_7, pa(3), bidir, X, 57, 0, " &
"Z), " &
"55 (BC_1, *, control, " &
"0), " &
"54 (BC_7, pa(4), bidir, X, 55, 0, " &
"Z), " &
"53 (BC_1, *, control, " &
"0), " &
"52 (BC_7, pa(5), bidir, X, 53, 0, " &
"Z), " &
"51 (BC_1, *, control, " &
"0), " &
"50 (BC_7, pa(6), bidir, X, 51, 0, " &
"Z), " &
"49 (BC_1, *, control, " &
"0), " &
"48 (BC_7, pa(7), bidir, X, 49, 0, " &
"Z), " &
"47 (BC_1, *, control, " &
"0), " &
"46 (BC_7, pa(8), bidir, X, 47, 0, " &
"Z), " &
"45 (BC_1, *, control, " &
"0), " &
"44 (BC_7, pa(9), bidir, X, 45, 0, " &
"Z), " &
"43 (BC_1, *, control, " &
"0), " &
"42 (BC_7, pa(10), bidir, X, 43, 0, " &
"Z), " &
"41 (BC_1, *, control, " &
"0), " &
"40 (BC_7, pa(11), bidir, X, 41, 0, " &
"Z), " &
"39 (BC_1, *, control, " &
"0), " &
"38 (BC_7, pa(12), bidir, X, 39, 0, " &
"Z), " &
"37 (BC_1, *, control, " &
"0), " &
"36 (BC_7, pa(13), bidir, X, 37, 0, " &
"Z), " &
"35 (BC_1, *, control, " &
"0), " &
"34 (BC_7, pa(14), bidir, X, 35, 0, " &
"Z), " &
"33 (BC_1, *, control, " &
"0), " &
"32 (BC_7, pa(15), bidir, X, 33, 0, " &
"Z), " &
"31 (BC_1, *, control, " &
"0), " &
"30 (BC_7, pa(16), bidir, X, 31, 0, " &
"Z), " &
"29 (BC_1, *, control, " &
"0), " &
"28 (BC_7, pa(17), bidir, X, 29, 0, " &
"Z), " &
"27 (BC_1, *, control, " &
"0), " &
"26 (BC_7, pa(18), bidir, X, 27, 0, " &
"Z), " &
"25 (BC_1, *, control, " &
"0), " &
"24 (BC_7, pa(19), bidir, X, 25, 0, " &
"Z), " &
"23 (BC_1, *, control, " &
"0), " &
"22 (BC_7, pa(20), bidir, X, 23, 0, " &
"Z), " &
"21 (BC_1, *, control, " &
"0), " &
"20 (BC_7, pa(21), bidir, X, 21, 0, " &
"Z), " &
"19 (BC_1, *, control, " &
"0), " &
"18 (BC_7, pa(22), bidir, X, 19, 0, " &
"Z), " &
"17 (BC_1, *, control, " &
"0), " &
"16 (BC_7, pa(23), bidir, X, 17, 0, " &
"Z), " &
"15 (BC_1, *, control, " &
"0), " &
"14 (BC_7, pa(24), bidir, X, 15, 0, " &
"Z), " &
"13 (BC_1, *, control, " &
"0), " &
"12 (BC_7, pa(25), bidir, X, 13, 0, " &
"Z), " &
"11 (BC_1, *, control, " &
"0), " &
"10 (BC_7, pa(26), bidir, X, 11, 0, " &
"Z), " &
"9 (BC_1, *, control, " &
"0), " &
"8 (BC_7, pa(27), bidir, X, 9, 0, " &
"Z), " &
"7 (BC_1, *, control, " &
"0), " &
"6 (BC_7, pa(28), bidir, X, 7, 0, " &
"Z), " &
"5 (BC_1, *, control, " &
"0), " &
"4 (BC_7, pa(29), bidir, X, 5, 0, " &
"Z), " &
"3 (BC_1, *, control, " &
"0), " &
"2 (BC_7, pa(30), bidir, X, 3, 0, " &
"Z), " &
"1 (BC_1, *, control, " &
"0), " &
"0 (BC_7, pa(31), bidir, X, 1, 0, " &
"Z) ";
-- Specifies the INSTRUCTION_OUTPUT_CONDITIONING.
attribute INSTRUCTION_OUTPUT_CONDITIONING : bsdl_extension;
attribute INSTRUCTION_OUTPUT_CONDITIONING of top: entity is
"BOUNDARY (INTEST)";
end top;
