This BSDL contains syntax errors!
-- ========================================================================
-- Symbios Logic Inc. Confidential
--
-- Boundary Scan Description File (BSDL)
--
-- Product: 53C885Q160
--
-- Version: 1.0
--
-- Author: KG
-- Date Created: 11/22/96
--
-- =======================================================================
-- IMPORTANT NOTICE
-- This information is provided on an AS IS basis without a warranty of any kind.
--
-- IN NO EVENT SHALL SYMBIOS LOGIC BE LIABLE FOR INDIRECT, INCIDENTAL,
-- CONSEQUENTIAL OR PUNITIVE DAMAGES ARISING FROM USE OF THIS
-- INFORMATION. THIS DISCLAIMER OF WARRANTY EXTENDS TO THE USER OF THE
-- INFORMATION, AND TO THEIR CUSTOMERS OR USERS OF PRODUCTS AND IS IN
-- LIEU OF ALL WARRANTIES WHETHER EXPRESS, IMPLIED, OR STATUTORY,
-- INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR
-- PARTICULAR PURPOSE
--
-- SYMBIOS LOGIC does not represent or warrant that the information
-- furnished hereunder is free of infringement of any third party
-- patents, copyrights, trade secrets, or other intellectual property
-- rights. SYMBIOS LOGIC does not represent or warrant that the
-- information is free of defect or omissions, or that it meets any
-- particular standard, requirements or need of the user of the
-- information or their customers
--
-- SYMBIOS LOGIC reserves the right to change the information in this
-- file without notice.
--
-- =======================================================================
-- Revision Control:
--
-- Version: Date Reason for Change
--
-- 1.0 11/22/96 Initial Version
--
-- ======================================================================
ENTITY SYM_53C885Q160 IS
generic(PHYSICAL_PIN_MAP : string := "PQFP_160");
PORT(
IDSEL : inout bit;
AD23 : inout bit;
AD22 : inout bit;
AD21 : inout bit;
AD20 : inout bit;
AD19 : inout bit;
AD18 : inout bit;
AD17 : inout bit;
AD16 : inout bit;
CBEN2 : inout bit;
FRAMEN : inout bit;
IRDYN : inout bit;
TRDYN : inout bit;
DEVSELN : inout bit;
STOPN : inout bit;
PERRN : inout bit;
SERRN : inout bit;
PAR : inout bit;
CBEN1 : inout bit;
AD15 : inout bit;
AD14 : inout bit;
AD13 : inout bit;
AD12 : inout bit;
AD11 : inout bit;
AD10 : inout bit;
AD9 : inout bit;
AD8 : inout bit;
CBEN0 : inout bit;
AD7 : inout bit;
AD6 : inout bit;
AD5 : inout bit;
AD4 : inout bit;
AD3 : inout bit;
AD2 : inout bit;
AD1 : inout bit;
AD0 : inout bit;
SCLK : in bit;
SD11B : inout bit;
SD10B : inout bit;
SD9B : inout bit;
SD8B : inout bit;
SIOB : inout bit;
SREQB : inout bit;
SCDB : inout bit;
SSELB : inout bit;
SMSGB : inout bit;
SRSTB : inout bit;
SACKB : inout bit;
SBSYB : inout bit;
SATB : inout bit;
SDP0B : inout bit;
SD7B : inout bit;
SD6B : inout bit;
SD5B : inout bit;
SD4B : inout bit;
SD3B : inout bit;
SD2B : inout bit;
SD1B : inout bit;
SD0B : inout bit;
SDP1B : inout bit;
SD15B : inout bit;
SD14B : inout bit;
SD13B : inout bit;
SD12B : inout bit;
MAD7 : inout bit;
MAD6 : inout bit;
MAD5 : inout bit;
MAD4 : inout bit;
MAD3 : inout bit;
MAD2 : inout bit;
MAD1 : inout bit;
MAD0 : inout bit;
GPIO0 : inout bit;
GPIO1 : inout bit;
GPIO2 : inout bit;
GPIO4 : inout bit;
MAS1N : inout bit;
MAS0N : inout bit;
MWEN : inout bit;
MOEN : inout bit;
MCEN : inout bit;
TESTOUT : inout bit;
TDI : inout bit;
TRSTB : in bit;
TCK : in bit;
TMS : in bit;
TDO : out bit;
TEST0 : in bit;
TEST1 : in bit;
MDIO : inout bit;
MDC : inout bit;
RXD3 : inout bit;
RXD2 : inout bit;
RXD1 : inout bit;
RXD0 : inout bit;
RX_DV : inout bit;
RX_CLK : inout bit;
RX_ER : inout bit;
TX_ER : inout bit;
TX_CLK : inout bit;
TX_EN : inout bit;
TXD0 : inout bit;
TXD1 : inout bit;
TXD2 : inout bit;
TXD3 : inout bit;
COL : inout bit;
CRS : inout bit;
INTBN : inout bit;
INTAN : inout bit;
RESETN : in bit;
PCICLK : in bit;
GNTN : inout bit;
REQN : inout bit;
AD31 : inout bit;
AD30 : inout bit;
AD29 : inout bit;
AD28 : inout bit;
AD27 : inout bit;
AD26 : inout bit;
AD25 : inout bit;
AD24 : inout bit;
CBEN3 : inout bit;
PINNOCONNECT : linkage bit;
VSS : linkage bit_vector(24 downto 1);
VDD : linkage bit_vector(13 downto 1)
);
-- Incorporate 1994 and 1992 IEEE cells and types
use STD_1149_1_1994.all;
-- Conformance Attribute - 1993
attribute COMPONENT_CONFORMANCE of SYM_53C885Q160: entity is "STD_1149_1_1994";
attribute PIN_MAP of SYM_53C885Q160 : entity is PHYSICAL_PIN_MAP;
constant PQFP_160:PIN_MAP_STRING:=
"IDSEL : 1, " &
"AD23 : 2, " &
"AD22 : 4, " &
"AD21 : 5, " &
"AD20 : 6, " &
"AD19 : 8, " &
"AD18 :10, " &
"AD17 :11, " &
"AD16 :12, " &
"CBEN2 :14, " &
"FRAMEN :15, " &
"IRDYN :16, " &
"TRDYN :18, " &
"DEVSELN :19, " &
"STOPN :21, " &
"PERRN :23, " &
"SERRN :24, " &
"PAR :25, " &
"CBEN1 :26, " &
"AD15 :28, " &
"AD14 :29, " &
"AD13 :30, " &
"AD12 :31, " &
"AD11 :33, " &
"AD10 :34, " &
"AD9 :35, " &
"AD8 :37, " &
"CBEN0 :38, " &
"AD7 :39, " &
"AD6 :40, " &
"AD5 :42, " &
"AD4 :43, " &
"AD3 :45, " &
"AD2 :46, " &
"AD1 :48, " &
"AD0 :50, " &
"SCLK :52, " &
"SD11B :54, " &
"SD10B :55, " &
"SD9B :56, " &
"SD8B :58, " &
"SIOB :59, " &
"SREQB :60, " &
"SCDB :61, " &
"SSELB :63, " &
"SMSGB :64, " &
"SRSTB :65, " &
"SACKB :66, " &
"SBSYB :67, " &
"SATB :69, " &
"SDP0B :70, " &
"SD7B :71, " &
"SD6B :72, " &
"SD5B :74, " &
"SD4B :75, " &
"SD3B :76, " &
"SD2B :77, " &
"SD1B :79, " &
"SD0B :80, " &
"SDP1B :81, " &
"SD15B :82, " &
"SD14B :84, " &
"SD13B :85, " &
"SD12B :86, " &
"MAD7 :88, " &
"MAD6 :89, " &
"MAD5 :90, " &
"MAD4 :91, " &
"MAD3 :93, " &
"MAD2 :94, " &
"MAD1 :95, " &
"MAD0 :96, " &
"GPIO0 :97, " &
"GPIO1 :98, " &
"GPIO2 :99, " &
"GPIO4 :101, " &
"MAS1N :102, " &
"MAS0N :103, " &
"MWEN :104, " &
"MOEN :106, " &
"MCEN :108, " &
"TESTOUT :109, " &
"TDI :111, " &
"TRSTB :112, " &
"TCK :113, " &
"TMS :114, " &
"TDO :115, " &
"TEST0 :117, " &
"TEST1 :118, " &
"PINNOCONNECT :119, " &
"MDIO :121, " &
"MDC :122, " &
"RXD3 :124, " &
"RXD2 :125, " &
"RXD1 :126, " &
"RXD0 :127, " &
"RX_DV :128, " &
"RX_CLK :129, " &
"RX_ER :130, " &
"TX_ER :131, " &
"TX_CLK :132, " &
"TX_EN :133, " &
"TXD0 :134, " &
"TXD1 :135, " &
"TXD2 :137, " &
"TXD3 :138, " &
"COL :139, " &
"CRS :140, " &
"INTBN :141, " &
"INTAN :142, " &
"RESETN :143, " &
"PCICLK :144, " &
"GNTN :146, " &
"REQN :147, " &
"AD31 :149, " &
"AD30 :150, " &
"AD29 :152, " &
"AD28 :153, " &
"AD27 :155, " &
"AD26 :156, " &
"AD25 :158, " &
"AD24 :159, " &
"CBEN3 :160, " &
"PINNOCONNECT :119, " &
"VSS :(3,9,13,17,22,27,36,41,47,51,57,62,68,73," &
" 78,83,92,105,110,120,136,145,151,157)" &
"VDD :(7,20,32,44,49,53,87,100,107,116,123,148,154)";
-- ==========================================================================
--
-- SCAN PORT IDENTIFICATION
--
-- ==========================================================================
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
-- ==========================================================================
--
-- COMPLIANCE PORT IDENTIFICATION
--
-- ==========================================================================
-- ******************* READ ME FIRST ! ***************************
--
-- Notes:
-- 1) The RSTN is used as a compliance pin ONLY because when it
-- is asserted low during boundary scan testing, the part's SCSI
-- data and control buses will TRI-STATE. This activity is required
-- of SCSI parts, but it is NOT boundary scan compliant!. If the
-- SCSI bus tri-stating is not an issue to the boundary scan software
-- then the following can be commented out.
--
__
attribute COMPLIANCE_PATTERNS of SYM_53C885Q160 : entity is
"(RSTN) (1)";
-- ==========================================================================
--
-- INSTRUCTION REGISTER DESCRIPTION
--
-- ==========================================================================
attribute INSTRUCTION_LENGTH of SYM_53C885Q160 : entity is 8;
attribute INSTRUCTION_OPCODE of SYM_53C885Q160 : entity is
"EXTEST (00000000, 10000000)," &
"BYPASS (11111111, 10000001, 10000110, 10000111, 00000001, 00000110, 00000111)," &
"SAMPLE (00000010, 10000010)," &
"CLAMP (00000011, 10000011)," &
"HIGHZ (00000100, 10000100)," &
"IDCODE (00000101, 10000101)";
attribute INSTRUCTION_CAPTURE of SYM_53C885Q160 : entity is "00000001";
attribute IDCODE_REGISTER of SYM_53C885Q160 : entity is
"0000" & -- 4-bit Version == 0000
"0101 0000 0110 0100" & -- 16-bit JEDEC Code (SYM_53C885Q160 = 5064)
"00000100010" & -- 11-bit Manufacuters Code (022)
"1"; -- Mandatory LSB
-- ==========================================================================
--
-- BOUNDARY REGISTER DESCRIPTION
--
-- ==========================================================================
attribute BOUNDARY_LENGTH of SYM_53C885Q160 : entity is 350;
attribute BOUNDARY_REGISTER of SYM_53C885Q160 : entity is
-- num cell port function safe [ccell, disval, rslt]
"349 (BC_4, CRS, input, X)," &
"348 (BC_1, CRS, output3, X, 70, 1, Z)," &
"347 (BC_4, COL, input, X)," &
"346 (BC_1, COL, output3, X, 69, 1, Z)," &
"345 (BC_4, TXD3, input, X)," &
"344 (BC_1, TXD3, output3, X, 68, 1, Z)," &
"343 (BC_4, TXD2, input, X)," &
"342 (BC_1, TXD2, output3, X, 67, 1, Z)," &
"341 (BC_4, TXD1, input, X)," &
"340 (BC_1, TXD1, output3, X, 66, 1, Z)," &
"339 (BC_4, TXD0, input, X)," &
"338 (BC_1, TXD0, output3, X, 65, 1, Z)," &
"337 (BC_4, TX_EN, input, X)," &
"336 (BC_1, TX_EN, output3, X, 64, 1, Z)," &
"335 (BC_4, TX_CLK, input, X)," &
"334 (BC_1, TX_CLK, output3, X, 63, 1, Z)," &
"333 (BC_4, TX_ER, input, X)," &
"332 (BC_1, TX_ER, output3, X, 62, 1, Z)," &
"331 (BC_4, RX_ER, input, X)," &
"330 (BC_1, RX_ER, output3, X, 61, 1, Z)," &
"329 (BC_4, RX_CLK, input, X)," &
"328 (BC_1, RX_CLK, output3, X, 60, 1, Z)," &
"327 (BC_4, *, internal, X)," &
"326 (BC_1, *, internal, X)," &
"325 (BC_4, *, internal, X)," &
"324 (BC_1, *, internal, X)," &
"323 (BC_4, *, internal, X)," &
"322 (BC_1, *, internal, X)," &
"321 (BC_4, *, internal, X)," &
"320 (BC_1, *, internal, X)," &
"319 (BC_4, *, internal, X)," &
"318 (BC_1, *, internal, X)," &
"317 (BC_4, RX_DV, input, X)," &
"316 (BC_1, RX_DV, output3, X, 57, 1, Z)," &
"315 (BC_4, RXD0, input, X)," &
"314 (BC_1, RXD0, output3, X, 56, 1, Z)," &
"313 (BC_4, RXD1, input, X)," &
"312 (BC_1, RXD1, output3, X, 55, 1, Z)," &
"311 (BC_4, RXD2, input, X)," &
"310 (BC_1, RXD2, output3, X, 54, 1, Z)," &
"309 (BC_4, RXD3, input, X)," &
"308 (BC_1, RXD3, output3, X, 53, 1, Z)," &
"307 (BC_4, MDC, input, X)," &
"306 (BC_1, MDC, output3, X, 52, 1, Z)," &
"305 (BC_4, MDIO, input, X)," &
"304 (BC_1, MDIO, output3, X, 51, 1, Z)," &
"303 (BC_4, TEST1, input, X)," &
"302 (BC_1, TEST0, input, X)," &
"301 (BC_4, TESTOUT, input, X)," &
"300 (BC_1, TESTOUT, output3, X, 50, 1, Z)," &
"299 (BC_4, MCEN, input, X)," &
"298 (BC_1, MCEN, output3, X, 49, 1, Z)," &
"297 (BC_4, MOEN, input, X)," &
"296 (BC_1, MOEN, output3, X, 49, 1, Z)," &
"295 (BC_4, MWEN, input, X)," &
"294 (BC_1, MWEN, output3, X, 47, 1, Z)," &
"293 (BC_4, MAS0N, input, X)," &
"292 (BC_1, MAS0N, output3, X, 49, 1, Z)," &
"291 (BC_4, MAS1N, input, X)," &
"290 (BC_1, MAS1N, output3, X, 49, 1, Z)," &
"289 (BC_4, GPIO4, input, X)," &
"288 (BC_1, GPIO4, output3, X, 46, 1, Z)," &
"287 (BC_4, GPIO2, input, X)," &
"286 (BC_1, GPIO2, output3, X, 45, 1, Z)," &
"285 (BC_4, GPIO1, input, X)," &
"284 (BC_1, GPIO1, output3, X, 44, 1, Z)," &
"283 (BC_4, GPIO0, input, X)," &
"282 (BC_1, GPIO0, output3, X, 43, 1, Z)," &
"281 (BC_4, MAD0, input, X)," &
"280 (BC_1, MAD0, output3, X, 48, 1, Z)," &
"279 (BC_4, MAD1, input, X)," &
"278 (BC_1, MAD1, output3, X, 48, 1, Z)," &
"277 (BC_4, MAD2, input, X)," &
"276 (BC_1, MAD2, output3, X, 48, 1, Z)," &
"275 (BC_4, MAD3, input, X)," &
"274 (BC_1, MAD3, output3, X, 48, 1, Z)," &
"273 (BC_4, MAD4, input, X)," &
"272 (BC_1, MAD4, output3, X, 48, 1, Z)," &
"271 (BC_4, MAD5, input, X)," &
"270 (BC_1, MAD5, output3, X, 48, 1, Z)," &
"269 (BC_4, MAD6, input, X)," &
"268 (BC_1, MAD6, output3, X, 48, 1, Z)," &
"267 (BC_4, MAD7, input, X)," &
"266 (BC_1, MAD7, output3, X, 48, 1, Z)," &
"265 (BC_4, *, internal, X)," &
"264 (BC_1, *, internal, X)," &
"263 (BC_4, *, internal, X)," &
"262 (BC_1, *, internal, X)," &
"261 (BC_4, *, internal, X)," &
"260 (BC_1, *, internal, X)," &
"259 (BC_4, *, internal, X)," &
"258 (BC_1, *, internal, X)," &
"257 (BC_4, *, internal, X)," &
"256 (BC_1, *, internal, X)," &
"255 (BC_4, *, internal, X)," &
"254 (BC_1, *, internal, X)," &
"253 (BC_4, *, internal, X)," &
"252 (BC_1, *, internal, X)," &
"251 (BC_4, *, internal, X)," &
"250 (BC_1, *, internal, X)," &
"249 (BC_4, *, internal, X)," &
"248 (BC_1, *, internal, X)," &
"247 (BC_4, SD12B, input, X)," &
"246 (BC_1, SD12B, output3, X, 42, 1, Z)," &
"245 (BC_4, SD13B, input, X)," &
"244 (BC_1, SD13B, output3, X, 41, 1, Z)," &
"243 (BC_4, SD14B, input, X)," &
"242 (BC_1, SD14B, output3, X, 40, 1, Z)," &
"241 (BC_4, SD15B, input, X)," &
"240 (BC_1, SD15B, output3, X, 39, 1, Z)," &
"239 (BC_4, SDP1B, input, X)," &
"238 (BC_1, SDP1B, output3, X, 38, 1, Z)," &
"237 (BC_4, SD0B, input, X)," &
"236 (BC_1, SD0B, output3, X, 37, 1, Z)," &
"235 (BC_4, SD1B, input, X)," &
"234 (BC_1, SD1B, output3, X, 36, 1, Z)," &
"233 (BC_4, SD2B, input, X)," &
"232 (BC_1, SD2B, output3, X, 35, 1, Z)," &
"231 (BC_4, SD3B, input, X)," &
"230 (BC_1, SD3B, output3, X, 34, 1, Z)," &
"229 (BC_4, SD4B, input, X)," &
"228 (BC_1, SD4B, output3, X, 33, 1, Z)," &
"227 (BC_4, SD5B, input, X)," &
"226 (BC_1, SD5B, output3, X, 32, 1, Z)," &
"225 (BC_4, SD6B, input, X)," &
"224 (BC_1, SD6B, output3, X, 31, 1, Z)," &
"223 (BC_4, SD7B, input, X)," &
"222 (BC_1, SD7B, output3, X, 30, 1, Z)," &
"221 (BC_4, SDP0B, input, X)," &
"220 (BC_1, SDP0B, output3, X, 29, 1, Z)," &
"219 (BC_4, SATB, input, X)," &
"218 (BC_1, SATB, output3, X, 28, 1, Z)," &
"217 (BC_4, SBSYB, input, X)," &
"216 (BC_1, SBSYB, output3, X, 27, 1, Z)," &
"215 (BC_4, SACKB, input, X)," &
"214 (BC_1, SACKB, output3, X, 26, 1, Z)," &
"213 (BC_4, SRSTB, input, X)," &
"212 (BC_1, SRSTB, output3, X, 25, 1, Z)," &
"211 (BC_4, SMSGB, input, X)," &
"210 (BC_1, SMSGB, output3, X, 24, 1, Z)," &
"209 (BC_4, SSELB, input, X)," &
"208 (BC_1, SSELB, output3, X, 23, 1, Z)," &
"207 (BC_4, SCDB, input, X)," &
"206 (BC_1, SCDB, output3, X, 22, 1, Z)," &
"205 (BC_4, SREQB, input, X)," &
"204 (BC_1, SREQB, output3, X, 21, 1, Z)," &
"203 (BC_4, SIOB, input, X)," &
"202 (BC_1, SIOB, output3, X, 20, 1, Z)," &
"201 (BC_4, SD8B, input, X)," &
"200 (BC_1, SD8B, output3, X, 19, 1, Z)," &
"199 (BC_4, SD9B, input, X)," &
"198 (BC_1, SD9B, output3, X, 18, 1, Z)," &
"197 (BC_4, SD10B, input, X)," &
"196 (BC_1, SD10B, output3, X, 17, 1, Z)," &
"195 (BC_4, SD11B, input, X)," &
"194 (BC_1, SD11B, output3, X, 16, 1, Z)," &
"193 (BC_4, SCLK, input, X)," &
"192 (BC_4, *, internal, X)," &
"191 (BC_1, *, internal, X)," &
"190 (BC_4, *, internal, X)," &
"189 (BC_1, *, internal, X)," &
"188 (BC_4, *, internal, X)," &
"187 (BC_1, *, internal, X)," &
"186 (BC_4, *, internal, X)," &
"185 (BC_1, *, internal, X)," &
"184 (BC_4, *, internal, X)," &
"183 (BC_1, *, internal, X)," &
"182 (BC_4, *, internal, X)," &
"181 (BC_1, *, internal, X)," &
"180 (BC_4, *, internal, X)," &
"179 (BC_1, *, internal, X)," &
"178 (BC_4, AD0, input, X)," &
"177 (BC_1, AD0, output3, X, 14, 0, Z)," &
"176 (BC_4, AD1, input, X)," &
"175 (BC_1, AD1, output3, X, 14, 0, Z)," &
"174 (BC_4, AD2, input, X)," &
"173 (BC_1, AD2, output3, X, 14, 0, Z)," &
"172 (BC_4, AD3, input, X)," &
"171 (BC_1, AD3, output3, X, 14, 0, Z)," &
"170 (BC_4, AD4, input, X)," &
"169 (BC_1, AD4, output3, X, 14, 0, Z)," &
"168 (BC_4, AD5, input, X)," &
"167 (BC_1, AD5, output3, X, 14, 0, Z)," &
"166 (BC_4, AD6, input, X)," &
"165 (BC_1, AD6, output3, X, 14, 0, Z)," &
"164 (BC_4, AD7, input, X)," &
"163 (BC_1, AD7, output3, X, 15, 0, Z)," &
"162 (BC_4, CBEN0, input, X)," &
"161 (BC_1, CBEN0, output3, X, 13, 0, Z)," &
"160 (BC_4, AD8, input, X)," &
"159 (BC_1, AD8, output3, X, 15, 0, Z)," &
"158 (BC_4, AD9, input, X)," &
"157 (BC_1, AD9, output3, X, 15, 0, Z)," &
"156 (BC_4, AD10, input, X)," &
"155 (BC_1, AD10, output3, X, 15, 0, Z)," &
"154 (BC_4, AD11, input, X)," &
"153 (BC_1, AD11, output3, X, 15, 0, Z)," &
"152 (BC_4, AD12, input, X)," &
"151 (BC_1, AD12, output3, X, 15, 0, Z)," &
"150 (BC_4, AD13, input, X)," &
"149 (BC_1, AD13, output3, X, 15, 0, Z)," &
"148 (BC_4, AD14, input, X)," &
"147 (BC_1, AD14, output3, X, 15, 0, Z)," &
"146 (BC_4, AD15, input, X)," &
"145 (BC_1, AD15, output3, X, 15, 0, Z)," &
"144 (BC_4, CBEN1, input, X)," &
"143 (BC_1, CBEN1, output3, X, 13, 0, Z)," &
"142 (BC_4, PAR, input, X)," &
"141 (BC_1, PAR, output3, X, 12, 0, Z)," &
"140 (BC_4, SERRN, input, X)," &
"139 (BC_1, SERRN, output3, X, 11, 0, Z)," &
"138 (BC_4, PERRN, input, X)," &
"137 (BC_1, PERRN, output3, X, 10, 0, Z)," &
"136 (BC_4, STOPN, input, X)," &
"135 (BC_1, STOPN, output3, X, 9, 0, Z)," &
"134 (BC_4, DEVSELN, input, X)," &
"133 (BC_1, DEVSELN, output3, X, 8, 0, Z)," &
"132 (BC_4, TRDYN, input, X)," &
"131 (BC_1, TRDYN, output3, X, 7, 0, Z)," &
"130 (BC_4, IRDYN, input, X)," &
"129 (BC_1, IRDYN, output3, X, 6, 0, Z)," &
"128 (BC_4, FRAMEN, input, X)," &
"127 (BC_1, FRAMEN, output3, X, 5, 0, Z)," &
"126 (BC_4, CBEN2, input, X)," &
"125 (BC_1, CBEN2, output3, X, 13, 0, Z)," &
"124 (BC_4, AD16, input, X)," &
"123 (BC_1, AD16, output3, X, 15, 0, Z)," &
"122 (BC_4, AD17, input, X)," &
"121 (BC_1, AD17, output3, X, 15, 0, Z)," &
"120 (BC_4, AD18, input, X)," &
"119 (BC_1, AD18, output3, X, 15, 0, Z)," &
"118 (BC_4, AD19, input, X)," &
"117 (BC_1, AD19, output3, X, 15, 0, Z)," &
"116 (BC_4, AD20, input, X)," &
"115 (BC_1, AD20, output3, X, 15, 0, Z)," &
"114 (BC_4, AD21, input, X)," &
"113 (BC_1, AD21, output3, X, 15, 0, Z)," &
"112 (BC_4, AD22, input, X)," &
"111 (BC_1, AD22, output3, X, 15, 0, Z)," &
"110 (BC_4, AD23, input, X)," &
"109 (BC_1, AD23, output3, X, 15, 0, Z)," &
"108 (BC_4, IDSEL, input, X)," &
"107 (BC_1, IDSEL, output3, X, 4, 0, Z)," &
"106 (BC_4, CBEN3, input, X)," &
"105 (BC_1, CBEN3, output3, X, 13, 0, Z)," &
"104 (BC_4, AD24, input, X)," &
"103 (BC_1, AD24, output3, X, 15, 0, Z)," &
"102 (BC_4, AD25, input, X)," &
"101 (BC_1, AD25, output3, X, 15, 0, Z)," &
"100 (BC_4, AD26, input, X)," &
"99 (BC_1, AD26, output3, X, 15, 0, Z)," &
"98 (BC_4, AD27, input, X)," &
"97 (BC_1, AD27, output3, X, 15, 0, Z)," &
"96 (BC_4, AD28, input, X)," &
"95 (BC_1, AD28, output3, X, 15, 0, Z)," &
"94 (BC_4, AD29, input, X)," &
"93 (BC_1, AD29, output3, X, 15, 0, Z)," &
"92 (BC_4, AD30, input, X)," &
"91 (BC_1, AD30, output3, X, 15, 0, Z)," &
"90 (BC_4, AD31, input, X)," &
"89 (BC_1, AD31, output3, X, 15, 0, Z)," &
"88 (BC_4, REQN, input, X)," &
"87 (BC_1, REQN, output3, X, 3, 0, Z)," &
"86 (BC_4, GNTN, input, X)," &
"85 (BC_1, GNTN, output3, X, 2, 0, Z)," &
"84 (BC_4, INTAN, input, X)," &
"83 (BC_1, INTAN, output3, X, 1, 0, Z)," &
"82 (BC_4, INTBN, input, X)," &
"81 (BC_1, INTBN, output3, X, 0, 0, Z)," &
"80 (BC_4, *, internal, X)," &
"79 (BC_1, *, internal, X)," &
"78 (BC_4, *, internal, X)," &
"77 (BC_1, *, internal, X)," &
"76 (BC_4, *, internal, X)," &
"75 (BC_1, *, internal, X)," &
"74 (BC_4, *, internal, X)," &
"73 (BC_1, *, internal, X)," &
"72 (BC_4, PCICLK, input, X)," &
"71 (BC_4, RESETN, input, X)," &
-- Output and Bidirectional Contr,l Cells
"70 (BC_1,* , control, 1)," & -- CRS_BS Enable
"69 (BC_1,* , control, 1)," & -- COL_BS Enable
"68 (BC_1,* , control, 1)," & -- TXD3_BS Enable
"67 (BC_1,* , control, 1)," & -- TXD2_BS Enable
"66 (BC_1,* , control, 1)," & -- TXD1_BS Enable
"65 (BC_1,* , control, 1)," & -- TXD0_BS Enable
"64 (BC_1,* , control, 1)," & -- TX_EN_BS Enable
"63 (BC_1,* , control, 1)," & -- TX_CLK_BS Enable
"62 (BC_1,* , control, 1)," & -- TX_ER_BS Enable
"61 (BC_1,* , control, 1)," & -- RX_ER_BS Enable
"60 (BC_1,* , control, 1)," & -- RX_CLK_BS Enable
"59 (BC_1,* , control, 1)," & -- MODE_BS Enable
"58 (BC_1,* , control, 1)," & -- GPIO3_BS Enable
"57 (BC_1,* , control, 1)," & -- RX_DV_BS Enable
"56 (BC_1,* , control, 1)," & -- RXD0_BS Enable
"55 (BC_1,* , control, 1)," & -- RXD1_BS Enable
"54 (BC_1,* , control, 1)," & -- RXD2_BS Enable
"53 (BC_1,* , control, 1)," & -- RXD3_BS Enable
"52 (BC_1,* , control, 1)," & -- MDC_BS Enable
"51 (BC_1,* , control, 1)," & -- MDIO_BS Enable
"50 (BC_1,* , control, 1)," & -- TESTOUT_BS Enable
"49 (BC_1,* , control, 1)," & -- ZMODE_BS Enable
"48 (BC_1,* , control, 1)," & -- MAD_BS Enable
"47 (BC_1,* , control, 1)," & -- MWE_BS Enable
"46 (BC_1,* , control, 1)," & -- GPIO4_BS Enable
"45 (BC_1,* , control, 1)," & -- GPIO2_BS Enable
"44 (BC_1,* , control, 1)," & -- GPIO1_BS Enable
"43 (BC_1,* , control, 1)," & -- GPIO0_BS Enable
"42 (BC_1,* , control, 1)," & -- SD12_BS Enable
"41 (BC_1,* , control, 1)," & -- SD13_BS Enable
"40 (BC_1,* , control, 1)," & -- SD14_BS Enable
"39 (BC_1,* , control, 1)," & -- SD15_BS Enable
"38 (BC_1,* , control, 1)," & -- SDP1_BS Enable
"37 (BC_1,* , control, 1)," & -- SD0_BS Enable
"36 (BC_1,* , control, 1)," & -- SD1_BS Enable
"35 (BC_1,* , control, 1)," & -- SD2_BS Enable
"34 (BC_1,* , control, 1)," & -- SD3_BS Enable
"33 (BC_1,* , control, 1)," & -- SD4_BS Enable
"32 (BC_1,* , control, 1)," & -- SD5_BS Enable
"31 (BC_1,* , control, 1)," & -- SD6_BS Enable
"30 (BC_1,* , control, 1)," & -- SD7_BS Enable
"29 (BC_1,* , control, 1)," & -- SDP0_BS Enable
"28 (BC_1,* , control, 1)," & -- SATN_BS Enable
"27 (BC_1,* , control, 1)," & -- SBSY_BS Enable
"26 (BC_1,* , control, 1)," & -- SACK_BS Enable
"25 (BC_1,* , control, 1)," & -- SRST_BS Enable
"24 (BC_1,* , control, 1)," & -- SMSG_BS Enable
"23 (BC_1,* , control, 1)," & -- SSEL_BS Enable
"22 (BC_1,* , control, 1)," & -- SCD_BS Enable
"21 (BC_1,* , control, 1)," & -- SREQ_BS Enable
"20 (BC_1,* , control, 1)," & -- SIO_BS Enable
"19 (BC_1,* , control, 1)," & -- SD8_BS Enable
"18 (BC_1,* , control, 1)," & -- SD9_BS Enable
"17 (BC_1,* , control, 1)," & -- SD10_BS Enable
"16 (BC_1,* , control, 1)," & -- SD11_BS Enable
"15 (BC_1,* , control, 0)," & -- AD_BS Enable_31_7
"14 (BC_1,* , control, 0)," & -- AD_BS Enable_6_0
"13 (BC_1,* , control, 0)," & -- CBEN_BS Enable
"12 (BC_1,* , control, 0)," & -- PAR_BS Enable
"11 (BC_1,* , control, 0)," & -- SERR_BS Enable
"10 (BC_1,* , control, 0)," & -- PERR_BS Enable
"9 (BC_1,* , control, 0)," & -- STOP_BS Enable
"8 (BC_1,* , control, 0)," & -- DEVSEL_BS Enable
"7 (BC_1,* , control, 0)," & -- TRDY_BS Enable
"6 (BC_1,* , control, 0)," & -- IRDY_BS Enable
"5 (BC_1,* , control, 0)," & -- FRAME_BS Enable
"4 (BC_1,* , control, 0)," & -- IDSEL_BS Enable
"3 (BC_1,* , control, 0)," & -- REQ_BS Enable
"2 (BC_1,* , control, 0)," & -- GNT_BS Enable
"1 (BC_1,* , control, 1)," & -- INTA_BS Enable
"0 (BC_1,* , control, 1)"; -- INTB_BS Enable
-- =================================================================================
--
-- RESET CONTROL DESIGN WARNING
--
-- =================================================================================
attribute DESIGN_WARNING of SYM_53C885Q160 : entity is
"Asserting RSTN low (0) will tri-state the SCSI bus output drivers " &
"regardless of the state of the control cells for the SCSI output " &
"drivers. This behavior is required in the SCSI specification. ";
END SYM_53C885Q160;
-- ================================= END BSDL ======================================