BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: AM79C960

	--
--   BSDL File created/edited by AT&T BSD Editor
--
--BSDE:Revision: Rev B3
--BSDE:Description: BSDL file for Am79C960 PCnet-ISA Rev B3 silicon
--BSDE:Comments: /* a) XTAL2 output does not have a B-S cell.
--                * b) IRQ (B-S cell 75) has an associated control cell B-S 74.
--                *      When 74 is logical 1, IRQ is full CMOS driver.
--                *      When B-S 74 is logical 0, IRQ is an open drain driver.
--                * c)  Analog outputs (i.e. DO1, DO0, TXD1, TXD0, TXP1, TXP0, 
--                *       RXD1 and  RXD0) are always driven as differential pairs.
--                *      There is only one B-S cell for each differential pair.
--                * d) Analog inputs are always sampled as diffrential inputs.
--                *      There is only one B-S cell for each differential pair.
--                *      
--                */

entity AM79C960 is

generic (PHYSICAL_PIN_MAP : string := "PQFP_120" );

port (
	AEN: in bit;
	APCSL: out bit;
	AVDD: linkage bit_vector (1 to 4);
	AVSS: linkage bit_vector (1 to 2);
	BPCSL: out bit;
	CI0: linkage bit;
	CI1: in bit;
	DACKL: inout bit;
	DI0: linkage bit;
	DI1: in bit;
	DO0: linkage bit;
	DO1: out bit;
	DRQ: out bit;
	DVDD: linkage bit_vector (1 to 6);
	DVSS: linkage bit_vector (1 to 12);
	DXCVR: out bit;
	IOAM: in bit_vector (0 to 1);
	IOCHRDY: out bit;
	IOCS16L: out bit;
	IORL: in bit;
	IOWL: in bit;
	IRQ: out bit;
	LA: inout bit_vector (17 to 23);
	LEDL0: out bit;
	LEDL1: out bit;
	LEDL2: out bit;
	LEDL3: out bit;
	MASTERL: out bit;
	MAUSEL: in bit;
	MEMRL: inout bit;
	MEMWL: inout bit;
	PRDB: inout bit_vector (0 to 7);
	REFL: in bit;
	RESET: in bit;
	RXD0: linkage bit;
	RXD1: in bit;
	SA: inout bit_vector (0 to 19);
	SBHEL: inout bit;
	SD: inout bit_vector (0 to 15);
	SLEEPL: in bit;
	SMEMRL: in bit;
	TCK: in bit;
	TDI: in bit;
	TDO: out bit;
	TEL: in bit;
	TMS: in bit;
	TXD0: linkage bit;
	TXD1: out bit;
	TXP0: linkage bit;
	TXP1: out bit;
	XTAL1: in bit;
	XTAL2: linkage bit
);

use STD_1149_1_1990.all;

attribute PIN_MAP of AM79C960 : entity is PHYSICAL_PIN_MAP;

constant PQFP_120: PIN_MAP_STRING:=
	"AEN:53," &
	"APCSL:3," &
	"AVDD:(94,99,87,82)," &
	"AVSS:(91,89)," &
	"BPCSL:4," &
	"CI0:97," &
	"CI1:98," &
	"DACKL:44," &
	"DI0:95," &
	"DI1:96," &
	"DO0:92," &
	"DO1:93," &
	"DRQ:42," &
	"DVDD:(107,1,29,46,59,69)," &
	"DVSS:(104,113,8,16,25,34,43,64,74,20," &
		"52,79)," &
	"DXCVR:100," &
	"IOAM:(57,58)," &
	"IOCHRDY:54," &
	"IOCS16L:45," &
	"IORL:49," &
	"IOWL:50," &
	"IRQ:47," &
	"LA:(5,6,7,9,10,11,12)," &
	"LEDL0:106," &
	"LEDL1:105," &
	"LEDL2:103," &
	"LEDL3:102," &
	"MASTERL:41," &
	"MAUSEL:101," &
	"MEMRL:40," &
	"MEMWL:39," &
	"PRDB:(116,115,114,112,111,110,109,108)," &
	"REFL:48," &
	"RESET:55," &
	"RXD0:80," &
	"RXD1:81," &
	"SA:(14,15,17,18,19,21,22,23,24,26," &
		"27,28,30,31,32,33,35,36,37,38)," &
	"SBHEL:13," &
	"SD:(60,62,65,67,70,72,75,77,61,63," &
		"66,68,71,73,76,78)," &
	"SLEEPL:56," &
	"SMEMRL:51," &
	"TCK:120," &
	"TDI:117," &
	"TDO:118," &
	"TEL:2," &
	"TMS:119," &
	"TXD0:84," &
	"TXD1:86," &
	"TXP0:83," &
	"TXP1:85," &
	"XTAL1:88," &
	"XTAL2:90";

attribute TAP_SCAN_IN    of TDI : signal is true;
attribute TAP_SCAN_OUT   of TDO : signal is true;
attribute TAP_SCAN_MODE  of TMS : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (1.00e+07, BOTH);
attribute INSTRUCTION_LENGTH of AM79C960 : entity is 4;

attribute INSTRUCTION_OPCODE of AM79C960 : entity is
	"BYPASS ( 1111)," &
	"EXTEST ( 0000)," &
	"IDCODE ( 0001)," &
	"PRIVATE ( 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100," &
		" 1101, 1110)," &
	"SAMPLE ( 0010)," &
	"SETBYP ( 0100)," &
	"TRIBYP ( 0011)" ;

attribute INSTRUCTION_CAPTURE of AM79C960 : entity is "0001";

attribute INSTRUCTION_DISABLE of AM79C960 : entity is "TRIBYP";

attribute INSTRUCTION_PRIVATE of AM79C960 : entity is
	" PRIVATE";

attribute IDCODE_REGISTER of AM79C960 : entity is
	"0100" &		-- version
	"0000000000000011" &	-- part number
	"00000000001" &		-- manufacturer's id
	"1";			-- required by standard

attribute REGISTER_ACCESS of AM79C960 : entity is
	"BYPASS ( BYPASS, SETBYP, TRIBYP)," &
	"BOUNDARY ( EXTEST, SAMPLE)," &
	"IDCODE ( IDCODE)";

attribute BOUNDARY_CELLS of AM79C960 : entity is
	" BC_1, BC_4";

attribute BOUNDARY_LENGTH of AM79C960 : entity is 153;

attribute BOUNDARY_REGISTER of AM79C960 : entity is
	"   0 (BC_1, PRDB(0), output3, X, 96, 0, Z)," &
	"   1 (BC_1, PRDB(0), input, 0)," &
	"   2 (BC_1, PRDB(1), output3, X, 96, 0, Z)," &
	"   3 (BC_1, PRDB(1), input, 0)," &
	"   4 (BC_1, PRDB(2), output3, X, 96, 0, Z)," &
	"   5 (BC_1, PRDB(2), input, 0)," &
	"   6 (BC_1, PRDB(3), output3, X, 96, 0, Z)," &
	"   7 (BC_1, PRDB(3), input, 0)," &
	"   8 (BC_1, PRDB(4), output3, X, 96, 0, Z)," &
	"   9 (BC_1, PRDB(4), input, 0)," &
	"  10 (BC_1, PRDB(5), output3, X, 96, 0, Z)," &
	"  11 (BC_1, PRDB(5), input, 0)," &
	"  12 (BC_1, PRDB(6), output3, X, 96, 0, Z)," &
	"  13 (BC_1, PRDB(6), input, 0)," &
	"  14 (BC_1, PRDB(7), output3, X, 96, 0, Z)," &
	"  15 (BC_1, PRDB(7), input, 0)," &
	"  16 (BC_1, LEDL0, output2, 0)," &
	"  17 (BC_1, LEDL1, output2, 0)," &
	"  18 (BC_1, LEDL2, output2, 0)," &
	"  19 (BC_1, LEDL3, output2, 0)," &
	"  20 (BC_1, MAUSEL, input, 1)," &
	"  21 (BC_1, DXCVR, output2, X)," &
	"  22 (BC_4, XTAL1, clock, 0)," &
	"  23 (BC_1, RXD1, input, 1)," &
	"  24 (BC_1, *, control, 0)," &
	"  25 (BC_1, TXP1, output3, X, 24, 0, Z)," &
	"  26 (BC_1, TXD1, output3, X, 24, 0, Z)," &
	"  27 (BC_1, *, control, 0)," &
	"  28 (BC_1, DO1, output3, X, 27, 0, Z)," &
	"  29 (BC_4, DI1, input, 1)," &
	"  30 (BC_4, CI1, input, 1)," &
	"  31 (BC_1, SD(15), output3, X, 97, 0, Z)," &
	"  32 (BC_1, SD(15), input, X)," &
	"  33 (BC_1, SD(7), output3, X, 98, 0, Z)," &
	"  34 (BC_1, SD(7), input, X)," &
	"  35 (BC_1, SD(14), output3, X, 97, 0, Z)," &
	"  36 (BC_1, SD(14), input, X)," &
	"  37 (BC_1, SD(6), output3, X, 98, 0, Z)," &
	"  38 (BC_1, SD(6), input, X)," &
	"  39 (BC_1, SD(13), output3, X, 97, 0, Z)," &
	"  40 (BC_1, SD(13), input, X)," &
	"  41 (BC_1, SD(5), output3, X, 98, 0, Z)," &
	"  42 (BC_1, SD(5), input, X)," &
	"  43 (BC_1, SD(12), output3, X, 97, 0, Z)," &
	"  44 (BC_1, SD(12), input, X)," &
	"  45 (BC_1, SD(4), output3, X, 98, 0, Z)," &
	"  46 (BC_1, SD(4), input, X)," &
	"  47 (BC_1, SD(11), output3, X, 97, 0, Z)," &
	"  48 (BC_1, SD(11), input, X)," &
	"  49 (BC_1, SD(3), output3, X, 98, 0, Z)," &
	"  50 (BC_1, SD(3), input, X)," &
	"  51 (BC_1, SD(10), output3, X, 97, 0, Z)," &
	"  52 (BC_1, SD(10), input, X)," &
	"  53 (BC_1, SD(2), output3, X, 98, 0, Z)," &
	"  54 (BC_1, SD(2), input, X)," &
	"  55 (BC_1, SD(9), output3, X, 97, 0, Z)," &
	"  56 (BC_1, SD(9), input, X)," &
	"  57 (BC_1, SD(1), output3, X, 98, 0, Z)," &
	"  58 (BC_1, SD(1), input, X)," &
	"  59 (BC_1, SD(8), output3, X, 97, 0, Z)," &
	"  60 (BC_1, SD(8), input, X)," &
	"  61 (BC_1, SD(0), output3, X, 98, 0, Z)," &
	"  62 (BC_1, SD(0), input, X)," &
	"  63 (BC_1, IOAM(1), input, 1)," &
	"  64 (BC_1, IOAM(0), input, 1)," &
	"  65 (BC_1, SLEEPL, input, 1)," &
	"  66 (BC_1, RESET, input, 0)," &
	"  67 (BC_1, IOCHRDY, output2, X)," &
	"  68 (BC_1, *, input, X)," &
	"  69 (BC_1, AEN, input, X)," &
	"  70 (BC_1, SMEMRL, input, 1)," &
	"  71 (BC_1, IOWL, input, X)," &
	"  72 (BC_1, IORL, input, X)," &
	"  73 (BC_1, REFL, input, X)," &
	"  74 (BC_1, *, control, 0)," &
	"  75 (BC_1, IRQ, output3, X, 74, 0, Z)," &
	"  76 (BC_1, IOCS16L, output2, X)," &
	"  77 (BC_1, *, input, X)," &
	"  78 (BC_1, DACKL, output3, X, 95, 0, Z)," &
	"  79 (BC_1, DACKL, input, 1)," &
	"  80 (BC_1, DRQ, output2, 1)," &
	"  81 (BC_1, MASTERL, output2, X)," &
	"  82 (BC_1, *, input, X)," &
	"  83 (BC_1, MEMRL, output3, X, 99, 0, Z)," &
	"  84 (BC_1, MEMRL, input, X)," &
	"  85 (BC_1, MEMWL, output3, X, 99, 0, Z)," &
	"  86 (BC_1, MEMWL, input, X)," &
	"  87 (BC_1, SA(19), output3, X, 101, 0, Z)," &
	"  88 (BC_1, SA(19), input, X)," &
	"  89 (BC_1, SA(18), output3, X, 99, 0, Z)," &
	"  90 (BC_1, SA(18), input, X)," &
	"  91 (BC_1, SA(17), output3, X, 99, 0, Z)," &
	"  92 (BC_1, SA(17), input, X)," &
	"  93 (BC_1, SA(16), output3, X, 99, 0, Z)," &
	"  94 (BC_1, SA(16), input, X)," &
	"  95 (BC_1, *, control, 0)," &
	"  96 (BC_1, *, control, 0)," &
	"  97 (BC_1, *, control, 0)," &
	"  98 (BC_1, *, control, 0)," &
	"  99 (BC_1, *, control, 0)," &
	" 100 (BC_1, *, control, 0)," &
	" 101 (BC_1, *, control, 0)," &
	" 102 (BC_1, SA(15), output3, X, 100, 0, Z)," &
	" 103 (BC_1, SA(15), input, X)," &
	" 104 (BC_1, SA(14), output3, X, 100, 0, Z)," &
	" 105 (BC_1, SA(14), input, X)," &
	" 106 (BC_1, SA(13), output3, X, 100, 0, Z)," &
	" 107 (BC_1, SA(13), input, X)," &
	" 108 (BC_1, SA(12), output3, X, 100, 0, Z)," &
	" 109 (BC_1, SA(12), input, X)," &
	" 110 (BC_1, SA(11), output3, X, 100, 0, Z)," &
	" 111 (BC_1, SA(11), input, X)," &
	" 112 (BC_1, SA(10), output3, X, 100, 0, Z)," &
	" 113 (BC_1, SA(10), input, X)," &
	" 114 (BC_1, SA(9), output3, X, 101, 0, Z)," &
	" 115 (BC_1, SA(9), input, X)," &
	" 116 (BC_1, SA(8), output3, X, 101, 0, Z)," &
	" 117 (BC_1, SA(8), input, X)," &
	" 118 (BC_1, SA(7), output3, X, 101, 0, Z)," &
	" 119 (BC_1, SA(7), input, X)," &
	" 120 (BC_1, SA(6), output3, X, 101, 0, Z)," &
	" 121 (BC_1, SA(6), input, X)," &
	" 122 (BC_1, SA(5), output3, X, 101, 0, Z)," &
	" 123 (BC_1, SA(5), input, X)," &
	" 124 (BC_1, SA(4), output3, X, 101, 0, Z)," &
	" 125 (BC_1, SA(4), input, X)," &
	" 126 (BC_1, SA(3), output3, X, 101, 0, Z)," &
	" 127 (BC_1, SA(3), input, X)," &
	" 128 (BC_1, SA(2), output3, X, 101, 0, Z)," &
	" 129 (BC_1, SA(2), input, X)," &
	" 130 (BC_1, SA(1), output3, X, 101, 0, Z)," &
	" 131 (BC_1, SA(1), input, X)," &
	" 132 (BC_1, SA(0), output3, X, 101, 0, Z)," &
	" 133 (BC_1, SA(0), input, X)," &
	" 134 (BC_1, SBHEL, output3, X, 99, 0, Z)," &
	" 135 (BC_1, SBHEL, input, 1)," &
	" 136 (BC_1, LA(23), output3, X, 99, 0, Z)," &
	" 137 (BC_1, LA(23), input, X)," &
	" 138 (BC_1, LA(22), output3, X, 99, 0, Z)," &
	" 139 (BC_1, LA(22), input, X)," &
	" 140 (BC_1, LA(21), output3, X, 99, 0, Z)," &
	" 141 (BC_1, LA(21), input, X)," &
	" 142 (BC_1, LA(20), output3, X, 99, 0, Z)," &
	" 143 (BC_1, LA(20), input, X)," &
	" 144 (BC_1, LA(19), output3, X, 99, 0, Z)," &
	" 145 (BC_1, LA(19), input, X)," &
	" 146 (BC_1, LA(18), output3, X, 99, 0, Z)," &
	" 147 (BC_1, LA(18), input, X)," &
	" 148 (BC_1, LA(17), output3, X, 99, 0, Z)," &
	" 149 (BC_1, LA(17), input, X)," &
	" 150 (BC_1, BPCSL, output2, 0)," &
	" 151 (BC_1, APCSL, output2, 0)," &
	" 152 (BC_1, TEL, input, 1)";

attribute DESIGN_WARNING of AM79C960 : entity is
	"A) TAPDANCE MAY NOT BE ABLE TO HANDLE THE ANALOG" &
	"     I/O'S IN DIFFRENTIAL PAIR CONFIGURATION. IN THAT CASE," &
	"     USE THE POSITIVE VALUES ONLY.  ";

end AM79C960;