BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: asic_top

-- Generated by boundaryScanGenerate 2015.3      Mon Aug 24 21:10:32 GMT 2015 on 01/19/17 14:33:05
-- BSDL Version 2001

entity asic_top is 
    generic (PHYSICAL_PIN_MAP : string := "DEFAULT_PACKAGE_NAME");

    port (
        -- Port List
          OSCI      	      : linkage   bit;
          OSCO      	      : linkage   bit;
          OSCVDD12  	      : linkage   bit;
          OSCVSS 	      : linkage   bit;
          VDD33 	      : linkage   bit;
          VDDCR 	      : linkage   bit_vector(1 to 3);
          REG_EN       	      : linkage   bit;
          FXLOSEN      	      : linkage   bit;
          FXSDA_FXSENA 	      : linkage   bit; 
          FXSDB_FXSENB 	      : linkage   bit;
          NRST         	      : in        bit;
          GPIO7   	      : inout     bit;
          GPIO6   	      : inout     bit;
          D2_AD2_SIO2         : inout     bit;
          D1_AD1_SO_SIO1      : inout     bit;
          VDDIO               : linkage   bit_vector(1 to 5);
          D14_AD14            : inout     bit;
          D13_AD13            : inout     bit;
          D0_AD0_SI_SIO0      : inout     bit;
          PME                 : inout     bit;
          GP5_LED5_PHYADD     : inout     bit;
          GP4_LED4_1588EN     : inout     bit;
          D9_AD9_SCK          : inout     bit;
          D12_AD12            : inout     bit;
          D11_AD11            : inout     bit;
          D10_AD10            : inout     bit;
          A1_ALELO            : inout     bit;
          A3_MNGT2            : inout     bit;
          A4_MNGT3            : inout     bit;
          CS                  : inout     bit;
          A2_ALEHI            : inout     bit;
          WR_ENB              : inout     bit;
          RD_WR               : inout     bit;
          A0_D15              : inout     bit;
          GPIO3_LED3          : inout     bit;
          FIFOSEL             : inout     bit;
          D3_AD3_SIO3         : inout     bit;
          D6_AD6              : inout     bit;
          D7_AD7              : inout     bit;
          D8_AD8              : inout     bit;
          TESTMODE            : in        bit;
          EESDA_TMS           : in        bit;
          EESCL_TCK           : in        bit;
          IRQ                 : inout     bit;
          GP_LED2_POL_E2PS    : inout     bit;
          GP_LED_TD_POL_M1    : in        bit;
          GP_LED_TD_POL_M0    : out       bit;
          NC                  : linkage   bit_vector(1 to 3);
          D4_AD4              : inout     bit;
          D5_AD5_SCS          : inout     bit;
          VDD33TXRX1          : linkage   bit;
          TXNA                : linkage   bit;
          TXPA                : linkage   bit;
          RXNA                : linkage   bit;
          RXPA                : linkage   bit;
          VDD12TX1            : linkage   bit;
          RBIAS               : linkage   bit;
          VDD33BIAS           : linkage   bit;
          VDD12TX2            : linkage   bit;
          RXPB                : linkage   bit;
          RXNB                : linkage   bit;
          TXPB                : linkage   bit;
          TXNB                : linkage   bit;
          VDD33TXRX2          : linkage   bit);

    use STD_1149_1_2001.all;
    use LVS_BSCAN_CELLS.all;

    attribute COMPONENT_CONFORMANCE of asic_top: entity is "STD_1149_1_2001";

    --Pin mappings

    attribute PIN_MAP of asic_top: entity is PHYSICAL_PIN_MAP;

    constant DEFAULT_PACKAGE_NAME: PIN_MAP_STRING := 
          "OSCI              : 1                 , " &
          "OSCO              : 2                 , " &
          "OSCVDD12          : 3                 , " &
          "OSCVSS            : 4                 , " &
          "VDD33             : 5                 , " &
          "VDDCR             : (6,28,43)         , " &
          "REG_EN            : 7                 , " &
          "FXLOSEN           : 8                 , " &
          "FXSDA_FXSENA      : 9                 , " &
          "FXSDB_FXSENB      : 10                , " &
          "NRST              : 11                , " &
          "GPIO7   	     : 12                , " &
          "GPIO6   	     : 13                , " &
          "D2_AD2_SIO2       : 14                , " &
          "D1_AD1_SO_SIO1    : 15                , " &
          "VDDIO             : (16,24,36,42,52)  , " &
          "D14_AD14          : 17                , " &
          "D13_AD13    	     : 18                , " &
          "D0_AD0_SI_SIO0    : 19                , " &
          "PME    	     : 20                , " &
          "GP5_LED5_PHYADD   : 21                , " &
          "GP4_LED4_1588EN   : 22                , " &
          "D9_AD9_SCK        : 23                , " &
          "D12_AD12          : 25                , " &
          "D11_AD11          : 26                , " &
          "D10_AD10          : 27                , " &
          "A1_ALELO          : 29                , " &
          "A3_MNGT2          : 30                , " &
          "A4_MNGT3          : 31                , " &
          "CS   	     : 32                , " &
          "A2_ALEHI          : 33                , " &
          "WR_ENB            : 34                , " &
          "RD_WR             : 35                , " &
          "A0_D15            : 37                , " &
          "GPIO3_LED3        : 38                , " &
          "FIFOSEL           : 39                , " &
          "D3_AD3_SIO3       : 40                , " &
          "D6_AD6            : 41                , " &
          "D7_AD7            : 44                , " &
          "D8_AD8            : 45                , " &
          "TESTMODE          : 46                , " &
          "EESDA_TMS         : 47                , " &
          "EESCL_TCK         : 48                , " &
          "IRQ    	     : 49                , " &
          "GP_LED2_POL_E2PS  : 50                , " &
          "GP_LED_TD_POL_M1  : 51                , " &
          "GP_LED_TD_POL_M0  : 53                , " &
          "NC                : (54,57,58)        , " &
          "D4_AD4            : 55                , " &
          "D5_AD5_SCS        : 56                , " &
          "VDD33TXRX1        : 59                , " &
          "TXNA              : 60                , " &
          "TXPA              : 61                , " &
          "RXNA              : 62                , " &
          "RXPA              : 63                , " &
          "VDD12TX1          : 64                , " &
          "RBIAS             : 65                , " &
          "VDD33BIAS         : 66                , " &
          "VDD12TX2          : 67                , " &
          "RXPB              : 68                , " &
          "RXNB              : 69                , " &
          "TXPB              : 70                , " &
          "TXNB              : 71                , " &
          "VDD33TXRX2        : 72                  " ;
        

   attribute TAP_SCAN_RESET of NRST                         : signal is true;
   attribute TAP_SCAN_IN    of GP_LED_TD_POL_M1             : signal is true;
   attribute TAP_SCAN_MODE  of EESDA_TMS                    : signal is true;
   attribute TAP_SCAN_OUT   of GP_LED_TD_POL_M0             : signal is true;
   attribute TAP_SCAN_CLOCK of EESCL_TCK                    : signal is (1.0000000000000000000e+08, BOTH);

   attribute INSTRUCTION_LENGTH of asic_top: entity is 35;
 
   attribute INSTRUCTION_OPCODE of asic_top: entity is
      "IDCODE       (11111111111111101011111111111111110)," &
      "BYPASS       (11111111111111101011111111111111111)," &
      "EXTEST       (11111111111111101011111111111101000)," &
      "SAMPLE       (11111111111111101011111111111111000)," &
      "PRELOAD      (11111111111111101011111111111111000)," &
      "HIGHZ        (11111111111111101011111111111001111)," &
      "CLAMP        (11111111111111101011111111111101111) " ;
 
   attribute INSTRUCTION_CAPTURE of asic_top: entity is "xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx01";
 
   attribute IDCODE_REGISTER of asic_top: entity is
      "0000"             & -- version
      "0000000100010001" & -- part number
      "01000100010"      & -- manufacturer's identity
      "1";                   -- required by 1149.1
 
   attribute REGISTER_ACCESS of asic_top: entity is
      "DEVICE_ID    ( IDCODE ), " &
      "BOUNDARY     ( SAMPLE, PRELOAD, EXTEST )," &
      "BYPASS       ( HIGHZ, CLAMP, BYPASS ) " ;


    --Boundary scan definition
    attribute BOUNDARY_LENGTH of asic_top: entity is 68;

    attribute BOUNDARY_REGISTER of asic_top: entity is 
    -- num  cell         port               function       safe     [ccell disval  rslt]
    "  67   (BC_0       , *                , internal     , X   )                         ,"&
    "  66   (BC_0       , *                , internal     , X   )                         ,"&
    "  65   (BC_0       , *                , internal     , X   )                         ,"&
    "  64   (BC_0       , *                , internal     , X   )                         ,"&
    "  63   (BC_2       , *                , control      , 1   )                         ,"&
    "  62   (LV_BC_7    , GPIO7            , bidir        , X    ,   63    , 1     , Z   ),"&
    "  61   (BC_2       , *                , control      , 1   )                         ,"&
    "  60   (LV_BC_7    , GPIO6            , bidir        , X    ,   61    , 1     , Z   ),"&
    "  59   (BC_2       , *                , control      , 1   )                         ,"&
    "  58   (LV_BC_7    , D2_AD2_SIO2      , bidir        , X    ,   59    , 1     , Z   ),"&
    "  57   (BC_2       , *                , control      , 1   )                         ,"&
    "  56   (LV_BC_7    , D1_AD1_SO_SIO1   , bidir        , X    ,   57    , 1     , Z   ),"&
    "  55   (BC_2       , *                , control      , 1   )                         ,"&
    "  54   (LV_BC_7    , D14_AD14         , bidir        , X    ,   55    , 1     , Z   ),"&
    "  53   (BC_2       , *                , control      , 1   )                         ,"&
    "  52   (LV_BC_7    , D13_AD13         , bidir        , X    ,   53    , 1     , Z   ),"&
    "  51   (BC_2       , *                , control      , 1   )                         ,"&
    "  50   (LV_BC_7    , D0_AD0_SI_SIO0   , bidir        , X    ,   51    , 1     , Z   ),"&
    "  49   (BC_2       , *                , control      , 1   )                         ,"&
    "  48   (LV_BC_7    , PME              , bidir        , X    ,   49    , 1     , Z   ),"&
    "  47   (BC_2       , *                , control      , 1   )                         ,"&
    "  46   (LV_BC_7    , GP5_LED5_PHYADD  , bidir        , X    ,   47    , 1     , Z   ),"&
    "  45   (BC_2       , *                , control      , 1   )                         ,"&
    "  44   (LV_BC_7    , GP4_LED4_1588EN  , bidir        , X    ,   45    , 1     , Z   ),"&
    "  43   (BC_2       , *                , control      , 1   )                         ,"&
    "  42   (LV_BC_7    , D9_AD9_SCK       , bidir        , X    ,   43    , 1     , Z   ),"&
    "  41   (BC_2       , *                , control      , 1   )                         ,"&
    "  40   (LV_BC_7    , D12_AD12         , bidir        , X    ,   41    , 1     , Z   ),"&
    "  39   (BC_2       , *                , control      , 1   )                         ,"&
    "  38   (LV_BC_7    , D11_AD11         , bidir        , X    ,   39    , 1     , Z   ),"&
    "  37   (BC_2       , *                , control      , 1   )                         ,"&
    "  36   (LV_BC_7    , D10_AD10         , bidir        , X    ,   37    , 1     , Z   ),"&
    "  35   (BC_2       , *                , control      , 1   )                         ,"&
    "  34   (LV_BC_7    , A1_ALELO         , bidir        , X    ,   35    , 1     , Z   ),"&
    "  33   (BC_2       , *                , control      , 1   )                         ,"&
    "  32   (LV_BC_7    , A3_MNGT2         , bidir        , X    ,   33    , 1     , Z   ),"&
    "  31   (BC_2       , *                , control      , 1   )                         ,"&
    "  30   (LV_BC_7    , A4_MNGT3         , bidir        , X    ,   31    , 1     , Z   ),"&
    "  29   (BC_2       , *                , control      , 1   )                         ,"&
    "  28   (LV_BC_7    , CS               , bidir        , X    ,   29    , 1     , Z   ),"&
    "  27   (BC_2       , *                , control      , 1   )                         ,"&
    "  26   (LV_BC_7    , A2_ALEHI         , bidir        , X    ,   27    , 1     , Z   ),"&
    "  25   (BC_2       , *                , control      , 1   )                         ,"&
    "  24   (LV_BC_7    , WR_ENB           , bidir        , X    ,   25    , 1     , Z   ),"&
    "  23   (BC_2       , *                , control      , 1   )                         ,"&
    "  22   (LV_BC_7    , RD_WR            , bidir        , X    ,   23    , 1     , Z   ),"&
    "  21   (BC_2       , *                , control      , 1   )                         ,"&
    "  20   (LV_BC_7    , A0_D15           , bidir        , X    ,   21    , 1     , Z   ),"&
    "  19   (BC_2       , *                , control      , 1   )                         ,"&
    "  18   (LV_BC_7    , GPIO3_LED3       , bidir        , X    ,   19    , 1     , Z   ),"&
    "  17   (BC_2       , *                , control      , 1   )                         ,"&
    "  16   (LV_BC_7    , FIFOSEL          , bidir        , X    ,   17    , 1     , Z   ),"&
    "  15   (BC_2       , *                , control      , 1   )                         ,"&
    "  14   (LV_BC_7    , D3_AD3_SIO3      , bidir        , X    ,   15    , 1     , Z   ),"&
    "  13   (BC_2       , *                , control      , 1   )                         ,"&
    "  12   (LV_BC_7    , D6_AD6           , bidir        , X    ,   13    , 1     , Z   ),"&
    "  11   (BC_2       , *                , control      , 1   )                         ,"&
    "  10   (LV_BC_7    , D7_AD7           , bidir        , X    ,   11    , 1     , Z   ),"&
    "  9   (BC_2        , *                , control      , 1   )                         ,"&
    "  8   (LV_BC_7     , D8_AD8           , bidir        , X    ,   9     , 1     , Z   ),"&
    "  7   (BC_2        , *                , control      , 1   )                         ,"&
    "  6   (LV_BC_7     , IRQ              , bidir        , X    ,   7     , 1     , Z   ),"&
    "  5   (BC_2        , *                , control      , 1   )                         ,"&
    "  4   (LV_BC_7     , GP_LED2_POL_E2PS , bidir        , X    ,   5     , 1     , Z   ),"&
    "  3   (BC_2        , *                , control      , 1   )                         ,"&
    "  2   (LV_BC_7     , D4_AD4           , bidir        , X    ,   3     , 1     , Z   ),"&
    "  1   (BC_2        , *                , control      , 1   )                         ,"&
    "  0   (LV_BC_7     , D5_AD5_SCS       , bidir        , X    ,   1     , 1     , Z   )";

end asic_top;