-- Freescale A D V T J T A G S O F T W A R E
-- BSDL File Generated: Feb 15, 2006
--
-- Revision History:
-- 10-14-05: Edited for correct pin_map_string - CAC
-- 02-15-06: Updated IDCODE value for MCF5274L - CAC
entity MCF5274L is
generic (PHYSICAL_PIN_MAP : string := "MAPBGA_196");
port ( a: inout bit_vector(0 to 23);
bs_b: inout bit_vector(2 to 3);
oe_b: inout bit;
rwb: inout bit;
ta_b: inout bit;
ts_b: inout bit;
tsiz: inout bit_vector(0 to 1);
cs_b: inout bit_vector(0 to 7);
extal: linkage bit;
xtal: linkage bit;
d: inout bit_vector(16 to 31);
eim_clk: inout bit;
pst: inout bit_vector(0 to 3);
ddata: inout bit_vector(0 to 3);
clkout: inout bit;
clkout_b: inout bit;
sd_a10: inout bit;
sd_cas_b: inout bit;
sd_cke: inout bit;
sd_cs_b: inout bit_vector(0 to 1);
sd_dqs: inout bit_vector(2 to 3);
sd_ras_b: inout bit;
sd_vref: linkage bit_vector(0 to 1);
sd_we_b: inout bit;
fec0_mdc: inout bit;
fec0_mdio: inout bit;
fec0_col: inout bit;
fec0_crs: inout bit;
fec0_rxclk: inout bit;
fec0_rxdv: inout bit;
fec0_rxd: inout bit_vector(0 to 3);
fec0_rxer: inout bit;
fec0_txclk: inout bit;
fec0_txen: inout bit;
fec0_txer: inout bit;
fec0_txd: inout bit_vector(0 to 3);
irq_b: inout bit_vector(1 to 7);
jtag_en: in bit;
tclk: in bit;
tdi: in bit;
tdo: out bit;
tms: in bit;
trst_b: in bit;
clkmod: inout bit_vector(0 to 1);
rcon_b: inout bit;
pcs: inout bit_vector(0 to 3);
qsdo: inout bit;
qsdi: inout bit;
sck: inout bit;
rstin_b: inout bit;
rstout_b: inout bit;
test: in bit;
tin3: inout bit;
tout3: inout bit;
tin2: inout bit;
tout2: inout bit;
tin1: inout bit;
tout1: inout bit;
tin0: inout bit;
tout0: inout bit;
cts1_b: inout bit;
cts0_b: inout bit;
rts1_b: inout bit;
rts0_b: inout bit;
rxd1: inout bit;
rxd0: inout bit;
txd1: inout bit;
txd0: inout bit;
scl: inout bit;
sda: inout bit;
vddpll: linkage bit;
vsspll: linkage bit;
vddio: linkage bit_vector(0 to 11);
vssio: linkage bit_vector(0 to 7);
vddcore: linkage bit_vector(0 to 3);
vsscore: linkage bit_vector(0 to 3);
usb_txen: inout bit;
usb_tp: inout bit;
usb_tn: inout bit;
usb_susp: inout bit;
usb_speed: inout bit;
usb_rxd: inout bit;
usb_rp: inout bit;
usb_rn: inout bit;
usb_clk: inout bit);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of MCF5274L : entity is "STD_1149_1_1993";
attribute PIN_MAP of MCF5274L : entity is PHYSICAL_PIN_MAP;
constant MAPBGA_196 : PIN_MAP_STRING :=
"a: (F13,E13,D14,F11,E12,D13,E11,D12,C13,B13,C12,D11,A12,B11,C11,A11,B10,C10,C9,D9,B9,C8,B8,A8)," &
"bs_b: (L5,K1)," &
"clkmod: (N11,M11)," &
"clkout: P6," &
"clkout_b: P5," &
"cs_b: (N5,P4,C14,B12,D10,A10,A9,D8)," &
"cts0_b: C6," &
"cts1_b: C7," &
"d: (N3,M4,M3,N2,N1,M2,J4,K4,L4,L3,L2,M1,K3,K2,L1,J3)," &
"ddata: (L9,P8,N7,M7)," &
"eim_clk: P9," &
"extal: M14," &
"fec0_col: B4," &
"fec0_crs: A2," &
"fec0_mdc: C5," &
"fec0_mdio: A3," &
"fec0_rxclk: B3," &
"fec0_rxdv: C4," &
"fec0_rxd: (D5,B2,B1,D4)," &
"fec0_rxer: E4," &
"fec0_txclk: C1," &
"fec0_txd: (D2,D3,E3,D1)," &
"fec0_txen: C3," &
"fec0_txer: C2," &
"irq_b: (J13,H12,H14,H11,G14,G13,F14)," &
"jtag_en: P11," &
"oe_b: H4," &
"pcs: (M9,N10,N9,P10)," &
"pst: (N8,M8,L8,P7)," &
"qsdi: M10," &
"qsdo: L10," &
"rcon_b: M6," &
"rstin_b: K12," &
"rstout_b: L12," &
"rts0_b: B5," &
"rts1_b: B6," &
"rwb: L6," &
"rxd0: A4," &
"rxd1: A6," &
"sck: L11," &
"scl: A7," &
"sda: B7," &
"sd_a10: N4," &
"sd_cas_b: G3," &
"sd_cke: J1," &
"sd_cs_b: (M5,H3)," &
"sd_dqs: (P3,J2)," &
"sd_ras_b: H1," &
"sd_vref: (P2,A13)," &
"sd_we_b: G4," &
"ta_b: K14," &
"tclk: P12," &
"tdi: M12," &
"tdo: K11," &
"test: N6," &
"tin0: E1," &
"tin1: F1," &
"tin2: F3," &
"tin3: G2," &
"tms: N12," &
"tout0: E2," &
"tout1: F2," &
"tout2: F4," &
"tout3: G1," &
"trst_b: P13," &
"tsiz: (E14,B14)," &
"ts_b: H2," &
"txd0: A5," &
"txd1: D7," &
"usb_clk: F12," &
"usb_rn: H13," &
"usb_rp: J11," &
"usb_rxd: L14," &
"usb_speed: G11," &
"usb_susp: N13," &
"usb_tn: J14," &
"usb_tp: J12," &
"usb_txen: K13," &
"vddcore: (L7,G12,G5,D6)," &
"vddio: (K7,K6,K5,J6,J5,H5,G10,F10,F9,E10,E9,E8)," &
"vddpll: M13," &
"vsscore: (G7,G6,F8,F7)," &
"vssio: (J8,J7,H9,H8,H7,H6,G9,G8)," &
"vsspll: L13," &
"xtal: N14";
attribute TAP_SCAN_IN of tdi : signal is true;
attribute TAP_SCAN_OUT of tdo : signal is true;
attribute TAP_SCAN_MODE of tms : signal is true;
attribute TAP_SCAN_RESET of trst_b : signal is true;
attribute TAP_SCAN_CLOCK of tclk : signal is (20.0e6, BOTH);
attribute COMPLIANCE_PATTERNS of MCF5274L : entity is
"(test, jtag_en) (01)";
attribute INSTRUCTION_LENGTH of MCF5274L : entity is 4;
attribute INSTRUCTION_OPCODE of MCF5274L : entity is
"EXTEST (0000)," &
"SAMPLE (0010)," &
"IDCODE (0001)," &
"CLAMP (1100)," &
"HIGHZ (1001)," &
"TEST_LEAKAGE (0101)," &
"ENABLE_TEST_CTRL (0110)," &
"RESERVED (1011)," &
"BYPASS (1111)";
attribute INSTRUCTION_CAPTURE of MCF5274L : entity is "0001";
attribute INSTRUCTION_PRIVATE of MCF5274L : entity is
"TEST_LEAKAGE, ENABLE_TEST_CTRL ";
attribute IDCODE_REGISTER of MCF5274L : entity is
"00010111010000110110000000011101";
attribute REGISTER_ACCESS of MCF5274L : entity is
"BYPASS (TEST_LEAKAGE)," &
"TEST_CTRL[3] (ENABLE_TEST_CTRL)," &
"RESERVED[7] (RESERVED)";
attribute BOUNDARY_LENGTH of MCF5274L : entity is 328;
attribute BOUNDARY_REGISTER of MCF5274L : entity is
-- num cell port func safe [ccell dis rslt]
"0 (BC_7, fec0_rxd(3), bidir, X, 1, 1, Z)," &
"1 (BC_2, *, control, 1)," &
"2 (BC_2, *, internal, 0)," &
"3 (BC_2, *, internal, 0)," &
"4 (BC_7, fec0_rxer, bidir, X, 5, 1, Z)," &
"5 (BC_2, *, control, 1)," &
"6 (BC_2, *, internal, 0)," &
"7 (BC_2, *, internal, 0)," &
"8 (BC_7, fec0_txclk, bidir, X, 9, 1, Z)," &
"9 (BC_2, *, control, 1)," &
"10 (BC_2, *, internal, 0)," &
"11 (BC_2, *, internal, 0)," &
"12 (BC_7, fec0_txen, bidir, X, 13, 1, Z)," &
"13 (BC_2, *, control, 1)," &
"14 (BC_2, *, internal, 0)," &
"15 (BC_2, *, internal, 0)," &
"16 (BC_7, fec0_txer, bidir, X, 17, 1, Z)," &
"17 (BC_2, *, control, 1)," &
"18 (BC_2, *, internal, 0)," &
"19 (BC_2, *, internal, 0)," &
-- num cell port func safe [ccell dis rslt]
"20 (BC_2, *, internal, 0)," &
"21 (BC_2, *, internal, 0)," &
"22 (BC_7, fec0_txd(3), bidir, X, 23, 1, Z)," &
"23 (BC_2, *, control, 1)," &
"24 (BC_2, *, internal, 0)," &
"25 (BC_2, *, internal, 0)," &
"26 (BC_7, fec0_txd(2), bidir, X, 27, 1, Z)," &
"27 (BC_2, *, control, 1)," &
"28 (BC_2, *, internal, 0)," &
"29 (BC_2, *, internal, 0)," &
"30 (BC_7, fec0_txd(1), bidir, X, 31, 1, Z)," &
"31 (BC_2, *, control, 1)," &
"32 (BC_2, *, internal, 0)," &
"33 (BC_2, *, internal, 0)," &
"34 (BC_7, fec0_txd(0), bidir, X, 35, 1, Z)," &
"35 (BC_2, *, control, 1)," &
"36 (BC_2, *, internal, 0)," &
"37 (BC_2, *, internal, 0)," &
"38 (BC_2, *, internal, 0)," &
"39 (BC_2, *, internal, 0)," &
-- num cell port func safe [ccell dis rslt]
"40 (BC_7, tout0, bidir, X, 41, 1, Z)," &
"41 (BC_2, *, control, 1)," &
"42 (BC_7, tin0, bidir, X, 43, 1, Z)," &
"43 (BC_2, *, control, 1)," &
"44 (BC_7, tout1, bidir, X, 45, 1, Z)," &
"45 (BC_2, *, control, 1)," &
"46 (BC_7, tin1, bidir, X, 47, 1, Z)," &
"47 (BC_2, *, control, 1)," &
"48 (BC_7, tin2, bidir, X, 49, 1, Z)," &
"49 (BC_2, *, control, 1)," &
"50 (BC_7, tout2, bidir, X, 51, 1, Z)," &
"51 (BC_2, *, control, 1)," &
"52 (BC_7, tin3, bidir, X, 53, 1, Z)," &
"53 (BC_2, *, control, 1)," &
"54 (BC_7, tout3, bidir, X, 55, 1, Z)," &
"55 (BC_2, *, control, 1)," &
"56 (BC_7, oe_b, bidir, X, 57, 1, Z)," &
"57 (BC_2, *, control, 1)," &
"58 (BC_7, sd_we_b, bidir, X, 59, 1, Z)," &
"59 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"60 (BC_7, sd_cas_b, bidir, X, 61, 1, Z)," &
"61 (BC_2, *, control, 1)," &
"62 (BC_7, sd_ras_b, bidir, X, 63, 1, Z)," &
"63 (BC_2, *, control, 1)," &
"64 (BC_7, sd_cke, bidir, X, 65, 1, Z)," &
"65 (BC_2, *, control, 1)," &
"66 (BC_7, ts_b, bidir, X, 67, 1, Z)," &
"67 (BC_2, *, control, 1)," &
"68 (BC_7, sd_cs_b(1), bidir, X, 69, 1, Z)," &
"69 (BC_2, *, control, 1)," &
"70 (BC_7, bs_b(3), bidir, X, 71, 1, Z)," &
"71 (BC_2, *, control, 1)," &
"72 (BC_7, sd_dqs(3), bidir, X, 73, 1, Z)," &
"73 (BC_2, *, control, 1)," &
"74 (BC_7, d(31), bidir, X, 75, 1, Z)," &
"75 (BC_2, *, control, 1)," &
"76 (BC_7, d(30), bidir, X, 77, 1, Z)," &
"77 (BC_2, *, control, 1)," &
"78 (BC_7, d(29), bidir, X, 79, 1, Z)," &
"79 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"80 (BC_7, d(28), bidir, X, 81, 1, Z)," &
"81 (BC_2, *, control, 1)," &
"82 (BC_7, d(27), bidir, X, 83, 1, Z)," &
"83 (BC_2, *, control, 1)," &
"84 (BC_7, d(26), bidir, X, 85, 1, Z)," &
"85 (BC_2, *, control, 1)," &
"86 (BC_7, d(25), bidir, X, 87, 1, Z)," &
"87 (BC_2, *, control, 1)," &
"88 (BC_7, d(24), bidir, X, 89, 1, Z)," &
"89 (BC_2, *, control, 1)," &
"90 (BC_7, d(23), bidir, X, 91, 1, Z)," &
"91 (BC_2, *, control, 1)," &
"92 (BC_7, d(22), bidir, X, 93, 1, Z)," &
"93 (BC_2, *, control, 1)," &
"94 (BC_7, d(21), bidir, X, 95, 1, Z)," &
"95 (BC_2, *, control, 1)," &
"96 (BC_7, d(20), bidir, X, 97, 1, Z)," &
"97 (BC_2, *, control, 1)," &
"98 (BC_7, d(19), bidir, X, 99, 1, Z)," &
"99 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"100 (BC_7, d(18), bidir, X, 101, 1, Z)," &
"101 (BC_2, *, control, 1)," &
"102 (BC_7, d(17), bidir, X, 103, 1, Z)," &
"103 (BC_2, *, control, 1)," &
"104 (BC_7, d(16), bidir, X, 105, 1, Z)," &
"105 (BC_2, *, control, 1)," &
"106 (BC_7, sd_dqs(2), bidir, X, 107, 1, Z)," &
"107 (BC_2, *, control, 1)," &
"108 (BC_7, bs_b(2), bidir, X, 109, 1, Z)," &
"109 (BC_2, *, control, 1)," &
"110 (BC_7, sd_cs_b(0), bidir, X, 111, 1, Z)," &
"111 (BC_2, *, control, 1)," &
"112 (BC_7, sd_a10, bidir, X, 113, 1, Z)," &
"113 (BC_2, *, control, 1)," &
"114 (BC_2, *, internal, 0)," &
"115 (BC_2, *, internal, 0)," &
"116 (BC_7, cs_b(0), bidir, X, 117, 1, Z)," &
"117 (BC_2, *, control, 1)," &
"118 (BC_7, cs_b(1), bidir, X, 119, 1, Z)," &
"119 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"120 (BC_7, rwb, bidir, X, 121, 1, Z)," &
"121 (BC_2, *, control, 1)," &
"122 (BC_7, clkout_b, bidir, X, 123, 1, Z)," &
"123 (BC_2, *, control, 1)," &
"124 (BC_7, clkout, bidir, X, 125, 1, Z)," &
"125 (BC_2, *, control, 1)," &
"126 (BC_2, *, internal, 0)," &
"127 (BC_2, *, internal, 0)," &
"128 (BC_2, *, internal, 0)," &
"129 (BC_2, *, internal, 0)," &
"130 (BC_7, rcon_b, bidir, X, 131, 1, Z)," &
"131 (BC_2, *, control, 1)," &
"132 (BC_2, *, internal, 0)," &
"133 (BC_2, *, internal, 0)," &
"134 (BC_2, *, internal, 0)," &
"135 (BC_2, *, internal, 0)," &
"136 (BC_2, *, internal, 0)," &
"137 (BC_2, *, internal, 0)," &
"138 (BC_7, ddata(3), bidir, X, 139, 1, Z)," &
"139 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"140 (BC_7, pst(3), bidir, X, 141, 1, Z)," &
"141 (BC_2, *, control, 1)," &
"142 (BC_7, pst(2), bidir, X, 143, 1, Z)," &
"143 (BC_2, *, control, 1)," &
"144 (BC_7, ddata(2), bidir, X, 145, 1, Z)," &
"145 (BC_2, *, control, 1)," &
"146 (BC_7, pst(1), bidir, X, 147, 1, Z)," &
"147 (BC_2, *, control, 1)," &
"148 (BC_7, ddata(1), bidir, X, 149, 1, Z)," &
"149 (BC_2, *, control, 1)," &
"150 (BC_7, pst(0), bidir, X, 151, 1, Z)," &
"151 (BC_2, *, control, 1)," &
"152 (BC_7, ddata(0), bidir, X, 153, 1, Z)," &
"153 (BC_2, *, control, 1)," &
"154 (BC_7, eim_clk, bidir, X, 155, 1, Z)," &
"155 (BC_2, *, control, 1)," &
"156 (BC_7, pcs(0), bidir, X, 157, 1, Z)," &
"157 (BC_2, *, control, 1)," &
"158 (BC_7, pcs(2), bidir, X, 159, 1, Z)," &
"159 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"160 (BC_7, qsdo, bidir, X, 161, 1, Z)," &
"161 (BC_2, *, control, 1)," &
"162 (BC_7, qsdi, bidir, X, 163, 1, Z)," &
"163 (BC_2, *, control, 1)," &
"164 (BC_7, pcs(3), bidir, X, 165, 1, Z)," &
"165 (BC_2, *, control, 1)," &
"166 (BC_7, pcs(1), bidir, X, 167, 1, Z)," &
"167 (BC_2, *, control, 1)," &
"168 (BC_7, sck, bidir, X, 169, 1, Z)," &
"169 (BC_2, *, control, 1)," &
"170 (BC_7, clkmod(0), bidir, X, 171, 1, Z)," &
"171 (BC_2, *, control, 1)," &
"172 (BC_7, clkmod(1), bidir, X, 173, 1, Z)," &
"173 (BC_2, *, control, 1)," &
"174 (BC_7, usb_susp, bidir, X, 175, 1, Z)," &
"175 (BC_2, *, control, 1)," &
"176 (BC_7, rstin_b, bidir, X, 177, 1, Z)," &
"177 (BC_2, *, control, 1)," &
"178 (BC_7, rstout_b, bidir, X, 179, 1, Z)," &
"179 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"180 (BC_7, usb_rxd, bidir, X, 181, 1, Z)," &
"181 (BC_2, *, control, 1)," &
"182 (BC_7, usb_txen, bidir, X, 183, 1, Z)," &
"183 (BC_2, *, control, 1)," &
"184 (BC_7, ta_b, bidir, X, 185, 1, Z)," &
"185 (BC_2, *, control, 1)," &
"186 (BC_7, usb_tp, bidir, X, 187, 1, Z)," &
"187 (BC_2, *, control, 1)," &
"188 (BC_7, usb_tn, bidir, X, 189, 1, Z)," &
"189 (BC_2, *, control, 1)," &
"190 (BC_7, irq_b(1), bidir, X, 191, 1, Z)," &
"191 (BC_2, *, control, 1)," &
"192 (BC_7, irq_b(2), bidir, X, 193, 1, Z)," &
"193 (BC_2, *, control, 1)," &
"194 (BC_7, irq_b(3), bidir, X, 195, 1, Z)," &
"195 (BC_2, *, control, 1)," &
"196 (BC_7, usb_rp, bidir, X, 197, 1, Z)," &
"197 (BC_2, *, control, 1)," &
"198 (BC_7, usb_rn, bidir, X, 199, 1, Z)," &
"199 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"200 (BC_7, irq_b(4), bidir, X, 201, 1, Z)," &
"201 (BC_2, *, control, 1)," &
"202 (BC_7, irq_b(5), bidir, X, 203, 1, Z)," &
"203 (BC_2, *, control, 1)," &
"204 (BC_7, irq_b(6), bidir, X, 205, 1, Z)," &
"205 (BC_2, *, control, 1)," &
"206 (BC_7, irq_b(7), bidir, X, 207, 1, Z)," &
"207 (BC_2, *, control, 1)," &
"208 (BC_7, usb_speed, bidir, X, 209, 1, Z)," &
"209 (BC_2, *, control, 1)," &
"210 (BC_7, usb_clk, bidir, X, 211, 1, Z)," &
"211 (BC_2, *, control, 1)," &
"212 (BC_7, tsiz(0), bidir, X, 213, 1, Z)," &
"213 (BC_2, *, control, 1)," &
"214 (BC_7, a(0), bidir, X, 215, 1, Z)," &
"215 (BC_2, *, control, 1)," &
"216 (BC_7, a(1), bidir, X, 217, 1, Z)," &
"217 (BC_2, *, control, 1)," &
"218 (BC_7, a(2), bidir, X, 219, 1, Z)," &
"219 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"220 (BC_7, a(3), bidir, X, 221, 1, Z)," &
"221 (BC_2, *, control, 1)," &
"222 (BC_7, a(4), bidir, X, 223, 1, Z)," &
"223 (BC_2, *, control, 1)," &
"224 (BC_7, a(5), bidir, X, 225, 1, Z)," &
"225 (BC_2, *, control, 1)," &
"226 (BC_7, cs_b(2), bidir, X, 227, 1, Z)," &
"227 (BC_2, *, control, 1)," &
"228 (BC_7, tsiz(1), bidir, X, 229, 1, Z)," &
"229 (BC_2, *, control, 1)," &
"230 (BC_7, a(6), bidir, X, 231, 1, Z)," &
"231 (BC_2, *, control, 1)," &
"232 (BC_7, a(7), bidir, X, 233, 1, Z)," &
"233 (BC_2, *, control, 1)," &
"234 (BC_7, a(8), bidir, X, 235, 1, Z)," &
"235 (BC_2, *, control, 1)," &
"236 (BC_7, a(9), bidir, X, 237, 1, Z)," &
"237 (BC_2, *, control, 1)," &
"238 (BC_7, a(10), bidir, X, 239, 1, Z)," &
"239 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"240 (BC_7, a(11), bidir, X, 241, 1, Z)," &
"241 (BC_2, *, control, 1)," &
"242 (BC_7, cs_b(3), bidir, X, 243, 1, Z)," &
"243 (BC_2, *, control, 1)," &
"244 (BC_7, cs_b(4), bidir, X, 245, 1, Z)," &
"245 (BC_2, *, control, 1)," &
"246 (BC_7, a(12), bidir, X, 247, 1, Z)," &
"247 (BC_2, *, control, 1)," &
"248 (BC_7, a(13), bidir, X, 249, 1, Z)," &
"249 (BC_2, *, control, 1)," &
"250 (BC_7, a(14), bidir, X, 251, 1, Z)," &
"251 (BC_2, *, control, 1)," &
"252 (BC_7, a(15), bidir, X, 253, 1, Z)," &
"253 (BC_2, *, control, 1)," &
"254 (BC_7, a(16), bidir, X, 255, 1, Z)," &
"255 (BC_2, *, control, 1)," &
"256 (BC_7, a(17), bidir, X, 257, 1, Z)," &
"257 (BC_2, *, control, 1)," &
"258 (BC_7, cs_b(5), bidir, X, 259, 1, Z)," &
"259 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"260 (BC_7, cs_b(6), bidir, X, 261, 1, Z)," &
"261 (BC_2, *, control, 1)," &
"262 (BC_7, a(18), bidir, X, 263, 1, Z)," &
"263 (BC_2, *, control, 1)," &
"264 (BC_7, a(19), bidir, X, 265, 1, Z)," &
"265 (BC_2, *, control, 1)," &
"266 (BC_7, a(20), bidir, X, 267, 1, Z)," &
"267 (BC_2, *, control, 1)," &
"268 (BC_7, a(21), bidir, X, 269, 1, Z)," &
"269 (BC_2, *, control, 1)," &
"270 (BC_7, a(22), bidir, X, 271, 1, Z)," &
"271 (BC_2, *, control, 1)," &
"272 (BC_7, a(23), bidir, X, 273, 1, Z)," &
"273 (BC_2, *, control, 1)," &
"274 (BC_7, cs_b(7), bidir, X, 275, 1, Z)," &
"275 (BC_2, *, control, 1)," &
"276 (BC_7, scl, bidir, X, 277, 1, Z)," &
"277 (BC_2, *, control, 1)," &
"278 (BC_7, sda, bidir, X, 279, 1, Z)," &
"279 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"280 (BC_7, cts1_b, bidir, X, 281, 1, Z)," &
"281 (BC_2, *, control, 1)," &
"282 (BC_7, txd1, bidir, X, 283, 1, Z)," &
"283 (BC_2, *, control, 1)," &
"284 (BC_7, rxd1, bidir, X, 285, 1, Z)," &
"285 (BC_2, *, control, 1)," &
"286 (BC_7, rts1_b, bidir, X, 287, 1, Z)," &
"287 (BC_2, *, control, 1)," &
"288 (BC_7, cts0_b, bidir, X, 289, 1, Z)," &
"289 (BC_2, *, control, 1)," &
"290 (BC_7, txd0, bidir, X, 291, 1, Z)," &
"291 (BC_2, *, control, 1)," &
"292 (BC_7, rxd0, bidir, X, 293, 1, Z)," &
"293 (BC_2, *, control, 1)," &
"294 (BC_7, rts0_b, bidir, X, 295, 1, Z)," &
"295 (BC_2, *, control, 1)," &
"296 (BC_7, fec0_mdio, bidir, X, 297, 1, Z)," &
"297 (BC_2, *, control, 1)," &
"298 (BC_7, fec0_mdc, bidir, X, 299, 1, Z)," &
"299 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"300 (BC_7, fec0_col, bidir, X, 301, 1, Z)," &
"301 (BC_2, *, control, 1)," &
"302 (BC_2, *, internal, 0)," &
"303 (BC_2, *, internal, 0)," &
"304 (BC_7, fec0_crs, bidir, X, 305, 1, Z)," &
"305 (BC_2, *, control, 1)," &
"306 (BC_2, *, internal, 0)," &
"307 (BC_2, *, internal, 0)," &
"308 (BC_7, fec0_rxclk, bidir, X, 309, 1, Z)," &
"309 (BC_2, *, control, 1)," &
"310 (BC_2, *, internal, 0)," &
"311 (BC_2, *, internal, 0)," &
"312 (BC_7, fec0_rxdv, bidir, X, 313, 1, Z)," &
"313 (BC_2, *, control, 1)," &
"314 (BC_2, *, internal, 0)," &
"315 (BC_2, *, internal, 0)," &
"316 (BC_7, fec0_rxd(0), bidir, X, 317, 1, Z)," &
"317 (BC_2, *, control, 1)," &
"318 (BC_2, *, internal, 0)," &
"319 (BC_2, *, internal, 0)," &
-- num cell port func safe [ccell dis rslt]
"320 (BC_7, fec0_rxd(1), bidir, X, 321, 1, Z)," &
"321 (BC_2, *, control, 1)," &
"322 (BC_2, *, internal, 0)," &
"323 (BC_2, *, internal, 0)," &
"324 (BC_7, fec0_rxd(2), bidir, X, 325, 1, Z)," &
"325 (BC_2, *, control, 1)," &
"326 (BC_2, *, internal, 0)," &
"327 (BC_2, *, internal, 0)";
end MCF5274L;