-- **********************************************************************
--
-- FILE : zl30461.bsd
-- generated by Czeslaw Piasta as zl30461 on Thu Jul 3 13:34:21 EDT 2003
-- using p.jtag.bsd rev 3.2 June 19, 2003
--
-- BSDL description for top level entity zl30461
-- Device : ZL30461 Compact Stratum3 Timing Module
--
-- Number of BSC cells: 76
--
-- **********************************************************************
-- Modification History:
-- Initial release: Thu Jul 3 13:34:21 EDT 2003
-- ********************************************************************
--
-- IMPORTANT NOTICE
--
-- This information is for modeling purposes only, and is not guaranteed.
--
-- This information is provided "as is" without warranty of any kind.
-- It may contain technical inaccuracies or typographical errors.
--
-- ZARLINK and ZL30461 are trademarks of ZARLINK Semiconductor. ZARLINK
-- products, marketed under trademarks, are protected under numerous US
-- and foreign patents and pending applications, maskwork rights, and
-- copyrights.
--
-- ZARLINK reserves the right to make changes to any products and
-- services at any time without notice. ZARLINK assumes no
-- responsibility or liability arising out of the application or use of
-- any information, product, or service described herein except as
-- expressly agreed to in writing by ZARLINK Corporation. ZARLINK
-- customers are advised to obtain the latest version of device
-- specifications before relying on any published information and before
-- placing orders for products or services.
--
-- ********************************************************************
--
-- SPECIAL NOTES
--
-- 1. All instruction opcodes other than those defined in this file
-- should be considered PRIVATE.
--
-- ********************************************************************
entity zl30461 is
generic(PHYSICAL_PIN_MAP : string := "BGA_PACKAGE");
port (
A: in bit_vector (0 to 6);
C155N: linkage bit;
C155P: linkage bit;
C15O: out bit;
C16OB: out bit;
C19O: out bit;
C2O: out bit;
C34C44: out bit;
C4OB: out bit;
C6O: out bit;
C8O: out bit;
CSB: in bit;
D: inout bit_vector (0 to 7);
DSB: in bit;
E3DS3_OC3B: in bit;
E3_DS3B: in bit;
F0O: out bit;
F16O: out bit;
F8O: out bit;
FCS: in bit;
GC: linkage bit_vector (0 to 8);
HOLDOVER: buffer bit;
HW: in bit;
JA19MO: linkage bit;
JA19OE: linkage bit;
JA77N: linkage bit;
JA77OE: linkage bit;
JA77P: linkage bit;
LOCK: buffer bit;
MS1: in bit;
MS2: in bit;
NC: linkage bit_vector (0 to 10);
OE: in bit;
OSCI: in bit;
OSCO: linkage bit;
PRI: in bit;
PRIOR: buffer bit;
REFALIGNB: in bit;
REFIN: linkage bit;
REFSEL: in bit;
RESETB: in bit;
RWB: in bit;
SEC: in bit;
SECOR: buffer bit;
TCK: in bit;
TDI: in bit;
TDO: out bit;
TMS: in bit;
TRSTB: in bit;
VDD1: linkage bit_vector (0 to 1);
VDD2: linkage bit_vector (0 to 5);
VCPECL: linkage bit_vector (0 to 3);
AGND1: linkage bit_vector (0 to 3);
AGND2: linkage bit_vector (0 to 55);
AVDD: linkage bit_vector (0 to 1);
DGND: linkage bit_vector (0 to 43);
TGND: linkage bit_vector (0 to 13);
TVDD: linkage bit_vector (0 to 1);
VCC: linkage bit_vector (0 to 1);
VCCVCO: linkage bit_vector (0 to 1)
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of zl30461 : entity is
"STD_1149_1_1993";
attribute PIN_MAP of zl30461 : entity is PHYSICAL_PIN_MAP;
constant BGA_PACKAGE : PIN_MAP_STRING :=
"A :(A2 , " & -- A[0]
"A1 , " & -- A[1]
"B2 , " & -- A[2]
"B1 , " & -- A[3]
"C2 , " & -- A[4]
"C1 , " & -- A[5]
"D2 ), " & -- A[6]
"C155N : P1 , " &
"C155P : R1 , " &
"C15O : D17 , " &
"C16OB : E1 , " &
"C19O : T11 , " &
"C2O : G1 , " &
"C34C44 : B17 , " &
"C4OB : F2 , " &
"C6O : D16 , " &
"C8O : F1 , " &
"CSB : B8 , " &
"D :(A6 , " & -- D[0]
"B6 , " & -- D[1]
"A5 , " & -- D[2]
"B5 , " & -- D[3]
"A4 , " & -- D[4]
"B4 , " & -- D[5]
"A3 , " & -- D[6]
"B3 ), " & -- D[7]
"DSB : B9 , " &
"E3DS3_OC3B : K2 , " &
"E3_DS3B : L2 , " &
"F0O : G2 , " &
"F16O : E2 , " &
"F8O : H2 , " &
"FCS : D1 , " &
"GC :(B12 , " & -- GC[0]
"T6 , " & -- GC[1]
"T8 , " & -- GC[2]
"T9 , " & -- GC[3]
"U6 , " & -- GC[4]
"U7 , " & -- GC[5]
"U9 , " & -- GC[6]
"U11 , " & -- GC[7]
"T5 ), " & -- GC[8]
"HOLDOVER : A12 , " &
"HW : B7 , " &
"JA19MO : U5 , " &
"JA19OE : U8 , " &
"JA77N : J17 , " &
"JA77OE : U10 , " &
"JA77P : K17 , " &
"LOCK : A11 , " &
"MS1 : J1 , " &
"MS2 : K1 , " &
"NC :(E16 , " & -- NC[0]
"E17 , " & -- NC[1]
"F15 , " & -- NC[2]
"G17 , " & -- NC[3]
"H17 , " & -- NC[4]
"L17 , " & -- NC[5]
"M17 , " & -- NC[6]
"N17 , " & -- NC[7]
"P17 , " & -- NC[8]
"R17 , " & -- NC[9]
"T17 ), " & -- NC[10]
"OE : A9 , " &
"OSCI : A15 , " &
"OSCO : A16 , " &
"PRI : M1 , " &
"PRIOR : A10 , " &
"REFALIGNB : B16 , " &
"REFIN : T10 , " &
"REFSEL : B15 , " &
"RESETB : A8 , " &
"RWB : A7 , " &
"SEC : L1 , " &
"SECOR : B10 , " &
"TCK : U1 , " &
"TDI : T3 , " &
"TDO : U4 , " &
"TMS : U3 , " &
"TRSTB : U2 , " &
"VDD1 :(H1, J2) , " &
"VDD2 :(K4 , " & -- V2DD[0]
"K5 , " & -- V2DD[1]
"L4 , " & -- V2DD[2]
"L5 , " & -- V2DD[3]
"M4 , " & -- V2DD[4]
"M5 ), " & -- V2DD[5]
"VCC :(T14, U14)," &
"VCCVCO :(F16, F17)," &
"VCPECL :(N15 , " & -- VCPECL[0]
"P15 , " & -- VCPECL[1]
"T16 , " & -- VCPECL[2]
"U16 ), " & -- VCPECL[3]
"AGND1 :(H4, H5, J4, J5)," &
"AGND2 :(G13, G14, J15, J16, K13, K14, K15, K16, L13, L14, L15, L16," &
"G15, M13, M14, M15, M16, N8, N9, N10, N11, N12, N13, G16," &
"N14, N16, P8, P9, P10, P11, P12, P13, P14, P16, H13, R8," &
"R9, R10, R11, R12, R13, R14, R15, R16, T12, H14, T13, T15," &
"U12, U13, U15, U17, H15, H16, J13, J14)," &
"AVDD :(J3, K3)," &
"DGND :(C3, C4, D7, D8, D9, E3, E4, E5, E6, E7, E8, E9," &
"C5, F3, F4, F5, G3, G4, G5, H3, N1, N2, N3, C6," &
"N4, N5, N6, N7, P2, P3, P4, P5, P6, P7, C7, R2," &
"R3, T1, T2, C8, D3, D4, D5, D6)," &
"TGND :(A14, B14, E10, E11, E12, E13, C13, C14, D10, D11, D12, D13," &
"D14, D15)," &
"TVDD :(A13, B13)";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (5.0e+06,BOTH);
attribute TAP_SCAN_RESET of TRSTB : signal is true;
--
-- NOTE: All instruction opcodes other than those defined in this file
-- should be considered PRIVATE.
--
attribute INSTRUCTION_LENGTH of zl30461 : entity is 3;
attribute INSTRUCTION_OPCODE of zl30461 : entity is
"idcode (001)," &
"bypass (111)," &
"sample (010)," &
"extest (000)";
attribute INSTRUCTION_CAPTURE of zl30461 : entity is "001";
attribute IDCODE_REGISTER of zl30461 : entity is
"0000" & -- version
"0111011011000111" & -- part number
"00010100101" & -- manufacturer id
"1";
attribute REGISTER_ACCESS of zl30461 : entity is
"boundary (extest, sample)," &
"bypass (bypass)," &
"device_id (idcode)" ;
attribute BOUNDARY_LENGTH of zl30461 : entity is 76;
attribute BOUNDARY_REGISTER of zl30461 : entity is
-- num cell port function safe ccel disval rslt
" 0 ( BC_4, CSB, input, X) ," &
" 1 ( BC_4, OE, input, X) ," &
" 2 ( BC_1, SECOR, output2, X) ," &
" 3 ( BC_4, DSB, input, X) ," &
" 4 ( BC_1, LOCK, output2, X) ," &
" 5 ( BC_0, *, internal, X) ," &
" 6 ( BC_1, HOLDOVER, output2, X) ," &
" 7 ( BC_1, *, control, 0) ," &
" 8 ( BC_1, C34C44, output3, X, 7, 0, Z) ," &
" 9 ( BC_4, OSCI, input, X) ," &
" 10 ( BC_4, REFALIGNB, input, X) ," &
" 11 ( BC_4, REFSEL, input, X) ," &
" 12 ( BC_1, *, control, 0) ," &
" 13 ( BC_1, C19O, output3, X, 12, 0, Z) ," &
" 14 ( BC_1, *, control, 0) ," &
" 15 ( BC_1, C6O, output3, X, 14, 0, Z) ," &
" 16 ( BC_1, *, control, 0) ," &
" 17 ( BC_1, C15O, output3, X, 16, 0, Z) ," &
" 18 ( BC_1, PRIOR, output2, X) ," &
" 19 ( BC_0, *, internal, X) ," &
" 20 ( BC_0, *, internal, X) ," &
" 21 ( BC_4, PRI, input, X) ," &
" 22 ( BC_4, SEC, input, X) ," &
" 23 ( BC_4, E3_DS3B, input, X) ," &
" 24 ( BC_4, E3DS3_OC3B, input, X) ," &
" 25 ( BC_1, *, control, 0) ," &
" 26 ( BC_1, F8O, output3, X, 25, 0, Z) ," &
" 27 ( BC_4, MS2, input, X) ," &
" 28 ( BC_4, MS1, input, X) ," &
" 29 ( BC_1, *, control, 0) ," &
" 30 ( BC_1, F0O, output3, X, 29, 0, Z) ," &
" 31 ( BC_1, *, control, 0) ," &
" 32 ( BC_1, C2O, output3, X, 31, 0, Z) ," &
" 33 ( BC_1, *, control, 0) ," &
" 34 ( BC_1, C4OB, output3, X, 33, 0, Z) ," &
" 35 ( BC_1, *, control, 0) ," &
" 36 ( BC_1, C8O, output3, X, 35, 0, Z) ," &
" 37 ( BC_1, *, control, 0) ," &
" 38 ( BC_1, C16OB, output3, X, 37, 0, Z) ," &
" 39 ( BC_1, *, control, 0) ," &
" 40 ( BC_1, F16O, output3, X, 39, 0, Z) ," &
" 41 ( BC_4, FCS, input, X) ," &
" 42 ( BC_4, A(6), input, X) ," &
" 43 ( BC_4, A(5), input, X) ," &
" 44 ( BC_4, A(4), input, X) ," &
" 45 ( BC_4, A(3), input, X) ," &
" 46 ( BC_4, A(2), input, X) ," &
" 47 ( BC_4, A(1), input, X) ," &
" 48 ( BC_4, A(0), input, X) ," &
" 49 ( BC_4, RWB, input, X) ," &
" 50 ( BC_1, *, control, 0) ," &
" 51 ( BC_1, D(7), output3, X, 50, 0, Z) ," &
" 52 ( BC_4, D(7), input, X) ," &
" 53 ( BC_1, *, control, 0) ," &
" 54 ( BC_1, D(6), output3, X, 53, 0, Z) ," &
" 55 ( BC_4, D(6), input, X) ," &
" 56 ( BC_1, *, control, 0) ," &
" 57 ( BC_1, D(5), output3, X, 56, 0, Z) ," &
" 58 ( BC_4, D(5), input, X) ," &
" 59 ( BC_1, *, control, 0) ," &
" 60 ( BC_1, D(4), output3, X, 59, 0, Z) ," &
" 61 ( BC_4, D(4), input, X) ," &
" 62 ( BC_1, *, control, 0) ," &
" 63 ( BC_1, D(3), output3, X, 62, 0, Z) ," &
" 64 ( BC_4, D(3), input, X) ," &
" 65 ( BC_1, *, control, 0) ," &
" 66 ( BC_1, D(2), output3, X, 65, 0, Z) ," &
" 67 ( BC_4, D(2), input, X) ," &
" 68 ( BC_1, *, control, 0) ," &
" 69 ( BC_1, D(1), output3, X, 68, 0, Z) ," &
" 70 ( BC_4, D(1), input, X) ," &
" 71 ( BC_1, *, control, 0) ," &
" 72 ( BC_1, D(0), output3, X, 71, 0, Z) ," &
" 73 ( BC_4, D(0), input, X) ," &
" 74 ( BC_4, HW, input, X) ," &
" 75 ( BC_4, RESETB, input, X) ";
end zl30461;
------------- end of BSDL description for the zl30461 ----------