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-- NXP Boundary Scan Description Language --
--------------------------------------------------------------------------------
-- Boundary Scan Description Language (IEEE 1149.1b) --
-- --
-- Device : IMX8QM_29x29 Revision B0 --
-- File Version : 1.0 --
-- File Name : IMX8QM_29x29.bsdl --
-- File created : May 30, 2017 --
-- Package type : FCPBGA --
-- BSDL_status : preliminary --
-- --
--------------------------------------------------------------------------------
-- Revision History: --
-- --
-- NOTE: For assistance with this file, contact your sales office. --
-- --
-- --
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-- --
-- --
--============================================================================--
-- IMPORTANT NOTICE --
-- This information is provided on an AS IS basis and without warranty. --
-- IN NO EVENT SHALL NXP BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL --
-- DAMAGES ARISING FROM USE OF THIS INFORMATION. THIS DISCLAIMER OF --
-- WARRANTY EXTENDS TO THE USER OF THE INFORMATION, AND TO THEIR CUSTOMERS --
-- OR USERS OF PRODUCTS AND IS IN LIEU OF ALL WARRANTIES WHETHER EXPRESS, --
-- IMPLIED, OR STATUTORY, INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY --
-- OR FITNESS FOR PARTICULAR PURPOSE. --
-- --
-- NXP does not represent or warrant that the information furnished --
-- hereunder is free of infringement of any third party patents, --
-- copyrights, trade secrets, or other intellectual property rights. --
-- NXP does not represent or warrant that the information is free of --
-- defect, or that it meets any particular standard, requirements or need --
-- of the user of the infomation or their customers. --
-- --
-- NXP reserves the right to change the information in this file --
-- without notice. --
-- --
-- http://www.nxp.com --
-- --
--============================================================================--
entity IMX8QM_29x29 is
generic (PHYSICAL_PIN_MAP : string := "FCPBGA");
-- PORT DESCRIPTION TERMS
-- in = input only
-- out = three-state output (0, Z, 1)
-- buffer = two-state output (0, 1)
-- inout = bidirectional
-- linkage = OTHER (vdd, vss, analog)
--
-- bit = single pin
-- bit_vector = group of pins with suffix 0 to n
port (
ADC_IN0: inout bit;
ADC_IN1: inout bit;
ADC_IN2: inout bit;
ADC_IN3: inout bit;
ADC_IN4: inout bit;
ADC_IN5: inout bit;
ADC_IN6: inout bit;
ADC_IN7: inout bit;
ANA_TEST_OUT0_N: linkage bit;
ANA_TEST_OUT0_P: linkage bit;
EMMC0_CLK: inout bit;
EMMC0_CMD: inout bit;
EMMC0_DATA0: inout bit;
EMMC0_DATA1: inout bit;
EMMC0_DATA2: inout bit;
EMMC0_DATA3: inout bit;
EMMC0_DATA4: inout bit;
EMMC0_DATA5: inout bit;
EMMC0_DATA6: inout bit;
EMMC0_DATA7: inout bit;
EMMC0_RESET_B: inout bit;
EMMC0_STROBE: inout bit;
ENET0_MDC: inout bit;
ENET0_MDIO: inout bit;
ENET0_REFCLK_125M_25M: inout bit;
ENET0_RGMII_RXC: inout bit;
ENET0_RGMII_RXD0: inout bit;
ENET0_RGMII_RXD1: inout bit;
ENET0_RGMII_RXD2: inout bit;
ENET0_RGMII_RXD3: inout bit;
ENET0_RGMII_RX_CTL: inout bit;
ENET0_RGMII_TXC: inout bit;
ENET0_RGMII_TXD0: inout bit;
ENET0_RGMII_TXD1: inout bit;
ENET0_RGMII_TXD2: inout bit;
ENET0_RGMII_TXD3: inout bit;
ENET0_RGMII_TX_CTL: inout bit;
ENET1_MDC: inout bit;
ENET1_MDIO: inout bit;
ENET1_REFCLK_125M_25M: inout bit;
ENET1_RGMII_RXC: inout bit;
ENET1_RGMII_RXD0: inout bit;
ENET1_RGMII_RXD1: inout bit;
ENET1_RGMII_RXD2: inout bit;
ENET1_RGMII_RXD3: inout bit;
ENET1_RGMII_RX_CTL: inout bit;
ENET1_RGMII_TXC: inout bit;
ENET1_RGMII_TXD0: inout bit;
ENET1_RGMII_TXD1: inout bit;
ENET1_RGMII_TXD2: inout bit;
ENET1_RGMII_TXD3: inout bit;
ENET1_RGMII_TX_CTL: inout bit;
ESAI0_FSR: inout bit;
ESAI0_FST: inout bit;
ESAI0_SCKR: inout bit;
ESAI0_SCKT: inout bit;
ESAI0_TX0: inout bit;
ESAI0_TX1: inout bit;
ESAI0_TX2_RX3: inout bit;
ESAI0_TX3_RX2: inout bit;
ESAI0_TX4_RX1: inout bit;
ESAI0_TX5_RX0: inout bit;
ESAI1_FSR: inout bit;
ESAI1_FST: inout bit;
ESAI1_SCKR: inout bit;
ESAI1_SCKT: inout bit;
ESAI1_TX0: inout bit;
ESAI1_TX1: inout bit;
ESAI1_TX2_RX3: inout bit;
ESAI1_TX3_RX2: inout bit;
ESAI1_TX4_RX1: inout bit;
ESAI1_TX5_RX0: inout bit;
FLEXCAN0_RX: inout bit;
FLEXCAN0_TX: inout bit;
FLEXCAN1_RX: inout bit;
FLEXCAN1_TX: inout bit;
FLEXCAN2_RX: inout bit;
FLEXCAN2_TX: inout bit;
GPT0_CAPTURE: inout bit;
GPT0_CLK: inout bit;
GPT0_COMPARE: inout bit;
GPT1_CAPTURE: inout bit;
GPT1_CLK: inout bit;
GPT1_COMPARE: inout bit;
HDMI_TX0_TS_SCL: inout bit;
HDMI_TX0_TS_SDA: inout bit;
JTAG_TCK: in bit;
JTAG_TDI: in bit;
JTAG_TDO: out bit;
JTAG_TMS: in bit;
JTAG_TRST_B: linkage bit;
LVDS0_GPIO00: inout bit;
LVDS0_GPIO01: inout bit;
LVDS0_I2C0_SCL: inout bit;
LVDS0_I2C0_SDA: inout bit;
LVDS0_I2C1_SCL: inout bit;
LVDS0_I2C1_SDA: inout bit;
LVDS1_GPIO00: inout bit;
LVDS1_GPIO01: inout bit;
LVDS1_I2C0_SCL: inout bit;
LVDS1_I2C0_SDA: inout bit;
LVDS1_I2C1_SCL: inout bit;
LVDS1_I2C1_SDA: inout bit;
M40_GPIO0_00: inout bit;
M40_GPIO0_01: inout bit;
M40_I2C0_SCL: inout bit;
M40_I2C0_SDA: inout bit;
M41_GPIO0_00: inout bit;
M41_GPIO0_01: inout bit;
M41_I2C0_SCL: inout bit;
M41_I2C0_SDA: inout bit;
MCLK_IN0: inout bit;
MCLK_OUT0: inout bit;
MIPI_CSI0_GPIO0_00: inout bit;
MIPI_CSI0_GPIO0_01: inout bit;
MIPI_CSI0_I2C0_SCL: inout bit;
MIPI_CSI0_I2C0_SDA: inout bit;
MIPI_CSI0_MCLK_OUT: inout bit;
MIPI_CSI1_GPIO0_00: inout bit;
MIPI_CSI1_GPIO0_01: inout bit;
MIPI_CSI1_I2C0_SCL: inout bit;
MIPI_CSI1_I2C0_SDA: inout bit;
MIPI_CSI1_MCLK_OUT: inout bit;
MIPI_DSI0_GPIO0_00: inout bit;
MIPI_DSI0_GPIO0_01: inout bit;
MIPI_DSI0_I2C0_SCL: inout bit;
MIPI_DSI0_I2C0_SDA: inout bit;
MIPI_DSI1_GPIO0_00: inout bit;
MIPI_DSI1_GPIO0_01: inout bit;
MIPI_DSI1_I2C0_SCL: inout bit;
MIPI_DSI1_I2C0_SDA: inout bit;
MLB_CLK: inout bit;
MLB_DATA: inout bit;
MLB_SIG: inout bit;
ON_OFF_BUTTON: linkage bit;
PCIE_CTRL0_CLKREQ_B: inout bit;
PCIE_CTRL0_PERST_B: inout bit;
PCIE_CTRL0_WAKE_B: inout bit;
PCIE_CTRL1_CLKREQ_B: inout bit;
PCIE_CTRL1_PERST_B: inout bit;
PCIE_CTRL1_WAKE_B: inout bit;
PMIC_EARLY_WARNING: inout bit;
PMIC_I2C_SCL: inout bit;
PMIC_I2C_SDA: inout bit;
PMIC_INT_B: inout bit;
PMIC_ON_REQ: linkage bit;
POR_B: in bit;
QSPI0A_DATA0: inout bit;
QSPI0A_DATA1: inout bit;
QSPI0A_DATA2: inout bit;
QSPI0A_DATA3: inout bit;
QSPI0A_DQS: inout bit;
QSPI0A_SCLK: inout bit;
QSPI0A_SS0_B: inout bit;
QSPI0A_SS1_B: inout bit;
QSPI0B_DATA0: inout bit;
QSPI0B_DATA1: inout bit;
QSPI0B_DATA2: inout bit;
QSPI0B_DATA3: inout bit;
QSPI0B_DQS: inout bit;
QSPI0B_SCLK: inout bit;
QSPI0B_SS0_B: inout bit;
QSPI0B_SS1_B: inout bit;
QSPI1A_DATA0: inout bit;
QSPI1A_DATA1: inout bit;
QSPI1A_DATA2: inout bit;
QSPI1A_DATA3: inout bit;
QSPI1A_DQS: inout bit;
QSPI1A_SCLK: inout bit;
QSPI1A_SS0_B: inout bit;
QSPI1A_SS1_B: inout bit;
RTC_XTALI: linkage bit;
RTC_XTALO: linkage bit;
SAI1_RXC: inout bit;
SAI1_RXD: inout bit;
SAI1_RXFS: inout bit;
SAI1_TXD: inout bit;
SAI1_TXFS: inout bit;
SCU_BOOT_MODE0: inout bit;
SCU_BOOT_MODE1: inout bit;
SCU_BOOT_MODE2: inout bit;
SCU_BOOT_MODE3: inout bit;
SCU_BOOT_MODE4: inout bit;
SCU_BOOT_MODE5: inout bit;
SCU_GPIO0_00: inout bit;
SCU_GPIO0_01: inout bit;
SCU_GPIO0_02: inout bit;
SCU_GPIO0_03: inout bit;
SCU_GPIO0_04: inout bit;
SCU_GPIO0_05: inout bit;
SCU_GPIO0_06: inout bit;
SCU_GPIO0_07: inout bit;
SCU_PMIC_MEMC_ON: inout bit;
SCU_PMIC_STANDBY: linkage bit;
SCU_WDOG_OUT: inout bit;
SIM0_CLK: inout bit;
SIM0_GPIO0_00: inout bit;
SIM0_IO: inout bit;
SIM0_PD: inout bit;
SIM0_POWER_EN: inout bit;
SIM0_RST: inout bit;
SNVS_TAMPER_IN0: linkage bit;
SNVS_TAMPER_IN1: linkage bit;
SNVS_TAMPER_OUT0: linkage bit;
SNVS_TAMPER_OUT1: linkage bit;
SPDIF0_EXT_CLK: inout bit;
SPDIF0_RX: inout bit;
SPDIF0_TX: inout bit;
SPI0_CS0: inout bit;
SPI0_CS1: inout bit;
SPI0_SCK: inout bit;
SPI0_SDI: inout bit;
SPI0_SDO: inout bit;
SPI2_CS0: inout bit;
SPI2_CS1: inout bit;
SPI2_SCK: inout bit;
SPI2_SDI: inout bit;
SPI2_SDO: inout bit;
SPI3_CS0: inout bit;
SPI3_CS1: inout bit;
SPI3_SCK: inout bit;
SPI3_SDI: inout bit;
SPI3_SDO: inout bit;
TEST_MODE_SELECT: in bit;
UART0_CTS_B: inout bit;
UART0_RTS_B: inout bit;
UART0_RX: inout bit;
UART0_TX: inout bit;
UART1_CTS_B: inout bit;
UART1_RTS_B: inout bit;
UART1_RX: inout bit;
UART1_TX: inout bit;
USB_HSIC0_DATA: inout bit;
USB_HSIC0_STROBE: inout bit;
USB_SS3_TC0: inout bit;
USB_SS3_TC1: inout bit;
USB_SS3_TC2: inout bit;
USB_SS3_TC3: inout bit;
USDHC1_CLK: inout bit;
USDHC1_CMD: inout bit;
USDHC1_DATA0: inout bit;
USDHC1_DATA1: inout bit;
USDHC1_DATA2: inout bit;
USDHC1_DATA3: inout bit;
USDHC1_DATA4: inout bit;
USDHC1_DATA5: inout bit;
USDHC1_DATA6: inout bit;
USDHC1_DATA7: inout bit;
USDHC1_RESET_B: inout bit;
USDHC1_STROBE: inout bit;
USDHC1_VSELECT: inout bit;
USDHC2_CD_B: inout bit;
USDHC2_CLK: inout bit;
USDHC2_CMD: inout bit;
USDHC2_DATA0: inout bit;
USDHC2_DATA1: inout bit;
USDHC2_DATA2: inout bit;
USDHC2_DATA3: inout bit;
USDHC2_RESET_B: inout bit;
USDHC2_VSELECT: inout bit;
USDHC2_WP: inout bit;
ANA_TEST_OUT1_N: linkage bit;
ANA_TEST_OUT1_P: linkage bit;
DDR_CH0_ATO: linkage bit;
DDR_CH0_CK0_N: inout bit;
DDR_CH0_CK0_P: inout bit;
DDR_CH0_CK1_N: inout bit;
DDR_CH0_CK1_P: inout bit;
DDR_CH0_DCF00: inout bit;
DDR_CH0_DCF01: inout bit;
DDR_CH0_DCF02: inout bit;
DDR_CH0_DCF03: inout bit;
DDR_CH0_DCF04: inout bit;
DDR_CH0_DCF05: inout bit;
DDR_CH0_DCF06: inout bit;
DDR_CH0_DCF07: inout bit;
DDR_CH0_DCF08: inout bit;
DDR_CH0_DCF09: inout bit;
DDR_CH0_DCF10: inout bit;
DDR_CH0_DCF11: inout bit;
DDR_CH0_DCF12: inout bit;
DDR_CH0_DCF13: inout bit;
DDR_CH0_DCF14: inout bit;
DDR_CH0_DCF15: inout bit;
DDR_CH0_DCF16: inout bit;
DDR_CH0_DCF17: inout bit;
DDR_CH0_DCF18: inout bit;
DDR_CH0_DCF19: inout bit;
DDR_CH0_DCF20: inout bit;
DDR_CH0_DCF21: inout bit;
DDR_CH0_DCF22: inout bit;
DDR_CH0_DCF23: inout bit;
DDR_CH0_DCF24: inout bit;
DDR_CH0_DCF25: inout bit;
DDR_CH0_DCF26: inout bit;
DDR_CH0_DCF27: inout bit;
DDR_CH0_DCF28: inout bit;
DDR_CH0_DCF29: inout bit;
DDR_CH0_DCF30: inout bit;
DDR_CH0_DCF31: inout bit;
DDR_CH0_DCF32: inout bit;
DDR_CH0_DCF33: inout bit;
DDR_CH0_DM0: inout bit;
DDR_CH0_DM1: inout bit;
DDR_CH0_DM2: inout bit;
DDR_CH0_DM3: inout bit;
DDR_CH0_DQ00: inout bit;
DDR_CH0_DQ01: inout bit;
DDR_CH0_DQ02: inout bit;
DDR_CH0_DQ03: inout bit;
DDR_CH0_DQ04: inout bit;
DDR_CH0_DQ05: inout bit;
DDR_CH0_DQ06: inout bit;
DDR_CH0_DQ07: inout bit;
DDR_CH0_DQ08: inout bit;
DDR_CH0_DQ09: inout bit;
DDR_CH0_DQ10: inout bit;
DDR_CH0_DQ11: inout bit;
DDR_CH0_DQ12: inout bit;
DDR_CH0_DQ13: inout bit;
DDR_CH0_DQ14: inout bit;
DDR_CH0_DQ15: inout bit;
DDR_CH0_DQ16: inout bit;
DDR_CH0_DQ17: inout bit;
DDR_CH0_DQ18: inout bit;
DDR_CH0_DQ19: inout bit;
DDR_CH0_DQ20: inout bit;
DDR_CH0_DQ21: inout bit;
DDR_CH0_DQ22: inout bit;
DDR_CH0_DQ23: inout bit;
DDR_CH0_DQ24: inout bit;
DDR_CH0_DQ25: inout bit;
DDR_CH0_DQ26: inout bit;
DDR_CH0_DQ27: inout bit;
DDR_CH0_DQ28: inout bit;
DDR_CH0_DQ29: inout bit;
DDR_CH0_DQ30: inout bit;
DDR_CH0_DQ31: inout bit;
DDR_CH0_DQS0_N: inout bit;
DDR_CH0_DQS0_P: inout bit;
DDR_CH0_DQS1_N: inout bit;
DDR_CH0_DQS1_P: inout bit;
DDR_CH0_DQS2_N: inout bit;
DDR_CH0_DQS2_P: inout bit;
DDR_CH0_DQS3_N: inout bit;
DDR_CH0_DQS3_P: inout bit;
DDR_CH0_DTO0: linkage bit;
DDR_CH0_DTO1: linkage bit;
DDR_CH0_VREF: linkage bit;
DDR_CH0_ZQ: linkage bit;
DDR_CH1_ATO: linkage bit;
DDR_CH1_CK0_N: inout bit;
DDR_CH1_CK0_P: inout bit;
DDR_CH1_CK1_N: inout bit;
DDR_CH1_CK1_P: inout bit;
DDR_CH1_DCF00: inout bit;
DDR_CH1_DCF01: inout bit;
DDR_CH1_DCF02: inout bit;
DDR_CH1_DCF03: inout bit;
DDR_CH1_DCF04: inout bit;
DDR_CH1_DCF05: inout bit;
DDR_CH1_DCF06: inout bit;
DDR_CH1_DCF07: inout bit;
DDR_CH1_DCF08: inout bit;
DDR_CH1_DCF09: inout bit;
DDR_CH1_DCF10: inout bit;
DDR_CH1_DCF11: inout bit;
DDR_CH1_DCF12: inout bit;
DDR_CH1_DCF13: inout bit;
DDR_CH1_DCF14: inout bit;
DDR_CH1_DCF15: inout bit;
DDR_CH1_DCF16: inout bit;
DDR_CH1_DCF17: inout bit;
DDR_CH1_DCF18: inout bit;
DDR_CH1_DCF19: inout bit;
DDR_CH1_DCF20: inout bit;
DDR_CH1_DCF21: inout bit;
DDR_CH1_DCF22: inout bit;
DDR_CH1_DCF23: inout bit;
DDR_CH1_DCF24: inout bit;
DDR_CH1_DCF25: inout bit;
DDR_CH1_DCF26: inout bit;
DDR_CH1_DCF27: inout bit;
DDR_CH1_DCF28: inout bit;
DDR_CH1_DCF29: inout bit;
DDR_CH1_DCF30: inout bit;
DDR_CH1_DCF31: inout bit;
DDR_CH1_DCF32: inout bit;
DDR_CH1_DCF33: inout bit;
DDR_CH1_DM0: inout bit;
DDR_CH1_DM1: inout bit;
DDR_CH1_DM2: inout bit;
DDR_CH1_DM3: inout bit;
DDR_CH1_DQ00: inout bit;
DDR_CH1_DQ01: inout bit;
DDR_CH1_DQ02: inout bit;
DDR_CH1_DQ03: inout bit;
DDR_CH1_DQ04: inout bit;
DDR_CH1_DQ05: inout bit;
DDR_CH1_DQ06: inout bit;
DDR_CH1_DQ07: inout bit;
DDR_CH1_DQ08: inout bit;
DDR_CH1_DQ09: inout bit;
DDR_CH1_DQ10: inout bit;
DDR_CH1_DQ11: inout bit;
DDR_CH1_DQ12: inout bit;
DDR_CH1_DQ13: inout bit;
DDR_CH1_DQ14: inout bit;
DDR_CH1_DQ15: inout bit;
DDR_CH1_DQ16: inout bit;
DDR_CH1_DQ17: inout bit;
DDR_CH1_DQ18: inout bit;
DDR_CH1_DQ19: inout bit;
DDR_CH1_DQ20: inout bit;
DDR_CH1_DQ21: inout bit;
DDR_CH1_DQ22: inout bit;
DDR_CH1_DQ23: inout bit;
DDR_CH1_DQ24: inout bit;
DDR_CH1_DQ25: inout bit;
DDR_CH1_DQ26: inout bit;
DDR_CH1_DQ27: inout bit;
DDR_CH1_DQ28: inout bit;
DDR_CH1_DQ29: inout bit;
DDR_CH1_DQ30: inout bit;
DDR_CH1_DQ31: inout bit;
DDR_CH1_DQS0_N: inout bit;
DDR_CH1_DQS0_P: inout bit;
DDR_CH1_DQS1_N: inout bit;
DDR_CH1_DQS1_P: inout bit;
DDR_CH1_DQS2_N: inout bit;
DDR_CH1_DQS2_P: inout bit;
DDR_CH1_DQS3_N: inout bit;
DDR_CH1_DQS3_P: inout bit;
DDR_CH1_DTO0: linkage bit;
DDR_CH1_DTO1: linkage bit;
DDR_CH1_VREF: linkage bit;
DDR_CH1_ZQ: linkage bit;
HDMI_RX0_ARC_N: linkage bit;
HDMI_RX0_ARC_P: linkage bit;
HDMI_RX0_CEC: linkage bit;
HDMI_RX0_CLK_N: linkage bit;
HDMI_RX0_CLK_P: linkage bit;
HDMI_RX0_DATA0_N: linkage bit;
HDMI_RX0_DATA0_P: linkage bit;
HDMI_RX0_DATA1_N: linkage bit;
HDMI_RX0_DATA1_P: linkage bit;
HDMI_RX0_DATA2_N: linkage bit;
HDMI_RX0_DATA2_P: linkage bit;
HDMI_RX0_DDC_SCL: linkage bit;
HDMI_RX0_DDC_SDA: linkage bit;
HDMI_RX0_HPD: linkage bit;
HDMI_RX0_MON_5V: linkage bit;
HDMI_RX0_REXT: linkage bit;
HDMI_TX0_AUX_N: linkage bit;
HDMI_TX0_AUX_P: linkage bit;
HDMI_TX0_CEC: linkage bit;
HDMI_TX0_CLK_EDP3_N: linkage bit;
HDMI_TX0_CLK_EDP3_P: linkage bit;
HDMI_TX0_DATA0_EDP2_N: linkage bit;
HDMI_TX0_DATA0_EDP2_P: linkage bit;
HDMI_TX0_DATA1_EDP1_N: linkage bit;
HDMI_TX0_DATA1_EDP1_P: linkage bit;
HDMI_TX0_DATA2_EDP0_N: linkage bit;
HDMI_TX0_DATA2_EDP0_P: linkage bit;
HDMI_TX0_DDC_SCL: linkage bit;
HDMI_TX0_DDC_SDA: linkage bit;
HDMI_TX0_HPD: linkage bit;
HDMI_TX0_REXT: linkage bit;
LVDS0_CH0_CLK_N: linkage bit;
LVDS0_CH0_CLK_P: linkage bit;
LVDS0_CH0_TX0_N: linkage bit;
LVDS0_CH0_TX0_P: linkage bit;
LVDS0_CH0_TX1_N: linkage bit;
LVDS0_CH0_TX1_P: linkage bit;
LVDS0_CH0_TX2_N: linkage bit;
LVDS0_CH0_TX2_P: linkage bit;
LVDS0_CH0_TX3_N: linkage bit;
LVDS0_CH0_TX3_P: linkage bit;
LVDS0_CH1_CLK_N: linkage bit;
LVDS0_CH1_CLK_P: linkage bit;
LVDS0_CH1_TX0_N: linkage bit;
LVDS0_CH1_TX0_P: linkage bit;
LVDS0_CH1_TX1_N: linkage bit;
LVDS0_CH1_TX1_P: linkage bit;
LVDS0_CH1_TX2_N: linkage bit;
LVDS0_CH1_TX2_P: linkage bit;
LVDS0_CH1_TX3_N: linkage bit;
LVDS0_CH1_TX3_P: linkage bit;
LVDS1_CH0_CLK_N: linkage bit;
LVDS1_CH0_CLK_P: linkage bit;
LVDS1_CH0_TX0_N: linkage bit;
LVDS1_CH0_TX0_P: linkage bit;
LVDS1_CH0_TX1_N: linkage bit;
LVDS1_CH0_TX1_P: linkage bit;
LVDS1_CH0_TX2_N: linkage bit;
LVDS1_CH0_TX2_P: linkage bit;
LVDS1_CH0_TX3_N: linkage bit;
LVDS1_CH0_TX3_P: linkage bit;
LVDS1_CH1_CLK_N: linkage bit;
LVDS1_CH1_CLK_P: linkage bit;
LVDS1_CH1_TX0_N: linkage bit;
LVDS1_CH1_TX0_P: linkage bit;
LVDS1_CH1_TX1_N: linkage bit;
LVDS1_CH1_TX1_P: linkage bit;
LVDS1_CH1_TX2_N: linkage bit;
LVDS1_CH1_TX2_P: linkage bit;
LVDS1_CH1_TX3_N: linkage bit;
LVDS1_CH1_TX3_P: linkage bit;
MIPI_CSI0_CLK_N: linkage bit;
MIPI_CSI0_CLK_P: linkage bit;
MIPI_CSI0_DATA0_N: linkage bit;
MIPI_CSI0_DATA0_P: linkage bit;
MIPI_CSI0_DATA1_N: linkage bit;
MIPI_CSI0_DATA1_P: linkage bit;
MIPI_CSI0_DATA2_N: linkage bit;
MIPI_CSI0_DATA2_P: linkage bit;
MIPI_CSI0_DATA3_N: linkage bit;
MIPI_CSI0_DATA3_P: linkage bit;
MIPI_CSI1_CLK_N: linkage bit;
MIPI_CSI1_CLK_P: linkage bit;
MIPI_CSI1_DATA0_N: linkage bit;
MIPI_CSI1_DATA0_P: linkage bit;
MIPI_CSI1_DATA1_N: linkage bit;
MIPI_CSI1_DATA1_P: linkage bit;
MIPI_CSI1_DATA2_N: linkage bit;
MIPI_CSI1_DATA2_P: linkage bit;
MIPI_CSI1_DATA3_N: linkage bit;
MIPI_CSI1_DATA3_P: linkage bit;
MIPI_DSI0_CLK_N: linkage bit;
MIPI_DSI0_CLK_P: linkage bit;
MIPI_DSI0_DATA0_N: linkage bit;
MIPI_DSI0_DATA0_P: linkage bit;
MIPI_DSI0_DATA1_N: linkage bit;
MIPI_DSI0_DATA1_P: linkage bit;
MIPI_DSI0_DATA2_N: linkage bit;
MIPI_DSI0_DATA2_P: linkage bit;
MIPI_DSI0_DATA3_N: linkage bit;
MIPI_DSI0_DATA3_P: linkage bit;
MIPI_DSI1_CLK_N: linkage bit;
MIPI_DSI1_CLK_P: linkage bit;
MIPI_DSI1_DATA0_N: linkage bit;
MIPI_DSI1_DATA0_P: linkage bit;
MIPI_DSI1_DATA1_N: linkage bit;
MIPI_DSI1_DATA1_P: linkage bit;
MIPI_DSI1_DATA2_N: linkage bit;
MIPI_DSI1_DATA2_P: linkage bit;
MIPI_DSI1_DATA3_N: linkage bit;
MIPI_DSI1_DATA3_P: linkage bit;
MLB_CLK_N: linkage bit;
MLB_CLK_P: linkage bit;
MLB_DATA_N: linkage bit;
MLB_DATA_P: linkage bit;
MLB_SIG_N: linkage bit;
MLB_SIG_P: linkage bit;
PCIE0_PHY_PLL_REF_RETURN: linkage bit;
PCIE0_RX0_N: linkage bit;
PCIE0_RX0_P: linkage bit;
PCIE0_TX0_N: linkage bit;
PCIE0_TX0_P: linkage bit;
PCIE1_PHY_PLL_REF_RETURN: linkage bit;
PCIE1_RX0_N: linkage bit;
PCIE1_RX0_P: linkage bit;
PCIE1_TX0_N: linkage bit;
PCIE1_TX0_P: linkage bit;
PCIE_REF_QR: linkage bit;
PCIE_REXT: linkage bit;
PCIE_SATA0_PHY_PLL_REF_RETURN: linkage bit;
PCIE_SATA0_RX0_N: linkage bit;
PCIE_SATA0_RX0_P: linkage bit;
PCIE_SATA0_TX0_N: linkage bit;
PCIE_SATA0_TX0_P: linkage bit;
PCIE_SATA_REFCLK100M_N: linkage bit;
PCIE_SATA_REFCLK100M_P: linkage bit;
SAI1_TXC: inout bit;
USB_OTG1_DN: linkage bit;
USB_OTG1_DP: linkage bit;
USB_OTG1_ID: linkage bit;
USB_OTG1_VBUS: linkage bit;
USB_OTG2_DN: linkage bit;
USB_OTG2_DP: linkage bit;
USB_OTG2_ID: linkage bit;
USB_OTG2_REXT: linkage bit;
USB_OTG2_VBUS: linkage bit;
USB_SS3_REXT: linkage bit;
USB_SS3_RX_N: linkage bit;
USB_SS3_RX_P: linkage bit;
USB_SS3_TX_N: linkage bit;
USB_SS3_TX_P: linkage bit;
VDD_A53: linkage bit_vector(0 to 6);
VDD_A72: linkage bit_vector(0 to 11);
VDD_ADC_1P8: linkage bit;
VDD_ADC_DIG_1P8: linkage bit;
VDD_ANA0_1P8: linkage bit_vector(0 to 1);
VDD_ANA1_1P8: linkage bit;
VDD_ANA2_1P8: linkage bit;
VDD_ANA3_1P8: linkage bit;
VDD_CP_1P8: linkage bit;
VDD_DDR_CH0_VDDA_PLL_1P8: linkage bit;
VDD_DDR_CH0_VDDQ: linkage bit_vector(0 to 9);
VDD_DDR_CH0_VDDQ_CKE: linkage bit_vector(0 to 2);
VDD_DDR_CH1_VDDA_PLL_1P8: linkage bit;
VDD_DDR_CH1_VDDQ: linkage bit_vector(0 to 9);
VDD_DDR_CH1_VDDQ_CKE: linkage bit_vector(0 to 2);
VDD_EMMC0_1P8_3P3: linkage bit;
VDD_ENET0_1P8_2P5_3P3: linkage bit_vector(0 to 1);
VDD_ENET1_1P8_2P5_3P3: linkage bit;
VDD_ENET_MDIO_1P8_2P5_3P3: linkage bit;
VDD_ESAI0_MCLK_1P8_3P3: linkage bit_vector(0 to 1);
VDD_ESAI1_SPDIF_SPI_1P8_3P3: linkage bit;
VDD_FLEXCAN_1P8_3P3: linkage bit;
VDD_GPU0: linkage bit_vector(0 to 9);
VDD_GPU1: linkage bit_vector(0 to 9);
VDD_HDMI_RX0_1P8: linkage bit;
VDD_HDMI_RX0_LDO0_1P0_CAP: linkage bit;
VDD_HDMI_RX0_LDO1_1P0_CAP: linkage bit;
VDD_HDMI_RX0_VH_RX_3P3: linkage bit;
VDD_HDMI_TX0_1P0: linkage bit;
VDD_HDMI_TX0_1P8: linkage bit;
VDD_HDMI_TX0_DIG_3P3: linkage bit;
VDD_HDMI_TX0_LDO_1P0_CAP: linkage bit;
VDD_LVDS0_1P0: linkage bit;
VDD_LVDS0_1P8: linkage bit;
VDD_LVDS1_1P0: linkage bit;
VDD_LVDS1_1P8: linkage bit;
VDD_LVDS_DIG_1P8_3P3: linkage bit;
VDD_M1P8_CAP: linkage bit;
VDD_M4_GPT_UART_1P8_3P3: linkage bit_vector(0 to 1);
VDD_MAIN: linkage bit_vector(0 to 47);
VDD_MEMC: linkage bit_vector(0 to 14);
VDD_MIPI_CSI0_1P0: linkage bit;
VDD_MIPI_CSI0_1P8: linkage bit;
VDD_MIPI_CSI1_1P0: linkage bit;
VDD_MIPI_CSI1_1P8: linkage bit;
VDD_MIPI_CSI_DIG_1P8: linkage bit;
VDD_MIPI_DSI0_1P0: linkage bit;
VDD_MIPI_DSI0_1P8: linkage bit;
VDD_MIPI_DSI0_PLL_1P0: linkage bit;
VDD_MIPI_DSI1_1P0: linkage bit;
VDD_MIPI_DSI1_1P8: linkage bit;
VDD_MIPI_DSI1_PLL_1P0: linkage bit;
VDD_MIPI_DSI_DIG_1P8_3P3: linkage bit;
VDD_MLB_1P8: linkage bit;
VDD_MLB_DIG_1P8_3P3: linkage bit;
VDD_PCIE0_1P0: linkage bit;
VDD_PCIE0_PLL_1P8: linkage bit;
VDD_PCIE1_1P0: linkage bit;
VDD_PCIE1_PLL_1P8: linkage bit;
VDD_PCIE_DIG_1P8: linkage bit;
VDD_PCIE_IOB_1P8: linkage bit;
VDD_PCIE_LDO_1P0_CAP: linkage bit;
VDD_PCIE_LDO_1P8: linkage bit;
VDD_PCIE_SATA0_1P0: linkage bit;
VDD_PCIE_SATA0_PLL_1P8: linkage bit;
VDD_QSPI0_1P8_3P3: linkage bit;
VDD_QSPI1A_1P8_3P3: linkage bit;
VDD_SCU_1P8: linkage bit_vector(0 to 1);
VDD_SCU_ANA_1P8: linkage bit;
VDD_SCU_XTAL_1P8: linkage bit;
VDD_SIM0_1P8_3P3: linkage bit;
VDD_SNVS_4P2: linkage bit;
VDD_SNVS_LDO_1P8_CAP: linkage bit;
VDD_SPI_SAI_1P8_3P3: linkage bit_vector(0 to 1);
VDD_USB_HSIC0_1P2: linkage bit;
VDD_USB_HSIC0_1P8: linkage bit;
VDD_USB_OTG1_1P0: linkage bit;
VDD_USB_OTG1_3P3: linkage bit;
VDD_USB_OTG2_1P0: linkage bit;
VDD_USB_OTG2_3P3: linkage bit;
VDD_USB_SS3_LDO_1P0_CAP: linkage bit;
VDD_USB_SS3_TC_3P3: linkage bit;
VDD_USDHC1_1P8_3P3: linkage bit_vector(0 to 1);
VDD_USDHC2_1P8_3P3: linkage bit;
VDD_USDHC_VSELECT_1P8_3P3: linkage bit;
VREFH_ADC: linkage bit;
VREFL_ADC: linkage bit;
VSS_MAIN: linkage bit_vector(0 to 510);
XTALI: linkage bit;
XTALO: linkage bit);
use STD_1149_1_2001.all;
use STD_1149_6_2003.all;
attribute COMPONENT_CONFORMANCE of IMX8QM_29x29: entity is "STD_1149_1_2001";
attribute PIN_MAP of IMX8QM_29x29: entity is PHYSICAL_PIN_MAP;
constant FCPBGA :PIN_MAP_STRING :=
"ADC_IN0: AP10," &
"ADC_IN1: AN11," &
"ADC_IN2: AP8," &
"ADC_IN3: AR9," &
"ADC_IN4: AN9," &
"ADC_IN5: AR7," &
"ADC_IN6: AL9," &
"ADC_IN7: AP6," &
"ANA_TEST_OUT0_N: BH52," &
"ANA_TEST_OUT0_P: BG53," &
"EMMC0_CLK: H28," &
"EMMC0_CMD: J27," &
"EMMC0_DATA0: G29," &
"EMMC0_DATA1: H30," &
"EMMC0_DATA2: G31," &
"EMMC0_DATA3: H32," &
"EMMC0_DATA4: J33," &
"EMMC0_DATA5: H34," &
"EMMC0_DATA6: H36," &
"EMMC0_DATA7: G35," &
"EMMC0_RESET_B: H38," &
"EMMC0_STROBE: G37," &
"ENET0_MDC: A9," &
"ENET0_MDIO: D10," &
"ENET0_REFCLK_125M_25M: B10," &
"ENET0_RGMII_RXC: B44," &
"ENET0_RGMII_RXD0: A47," &
"ENET0_RGMII_RXD1: D44," &
"ENET0_RGMII_RXD2: C45," &
"ENET0_RGMII_RXD3: E45," &
"ENET0_RGMII_RX_CTL: E43," &
"ENET0_RGMII_TXC: A41," &
"ENET0_RGMII_TXD0: A43," &
"ENET0_RGMII_TXD1: B42," &
"ENET0_RGMII_TXD2: A45," &
"ENET0_RGMII_TXD3: D42," &
"ENET0_RGMII_TX_CTL: E41," &
"ENET1_MDC: A13," &
"ENET1_MDIO: C13," &
"ENET1_REFCLK_125M_25M: A11," &
"ENET1_RGMII_RXC: B50," &
"ENET1_RGMII_RXD0: E51," &
"ENET1_RGMII_RXD1: C51," &
"ENET1_RGMII_RXD2: D52," &
"ENET1_RGMII_RXD3: E53," &
"ENET1_RGMII_RX_CTL: E49," &
"ENET1_RGMII_TXC: D46," &
"ENET1_RGMII_TXD0: A49," &
"ENET1_RGMII_TXD1: C47," &
"ENET1_RGMII_TXD2: G47," &
"ENET1_RGMII_TXD3: D48," &
"ENET1_RGMII_TX_CTL: B48," &
"ESAI0_FSR: AW9," &
"ESAI0_FST: BG9," &
"ESAI0_SCKR: BB8," &
"ESAI0_SCKT: AY8," &
"ESAI0_TX0: BA9," &
"ESAI0_TX1: BA7," &
"ESAI0_TX2_RX3: AU9," &
"ESAI0_TX3_RX2: BC5," &
"ESAI0_TX4_RX1: AV8," &
"ESAI0_TX5_RX0: AU7," &
"ESAI1_FSR: BE11," &
"ESAI1_FST: BF12," &
"ESAI1_SCKR: BD12," &
"ESAI1_SCKT: AY10," &
"ESAI1_TX0: BF10," &
"ESAI1_TX1: BA11," &
"ESAI1_TX2_RX3: AU11," &
"ESAI1_TX3_RX2: AV10," &
"ESAI1_TX4_RX1: AY12," &
"ESAI1_TX5_RX0: AT10," &
"FLEXCAN0_RX: C5," &
"FLEXCAN0_TX: H6," &
"FLEXCAN1_RX: E5," &
"FLEXCAN1_TX: G7," &
"FLEXCAN2_RX: C3," &
"FLEXCAN2_TX: E7," &
"GPT0_CAPTURE: AV52," &
"GPT0_CLK: AY52," &
"GPT0_COMPARE: AW53," &
"GPT1_CAPTURE: AY50," &
"GPT1_CLK: BA53," &
"GPT1_COMPARE: BA51," &
"HDMI_TX0_TS_SCL: BN9," &
"HDMI_TX0_TS_SDA: BN7," &
"JTAG_TCK: BC51," &
"JTAG_TDI: BE51," &
"JTAG_TDO: BD52," &
"JTAG_TMS: BA49," &
"JTAG_TRST_B: BE53," &
"LVDS0_GPIO00: BE39," &
"LVDS0_GPIO01: BD40," &
"LVDS0_I2C0_SCL: BD38," &
"LVDS0_I2C0_SDA: BD36," &
"LVDS0_I2C1_SCL: BE37," &
"LVDS0_I2C1_SDA: BE35," &
"LVDS1_GPIO00: BD34," &
"LVDS1_GPIO01: BH36," &
"LVDS1_I2C0_SCL: BL35," &
"LVDS1_I2C0_SDA: BE33," &
"LVDS1_I2C1_SCL: BD32," &
"LVDS1_I2C1_SDA: BN35," &
"M40_GPIO0_00: AR47," &
"M40_GPIO0_01: AU53," &
"M40_I2C0_SCL: AM44," &
"M40_I2C0_SDA: AU51," &
"M41_GPIO0_00: AP44," &
"M41_GPIO0_01: AU47," &
"M41_I2C0_SCL: AR45," &
"M41_I2C0_SDA: AU49," &
"MCLK_IN0: BC3," &
"MCLK_OUT0: BD4," &
"MIPI_CSI0_GPIO0_00: BL23," &
"MIPI_CSI0_GPIO0_01: BM22," &
"MIPI_CSI0_I2C0_SCL: BH24," &
"MIPI_CSI0_I2C0_SDA: BN19," &
"MIPI_CSI0_MCLK_OUT: BJ23," &
"MIPI_CSI1_GPIO0_00: BN15," &
"MIPI_CSI1_GPIO0_01: BN13," &
"MIPI_CSI1_I2C0_SCL: BN17," &
"MIPI_CSI1_I2C0_SDA: BE15," &
"MIPI_CSI1_MCLK_OUT: BN23," &
"MIPI_DSI0_GPIO0_00: BD30," &
"MIPI_DSI0_GPIO0_01: BD28," &
"MIPI_DSI0_I2C0_SCL: BE29," &
"MIPI_DSI0_I2C0_SDA: BE31," &
"MIPI_DSI1_GPIO0_00: BM24," &
"MIPI_DSI1_GPIO0_01: BK24," &
"MIPI_DSI1_I2C0_SCL: BE27," &
"MIPI_DSI1_I2C0_SDA: BG25," &
"MLB_CLK: D2," &
"MLB_DATA: E3," &
"MLB_SIG: E1," &
"ON_OFF_BUTTON: BE47," &
"PCIE_CTRL0_CLKREQ_B: A17," &
"PCIE_CTRL0_PERST_B: D20," &
"PCIE_CTRL0_WAKE_B: A15," &
"PCIE_CTRL1_CLKREQ_B: A25," &
"PCIE_CTRL1_PERST_B: G25," &
"PCIE_CTRL1_WAKE_B: A27," &
"PMIC_EARLY_WARNING: BF50," &
"PMIC_I2C_SCL: AY46," &
"PMIC_I2C_SDA: BG51," &
"PMIC_INT_B: BH50," &
"PMIC_ON_REQ: BL51," &
"POR_B: BE49," &
"QSPI0A_DATA0: G13," &
"QSPI0A_DATA1: F14," &
"QSPI0A_DATA2: H14," &
"QSPI0A_DATA3: H16," &
"QSPI0A_DQS: G17," &
"QSPI0A_SCLK: E17," &
"QSPI0A_SS0_B: E15," &
"QSPI0A_SS1_B: F16," &
"QSPI0B_DATA0: H18," &
"QSPI0B_DATA1: H20," &
"QSPI0B_DATA2: G19," &
"QSPI0B_DATA3: F20," &
"QSPI0B_DQS: H22," &
"QSPI0B_SCLK: F18," &
"QSPI0B_SS0_B: F22," &
"QSPI0B_SS1_B: H24," &
"QSPI1A_DATA0: D12," &
"QSPI1A_DATA1: D14," &
"QSPI1A_DATA2: E13," &
"QSPI1A_DATA3: E11," &
"QSPI1A_DQS: H12," &
"QSPI1A_SCLK: F10," &
"QSPI1A_SS0_B: J11," &
"QSPI1A_SS1_B: G11," &
"RTC_XTALI: BN47," &
"RTC_XTALO: BL47," &
"SAI1_RXC: AV6," &
"SAI1_RXD: AV4," &
"SAI1_RXFS: AU3," &
"SAI1_TXD: AU1," &
"SAI1_TXFS: AV2," &
"SCU_BOOT_MODE0: BB44," &
"SCU_BOOT_MODE1: BC45," &
"SCU_BOOT_MODE2: BJ53," &
"SCU_BOOT_MODE3: BA43," &
"SCU_BOOT_MODE4: AY42," &
"SCU_BOOT_MODE5: BK52," &
"SCU_GPIO0_00: AU43," &
"SCU_GPIO0_01: AV44," &
"SCU_GPIO0_02: AW45," &
"SCU_GPIO0_03: BB46," &
"SCU_GPIO0_04: BC47," &
"SCU_GPIO0_05: AY44," &
"SCU_GPIO0_06: BG49," &
"SCU_GPIO0_07: BF48," &
"SCU_PMIC_MEMC_ON: BC53," &
"SCU_PMIC_STANDBY: BA47," &
"SCU_WDOG_OUT: BB50," &
"SIM0_CLK: AL45," &
"SIM0_GPIO0_00: AP46," &
"SIM0_IO: AN45," &
"SIM0_PD: AL43," &
"SIM0_POWER_EN: AT48," &
"SIM0_RST: AP48," &
"SNVS_TAMPER_IN0: BE41," &
"SNVS_TAMPER_IN1: BE43," &
"SNVS_TAMPER_OUT0: BD46," &
"SNVS_TAMPER_OUT1: BD42," &
"SPDIF0_EXT_CLK: BD6," &
"SPDIF0_RX: BC7," &
"SPDIF0_TX: BC9," &
"SPI0_CS0: BC1," &
"SPI0_CS1: BA3," &
"SPI0_SCK: BB4," &
"SPI0_SDI: BA5," &
"SPI0_SDO: AY6," &
"SPI2_CS0: AW1," &
"SPI2_CS1: AY2," &
"SPI2_SCK: AW5," &
"SPI2_SDI: AY4," &
"SPI2_SDO: BA1," &
"SPI3_CS0: BG5," &
"SPI3_CS1: BD8," &
"SPI3_SCK: BF6," &
"SPI3_SDI: BE5," &
"SPI3_SDO: BF2," &
"TEST_MODE_SELECT: BC49," &
"UART0_CTS_B: AW49," &
"UART0_RTS_B: AU45," &
"UART0_RX: AV50," &
"UART0_TX: AV48," &
"UART1_CTS_B: AV46," &
"UART1_RTS_B: AR43," &
"UART1_RX: AT44," &
"UART1_TX: AY48," &
"USB_HSIC0_DATA: H26," &
"USB_HSIC0_STROBE: F28," &
"USB_SS3_TC0: J9," &
"USB_SS3_TC1: L9," &
"USB_SS3_TC2: F8," &
"USB_SS3_TC3: H10," &
"USDHC1_CLK: J39," &
"USDHC1_CMD: G41," &
"USDHC1_DATA0: E37," &
"USDHC1_DATA1: F38," &
"USDHC1_DATA2: E39," &
"USDHC1_DATA3: F40," &
"USDHC1_DATA4: H40," &
"USDHC1_DATA5: G43," &
"USDHC1_DATA6: F42," &
"USDHC1_DATA7: H42," &
"USDHC1_RESET_B: A5," &
"USDHC1_STROBE: J43," &
"USDHC1_VSELECT: B4," &
"USDHC2_CD_B: B8," &
"USDHC2_CLK: F46," &
"USDHC2_CMD: H44," &
"USDHC2_DATA0: H48," &
"USDHC2_DATA1: G45," &
"USDHC2_DATA2: L45," &
"USDHC2_DATA3: J45," &
"USDHC2_RESET_B: C7," &
"USDHC2_VSELECT: A7," &
"USDHC2_WP: D8," &
"ANA_TEST_OUT1_N: BD2," &
"ANA_TEST_OUT1_P: BE1," &
"DDR_CH0_ATO: AF46," &
"DDR_CH0_CK0_N: Y50," &
"DDR_CH0_CK0_P: W49," &
"DDR_CH0_CK1_N: AB50," &
"DDR_CH0_CK1_P: AC49," &
"DDR_CH0_DCF00: U47," &
"DDR_CH0_DCF01: W47," &
"DDR_CH0_DCF02: Y48," &
"DDR_CH0_DCF03: Y46," &
"DDR_CH0_DCF04: W43," &
"DDR_CH0_DCF05: Y44," &
"DDR_CH0_DCF06: W45," &
"DDR_CH0_DCF07: W51," &
"DDR_CH0_DCF08: T48," &
"DDR_CH0_DCF09: T52," &
"DDR_CH0_DCF10: T50," &
"DDR_CH0_DCF11: U51," &
"DDR_CH0_DCF12: U49," &
"DDR_CH0_DCF13: T46," &
"DDR_CH0_DCF14: W53," &
"DDR_CH0_DCF15: Y52," &
"DDR_CH0_DCF16: U53," &
"DDR_CH0_DCF17: AC47," &
"DDR_CH0_DCF18: AB48," &
"DDR_CH0_DCF19: AB46," &
"DDR_CH0_DCF20: AC43," &
"DDR_CH0_DCF21: AE45," &
"DDR_CH0_DCF22: AC51," &
"DDR_CH0_DCF23: AC45," &
"DDR_CH0_DCF24: AB44," &
"DDR_CH0_DCF25: AF52," &
"DDR_CH0_DCF26: AE47," &
"DDR_CH0_DCF27: AE51," &
"DDR_CH0_DCF28: AF50," &
"DDR_CH0_DCF29: AE49," &
"DDR_CH0_DCF30: AC53," &
"DDR_CH0_DCF31: AB52," &
"DDR_CH0_DCF32: AE53," &
"DDR_CH0_DCF33: AF48," &
"DDR_CH0_DM0: H52," &
"DDR_CH0_DM1: N47," &
"DDR_CH0_DM2: AJ47," &
"DDR_CH0_DM3: AP52," &
"DDR_CH0_DQ00: P44," &
"DDR_CH0_DQ01: N45," &
"DDR_CH0_DQ02: L47," &
"DDR_CH0_DQ03: K48," &
"DDR_CH0_DQ04: H50," &
"DDR_CH0_DQ05: G53," &
"DDR_CH0_DQ06: G51," &
"DDR_CH0_DQ07: N43," &
"DDR_CH0_DQ08: L49," &
"DDR_CH0_DQ09: K50," &
"DDR_CH0_DQ10: N51," &
"DDR_CH0_DQ11: L51," &
"DDR_CH0_DQ12: P46," &
"DDR_CH0_DQ13: N49," &
"DDR_CH0_DQ14: P50," &
"DDR_CH0_DQ15: P48," &
"DDR_CH0_DQ16: AM50," &
"DDR_CH0_DQ17: AL49," &
"DDR_CH0_DQ18: AL51," &
"DDR_CH0_DQ19: AJ51," &
"DDR_CH0_DQ20: AJ49," &
"DDR_CH0_DQ21: AH46," &
"DDR_CH0_DQ22: AH48," &
"DDR_CH0_DQ23: AH50," &
"DDR_CH0_DQ24: AJ45," &
"DDR_CH0_DQ25: AH44," &
"DDR_CH0_DQ26: AM48," &
"DDR_CH0_DQ27: AL47," &
"DDR_CH0_DQ28: AR53," &
"DDR_CH0_DQ29: AP50," &
"DDR_CH0_DQ30: AJ43," &
"DDR_CH0_DQ31: AR51," &
"DDR_CH0_DQS0_N: L53," &
"DDR_CH0_DQS0_P: K52," &
"DDR_CH0_DQS1_N: P52," &
"DDR_CH0_DQS1_P: N53," &
"DDR_CH0_DQS2_N: AH52," &
"DDR_CH0_DQS2_P: AJ53," &
"DDR_CH0_DQS3_N: AL53," &
"DDR_CH0_DQS3_P: AM52," &
"DDR_CH0_DTO0: U45," &
"DDR_CH0_DTO1: T44," &
"DDR_CH0_VREF: U43," &
"DDR_CH0_ZQ: AF44," &
"DDR_CH1_ATO: AF8," &
"DDR_CH1_CK0_N: Y4," &
"DDR_CH1_CK0_P: W5," &
"DDR_CH1_CK1_N: AB4," &
"DDR_CH1_CK1_P: AC5," &
"DDR_CH1_DCF00: U7," &
"DDR_CH1_DCF01: W7," &
"DDR_CH1_DCF02: Y6," &
"DDR_CH1_DCF03: Y8," &
"DDR_CH1_DCF04: W11," &
"DDR_CH1_DCF05: Y10," &
"DDR_CH1_DCF06: W9," &
"DDR_CH1_DCF07: W3," &
"DDR_CH1_DCF08: T6," &
"DDR_CH1_DCF09: T2," &
"DDR_CH1_DCF10: T4," &
"DDR_CH1_DCF11: U3," &
"DDR_CH1_DCF12: U5," &
"DDR_CH1_DCF13: T8," &
"DDR_CH1_DCF14: W1," &
"DDR_CH1_DCF15: Y2," &
"DDR_CH1_DCF16: U1," &
"DDR_CH1_DCF17: AC7," &
"DDR_CH1_DCF18: AB6," &
"DDR_CH1_DCF19: AB8," &
"DDR_CH1_DCF20: AC11," &
"DDR_CH1_DCF21: AE9," &
"DDR_CH1_DCF22: AC3," &
"DDR_CH1_DCF23: AC9," &
"DDR_CH1_DCF24: AB10," &
"DDR_CH1_DCF25: AF2," &
"DDR_CH1_DCF26: AE7," &
"DDR_CH1_DCF27: AE3," &
"DDR_CH1_DCF28: AF4," &
"DDR_CH1_DCF29: AE5," &
"DDR_CH1_DCF30: AC1," &
"DDR_CH1_DCF31: AB2," &
"DDR_CH1_DCF32: AE1," &
"DDR_CH1_DCF33: AF6," &
"DDR_CH1_DM0: H2," &
"DDR_CH1_DM1: N7," &
"DDR_CH1_DM2: AJ7," &
"DDR_CH1_DM3: AP2," &
"DDR_CH1_DQ00: P10," &
"DDR_CH1_DQ01: N9," &
"DDR_CH1_DQ02: L7," &
"DDR_CH1_DQ03: K6," &
"DDR_CH1_DQ04: H4," &
"DDR_CH1_DQ05: G1," &
"DDR_CH1_DQ06: G3," &
"DDR_CH1_DQ07: N11," &
"DDR_CH1_DQ08: L5," &
"DDR_CH1_DQ09: K4," &
"DDR_CH1_DQ10: N3," &
"DDR_CH1_DQ11: L3," &
"DDR_CH1_DQ12: P8," &
"DDR_CH1_DQ13: N5," &
"DDR_CH1_DQ14: P4," &
"DDR_CH1_DQ15: P6," &
"DDR_CH1_DQ16: AM4," &
"DDR_CH1_DQ17: AL5," &
"DDR_CH1_DQ18: AL3," &
"DDR_CH1_DQ19: AJ3," &
"DDR_CH1_DQ20: AJ5," &
"DDR_CH1_DQ21: AH8," &
"DDR_CH1_DQ22: AH6," &
"DDR_CH1_DQ23: AH4," &
"DDR_CH1_DQ24: AJ9," &
"DDR_CH1_DQ25: AH10," &
"DDR_CH1_DQ26: AM6," &
"DDR_CH1_DQ27: AL7," &
"DDR_CH1_DQ28: AR1," &
"DDR_CH1_DQ29: AP4," &
"DDR_CH1_DQ30: AJ11," &
"DDR_CH1_DQ31: AR3," &
"DDR_CH1_DQS0_N: L1," &
"DDR_CH1_DQS0_P: K2," &
"DDR_CH1_DQS1_N: P2," &
"DDR_CH1_DQS1_P: N1," &
"DDR_CH1_DQS2_N: AH2," &
"DDR_CH1_DQS2_P: AJ1," &
"DDR_CH1_DQS3_N: AL1," &
"DDR_CH1_DQS3_P: AM2," &
"DDR_CH1_DTO0: U9," &
"DDR_CH1_DTO1: T10," &
"DDR_CH1_VREF: U11," &
"DDR_CH1_ZQ: AF10," &
"HDMI_RX0_ARC_N: BL13," &
"HDMI_RX0_ARC_P: BM14," &
"HDMI_RX0_CEC: BJ9," &
"HDMI_RX0_CLK_N: BL11," &
"HDMI_RX0_CLK_P: BM12," &
"HDMI_RX0_DATA0_N: BL15," &
"HDMI_RX0_DATA0_P: BM16," &
"HDMI_RX0_DATA1_N: BL17," &
"HDMI_RX0_DATA1_P: BM18," &
"HDMI_RX0_DATA2_N: BL19," &
"HDMI_RX0_DATA2_P: BM20," &
"HDMI_RX0_DDC_SCL: BH10," &
"HDMI_RX0_DDC_SDA: BE13," &
"HDMI_RX0_HPD: BF14," &
"HDMI_RX0_MON_5V: BN11," &
"HDMI_RX0_REXT: BJ11," &
"HDMI_TX0_AUX_N: BG3," &
"HDMI_TX0_AUX_P: BH2," &
"HDMI_TX0_CEC: BJ1," &
"HDMI_TX0_CLK_EDP3_N: BK2," &
"HDMI_TX0_CLK_EDP3_P: BL3," &
"HDMI_TX0_DATA0_EDP2_N: BM4," &
"HDMI_TX0_DATA0_EDP2_P: BL5," &
"HDMI_TX0_DATA1_EDP1_N: BM6," &
"HDMI_TX0_DATA1_EDP1_P: BL7," &
"HDMI_TX0_DATA2_EDP0_N: BM8," &
"HDMI_TX0_DATA2_EDP0_P: BL9," &
"HDMI_TX0_DDC_SCL: BG1," &
"HDMI_TX0_DDC_SDA: BN5," &
"HDMI_TX0_HPD: BH8," &
"HDMI_TX0_REXT: BJ7," &
"LVDS0_CH0_CLK_N: BL41," &
"LVDS0_CH0_CLK_P: BN41," &
"LVDS0_CH0_TX0_N: BK42," &
"LVDS0_CH0_TX0_P: BM42," &
"LVDS0_CH0_TX1_N: BL43," &
"LVDS0_CH0_TX1_P: BN43," &
"LVDS0_CH0_TX2_N: BK44," &
"LVDS0_CH0_TX2_P: BM44," &
"LVDS0_CH0_TX3_N: BL45," &
"LVDS0_CH0_TX3_P: BN45," &
"LVDS0_CH1_CLK_N: BG45," &
"LVDS0_CH1_CLK_P: BH46," &
"LVDS0_CH1_TX0_N: BG43," &
"LVDS0_CH1_TX0_P: BH44," &
"LVDS0_CH1_TX1_N: BG41," &
"LVDS0_CH1_TX1_P: BH42," &
"LVDS0_CH1_TX2_N: BG39," &
"LVDS0_CH1_TX2_P: BH40," &
"LVDS0_CH1_TX3_N: BG37," &
"LVDS0_CH1_TX3_P: BH38," &
"LVDS1_CH0_CLK_N: BK36," &
"LVDS1_CH0_CLK_P: BM36," &
"LVDS1_CH0_TX0_N: BL37," &
"LVDS1_CH0_TX0_P: BN37," &
"LVDS1_CH0_TX1_N: BK38," &
"LVDS1_CH0_TX1_P: BM38," &
"LVDS1_CH0_TX2_N: BL39," &
"LVDS1_CH0_TX2_P: BN39," &
"LVDS1_CH0_TX3_N: BK40," &
"LVDS1_CH0_TX3_P: BM40," &
"LVDS1_CH1_CLK_N: BK34," &
"LVDS1_CH1_CLK_P: BM34," &
"LVDS1_CH1_TX0_N: BL33," &
"LVDS1_CH1_TX0_P: BN33," &
"LVDS1_CH1_TX1_N: BK32," &
"LVDS1_CH1_TX1_P: BM32," &
"LVDS1_CH1_TX2_N: BL31," &
"LVDS1_CH1_TX2_P: BN31," &
"LVDS1_CH1_TX3_N: BK30," &
"LVDS1_CH1_TX3_P: BM30," &
"MIPI_CSI0_CLK_N: BE21," &
"MIPI_CSI0_CLK_P: BF20," &
"MIPI_CSI0_DATA0_N: BE23," &
"MIPI_CSI0_DATA0_P: BF22," &
"MIPI_CSI0_DATA1_N: BE19," &
"MIPI_CSI0_DATA1_P: BF18," &
"MIPI_CSI0_DATA2_N: BE25," &
"MIPI_CSI0_DATA2_P: BF24," &
"MIPI_CSI0_DATA3_N: BE17," &
"MIPI_CSI0_DATA3_P: BF16," &
"MIPI_CSI1_CLK_N: BH16," &
"MIPI_CSI1_CLK_P: BJ17," &
"MIPI_CSI1_DATA0_N: BH18," &
"MIPI_CSI1_DATA0_P: BJ19," &
"MIPI_CSI1_DATA1_N: BH14," &
"MIPI_CSI1_DATA1_P: BJ15," &
"MIPI_CSI1_DATA2_N: BH20," &
"MIPI_CSI1_DATA2_P: BJ21," &
"MIPI_CSI1_DATA3_N: BH12," &
"MIPI_CSI1_DATA3_P: BJ13," &
"MIPI_DSI0_CLK_N: BN27," &
"MIPI_DSI0_CLK_P: BL27," &
"MIPI_DSI0_DATA0_N: BM28," &
"MIPI_DSI0_DATA0_P: BK28," &
"MIPI_DSI0_DATA1_N: BM26," &
"MIPI_DSI0_DATA1_P: BK26," &
"MIPI_DSI0_DATA2_N: BN29," &
"MIPI_DSI0_DATA2_P: BL29," &
"MIPI_DSI0_DATA3_N: BN25," &
"MIPI_DSI0_DATA3_P: BL25," &
"MIPI_DSI1_CLK_N: BH30," &
"MIPI_DSI1_CLK_P: BG31," &
"MIPI_DSI1_DATA0_N: BH32," &
"MIPI_DSI1_DATA0_P: BG33," &
"MIPI_DSI1_DATA1_N: BH28," &
"MIPI_DSI1_DATA1_P: BG29," &
"MIPI_DSI1_DATA2_N: BH34," &
"MIPI_DSI1_DATA2_P: BG35," &
"MIPI_DSI1_DATA3_N: BH26," &
"MIPI_DSI1_DATA3_P: BG27," &
"MLB_CLK_N: E33," &
"MLB_CLK_P: D32," &
"MLB_DATA_N: E35," &
"MLB_DATA_P: F34," &
"MLB_SIG_N: E31," &
"MLB_SIG_P: D30," &
"PCIE0_PHY_PLL_REF_RETURN: M28," &
"PCIE0_RX0_N: B30," &
"PCIE0_RX0_P: A29," &
"PCIE0_TX0_N: C27," &
"PCIE0_TX0_P: B26," &
"PCIE1_PHY_PLL_REF_RETURN: N23," &
"PCIE1_RX0_N: B22," &
"PCIE1_RX0_P: A21," &
"PCIE1_TX0_N: C25," &
"PCIE1_TX0_P: B24," &
"PCIE_REF_QR: E23," &
"PCIE_REXT: D22," &
"PCIE_SATA0_PHY_PLL_REF_RETURN: M20," &
"PCIE_SATA0_RX0_N: B20," &
"PCIE_SATA0_RX0_P: A19," &
"PCIE_SATA0_TX0_N: C17," &
"PCIE_SATA0_TX0_P: B16," &
"PCIE_SATA_REFCLK100M_N: E25," &
"PCIE_SATA_REFCLK100M_P: F26," &
"SAI1_TXC: AU5," &
"USB_OTG1_DN: C39," &
"USB_OTG1_DP: B40," &
"USB_OTG1_ID: A37," &
"USB_OTG1_VBUS: A39," &
"USB_OTG2_DN: C37," &
"USB_OTG2_DP: B38," &
"USB_OTG2_ID: F30," &
"USB_OTG2_REXT: E29," &
"USB_OTG2_VBUS: A35," &
"USB_SS3_REXT: E27," &
"USB_SS3_RX_N: B34," &
"USB_SS3_RX_P: C35," &
"USB_SS3_TX_N: B32," &
"USB_SS3_TX_P: A33," &
"VDD_A53: (AM22, AM26, AN23, AP24, AR21, AR25," &
"AT22)," &
"VDD_A72: (AL29, AL33, AM30, AM34, AN27, AN31," &
"AN35, AP28, AP32, AR29, AR33, AT34)," &
"VDD_ADC_1P8: AL15," &
"VDD_ADC_DIG_1P8: AK16," &
"VDD_ANA0_1P8: (U29, U31)," &
"VDD_ANA1_1P8: U25," &
"VDD_ANA2_1P8: AJ35," &
"VDD_ANA3_1P8: AK20," &
"VDD_CP_1P8: AN37," &
"VDD_DDR_CH0_VDDA_PLL_1P8: AE43," &
"VDD_DDR_CH0_VDDQ: (U39, V38, W39, Y38, AA39, AE39," &
"AF38, AG39, AH38, AJ39)," &
"VDD_DDR_CH0_VDDQ_CKE: (AB38, AC39, AD38)," &
"VDD_DDR_CH1_VDDA_PLL_1P8: AE11," &
"VDD_DDR_CH1_VDDQ: (U15, V16, W15, Y16, AA15, AE15," &
"AF16, AG15, AH16, AJ15)," &
"VDD_DDR_CH1_VDDQ_CKE: (AB16, AC15, AD16)," &
"VDD_EMMC0_1P8_3P3: N35," &
"VDD_ENET0_1P8_2P5_3P3: (M40, N39)," &
"VDD_ENET1_1P8_2P5_3P3: T38," &
"VDD_ENET_MDIO_1P8_2P5_3P3: N17," &
"VDD_ESAI0_MCLK_1P8_3P3: (AP16, AR15)," &
"VDD_ESAI1_SPDIF_SPI_1P8_3P3: AU15," &
"VDD_FLEXCAN_1P8_3P3: N15," &
"VDD_GPU0: (V20, W21, Y18, Y22, AA19, AB20," &
"AC21, AD18, AD22, AE19)," &
"VDD_GPU1: (U35, V36, W33, Y34, AA35, AB32," &
"AB36, AC33, AD34, AE35)," &
"VDD_HDMI_RX0_1P8: AV18," &
"VDD_HDMI_RX0_LDO0_1P0_CAP: AU19," &
"VDD_HDMI_RX0_LDO1_1P0_CAP: AU21," &
"VDD_HDMI_RX0_VH_RX_3P3: AV20," &
"VDD_HDMI_TX0_1P0: AV16," &
"VDD_HDMI_TX0_1P8: AW17," &
"VDD_HDMI_TX0_DIG_3P3: AW21," &
"VDD_HDMI_TX0_LDO_1P0_CAP: AW15," &
"VDD_LVDS0_1P0: AV36," &
"VDD_LVDS0_1P8: AV34," &
"VDD_LVDS1_1P0: AW35," &
"VDD_LVDS1_1P8: AW33," &
"VDD_LVDS_DIG_1P8_3P3: AV32," &
"VDD_M1P8_CAP: AP42," &
"VDD_M4_GPT_UART_1P8_3P3: (AL39, AM38)," &
"VDD_MAIN: (T34, U19, U23, V24, V32, W25," &
"W29, Y26, Y30, AA23, AA27, AA31," &
"AB24, AB28, AC25, AC29, AD26, AD30," &
"AE23, AE27, AE31, AF20, AF24, AF28," &
"AF32, AF36, AG21, AG33, AH18, AH34," &
"AJ19, AJ31, AK32, AK36, AL17, AL21," &
"AL25, AL37, AM18, AN19, AP20, AP36," &
"AR17, AR37, AT18, AT26, AT30, AU35)," &
"VDD_MEMC: (W17, W37, AC17, AC37, AG17, AG25," &
"AG29, AG37, AH22, AH26, AH30, AJ23," &
"AJ27, AK24, AK28)," &
"VDD_MIPI_CSI0_1P0: AV26," &
"VDD_MIPI_CSI0_1P8: AV24," &
"VDD_MIPI_CSI1_1P0: AW25," &
"VDD_MIPI_CSI1_1P8: AU23," &
"VDD_MIPI_CSI_DIG_1P8: AV22," &
"VDD_MIPI_DSI0_1P0: AU29," &
"VDD_MIPI_DSI0_1P8: AW31," &
"VDD_MIPI_DSI0_PLL_1P0: AW29," &
"VDD_MIPI_DSI1_1P0: AV28," &
"VDD_MIPI_DSI1_1P8: AV30," &
"VDD_MIPI_DSI1_PLL_1P0: AW27," &
"VDD_MIPI_DSI_DIG_1P8_3P3: AU27," &
"VDD_MLB_1P8: T30," &
"VDD_MLB_DIG_1P8_3P3: M14," &
"VDD_PCIE0_1P0: M26," &
"VDD_PCIE0_PLL_1P8: N27," &
"VDD_PCIE1_1P0: N25," &
"VDD_PCIE1_PLL_1P8: M22," &
"VDD_PCIE_DIG_1P8: T22," &
"VDD_PCIE_IOB_1P8: T26," &
"VDD_PCIE_LDO_1P0_CAP: N29," &
"VDD_PCIE_LDO_1P8: U27," &
"VDD_PCIE_SATA0_1P0: M24," &
"VDD_PCIE_SATA0_PLL_1P8: N21," &
"VDD_QSPI0_1P8_3P3: N19," &
"VDD_QSPI1A_1P8_3P3: M18," &
"VDD_SCU_1P8: (AN39, AP38)," &
"VDD_SCU_ANA_1P8: AR39," &
"VDD_SCU_XTAL_1P8: AU39," &
"VDD_SIM0_1P8_3P3: AK42," &
"VDD_SNVS_4P2: AT38," &
"VDD_SNVS_LDO_1P8_CAP: AW39," &
"VDD_SPI_SAI_1P8_3P3: (AM16, AN15)," &
"VDD_USB_HSIC0_1P2: V26," &
"VDD_USB_HSIC0_1P8: V28," &
"VDD_USB_OTG1_1P0: M32," &
"VDD_USB_OTG1_3P3: N33," &
"VDD_USB_OTG2_1P0: N31," &
"VDD_USB_OTG2_3P3: M34," &
"VDD_USB_SS3_LDO_1P0_CAP: M30," &
"VDD_USB_SS3_TC_3P3: M16," &
"VDD_USDHC1_1P8_3P3: (M36, N37)," &
"VDD_USDHC2_1P8_3P3: M38," &
"VDD_USDHC_VSELECT_1P8_3P3: T18," &
"VREFH_ADC: AL11," &
"VREFL_ADC: AM10," &
"VSS_MAIN: (A3, A23, A31, A51, B6, B12," &
"B14, B18, B28, B36, B46, C1," &
"C9, C11, C15, C19, C21, C23," &
"C29, C31, C33, C41, C43, C49," &
"C53, D6, D16, D18, D24, D26," &
"D28, D34, D36, D38, D40, E9," &
"E19, E21, E47, F2, F4, F12," &
"F24, F32, F36, F44, F50, F52," &
"G5, G9, G15, G21, G23, G27," &
"G33, G39, G49, J1, J3, J5," &
"J7, J13, J15, J17, J19, J21," &
"J23, J25, J29, J31, J35, J37," &
"J41, J47, J49, J51, J53, K8," &
"K12, K14, K16, K18, K20, K22," &
"K24, K26, K28, K30, K32, K34," &
"K36, K38, K40, K42, K46, L11," &
"L13, L15, L17, L19, L21, L23," &
"L25, L27, L29, L31, L33, L35," &
"L37, L39, L41, L43, M2, M4," &
"M6, M8, M10, M44, M46, M48," &
"M50, M52, N13, N41, P12, P42," &
"R1, R3, R5, R7, R9, R11," &
"R15, R17, R19, R21, R23, R25," &
"R27, R29, R31, R33, R35, R37," &
"R39, R43, R45, R47, R49, R51," &
"R53, T12, T16, T20, T24, T28," &
"T32, T36, T42, U17, U21, U33," &
"U37, V2, V4, V6, V8, V10," &
"V12, V18, V22, V30, V34, V42," &
"V44, V46, V48, V50, V52, W19," &
"W23, W27, W31, W35, Y12, Y20," &
"Y24, Y28, Y32, Y36, Y42, AA1," &
"AA3, AA5, AA7, AA9, AA11, AA13," &
"AA17, AA21, AA25, AA29, AA33, AA37," &
"AA41, AA43, AA45, AA47, AA49, AA51," &
"AA53, AB12, AB18, AB22, AB26, AB30," &
"AB34, AB42, AC13, AC19, AC23, AC27," &
"AC31, AC35, AC41, AD2, AD4, AD6," &
"AD8, AD10, AD12, AD20, AD24, AD28," &
"AD32, AD36, AD42, AD44, AD46, AD48," &
"AD50, AD52, AE13, AE17, AE21, AE25," &
"AE29, AE33, AE37, AE41, AF12, AF18," &
"AF22, AF26, AF30, AF34, AF42, AG1," &
"AG3, AG5, AG7, AG9, AG11, AG13," &
"AG19, AG23, AG27, AG31, AG35, AG41," &
"AG43, AG45, AG47, AG49, AG51, AG53," &
"AH12, AH20, AH24, AH28, AH32, AH36," &
"AH42, AJ13, AJ17, AJ21, AJ25, AJ29," &
"AJ33, AJ37, AJ41, AK2, AK4, AK6," &
"AK8, AK10, AK12, AK18, AK22, AK26," &
"AK30, AK34, AK38, AK44, AK46, AK48," &
"AK50, AK52, AL13, AL19, AL23, AL27," &
"AL31, AL35, AL41, AM8, AM12, AM20," &
"AM24, AM28, AM32, AM36, AM42, AM46," &
"AN1, AN3, AN5, AN7, AN13, AN17," &
"AN21, AN25, AN29, AN33, AN41, AN43," &
"AN47, AN49, AN51, AN53, AP12, AP18," &
"AP22, AP26, AP30, AP34, AR5, AR11," &
"AR19, AR23, AR27, AR31, AR35, AR49," &
"AT2, AT4, AT6, AT8, AT12, AT16," &
"AT20, AT24, AT28, AT32, AT36, AT42," &
"AT46, AT50, AT52, AU17, AU25, AU31," &
"AU33, AU37, AV12, AV38, AV42, AW3," &
"AW7, AW11, AW19, AW23, AW37, AW43," &
"AW47, AW51, BA13, BA15, BA17, BA19," &
"BA21, BA23, BA25, BA27, BA29, BA31," &
"BA33, BA35, BA37, BA39, BA41, BA45," &
"BB2, BB6, BB10, BB14, BB16, BB18," &
"BB20, BB22, BB24, BB26, BB28, BB30," &
"BB32, BB34, BB36, BB38, BB40, BB48," &
"BB52, BC11, BC13, BC15, BC17, BC19," &
"BC21, BC23, BC25, BC27, BC29, BC31," &
"BC33, BC35, BC37, BC39, BC41, BC43," &
"BD14, BD16, BD18, BD20, BD22, BD24," &
"BD26, BD48, BD50, BE3, BE7, BE9," &
"BE45, BF4, BF26, BF28, BF30, BF32," &
"BF34, BF36, BF38, BF40, BF42, BF44," &
"BF52, BG7, BG11, BG13, BG15, BG17," &
"BG19, BG21, BG23, BG47, BH4, BH22," &
"BJ3, BJ5, BJ25, BJ27, BJ29, BJ31," &
"BJ33, BJ35, BJ37, BJ39, BJ41, BJ43," &
"BJ45, BJ47, BJ49, BJ51, BK6, BK8," &
"BK10, BK12, BK14, BK16, BK18, BK20," &
"BK22, BK46, BK48, BL1, BL21, BL53," &
"BM10, BM46, BM48, BM50, BN3, BN21," &
"BN51)," &
"XTALI: BN49," &
"XTALO: BL49" ;
attribute TAP_SCAN_OUT of JTAG_TDO : signal is true;
attribute TAP_SCAN_CLOCK of JTAG_TCK : signal is (5.00e+06,BOTH);
attribute TAP_SCAN_MODE of JTAG_TMS : signal is true;
attribute TAP_SCAN_IN of JTAG_TDI : signal is true;
attribute COMPLIANCE_PATTERNS of IMX8QM_29x29: entity is
"(TEST_MODE_SELECT, POR_B) (01)";
attribute INSTRUCTION_LENGTH of IMX8QM_29x29: entity is 4;
attribute INSTRUCTION_OPCODE of IMX8QM_29x29: entity is
"BYPASS (1111)," &
"CLAMP (1100)," &
"EXTEST (0100)," &
"HIGHZ (1001)," &
"IDCODE (0000)," &
"PRELOAD (0010)," &
"SAMPLE (0011)," &
"PRIVATE000 (0001)," &
"PRIVATE001 (0101)," &
"PRIVATE002 (0110)," &
"PRIVATE003 (0111)," &
"PRIVATE004 (1000)," &
"PRIVATE005 (1010)," &
"PRIVATE006 (1011)," &
"PRIVATE007 (1101)," &
"PRIVATE008 (1110)";
attribute INSTRUCTION_CAPTURE of IMX8QM_29x29: entity is "xx01";
attribute INSTRUCTION_PRIVATE of IMX8QM_29x29: entity is
"PRIVATE000," &
"PRIVATE001," &
"PRIVATE002," &
"PRIVATE003," &
"PRIVATE004," &
"PRIVATE005," &
"PRIVATE006," &
"PRIVATE007," &
"PRIVATE008";
attribute IDCODE_REGISTER of IMX8QM_29x29: entity is
"0001" & -- Version
"1000100100000001" & -- Part Number
"00000001110" & -- Manufacturer Identity
"1"; -- IEEE 1149.1 Requirement
attribute REGISTER_ACCESS of IMX8QM_29x29: entity is
"BOUNDARY (EXTEST, SAMPLE, PRELOAD)," &
"BYPASS (BYPASS, CLAMP, HIGHZ)," &
"DEVICE_ID (IDCODE)";
attribute BOUNDARY_LENGTH of IMX8QM_29x29: entity is 1152;
attribute BOUNDARY_REGISTER of IMX8QM_29x29: entity is
-- BSR DESCRIPTION TERMS
-- cell type = BC_0 - BC_99
-- port = port name
-- function
-- input = input only
-- bidir = bidirectional
-- output2 = two state ouput
-- output3 = three state ouput
-- control = control cell
-- controlr = control cell
-- internal = placeholder cell
-- safe = value that turns off drivers in control cells
-- ccell = controlling cell number for I/O direction
-- dsval = disabling (input) value
-- rslt = result if disabled (input = Z)
--
-- num cell port/* function safe [ccell dis rslt]
" 0 (BC_1, DDR_CH1_DCF02, input, X) ," &
" 1 (BC_1, DDR_CH1_DCF02, output3, X, 2, 0, Z) ," &
" 2 (BC_1, *, control, 0) ," &
" 3 (BC_1, DDR_CH1_DCF18, input, X) ," &
" 4 (BC_1, DDR_CH1_DCF18, output3, X, 5, 0, Z) ," &
" 5 (BC_1, *, control, 0) ," &
" 6 (BC_1, DDR_CH1_DQS3_N, input, X) ," &
" 7 (BC_1, DDR_CH1_DQS3_N, output3, X, 10, 0, Z) ," &
" 8 (BC_1, DDR_CH1_DQS3_P, input, X) ," &
" 9 (BC_1, DDR_CH1_DQS3_P, output3, X, 10, 0, Z) ," &
" 10 (BC_1, *, control, 0) ," &
" 11 (BC_1, DDR_CH1_DQS2_N, input, X) ," &
" 12 (BC_1, DDR_CH1_DQS2_N, output3, X, 15, 0, Z) ," &
" 13 (BC_1, DDR_CH1_DQS2_P, input, X) ," &
" 14 (BC_1, DDR_CH1_DQS2_P, output3, X, 15, 0, Z) ," &
" 15 (BC_1, *, control, 0) ," &
" 16 (BC_1, DDR_CH1_DQS1_N, input, X) ," &
" 17 (BC_1, DDR_CH1_DQS1_N, output3, X, 20, 0, Z) ," &
" 18 (BC_1, DDR_CH1_DQS1_P, input, X) ," &
" 19 (BC_1, DDR_CH1_DQS1_P, output3, X, 20, 0, Z) ," &
" 20 (BC_1, *, control, 0) ," &
" 21 (BC_1, DDR_CH1_DQS0_N, input, X) ," &
" 22 (BC_1, DDR_CH1_DQS0_N, output3, X, 25, 0, Z) ," &
" 23 (BC_1, DDR_CH1_DQS0_P, input, X) ," &
" 24 (BC_1, DDR_CH1_DQS0_P, output3, X, 25, 0, Z) ," &
" 25 (BC_1, *, control, 0) ," &
" 26 (BC_1, DDR_CH1_CK1_N, input, X) ," &
" 27 (BC_1, DDR_CH1_CK1_N, output3, X, 30, 0, Z) ," &
" 28 (BC_1, DDR_CH1_CK1_P, input, X) ," &
" 29 (BC_1, DDR_CH1_CK1_P, output3, X, 30, 0, Z) ," &
" 30 (BC_1, *, control, 0) ," &
" 31 (BC_1, DDR_CH1_CK0_N, input, X) ," &
" 32 (BC_1, DDR_CH1_CK0_N, output3, X, 35, 0, Z) ," &
" 33 (BC_1, DDR_CH1_CK0_P, input, X) ," &
" 34 (BC_1, DDR_CH1_CK0_P, output3, X, 35, 0, Z) ," &
" 35 (BC_1, *, control, 0) ," &
" 36 (BC_1, DDR_CH1_DM3, input, X) ," &
" 37 (BC_1, DDR_CH1_DM3, output3, X, 38, 0, Z) ," &
" 38 (BC_1, *, control, 0) ," &
" 39 (BC_1, DDR_CH1_DM2, input, X) ," &
" 40 (BC_1, DDR_CH1_DM2, output3, X, 41, 0, Z) ," &
" 41 (BC_1, *, control, 0) ," &
" 42 (BC_1, DDR_CH1_DM1, input, X) ," &
" 43 (BC_1, DDR_CH1_DM1, output3, X, 44, 0, Z) ," &
" 44 (BC_1, *, control, 0) ," &
" 45 (BC_1, DDR_CH1_DM0, input, X) ," &
" 46 (BC_1, DDR_CH1_DM0, output3, X, 47, 0, Z) ," &
" 47 (BC_1, *, control, 0) ," &
" 48 (BC_1, DDR_CH1_DQ31, input, X) ," &
" 49 (BC_1, DDR_CH1_DQ31, output3, X, 50, 0, Z) ," &
" 50 (BC_1, *, control, 0) ," &
" 51 (BC_1, DDR_CH1_DQ30, input, X) ," &
" 52 (BC_1, DDR_CH1_DQ30, output3, X, 53, 0, Z) ," &
" 53 (BC_1, *, control, 0) ," &
" 54 (BC_1, DDR_CH1_DQ29, input, X) ," &
" 55 (BC_1, DDR_CH1_DQ29, output3, X, 56, 0, Z) ," &
" 56 (BC_1, *, control, 0) ," &
" 57 (BC_1, DDR_CH1_DQ28, input, X) ," &
" 58 (BC_1, DDR_CH1_DQ28, output3, X, 59, 0, Z) ," &
" 59 (BC_1, *, control, 0) ," &
" 60 (BC_1, DDR_CH1_DQ27, input, X) ," &
" 61 (BC_1, DDR_CH1_DQ27, output3, X, 62, 0, Z) ," &
" 62 (BC_1, *, control, 0) ," &
" 63 (BC_1, DDR_CH1_DQ26, input, X) ," &
" 64 (BC_1, DDR_CH1_DQ26, output3, X, 65, 0, Z) ," &
" 65 (BC_1, *, control, 0) ," &
" 66 (BC_1, DDR_CH1_DQ25, input, X) ," &
" 67 (BC_1, DDR_CH1_DQ25, output3, X, 68, 0, Z) ," &
" 68 (BC_1, *, control, 0) ," &
" 69 (BC_1, DDR_CH1_DQ24, input, X) ," &
" 70 (BC_1, DDR_CH1_DQ24, output3, X, 71, 0, Z) ," &
" 71 (BC_1, *, control, 0) ," &
" 72 (BC_1, DDR_CH1_DQ23, input, X) ," &
" 73 (BC_1, DDR_CH1_DQ23, output3, X, 74, 0, Z) ," &
" 74 (BC_1, *, control, 0) ," &
" 75 (BC_1, DDR_CH1_DQ22, input, X) ," &
" 76 (BC_1, DDR_CH1_DQ22, output3, X, 77, 0, Z) ," &
" 77 (BC_1, *, control, 0) ," &
" 78 (BC_1, DDR_CH1_DQ21, input, X) ," &
" 79 (BC_1, DDR_CH1_DQ21, output3, X, 80, 0, Z) ," &
" 80 (BC_1, *, control, 0) ," &
" 81 (BC_1, DDR_CH1_DQ20, input, X) ," &
" 82 (BC_1, DDR_CH1_DQ20, output3, X, 83, 0, Z) ," &
" 83 (BC_1, *, control, 0) ," &
" 84 (BC_1, DDR_CH1_DQ19, input, X) ," &
" 85 (BC_1, DDR_CH1_DQ19, output3, X, 86, 0, Z) ," &
" 86 (BC_1, *, control, 0) ," &
" 87 (BC_1, DDR_CH1_DQ18, input, X) ," &
" 88 (BC_1, DDR_CH1_DQ18, output3, X, 89, 0, Z) ," &
" 89 (BC_1, *, control, 0) ," &
" 90 (BC_1, DDR_CH1_DQ17, input, X) ," &
" 91 (BC_1, DDR_CH1_DQ17, output3, X, 92, 0, Z) ," &
" 92 (BC_1, *, control, 0) ," &
" 93 (BC_1, DDR_CH1_DQ16, input, X) ," &
" 94 (BC_1, DDR_CH1_DQ16, output3, X, 95, 0, Z) ," &
" 95 (BC_1, *, control, 0) ," &
" 96 (BC_1, DDR_CH1_DQ15, input, X) ," &
" 97 (BC_1, DDR_CH1_DQ15, output3, X, 98, 0, Z) ," &
" 98 (BC_1, *, control, 0) ," &
" 99 (BC_1, DDR_CH1_DQ14, input, X) ," &
" 100 (BC_1, DDR_CH1_DQ14, output3, X, 101, 0, Z) ," &
" 101 (BC_1, *, control, 0) ," &
" 102 (BC_1, DDR_CH1_DQ13, input, X) ," &
" 103 (BC_1, DDR_CH1_DQ13, output3, X, 104, 0, Z) ," &
" 104 (BC_1, *, control, 0) ," &
" 105 (BC_1, DDR_CH1_DQ12, input, X) ," &
" 106 (BC_1, DDR_CH1_DQ12, output3, X, 107, 0, Z) ," &
" 107 (BC_1, *, control, 0) ," &
" 108 (BC_1, DDR_CH1_DQ11, input, X) ," &
" 109 (BC_1, DDR_CH1_DQ11, output3, X, 110, 0, Z) ," &
" 110 (BC_1, *, control, 0) ," &
" 111 (BC_1, DDR_CH1_DQ10, input, X) ," &
" 112 (BC_1, DDR_CH1_DQ10, output3, X, 113, 0, Z) ," &
" 113 (BC_1, *, control, 0) ," &
" 114 (BC_1, DDR_CH1_DQ09, input, X) ," &
" 115 (BC_1, DDR_CH1_DQ09, output3, X, 116, 0, Z) ," &
" 116 (BC_1, *, control, 0) ," &
" 117 (BC_1, DDR_CH1_DQ08, input, X) ," &
" 118 (BC_1, DDR_CH1_DQ08, output3, X, 119, 0, Z) ," &
" 119 (BC_1, *, control, 0) ," &
" 120 (BC_1, DDR_CH1_DQ07, input, X) ," &
" 121 (BC_1, DDR_CH1_DQ07, output3, X, 122, 0, Z) ," &
" 122 (BC_1, *, control, 0) ," &
" 123 (BC_1, DDR_CH1_DQ06, input, X) ," &
" 124 (BC_1, DDR_CH1_DQ06, output3, X, 125, 0, Z) ," &
" 125 (BC_1, *, control, 0) ," &
" 126 (BC_1, DDR_CH1_DQ05, input, X) ," &
" 127 (BC_1, DDR_CH1_DQ05, output3, X, 128, 0, Z) ," &
" 128 (BC_1, *, control, 0) ," &
" 129 (BC_1, DDR_CH1_DQ04, input, X) ," &
" 130 (BC_1, DDR_CH1_DQ04, output3, X, 131, 0, Z) ," &
" 131 (BC_1, *, control, 0) ," &
" 132 (BC_1, DDR_CH1_DQ03, input, X) ," &
" 133 (BC_1, DDR_CH1_DQ03, output3, X, 134, 0, Z) ," &
" 134 (BC_1, *, control, 0) ," &
" 135 (BC_1, DDR_CH1_DQ02, input, X) ," &
" 136 (BC_1, DDR_CH1_DQ02, output3, X, 137, 0, Z) ," &
" 137 (BC_1, *, control, 0) ," &
" 138 (BC_1, DDR_CH1_DQ01, input, X) ," &
" 139 (BC_1, DDR_CH1_DQ01, output3, X, 140, 0, Z) ," &
" 140 (BC_1, *, control, 0) ," &
" 141 (BC_1, DDR_CH1_DQ00, input, X) ," &
" 142 (BC_1, DDR_CH1_DQ00, output3, X, 143, 0, Z) ," &
" 143 (BC_1, *, control, 0) ," &
" 144 (BC_1, DDR_CH1_DCF25, input, X) ," &
" 145 (BC_1, DDR_CH1_DCF25, output3, X, 146, 0, Z) ," &
" 146 (BC_1, *, control, 0) ," &
" 147 (BC_1, DDR_CH1_DCF26, input, X) ," &
" 148 (BC_1, DDR_CH1_DCF26, output3, X, 149, 0, Z) ," &
" 149 (BC_1, *, control, 0) ," &
" 150 (BC_1, DDR_CH1_DCF27, input, X) ," &
" 151 (BC_1, DDR_CH1_DCF27, output3, X, 152, 0, Z) ," &
" 152 (BC_1, *, control, 0) ," &
" 153 (BC_1, DDR_CH1_DCF28, input, X) ," &
" 154 (BC_1, DDR_CH1_DCF28, output3, X, 155, 0, Z) ," &
" 155 (BC_1, *, control, 0) ," &
" 156 (BC_1, DDR_CH1_DCF29, input, X) ," &
" 157 (BC_1, DDR_CH1_DCF29, output3, X, 158, 0, Z) ," &
" 158 (BC_1, *, control, 0) ," &
" 159 (BC_1, DDR_CH1_DCF30, input, X) ," &
" 160 (BC_1, DDR_CH1_DCF30, output3, X, 161, 0, Z) ," &
" 161 (BC_1, *, control, 0) ," &
" 162 (BC_1, DDR_CH1_DCF31, input, X) ," &
" 163 (BC_1, DDR_CH1_DCF31, output3, X, 164, 0, Z) ," &
" 164 (BC_1, *, control, 0) ," &
" 165 (BC_1, DDR_CH1_DCF32, input, X) ," &
" 166 (BC_1, DDR_CH1_DCF32, output3, X, 167, 0, Z) ," &
" 167 (BC_1, *, control, 0) ," &
" 168 (BC_1, DDR_CH1_DCF33, input, X) ," &
" 169 (BC_1, DDR_CH1_DCF33, output3, X, 170, 0, Z) ," &
" 170 (BC_1, *, control, 0) ," &
" 171 (BC_1, DDR_CH1_DCF17, input, X) ," &
" 172 (BC_1, DDR_CH1_DCF17, output3, X, 173, 0, Z) ," &
" 173 (BC_1, *, control, 0) ," &
" 174 (BC_1, DDR_CH1_DCF19, input, X) ," &
" 175 (BC_1, DDR_CH1_DCF19, output3, X, 176, 0, Z) ," &
" 176 (BC_1, *, control, 0) ," &
" 177 (BC_1, DDR_CH1_DCF20, input, X) ," &
" 178 (BC_1, DDR_CH1_DCF20, output3, X, 179, 0, Z) ," &
" 179 (BC_1, *, control, 0) ," &
" 180 (BC_1, DDR_CH1_DCF21, input, X) ," &
" 181 (BC_1, DDR_CH1_DCF21, output3, X, 182, 0, Z) ," &
" 182 (BC_1, *, control, 0) ," &
" 183 (BC_1, DDR_CH1_DCF22, input, X) ," &
" 184 (BC_1, DDR_CH1_DCF22, output3, X, 185, 0, Z) ," &
" 185 (BC_1, *, control, 0) ," &
" 186 (BC_1, DDR_CH1_DCF23, input, X) ," &
" 187 (BC_1, DDR_CH1_DCF23, output3, X, 188, 0, Z) ," &
" 188 (BC_1, *, control, 0) ," &
" 189 (BC_1, DDR_CH1_DCF24, input, X) ," &
" 190 (BC_1, DDR_CH1_DCF24, output3, X, 191, 0, Z) ," &
" 191 (BC_1, *, control, 0) ," &
" 192 (BC_1, DDR_CH1_DCF08, input, X) ," &
" 193 (BC_1, DDR_CH1_DCF08, output3, X, 194, 0, Z) ," &
" 194 (BC_1, *, control, 0) ," &
" 195 (BC_1, DDR_CH1_DCF09, input, X) ," &
" 196 (BC_1, DDR_CH1_DCF09, output3, X, 197, 0, Z) ," &
" 197 (BC_1, *, control, 0) ," &
" 198 (BC_1, DDR_CH1_DCF10, input, X) ," &
" 199 (BC_1, DDR_CH1_DCF10, output3, X, 200, 0, Z) ," &
" 200 (BC_1, *, control, 0) ," &
" 201 (BC_1, DDR_CH1_DCF11, input, X) ," &
" 202 (BC_1, DDR_CH1_DCF11, output3, X, 203, 0, Z) ," &
" 203 (BC_1, *, control, 0) ," &
" 204 (BC_1, DDR_CH1_DCF12, input, X) ," &
" 205 (BC_1, DDR_CH1_DCF12, output3, X, 206, 0, Z) ," &
" 206 (BC_1, *, control, 0) ," &
" 207 (BC_1, DDR_CH1_DCF13, input, X) ," &
" 208 (BC_1, DDR_CH1_DCF13, output3, X, 209, 0, Z) ," &
" 209 (BC_1, *, control, 0) ," &
" 210 (BC_1, DDR_CH1_DCF14, input, X) ," &
" 211 (BC_1, DDR_CH1_DCF14, output3, X, 212, 0, Z) ," &
" 212 (BC_1, *, control, 0) ," &
" 213 (BC_1, DDR_CH1_DCF15, input, X) ," &
" 214 (BC_1, DDR_CH1_DCF15, output3, X, 215, 0, Z) ," &
" 215 (BC_1, *, control, 0) ," &
" 216 (BC_1, DDR_CH1_DCF16, input, X) ," &
" 217 (BC_1, DDR_CH1_DCF16, output3, X, 218, 0, Z) ," &
" 218 (BC_1, *, control, 0) ," &
" 219 (BC_1, DDR_CH1_DCF00, input, X) ," &
" 220 (BC_1, DDR_CH1_DCF00, output3, X, 221, 0, Z) ," &
" 221 (BC_1, *, control, 0) ," &
" 222 (BC_1, DDR_CH1_DCF01, input, X) ," &
" 223 (BC_1, DDR_CH1_DCF01, output3, X, 224, 0, Z) ," &
" 224 (BC_1, *, control, 0) ," &
" 225 (BC_1, DDR_CH1_DCF03, input, X) ," &
" 226 (BC_1, DDR_CH1_DCF03, output3, X, 227, 0, Z) ," &
" 227 (BC_1, *, control, 0) ," &
" 228 (BC_1, DDR_CH1_DCF04, input, X) ," &
" 229 (BC_1, DDR_CH1_DCF04, output3, X, 230, 0, Z) ," &
" 230 (BC_1, *, control, 0) ," &
" 231 (BC_1, DDR_CH1_DCF05, input, X) ," &
" 232 (BC_1, DDR_CH1_DCF05, output3, X, 233, 0, Z) ," &
" 233 (BC_1, *, control, 0) ," &
" 234 (BC_1, DDR_CH1_DCF06, input, X) ," &
" 235 (BC_1, DDR_CH1_DCF06, output3, X, 236, 0, Z) ," &
" 236 (BC_1, *, control, 0) ," &
" 237 (BC_1, DDR_CH1_DCF07, input, X) ," &
" 238 (BC_1, DDR_CH1_DCF07, output3, X, 239, 0, Z) ," &
" 239 (BC_1, *, control, 0) ," &
" 240 (BC_1, DDR_CH0_DCF02, input, X) ," &
" 241 (BC_1, DDR_CH0_DCF02, output3, X, 242, 0, Z) ," &
" 242 (BC_1, *, control, 0) ," &
" 243 (BC_1, DDR_CH0_DCF18, input, X) ," &
" 244 (BC_1, DDR_CH0_DCF18, output3, X, 245, 0, Z) ," &
" 245 (BC_1, *, control, 0) ," &
" 246 (BC_1, DDR_CH0_DQS3_N, input, X) ," &
" 247 (BC_1, DDR_CH0_DQS3_N, output3, X, 250, 0, Z) ," &
" 248 (BC_1, DDR_CH0_DQS3_P, input, X) ," &
" 249 (BC_1, DDR_CH0_DQS3_P, output3, X, 250, 0, Z) ," &
" 250 (BC_1, *, control, 0) ," &
" 251 (BC_1, DDR_CH0_DQS2_N, input, X) ," &
" 252 (BC_1, DDR_CH0_DQS2_N, output3, X, 255, 0, Z) ," &
" 253 (BC_1, DDR_CH0_DQS2_P, input, X) ," &
" 254 (BC_1, DDR_CH0_DQS2_P, output3, X, 255, 0, Z) ," &
" 255 (BC_1, *, control, 0) ," &
" 256 (BC_1, DDR_CH0_DQS1_N, input, X) ," &
" 257 (BC_1, DDR_CH0_DQS1_N, output3, X, 260, 0, Z) ," &
" 258 (BC_1, DDR_CH0_DQS1_P, input, X) ," &
" 259 (BC_1, DDR_CH0_DQS1_P, output3, X, 260, 0, Z) ," &
" 260 (BC_1, *, control, 0) ," &
" 261 (BC_1, DDR_CH0_DQS0_N, input, X) ," &
" 262 (BC_1, DDR_CH0_DQS0_N, output3, X, 265, 0, Z) ," &
" 263 (BC_1, DDR_CH0_DQS0_P, input, X) ," &
" 264 (BC_1, DDR_CH0_DQS0_P, output3, X, 265, 0, Z) ," &
" 265 (BC_1, *, control, 0) ," &
" 266 (BC_1, DDR_CH0_CK1_N, input, X) ," &
" 267 (BC_1, DDR_CH0_CK1_N, output3, X, 270, 0, Z) ," &
" 268 (BC_1, DDR_CH0_CK1_P, input, X) ," &
" 269 (BC_1, DDR_CH0_CK1_P, output3, X, 270, 0, Z) ," &
" 270 (BC_1, *, control, 0) ," &
" 271 (BC_1, DDR_CH0_CK0_N, input, X) ," &
" 272 (BC_1, DDR_CH0_CK0_N, output3, X, 275, 0, Z) ," &
" 273 (BC_1, DDR_CH0_CK0_P, input, X) ," &
" 274 (BC_1, DDR_CH0_CK0_P, output3, X, 275, 0, Z) ," &
" 275 (BC_1, *, control, 0) ," &
" 276 (BC_1, DDR_CH0_DM3, input, X) ," &
" 277 (BC_1, DDR_CH0_DM3, output3, X, 278, 0, Z) ," &
" 278 (BC_1, *, control, 0) ," &
" 279 (BC_1, DDR_CH0_DM2, input, X) ," &
" 280 (BC_1, DDR_CH0_DM2, output3, X, 281, 0, Z) ," &
" 281 (BC_1, *, control, 0) ," &
" 282 (BC_1, DDR_CH0_DM1, input, X) ," &
" 283 (BC_1, DDR_CH0_DM1, output3, X, 284, 0, Z) ," &
" 284 (BC_1, *, control, 0) ," &
" 285 (BC_1, DDR_CH0_DM0, input, X) ," &
" 286 (BC_1, DDR_CH0_DM0, output3, X, 287, 0, Z) ," &
" 287 (BC_1, *, control, 0) ," &
" 288 (BC_1, DDR_CH0_DQ31, input, X) ," &
" 289 (BC_1, DDR_CH0_DQ31, output3, X, 290, 0, Z) ," &
" 290 (BC_1, *, control, 0) ," &
" 291 (BC_1, DDR_CH0_DQ30, input, X) ," &
" 292 (BC_1, DDR_CH0_DQ30, output3, X, 293, 0, Z) ," &
" 293 (BC_1, *, control, 0) ," &
" 294 (BC_1, DDR_CH0_DQ29, input, X) ," &
" 295 (BC_1, DDR_CH0_DQ29, output3, X, 296, 0, Z) ," &
" 296 (BC_1, *, control, 0) ," &
" 297 (BC_1, DDR_CH0_DQ28, input, X) ," &
" 298 (BC_1, DDR_CH0_DQ28, output3, X, 299, 0, Z) ," &
" 299 (BC_1, *, control, 0) ," &
" 300 (BC_1, DDR_CH0_DQ27, input, X) ," &
" 301 (BC_1, DDR_CH0_DQ27, output3, X, 302, 0, Z) ," &
" 302 (BC_1, *, control, 0) ," &
" 303 (BC_1, DDR_CH0_DQ26, input, X) ," &
" 304 (BC_1, DDR_CH0_DQ26, output3, X, 305, 0, Z) ," &
" 305 (BC_1, *, control, 0) ," &
" 306 (BC_1, DDR_CH0_DQ25, input, X) ," &
" 307 (BC_1, DDR_CH0_DQ25, output3, X, 308, 0, Z) ," &
" 308 (BC_1, *, control, 0) ," &
" 309 (BC_1, DDR_CH0_DQ24, input, X) ," &
" 310 (BC_1, DDR_CH0_DQ24, output3, X, 311, 0, Z) ," &
" 311 (BC_1, *, control, 0) ," &
" 312 (BC_1, DDR_CH0_DQ23, input, X) ," &
" 313 (BC_1, DDR_CH0_DQ23, output3, X, 314, 0, Z) ," &
" 314 (BC_1, *, control, 0) ," &
" 315 (BC_1, DDR_CH0_DQ22, input, X) ," &
" 316 (BC_1, DDR_CH0_DQ22, output3, X, 317, 0, Z) ," &
" 317 (BC_1, *, control, 0) ," &
" 318 (BC_1, DDR_CH0_DQ21, input, X) ," &
" 319 (BC_1, DDR_CH0_DQ21, output3, X, 320, 0, Z) ," &
" 320 (BC_1, *, control, 0) ," &
" 321 (BC_1, DDR_CH0_DQ20, input, X) ," &
" 322 (BC_1, DDR_CH0_DQ20, output3, X, 323, 0, Z) ," &
" 323 (BC_1, *, control, 0) ," &
" 324 (BC_1, DDR_CH0_DQ19, input, X) ," &
" 325 (BC_1, DDR_CH0_DQ19, output3, X, 326, 0, Z) ," &
" 326 (BC_1, *, control, 0) ," &
" 327 (BC_1, DDR_CH0_DQ18, input, X) ," &
" 328 (BC_1, DDR_CH0_DQ18, output3, X, 329, 0, Z) ," &
" 329 (BC_1, *, control, 0) ," &
" 330 (BC_1, DDR_CH0_DQ17, input, X) ," &
" 331 (BC_1, DDR_CH0_DQ17, output3, X, 332, 0, Z) ," &
" 332 (BC_1, *, control, 0) ," &
" 333 (BC_1, DDR_CH0_DQ16, input, X) ," &
" 334 (BC_1, DDR_CH0_DQ16, output3, X, 335, 0, Z) ," &
" 335 (BC_1, *, control, 0) ," &
" 336 (BC_1, DDR_CH0_DQ15, input, X) ," &
" 337 (BC_1, DDR_CH0_DQ15, output3, X, 338, 0, Z) ," &
" 338 (BC_1, *, control, 0) ," &
" 339 (BC_1, DDR_CH0_DQ14, input, X) ," &
" 340 (BC_1, DDR_CH0_DQ14, output3, X, 341, 0, Z) ," &
" 341 (BC_1, *, control, 0) ," &
" 342 (BC_1, DDR_CH0_DQ13, input, X) ," &
" 343 (BC_1, DDR_CH0_DQ13, output3, X, 344, 0, Z) ," &
" 344 (BC_1, *, control, 0) ," &
" 345 (BC_1, DDR_CH0_DQ12, input, X) ," &
" 346 (BC_1, DDR_CH0_DQ12, output3, X, 347, 0, Z) ," &
" 347 (BC_1, *, control, 0) ," &
" 348 (BC_1, DDR_CH0_DQ11, input, X) ," &
" 349 (BC_1, DDR_CH0_DQ11, output3, X, 350, 0, Z) ," &
" 350 (BC_1, *, control, 0) ," &
" 351 (BC_1, DDR_CH0_DQ10, input, X) ," &
" 352 (BC_1, DDR_CH0_DQ10, output3, X, 353, 0, Z) ," &
" 353 (BC_1, *, control, 0) ," &
" 354 (BC_1, DDR_CH0_DQ09, input, X) ," &
" 355 (BC_1, DDR_CH0_DQ09, output3, X, 356, 0, Z) ," &
" 356 (BC_1, *, control, 0) ," &
" 357 (BC_1, DDR_CH0_DQ08, input, X) ," &
" 358 (BC_1, DDR_CH0_DQ08, output3, X, 359, 0, Z) ," &
" 359 (BC_1, *, control, 0) ," &
" 360 (BC_1, DDR_CH0_DQ07, input, X) ," &
" 361 (BC_1, DDR_CH0_DQ07, output3, X, 362, 0, Z) ," &
" 362 (BC_1, *, control, 0) ," &
" 363 (BC_1, DDR_CH0_DQ06, input, X) ," &
" 364 (BC_1, DDR_CH0_DQ06, output3, X, 365, 0, Z) ," &
" 365 (BC_1, *, control, 0) ," &
" 366 (BC_1, DDR_CH0_DQ05, input, X) ," &
" 367 (BC_1, DDR_CH0_DQ05, output3, X, 368, 0, Z) ," &
" 368 (BC_1, *, control, 0) ," &
" 369 (BC_1, DDR_CH0_DQ04, input, X) ," &
" 370 (BC_1, DDR_CH0_DQ04, output3, X, 371, 0, Z) ," &
" 371 (BC_1, *, control, 0) ," &
" 372 (BC_1, DDR_CH0_DQ03, input, X) ," &
" 373 (BC_1, DDR_CH0_DQ03, output3, X, 374, 0, Z) ," &
" 374 (BC_1, *, control, 0) ," &
" 375 (BC_1, DDR_CH0_DQ02, input, X) ," &
" 376 (BC_1, DDR_CH0_DQ02, output3, X, 377, 0, Z) ," &
" 377 (BC_1, *, control, 0) ," &
" 378 (BC_1, DDR_CH0_DQ01, input, X) ," &
" 379 (BC_1, DDR_CH0_DQ01, output3, X, 380, 0, Z) ," &
" 380 (BC_1, *, control, 0) ," &
" 381 (BC_1, DDR_CH0_DQ00, input, X) ," &
" 382 (BC_1, DDR_CH0_DQ00, output3, X, 383, 0, Z) ," &
" 383 (BC_1, *, control, 0) ," &
" 384 (BC_1, DDR_CH0_DCF25, input, X) ," &
" 385 (BC_1, DDR_CH0_DCF25, output3, X, 386, 0, Z) ," &
" 386 (BC_1, *, control, 0) ," &
" 387 (BC_1, DDR_CH0_DCF26, input, X) ," &
" 388 (BC_1, DDR_CH0_DCF26, output3, X, 389, 0, Z) ," &
" 389 (BC_1, *, control, 0) ," &
" 390 (BC_1, DDR_CH0_DCF27, input, X) ," &
" 391 (BC_1, DDR_CH0_DCF27, output3, X, 392, 0, Z) ," &
" 392 (BC_1, *, control, 0) ," &
" 393 (BC_1, DDR_CH0_DCF28, input, X) ," &
" 394 (BC_1, DDR_CH0_DCF28, output3, X, 395, 0, Z) ," &
" 395 (BC_1, *, control, 0) ," &
" 396 (BC_1, DDR_CH0_DCF29, input, X) ," &
" 397 (BC_1, DDR_CH0_DCF29, output3, X, 398, 0, Z) ," &
" 398 (BC_1, *, control, 0) ," &
" 399 (BC_1, DDR_CH0_DCF30, input, X) ," &
" 400 (BC_1, DDR_CH0_DCF30, output3, X, 401, 0, Z) ," &
" 401 (BC_1, *, control, 0) ," &
" 402 (BC_1, DDR_CH0_DCF31, input, X) ," &
" 403 (BC_1, DDR_CH0_DCF31, output3, X, 404, 0, Z) ," &
" 404 (BC_1, *, control, 0) ," &
" 405 (BC_1, DDR_CH0_DCF32, input, X) ," &
" 406 (BC_1, DDR_CH0_DCF32, output3, X, 407, 0, Z) ," &
" 407 (BC_1, *, control, 0) ," &
" 408 (BC_1, DDR_CH0_DCF33, input, X) ," &
" 409 (BC_1, DDR_CH0_DCF33, output3, X, 410, 0, Z) ," &
" 410 (BC_1, *, control, 0) ," &
" 411 (BC_1, DDR_CH0_DCF17, input, X) ," &
" 412 (BC_1, DDR_CH0_DCF17, output3, X, 413, 0, Z) ," &
" 413 (BC_1, *, control, 0) ," &
" 414 (BC_1, DDR_CH0_DCF19, input, X) ," &
" 415 (BC_1, DDR_CH0_DCF19, output3, X, 416, 0, Z) ," &
" 416 (BC_1, *, control, 0) ," &
" 417 (BC_1, DDR_CH0_DCF20, input, X) ," &
" 418 (BC_1, DDR_CH0_DCF20, output3, X, 419, 0, Z) ," &
" 419 (BC_1, *, control, 0) ," &
" 420 (BC_1, DDR_CH0_DCF21, input, X) ," &
" 421 (BC_1, DDR_CH0_DCF21, output3, X, 422, 0, Z) ," &
" 422 (BC_1, *, control, 0) ," &
" 423 (BC_1, DDR_CH0_DCF22, input, X) ," &
" 424 (BC_1, DDR_CH0_DCF22, output3, X, 425, 0, Z) ," &
" 425 (BC_1, *, control, 0) ," &
" 426 (BC_1, DDR_CH0_DCF23, input, X) ," &
" 427 (BC_1, DDR_CH0_DCF23, output3, X, 428, 0, Z) ," &
" 428 (BC_1, *, control, 0) ," &
" 429 (BC_1, DDR_CH0_DCF24, input, X) ," &
" 430 (BC_1, DDR_CH0_DCF24, output3, X, 431, 0, Z) ," &
" 431 (BC_1, *, control, 0) ," &
" 432 (BC_1, DDR_CH0_DCF08, input, X) ," &
" 433 (BC_1, DDR_CH0_DCF08, output3, X, 434, 0, Z) ," &
" 434 (BC_1, *, control, 0) ," &
" 435 (BC_1, DDR_CH0_DCF09, input, X) ," &
" 436 (BC_1, DDR_CH0_DCF09, output3, X, 437, 0, Z) ," &
" 437 (BC_1, *, control, 0) ," &
" 438 (BC_1, DDR_CH0_DCF10, input, X) ," &
" 439 (BC_1, DDR_CH0_DCF10, output3, X, 440, 0, Z) ," &
" 440 (BC_1, *, control, 0) ," &
" 441 (BC_1, DDR_CH0_DCF11, input, X) ," &
" 442 (BC_1, DDR_CH0_DCF11, output3, X, 443, 0, Z) ," &
" 443 (BC_1, *, control, 0) ," &
" 444 (BC_1, DDR_CH0_DCF12, input, X) ," &
" 445 (BC_1, DDR_CH0_DCF12, output3, X, 446, 0, Z) ," &
" 446 (BC_1, *, control, 0) ," &
" 447 (BC_1, DDR_CH0_DCF13, input, X) ," &
" 448 (BC_1, DDR_CH0_DCF13, output3, X, 449, 0, Z) ," &
" 449 (BC_1, *, control, 0) ," &
" 450 (BC_1, DDR_CH0_DCF14, input, X) ," &
" 451 (BC_1, DDR_CH0_DCF14, output3, X, 452, 0, Z) ," &
" 452 (BC_1, *, control, 0) ," &
" 453 (BC_1, DDR_CH0_DCF15, input, X) ," &
" 454 (BC_1, DDR_CH0_DCF15, output3, X, 455, 0, Z) ," &
" 455 (BC_1, *, control, 0) ," &
" 456 (BC_1, DDR_CH0_DCF16, input, X) ," &
" 457 (BC_1, DDR_CH0_DCF16, output3, X, 458, 0, Z) ," &
" 458 (BC_1, *, control, 0) ," &
" 459 (BC_1, DDR_CH0_DCF00, input, X) ," &
" 460 (BC_1, DDR_CH0_DCF00, output3, X, 461, 0, Z) ," &
" 461 (BC_1, *, control, 0) ," &
" 462 (BC_1, DDR_CH0_DCF01, input, X) ," &
" 463 (BC_1, DDR_CH0_DCF01, output3, X, 464, 0, Z) ," &
" 464 (BC_1, *, control, 0) ," &
" 465 (BC_1, DDR_CH0_DCF03, input, X) ," &
" 466 (BC_1, DDR_CH0_DCF03, output3, X, 467, 0, Z) ," &
" 467 (BC_1, *, control, 0) ," &
" 468 (BC_1, DDR_CH0_DCF04, input, X) ," &
" 469 (BC_1, DDR_CH0_DCF04, output3, X, 470, 0, Z) ," &
" 470 (BC_1, *, control, 0) ," &
" 471 (BC_1, DDR_CH0_DCF05, input, X) ," &
" 472 (BC_1, DDR_CH0_DCF05, output3, X, 473, 0, Z) ," &
" 473 (BC_1, *, control, 0) ," &
" 474 (BC_1, DDR_CH0_DCF06, input, X) ," &
" 475 (BC_1, DDR_CH0_DCF06, output3, X, 476, 0, Z) ," &
" 476 (BC_1, *, control, 0) ," &
" 477 (BC_1, DDR_CH0_DCF07, input, X) ," &
" 478 (BC_1, DDR_CH0_DCF07, output3, X, 479, 0, Z) ," &
" 479 (BC_1, *, control, 0) ," &
" 480 (BC_2, *, internal, X) ," &
" 481 (BC_2, *, internal, X) ," &
" 482 (BC_2, *, internal, X) ," &
" 483 (BC_2, *, internal, X) ," &
" 484 (BC_2, *, internal, X) ," &
" 485 (BC_2, *, internal, X) ," &
" 486 (BC_2, *, internal, X) ," &
" 487 (BC_2, *, internal, X) ," &
" 488 (BC_2, *, internal, X) ," &
" 489 (BC_2, *, internal, X) ," &
" 490 (BC_8, ENET1_RGMII_RXD3, bidir, X, 491, 0, Z) ," &
" 491 (BC_2, *, control, 0) ," &
" 492 (BC_8, ENET1_RGMII_RXD2, bidir, X, 493, 0, Z) ," &
" 493 (BC_2, *, control, 0) ," &
" 494 (BC_8, ENET1_RGMII_RXD1, bidir, X, 495, 0, Z) ," &
" 495 (BC_2, *, control, 0) ," &
" 496 (BC_8, ENET1_RGMII_RXD0, bidir, X, 497, 0, Z) ," &
" 497 (BC_2, *, control, 0) ," &
" 498 (BC_8, ENET1_RGMII_RX_CTL, bidir, X, 499, 0, Z) ," &
" 499 (BC_2, *, control, 0) ," &
" 500 (BC_8, ENET1_RGMII_RXC, bidir, X, 501, 0, Z) ," &
" 501 (BC_2, *, control, 0) ," &
" 502 (BC_8, ENET1_RGMII_TXD3, bidir, X, 503, 0, Z) ," &
" 503 (BC_2, *, control, 0) ," &
" 504 (BC_8, ENET1_RGMII_TXD2, bidir, X, 505, 0, Z) ," &
" 505 (BC_2, *, control, 0) ," &
" 506 (BC_8, ENET1_RGMII_TXD1, bidir, X, 507, 0, Z) ," &
" 507 (BC_2, *, control, 0) ," &
" 508 (BC_8, ENET1_RGMII_TXD0, bidir, X, 509, 0, Z) ," &
" 509 (BC_2, *, control, 0) ," &
" 510 (BC_8, ENET1_RGMII_TX_CTL, bidir, X, 511, 0, Z) ," &
" 511 (BC_2, *, control, 0) ," &
" 512 (BC_8, ENET1_RGMII_TXC, bidir, X, 513, 0, Z) ," &
" 513 (BC_2, *, control, 0) ," &
" 514 (BC_2, *, internal, X) ," &
" 515 (BC_2, *, internal, X) ," &
" 516 (BC_8, ENET0_RGMII_RXD3, bidir, X, 517, 0, Z) ," &
" 517 (BC_2, *, control, 0) ," &
" 518 (BC_8, ENET0_RGMII_RXD2, bidir, X, 519, 0, Z) ," &
" 519 (BC_2, *, control, 0) ," &
" 520 (BC_8, ENET0_RGMII_RXD1, bidir, X, 521, 0, Z) ," &
" 521 (BC_2, *, control, 0) ," &
" 522 (BC_8, ENET0_RGMII_RXD0, bidir, X, 523, 0, Z) ," &
" 523 (BC_2, *, control, 0) ," &
" 524 (BC_8, ENET0_RGMII_RX_CTL, bidir, X, 525, 0, Z) ," &
" 525 (BC_2, *, control, 0) ," &
" 526 (BC_8, ENET0_RGMII_RXC, bidir, X, 527, 0, Z) ," &
" 527 (BC_2, *, control, 0) ," &
" 528 (BC_8, ENET0_RGMII_TXD3, bidir, X, 529, 0, Z) ," &
" 529 (BC_2, *, control, 0) ," &
" 530 (BC_8, ENET0_RGMII_TXD2, bidir, X, 531, 0, Z) ," &
" 531 (BC_2, *, control, 0) ," &
" 532 (BC_8, ENET0_RGMII_TXD1, bidir, X, 533, 0, Z) ," &
" 533 (BC_2, *, control, 0) ," &
" 534 (BC_8, ENET0_RGMII_TXD0, bidir, X, 535, 0, Z) ," &
" 535 (BC_2, *, control, 0) ," &
" 536 (BC_8, ENET0_RGMII_TX_CTL, bidir, X, 537, 0, Z) ," &
" 537 (BC_2, *, control, 0) ," &
" 538 (BC_8, ENET0_RGMII_TXC, bidir, X, 539, 0, Z) ," &
" 539 (BC_2, *, control, 0) ," &
" 540 (BC_2, *, internal, X) ," &
" 541 (BC_2, *, internal, X) ," &
" 542 (BC_8, USDHC2_DATA3, bidir, X, 543, 0, Z) ," &
" 543 (BC_2, *, control, 0) ," &
" 544 (BC_8, USDHC2_DATA2, bidir, X, 545, 0, Z) ," &
" 545 (BC_2, *, control, 0) ," &
" 546 (BC_8, USDHC2_DATA1, bidir, X, 547, 0, Z) ," &
" 547 (BC_2, *, control, 0) ," &
" 548 (BC_8, USDHC2_DATA0, bidir, X, 549, 0, Z) ," &
" 549 (BC_2, *, control, 0) ," &
" 550 (BC_8, USDHC2_CMD, bidir, X, 551, 0, Z) ," &
" 551 (BC_2, *, control, 0) ," &
" 552 (BC_8, USDHC2_CLK, bidir, X, 553, 0, Z) ," &
" 553 (BC_2, *, control, 0) ," &
" 554 (BC_2, *, internal, X) ," &
" 555 (BC_2, *, internal, X) ," &
" 556 (BC_8, USDHC1_STROBE, bidir, X, 557, 0, Z) ," &
" 557 (BC_2, *, control, 0) ," &
" 558 (BC_8, USDHC1_DATA7, bidir, X, 559, 0, Z) ," &
" 559 (BC_2, *, control, 0) ," &
" 560 (BC_8, USDHC1_DATA6, bidir, X, 561, 0, Z) ," &
" 561 (BC_2, *, control, 0) ," &
" 562 (BC_8, USDHC1_DATA5, bidir, X, 563, 0, Z) ," &
" 563 (BC_2, *, control, 0) ," &
" 564 (BC_8, USDHC1_DATA4, bidir, X, 565, 0, Z) ," &
" 565 (BC_2, *, control, 0) ," &
" 566 (BC_2, *, internal, X) ," &
" 567 (BC_2, *, internal, X) ," &
" 568 (BC_8, USDHC1_DATA3, bidir, X, 569, 0, Z) ," &
" 569 (BC_2, *, control, 0) ," &
" 570 (BC_8, USDHC1_DATA2, bidir, X, 571, 0, Z) ," &
" 571 (BC_2, *, control, 0) ," &
" 572 (BC_2, *, internal, X) ," &
" 573 (BC_2, *, internal, X) ," &
" 574 (BC_8, USDHC1_DATA1, bidir, X, 575, 0, Z) ," &
" 575 (BC_2, *, control, 0) ," &
" 576 (BC_8, USDHC1_DATA0, bidir, X, 577, 0, Z) ," &
" 577 (BC_2, *, control, 0) ," &
" 578 (BC_8, USDHC1_CMD, bidir, X, 579, 0, Z) ," &
" 579 (BC_2, *, control, 0) ," &
" 580 (BC_8, USDHC1_CLK, bidir, X, 581, 0, Z) ," &
" 581 (BC_2, *, control, 0) ," &
" 582 (BC_2, *, internal, X) ," &
" 583 (BC_2, *, internal, X) ," &
" 584 (BC_8, EMMC0_RESET_B, bidir, X, 585, 0, Z) ," &
" 585 (BC_2, *, control, 0) ," &
" 586 (BC_8, EMMC0_STROBE, bidir, X, 587, 0, Z) ," &
" 587 (BC_2, *, control, 0) ," &
" 588 (BC_8, EMMC0_DATA7, bidir, X, 589, 0, Z) ," &
" 589 (BC_2, *, control, 0) ," &
" 590 (BC_8, EMMC0_DATA6, bidir, X, 591, 0, Z) ," &
" 591 (BC_2, *, control, 0) ," &
" 592 (BC_8, EMMC0_DATA5, bidir, X, 593, 0, Z) ," &
" 593 (BC_2, *, control, 0) ," &
" 594 (BC_8, EMMC0_DATA4, bidir, X, 595, 0, Z) ," &
" 595 (BC_2, *, control, 0) ," &
" 596 (BC_8, EMMC0_DATA3, bidir, X, 597, 0, Z) ," &
" 597 (BC_2, *, control, 0) ," &
" 598 (BC_8, EMMC0_DATA2, bidir, X, 599, 0, Z) ," &
" 599 (BC_2, *, control, 0) ," &
" 600 (BC_8, EMMC0_DATA1, bidir, X, 601, 0, Z) ," &
" 601 (BC_2, *, control, 0) ," &
" 602 (BC_8, EMMC0_DATA0, bidir, X, 603, 0, Z) ," &
" 603 (BC_2, *, control, 0) ," &
" 604 (BC_8, EMMC0_CMD, bidir, X, 605, 0, Z) ," &
" 605 (BC_2, *, control, 0) ," &
" 606 (BC_8, EMMC0_CLK, bidir, X, 607, 0, Z) ," &
" 607 (BC_2, *, control, 0) ," &
" 608 (BC_2, *, internal, X) ," &
" 609 (BC_2, *, internal, X) ," &
" 610 (BC_2, *, internal, X) ," &
" 611 (BC_2, *, internal, X) ," &
" 612 (BC_2, *, internal, X) ," &
" 613 (BC_2, *, internal, X) ," &
" 614 (BC_2, *, internal, X) ," &
" 615 (BC_2, *, internal, X) ," &
" 616 (BC_2, *, internal, X) ," &
" 617 (BC_2, *, internal, X) ," &
" 618 (BC_2, *, internal, X) ," &
" 619 (BC_2, *, internal, X) ," &
" 620 (BC_2, *, internal, X) ," &
" 621 (BC_2, *, internal, X) ," &
" 622 (BC_2, *, internal, X) ," &
" 623 (BC_2, *, internal, X) ," &
" 624 (BC_2, *, internal, X) ," &
" 625 (BC_2, *, internal, X) ," &
" 626 (BC_2, *, internal, X) ," &
" 627 (BC_2, *, internal, X) ," &
" 628 (BC_2, *, internal, X) ," &
" 629 (BC_2, *, internal, X) ," &
" 630 (BC_2, *, internal, X) ," &
" 631 (BC_2, *, internal, X) ," &
" 632 (BC_2, *, internal, X) ," &
" 633 (BC_2, *, internal, X) ," &
" 634 (BC_2, *, internal, X) ," &
" 635 (BC_2, *, internal, X) ," &
" 636 (BC_8, USB_HSIC0_STROBE, bidir, X, 637, 0, Z) ," &
" 637 (BC_2, *, control, 0) ," &
" 638 (BC_8, USB_HSIC0_DATA, bidir, X, 639, 0, Z) ," &
" 639 (BC_2, *, control, 0) ," &
" 640 (BC_2, *, internal, X) ," &
" 641 (BC_2, *, internal, X) ," &
" 642 (BC_2, *, internal, X) ," &
" 643 (BC_2, *, internal, X) ," &
" 644 (BC_2, *, internal, X) ," &
" 645 (BC_2, *, internal, X) ," &
" 646 (BC_2, *, internal, X) ," &
" 647 (BC_2, *, internal, X) ," &
" 648 (BC_2, *, internal, X) ," &
" 649 (BC_2, *, internal, X) ," &
" 650 (BC_2, *, internal, X) ," &
" 651 (BC_2, *, internal, X) ," &
" 652 (BC_2, *, internal, X) ," &
" 653 (BC_2, *, internal, X) ," &
" 654 (BC_2, *, internal, X) ," &
" 655 (BC_2, *, internal, X) ," &
" 656 (BC_8, PCIE_CTRL1_PERST_B, bidir, X, 657, 0, Z) ," &
" 657 (BC_2, *, control, 0) ," &
" 658 (BC_8, PCIE_CTRL1_WAKE_B, bidir, X, 659, 0, Z) ," &
" 659 (BC_2, *, control, 0) ," &
" 660 (BC_8, PCIE_CTRL1_CLKREQ_B, bidir, X, 661, 0, Z) ," &
" 661 (BC_2, *, control, 0) ," &
" 662 (BC_8, PCIE_CTRL0_PERST_B, bidir, X, 663, 0, Z) ," &
" 663 (BC_2, *, control, 0) ," &
" 664 (BC_8, PCIE_CTRL0_WAKE_B, bidir, X, 665, 0, Z) ," &
" 665 (BC_2, *, control, 0) ," &
" 666 (BC_8, PCIE_CTRL0_CLKREQ_B, bidir, X, 667, 0, Z) ," &
" 667 (BC_2, *, control, 0) ," &
" 668 (BC_2, *, internal, X) ," &
" 669 (BC_2, *, internal, X) ," &
" 670 (BC_8, QSPI0B_SS1_B, bidir, X, 671, 0, Z) ," &
" 671 (BC_2, *, control, 0) ," &
" 672 (BC_2, *, internal, X) ," &
" 673 (BC_2, *, internal, X) ," &
" 674 (BC_8, QSPI0B_SS0_B, bidir, X, 675, 0, Z) ," &
" 675 (BC_2, *, control, 0) ," &
" 676 (BC_8, QSPI0B_DQS, bidir, X, 677, 0, Z) ," &
" 677 (BC_2, *, control, 0) ," &
" 678 (BC_8, QSPI0B_DATA3, bidir, X, 679, 0, Z) ," &
" 679 (BC_2, *, control, 0) ," &
" 680 (BC_8, QSPI0B_DATA2, bidir, X, 681, 0, Z) ," &
" 681 (BC_2, *, control, 0) ," &
" 682 (BC_8, QSPI0B_DATA1, bidir, X, 683, 0, Z) ," &
" 683 (BC_2, *, control, 0) ," &
" 684 (BC_8, QSPI0B_DATA0, bidir, X, 685, 0, Z) ," &
" 685 (BC_2, *, control, 0) ," &
" 686 (BC_8, QSPI0B_SCLK, bidir, X, 687, 0, Z) ," &
" 687 (BC_2, *, control, 0) ," &
" 688 (BC_8, QSPI0A_SCLK, bidir, X, 689, 0, Z) ," &
" 689 (BC_2, *, control, 0) ," &
" 690 (BC_8, QSPI0A_SS1_B, bidir, X, 691, 0, Z) ," &
" 691 (BC_2, *, control, 0) ," &
" 692 (BC_8, QSPI0A_SS0_B, bidir, X, 693, 0, Z) ," &
" 693 (BC_2, *, control, 0) ," &
" 694 (BC_8, QSPI0A_DQS, bidir, X, 695, 0, Z) ," &
" 695 (BC_2, *, control, 0) ," &
" 696 (BC_8, QSPI0A_DATA3, bidir, X, 697, 0, Z) ," &
" 697 (BC_2, *, control, 0) ," &
" 698 (BC_8, QSPI0A_DATA2, bidir, X, 699, 0, Z) ," &
" 699 (BC_2, *, control, 0) ," &
" 700 (BC_8, QSPI0A_DATA1, bidir, X, 701, 0, Z) ," &
" 701 (BC_2, *, control, 0) ," &
" 702 (BC_8, QSPI0A_DATA0, bidir, X, 703, 0, Z) ," &
" 703 (BC_2, *, control, 0) ," &
" 704 (BC_2, *, internal, X) ," &
" 705 (BC_2, *, internal, X) ," &
" 706 (BC_2, *, internal, X) ," &
" 707 (BC_2, *, internal, X) ," &
" 708 (BC_2, *, internal, X) ," &
" 709 (BC_2, *, internal, X) ," &
" 710 (BC_2, *, internal, X) ," &
" 711 (BC_2, *, internal, X) ," &
" 712 (BC_2, *, internal, X) ," &
" 713 (BC_2, *, internal, X) ," &
" 714 (BC_2, *, internal, X) ," &
" 715 (BC_2, *, internal, X) ," &
" 716 (BC_2, *, internal, X) ," &
" 717 (BC_2, *, internal, X) ," &
" 718 (BC_2, *, internal, X) ," &
" 719 (BC_2, *, internal, X) ," &
" 720 (BC_2, *, internal, X) ," &
" 721 (BC_2, *, internal, X) ," &
" 722 (BC_8, QSPI1A_DATA0, bidir, X, 723, 0, Z) ," &
" 723 (BC_2, *, control, 0) ," &
" 724 (BC_8, QSPI1A_DATA1, bidir, X, 725, 0, Z) ," &
" 725 (BC_2, *, control, 0) ," &
" 726 (BC_8, QSPI1A_DATA2, bidir, X, 727, 0, Z) ," &
" 727 (BC_2, *, control, 0) ," &
" 728 (BC_8, QSPI1A_DATA3, bidir, X, 729, 0, Z) ," &
" 729 (BC_2, *, control, 0) ," &
" 730 (BC_8, QSPI1A_DQS, bidir, X, 731, 0, Z) ," &
" 731 (BC_2, *, control, 0) ," &
" 732 (BC_8, QSPI1A_SCLK, bidir, X, 733, 0, Z) ," &
" 733 (BC_2, *, control, 0) ," &
" 734 (BC_8, QSPI1A_SS1_B, bidir, X, 735, 0, Z) ," &
" 735 (BC_2, *, control, 0) ," &
" 736 (BC_2, *, internal, X) ," &
" 737 (BC_2, *, internal, X) ," &
" 738 (BC_8, QSPI1A_SS0_B, bidir, X, 739, 0, Z) ," &
" 739 (BC_2, *, control, 0) ," &
" 740 (BC_2, *, internal, X) ," &
" 741 (BC_2, *, internal, X) ," &
" 742 (BC_8, ENET1_MDC, bidir, X, 743, 0, Z) ," &
" 743 (BC_2, *, control, 0) ," &
" 744 (BC_8, ENET1_MDIO, bidir, X, 745, 0, Z) ," &
" 745 (BC_2, *, control, 0) ," &
" 746 (BC_8, ENET1_REFCLK_125M_25M, bidir, X, 747, 0, Z) ," &
" 747 (BC_2, *, control, 0) ," &
" 748 (BC_8, ENET0_REFCLK_125M_25M, bidir, X, 749, 0, Z) ," &
" 749 (BC_2, *, control, 0) ," &
" 750 (BC_8, ENET0_MDC, bidir, X, 751, 0, Z) ," &
" 751 (BC_2, *, control, 0) ," &
" 752 (BC_8, ENET0_MDIO, bidir, X, 753, 0, Z) ," &
" 753 (BC_2, *, control, 0) ," &
" 754 (BC_2, *, internal, X) ," &
" 755 (BC_2, *, internal, X) ," &
" 756 (BC_8, USDHC2_CD_B, bidir, X, 757, 0, Z) ," &
" 757 (BC_2, *, control, 0) ," &
" 758 (BC_8, USDHC2_WP, bidir, X, 759, 0, Z) ," &
" 759 (BC_2, *, control, 0) ," &
" 760 (BC_8, USDHC2_VSELECT, bidir, X, 761, 0, Z) ," &
" 761 (BC_2, *, control, 0) ," &
" 762 (BC_8, USDHC2_RESET_B, bidir, X, 763, 0, Z) ," &
" 763 (BC_2, *, control, 0) ," &
" 764 (BC_8, USDHC1_VSELECT, bidir, X, 765, 0, Z) ," &
" 765 (BC_2, *, control, 0) ," &
" 766 (BC_8, USDHC1_RESET_B, bidir, X, 767, 0, Z) ," &
" 767 (BC_2, *, control, 0) ," &
" 768 (BC_2, *, internal, X) ," &
" 769 (BC_2, *, internal, X) ," &
" 770 (BC_8, USB_SS3_TC3, bidir, X, 771, 0, Z) ," &
" 771 (BC_2, *, control, 0) ," &
" 772 (BC_8, USB_SS3_TC2, bidir, X, 773, 0, Z) ," &
" 773 (BC_2, *, control, 0) ," &
" 774 (BC_8, USB_SS3_TC1, bidir, X, 775, 0, Z) ," &
" 775 (BC_2, *, control, 0) ," &
" 776 (BC_8, USB_SS3_TC0, bidir, X, 777, 0, Z) ," &
" 777 (BC_2, *, control, 0) ," &
" 778 (BC_2, *, internal, X) ," &
" 779 (BC_2, *, internal, X) ," &
" 780 (BC_8, FLEXCAN2_TX, bidir, X, 781, 0, Z) ," &
" 781 (BC_2, *, control, 0) ," &
" 782 (BC_8, FLEXCAN2_RX, bidir, X, 783, 0, Z) ," &
" 783 (BC_2, *, control, 0) ," &
" 784 (BC_8, FLEXCAN1_TX, bidir, X, 785, 0, Z) ," &
" 785 (BC_2, *, control, 0) ," &
" 786 (BC_8, FLEXCAN1_RX, bidir, X, 787, 0, Z) ," &
" 787 (BC_2, *, control, 0) ," &
" 788 (BC_8, FLEXCAN0_TX, bidir, X, 789, 0, Z) ," &
" 789 (BC_2, *, control, 0) ," &
" 790 (BC_8, FLEXCAN0_RX, bidir, X, 791, 0, Z) ," &
" 791 (BC_2, *, control, 0) ," &
" 792 (BC_2, *, internal, X) ," &
" 793 (BC_2, *, internal, X) ," &
" 794 (BC_8, MLB_DATA, bidir, X, 795, 0, Z) ," &
" 795 (BC_2, *, control, 0) ," &
" 796 (BC_8, MLB_CLK, bidir, X, 797, 0, Z) ," &
" 797 (BC_2, *, control, 0) ," &
" 798 (BC_8, MLB_SIG, bidir, X, 799, 0, Z) ," &
" 799 (BC_2, *, control, 0) ," &
" 800 (BC_2, *, internal, X) ," &
" 801 (BC_2, *, internal, X) ," &
" 802 (BC_2, *, internal, X) ," &
" 803 (BC_2, *, internal, X) ," &
" 804 (BC_2, *, internal, X) ," &
" 805 (BC_2, *, internal, X) ," &
" 806 (BC_2, *, internal, X) ," &
" 807 (BC_2, *, internal, X) ," &
" 808 (BC_8, ADC_IN0, bidir, X, 809, 0, Z) ," &
" 809 (BC_2, *, control, 0) ," &
" 810 (BC_8, ADC_IN1, bidir, X, 811, 0, Z) ," &
" 811 (BC_2, *, control, 0) ," &
" 812 (BC_8, ADC_IN2, bidir, X, 813, 0, Z) ," &
" 813 (BC_2, *, control, 0) ," &
" 814 (BC_8, ADC_IN3, bidir, X, 815, 0, Z) ," &
" 815 (BC_2, *, control, 0) ," &
" 816 (BC_8, ADC_IN4, bidir, X, 817, 0, Z) ," &
" 817 (BC_2, *, control, 0) ," &
" 818 (BC_8, ADC_IN5, bidir, X, 819, 0, Z) ," &
" 819 (BC_2, *, control, 0) ," &
" 820 (BC_8, ADC_IN6, bidir, X, 821, 0, Z) ," &
" 821 (BC_2, *, control, 0) ," &
" 822 (BC_8, ADC_IN7, bidir, X, 823, 0, Z) ," &
" 823 (BC_2, *, control, 0) ," &
" 824 (BC_2, *, internal, X) ," &
" 825 (BC_2, *, internal, X) ," &
" 826 (BC_8, SAI1_TXFS, bidir, X, 827, 0, Z) ," &
" 827 (BC_2, *, control, 0) ," &
" 828 (BC_8, SAI1_TXD, bidir, X, 829, 0, Z) ," &
" 829 (BC_2, *, control, 0) ," &
" 830 (BC_8, SAI1_TXC, bidir, X, 831, 0, Z) ," &
" 831 (BC_2, *, control, 0) ," &
" 832 (BC_2, *, internal, X) ," &
" 833 (BC_2, *, internal, X) ," &
" 834 (BC_8, SAI1_RXFS, bidir, X, 835, 0, Z) ," &
" 835 (BC_2, *, control, 0) ," &
" 836 (BC_8, SAI1_RXD, bidir, X, 837, 0, Z) ," &
" 837 (BC_2, *, control, 0) ," &
" 838 (BC_8, SAI1_RXC, bidir, X, 839, 0, Z) ," &
" 839 (BC_2, *, control, 0) ," &
" 840 (BC_8, SPI2_CS1, bidir, X, 841, 0, Z) ," &
" 841 (BC_2, *, control, 0) ," &
" 842 (BC_8, SPI2_CS0, bidir, X, 843, 0, Z) ," &
" 843 (BC_2, *, control, 0) ," &
" 844 (BC_8, SPI2_SDI, bidir, X, 845, 0, Z) ," &
" 845 (BC_2, *, control, 0) ," &
" 846 (BC_8, SPI2_SDO, bidir, X, 847, 0, Z) ," &
" 847 (BC_2, *, control, 0) ," &
" 848 (BC_8, SPI2_SCK, bidir, X, 849, 0, Z) ," &
" 849 (BC_2, *, control, 0) ," &
" 850 (BC_8, SPI0_CS1, bidir, X, 851, 0, Z) ," &
" 851 (BC_2, *, control, 0) ," &
" 852 (BC_8, SPI0_CS0, bidir, X, 853, 0, Z) ," &
" 853 (BC_2, *, control, 0) ," &
" 854 (BC_8, SPI0_SDI, bidir, X, 855, 0, Z) ," &
" 855 (BC_2, *, control, 0) ," &
" 856 (BC_8, SPI0_SDO, bidir, X, 857, 0, Z) ," &
" 857 (BC_2, *, control, 0) ," &
" 858 (BC_8, SPI0_SCK, bidir, X, 859, 0, Z) ," &
" 859 (BC_2, *, control, 0) ," &
" 860 (BC_2, *, internal, X) ," &
" 861 (BC_2, *, internal, X) ," &
" 862 (BC_8, MCLK_OUT0, bidir, X, 863, 0, Z) ," &
" 863 (BC_2, *, control, 0) ," &
" 864 (BC_2, *, internal, X) ," &
" 865 (BC_2, *, internal, X) ," &
" 866 (BC_8, MCLK_IN0, bidir, X, 867, 0, Z) ," &
" 867 (BC_2, *, control, 0) ," &
" 868 (BC_8, ESAI0_TX5_RX0, bidir, X, 869, 0, Z) ," &
" 869 (BC_2, *, control, 0) ," &
" 870 (BC_8, ESAI0_TX4_RX1, bidir, X, 871, 0, Z) ," &
" 871 (BC_2, *, control, 0) ," &
" 872 (BC_8, ESAI0_TX3_RX2, bidir, X, 873, 0, Z) ," &
" 873 (BC_2, *, control, 0) ," &
" 874 (BC_8, ESAI0_TX2_RX3, bidir, X, 875, 0, Z) ," &
" 875 (BC_2, *, control, 0) ," &
" 876 (BC_8, ESAI0_TX1, bidir, X, 877, 0, Z) ," &
" 877 (BC_2, *, control, 0) ," &
" 878 (BC_8, ESAI0_TX0, bidir, X, 879, 0, Z) ," &
" 879 (BC_2, *, control, 0) ," &
" 880 (BC_8, ESAI0_SCKT, bidir, X, 881, 0, Z) ," &
" 881 (BC_2, *, control, 0) ," &
" 882 (BC_8, ESAI0_SCKR, bidir, X, 883, 0, Z) ," &
" 883 (BC_2, *, control, 0) ," &
" 884 (BC_8, ESAI0_FST, bidir, X, 885, 0, Z) ," &
" 885 (BC_2, *, control, 0) ," &
" 886 (BC_8, ESAI0_FSR, bidir, X, 887, 0, Z) ," &
" 887 (BC_2, *, control, 0) ," &
" 888 (BC_2, *, internal, X) ," &
" 889 (BC_2, *, internal, X) ," &
" 890 (BC_8, SPI3_CS1, bidir, X, 891, 0, Z) ," &
" 891 (BC_2, *, control, 0) ," &
" 892 (BC_8, SPI3_CS0, bidir, X, 893, 0, Z) ," &
" 893 (BC_2, *, control, 0) ," &
" 894 (BC_8, SPI3_SDI, bidir, X, 895, 0, Z) ," &
" 895 (BC_2, *, control, 0) ," &
" 896 (BC_2, *, internal, X) ," &
" 897 (BC_2, *, internal, X) ," &
" 898 (BC_8, SPI3_SDO, bidir, X, 899, 0, Z) ," &
" 899 (BC_2, *, control, 0) ," &
" 900 (BC_8, SPI3_SCK, bidir, X, 901, 0, Z) ," &
" 901 (BC_2, *, control, 0) ," &
" 902 (BC_8, SPDIF0_EXT_CLK, bidir, X, 903, 0, Z) ," &
" 903 (BC_2, *, control, 0) ," &
" 904 (BC_8, SPDIF0_TX, bidir, X, 905, 0, Z) ," &
" 905 (BC_2, *, control, 0) ," &
" 906 (BC_8, SPDIF0_RX, bidir, X, 907, 0, Z) ," &
" 907 (BC_2, *, control, 0) ," &
" 908 (BC_8, ESAI1_TX5_RX0, bidir, X, 909, 0, Z) ," &
" 909 (BC_2, *, control, 0) ," &
" 910 (BC_8, ESAI1_TX4_RX1, bidir, X, 911, 0, Z) ," &
" 911 (BC_2, *, control, 0) ," &
" 912 (BC_8, ESAI1_TX3_RX2, bidir, X, 913, 0, Z) ," &
" 913 (BC_2, *, control, 0) ," &
" 914 (BC_8, ESAI1_TX2_RX3, bidir, X, 915, 0, Z) ," &
" 915 (BC_2, *, control, 0) ," &
" 916 (BC_8, ESAI1_TX1, bidir, X, 917, 0, Z) ," &
" 917 (BC_2, *, control, 0) ," &
" 918 (BC_8, ESAI1_TX0, bidir, X, 919, 0, Z) ," &
" 919 (BC_2, *, control, 0) ," &
" 920 (BC_8, ESAI1_SCKT, bidir, X, 921, 0, Z) ," &
" 921 (BC_2, *, control, 0) ," &
" 922 (BC_8, ESAI1_SCKR, bidir, X, 923, 0, Z) ," &
" 923 (BC_2, *, control, 0) ," &
" 924 (BC_8, ESAI1_FST, bidir, X, 925, 0, Z) ," &
" 925 (BC_2, *, control, 0) ," &
" 926 (BC_8, ESAI1_FSR, bidir, X, 927, 0, Z) ," &
" 927 (BC_2, *, control, 0) ," &
" 928 (BC_2, *, internal, X) ," &
" 929 (BC_2, *, internal, X) ," &
" 930 (BC_2, *, internal, X) ," &
" 931 (BC_2, *, internal, X) ," &
" 932 (BC_2, *, internal, X) ," &
" 933 (BC_2, *, internal, X) ," &
" 934 (BC_2, *, internal, X) ," &
" 935 (BC_2, *, internal, X) ," &
" 936 (BC_8, HDMI_TX0_TS_SDA, bidir, X, 937, 0, Z) ," &
" 937 (BC_2, *, control, 0) ," &
" 938 (BC_8, HDMI_TX0_TS_SCL, bidir, X, 939, 0, Z) ," &
" 939 (BC_2, *, control, 0) ," &
" 940 (BC_8, MIPI_CSI1_I2C0_SDA, bidir, X, 941, 0, Z) ," &
" 941 (BC_2, *, control, 0) ," &
" 942 (BC_8, MIPI_CSI1_I2C0_SCL, bidir, X, 943, 0, Z) ," &
" 943 (BC_2, *, control, 0) ," &
" 944 (BC_8, MIPI_CSI1_GPIO0_01, bidir, X, 945, 0, Z) ," &
" 945 (BC_2, *, control, 0) ," &
" 946 (BC_8, MIPI_CSI1_GPIO0_00, bidir, X, 947, 0, Z) ," &
" 947 (BC_2, *, control, 0) ," &
" 948 (BC_8, MIPI_CSI1_MCLK_OUT, bidir, X, 949, 0, Z) ," &
" 949 (BC_2, *, control, 0) ," &
" 950 (BC_8, MIPI_CSI0_GPIO0_01, bidir, X, 951, 0, Z) ," &
" 951 (BC_2, *, control, 0) ," &
" 952 (BC_8, MIPI_CSI0_GPIO0_00, bidir, X, 953, 0, Z) ," &
" 953 (BC_2, *, control, 0) ," &
" 954 (BC_8, MIPI_CSI0_I2C0_SDA, bidir, X, 955, 0, Z) ," &
" 955 (BC_2, *, control, 0) ," &
" 956 (BC_8, MIPI_CSI0_I2C0_SCL, bidir, X, 957, 0, Z) ," &
" 957 (BC_2, *, control, 0) ," &
" 958 (BC_8, MIPI_CSI0_MCLK_OUT, bidir, X, 959, 0, Z) ," &
" 959 (BC_2, *, control, 0) ," &
" 960 (BC_2, *, internal, X) ," &
" 961 (BC_2, *, internal, X) ," &
" 962 (BC_2, *, internal, X) ," &
" 963 (BC_2, *, internal, X) ," &
" 964 (BC_2, *, internal, X) ," &
" 965 (BC_2, *, internal, X) ," &
" 966 (BC_2, *, internal, X) ," &
" 967 (BC_2, *, internal, X) ," &
" 968 (BC_2, *, internal, X) ," &
" 969 (BC_2, *, internal, X) ," &
" 970 (BC_2, *, internal, X) ," &
" 971 (BC_2, *, internal, X) ," &
" 972 (BC_2, *, internal, X) ," &
" 973 (BC_2, *, internal, X) ," &
" 974 (BC_2, *, internal, X) ," &
" 975 (BC_2, *, internal, X) ," &
" 976 (BC_8, MIPI_DSI1_GPIO0_01, bidir, X, 977, 0, Z) ," &
" 977 (BC_2, *, control, 0) ," &
" 978 (BC_8, MIPI_DSI1_GPIO0_00, bidir, X, 979, 0, Z) ," &
" 979 (BC_2, *, control, 0) ," &
" 980 (BC_8, MIPI_DSI1_I2C0_SDA, bidir, X, 981, 0, Z) ," &
" 981 (BC_2, *, control, 0) ," &
" 982 (BC_8, MIPI_DSI1_I2C0_SCL, bidir, X, 983, 0, Z) ," &
" 983 (BC_2, *, control, 0) ," &
" 984 (BC_8, MIPI_DSI0_GPIO0_01, bidir, X, 985, 0, Z) ," &
" 985 (BC_2, *, control, 0) ," &
" 986 (BC_8, MIPI_DSI0_GPIO0_00, bidir, X, 987, 0, Z) ," &
" 987 (BC_2, *, control, 0) ," &
" 988 (BC_8, MIPI_DSI0_I2C0_SDA, bidir, X, 989, 0, Z) ," &
" 989 (BC_2, *, control, 0) ," &
" 990 (BC_8, MIPI_DSI0_I2C0_SCL, bidir, X, 991, 0, Z) ," &
" 991 (BC_2, *, control, 0) ," &
" 992 (BC_2, *, internal, X) ," &
" 993 (BC_2, *, internal, X) ," &
" 994 (BC_2, *, internal, X) ," &
" 995 (BC_2, *, internal, X) ," &
" 996 (BC_2, *, internal, X) ," &
" 997 (BC_2, *, internal, X) ," &
" 998 (BC_2, *, internal, X) ," &
" 999 (BC_2, *, internal, X) ," &
" 1000 (BC_8, LVDS1_I2C1_SDA, bidir, X, 1001, 0, Z) ," &
" 1001 (BC_2, *, control, 0) ," &
" 1002 (BC_8, LVDS1_I2C1_SCL, bidir, X, 1003, 0, Z) ," &
" 1003 (BC_2, *, control, 0) ," &
" 1004 (BC_8, LVDS1_I2C0_SDA, bidir, X, 1005, 0, Z) ," &
" 1005 (BC_2, *, control, 0) ," &
" 1006 (BC_8, LVDS1_I2C0_SCL, bidir, X, 1007, 0, Z) ," &
" 1007 (BC_2, *, control, 0) ," &
" 1008 (BC_8, LVDS1_GPIO01, bidir, X, 1009, 0, Z) ," &
" 1009 (BC_2, *, control, 0) ," &
" 1010 (BC_8, LVDS1_GPIO00, bidir, X, 1011, 0, Z) ," &
" 1011 (BC_2, *, control, 0) ," &
" 1012 (BC_8, LVDS0_I2C1_SDA, bidir, X, 1013, 0, Z) ," &
" 1013 (BC_2, *, control, 0) ," &
" 1014 (BC_8, LVDS0_I2C1_SCL, bidir, X, 1015, 0, Z) ," &
" 1015 (BC_2, *, control, 0) ," &
" 1016 (BC_8, LVDS0_I2C0_SDA, bidir, X, 1017, 0, Z) ," &
" 1017 (BC_2, *, control, 0) ," &
" 1018 (BC_8, LVDS0_I2C0_SCL, bidir, X, 1019, 0, Z) ," &
" 1019 (BC_2, *, control, 0) ," &
" 1020 (BC_8, LVDS0_GPIO01, bidir, X, 1021, 0, Z) ," &
" 1021 (BC_2, *, control, 0) ," &
" 1022 (BC_8, LVDS0_GPIO00, bidir, X, 1023, 0, Z) ," &
" 1023 (BC_2, *, control, 0) ," &
" 1024 (BC_2, *, internal, X) ," &
" 1025 (BC_2, *, internal, X) ," &
" 1026 (BC_2, *, internal, X) ," &
" 1027 (BC_2, *, internal, X) ," &
" 1028 (BC_2, *, internal, X) ," &
" 1029 (BC_2, *, internal, X) ," &
" 1030 (BC_2, *, internal, X) ," &
" 1031 (BC_2, *, internal, X) ," &
" 1032 (BC_8, SCU_BOOT_MODE5, bidir, X, 1033, 0, Z) ," &
" 1033 (BC_2, *, control, 0) ," &
" 1034 (BC_8, SCU_BOOT_MODE4, bidir, X, 1035, 0, Z) ," &
" 1035 (BC_2, *, control, 0) ," &
" 1036 (BC_8, SCU_BOOT_MODE3, bidir, X, 1037, 0, Z) ," &
" 1037 (BC_2, *, control, 0) ," &
" 1038 (BC_8, SCU_BOOT_MODE2, bidir, X, 1039, 0, Z) ," &
" 1039 (BC_2, *, control, 0) ," &
" 1040 (BC_8, SCU_BOOT_MODE1, bidir, X, 1041, 0, Z) ," &
" 1041 (BC_2, *, control, 0) ," &
" 1042 (BC_8, SCU_BOOT_MODE0, bidir, X, 1043, 0, Z) ," &
" 1043 (BC_2, *, control, 0) ," &
" 1044 (BC_8, SCU_GPIO0_07, bidir, X, 1045, 0, Z) ," &
" 1045 (BC_2, *, control, 0) ," &
" 1046 (BC_8, SCU_GPIO0_06, bidir, X, 1047, 0, Z) ," &
" 1047 (BC_2, *, control, 0) ," &
" 1048 (BC_8, SCU_GPIO0_05, bidir, X, 1049, 0, Z) ," &
" 1049 (BC_2, *, control, 0) ," &
" 1050 (BC_8, SCU_GPIO0_04, bidir, X, 1051, 0, Z) ," &
" 1051 (BC_2, *, control, 0) ," &
" 1052 (BC_8, SCU_GPIO0_03, bidir, X, 1053, 0, Z) ," &
" 1053 (BC_2, *, control, 0) ," &
" 1054 (BC_8, SCU_GPIO0_02, bidir, X, 1055, 0, Z) ," &
" 1055 (BC_2, *, control, 0) ," &
" 1056 (BC_2, *, internal, X) ," &
" 1057 (BC_2, *, internal, X) ," &
" 1058 (BC_2, *, internal, X) ," &
" 1059 (BC_2, *, internal, X) ," &
" 1060 (BC_2, *, internal, X) ," &
" 1061 (BC_2, *, internal, X) ," &
" 1062 (BC_2, *, internal, X) ," &
" 1063 (BC_2, *, internal, X) ," &
" 1064 (BC_2, *, internal, X) ," &
" 1065 (BC_2, *, internal, X) ," &
" 1066 (BC_2, *, internal, X) ," &
" 1067 (BC_2, *, internal, X) ," &
" 1068 (BC_2, *, internal, X) ," &
" 1069 (BC_2, *, internal, X) ," &
" 1070 (BC_2, *, internal, X) ," &
" 1071 (BC_2, *, internal, X) ," &
" 1072 (BC_2, *, internal, X) ," &
" 1073 (BC_2, *, internal, X) ," &
" 1074 (BC_8, SCU_GPIO0_01, bidir, X, 1075, 0, Z) ," &
" 1075 (BC_2, *, control, 0) ," &
" 1076 (BC_8, SCU_GPIO0_00, bidir, X, 1077, 0, Z) ," &
" 1077 (BC_2, *, control, 0) ," &
" 1078 (BC_8, PMIC_INT_B, bidir, X, 1079, 0, Z) ," &
" 1079 (BC_2, *, control, 0) ," &
" 1080 (BC_8, PMIC_EARLY_WARNING, bidir, X, 1081, 0, Z) ," &
" 1081 (BC_2, *, control, 0) ," &
" 1082 (BC_8, PMIC_I2C_SCL, bidir, X, 1083, 0, Z) ," &
" 1083 (BC_2, *, control, 0) ," &
" 1084 (BC_8, PMIC_I2C_SDA, bidir, X, 1085, 0, Z) ," &
" 1085 (BC_2, *, control, 0) ," &
" 1086 (BC_8, SCU_WDOG_OUT, bidir, X, 1087, 0, Z) ," &
" 1087 (BC_2, *, control, 0) ," &
" 1088 (BC_8, SCU_PMIC_MEMC_ON, bidir, X, 1089, 0, Z) ," &
" 1089 (BC_2, *, control, 0) ," &
" 1090 (BC_2, *, internal, X) ," &
" 1091 (BC_2, *, internal, X) ," &
" 1092 (BC_8, UART1_CTS_B, bidir, X, 1093, 0, Z) ," &
" 1093 (BC_2, *, control, 0) ," &
" 1094 (BC_8, UART1_RTS_B, bidir, X, 1095, 0, Z) ," &
" 1095 (BC_2, *, control, 0) ," &
" 1096 (BC_8, UART1_RX, bidir, X, 1097, 0, Z) ," &
" 1097 (BC_2, *, control, 0) ," &
" 1098 (BC_8, UART1_TX, bidir, X, 1099, 0, Z) ," &
" 1099 (BC_2, *, control, 0) ," &
" 1100 (BC_8, UART0_CTS_B, bidir, X, 1101, 0, Z) ," &
" 1101 (BC_2, *, control, 0) ," &
" 1102 (BC_8, UART0_RTS_B, bidir, X, 1103, 0, Z) ," &
" 1103 (BC_2, *, control, 0) ," &
" 1104 (BC_8, UART0_RX, bidir, X, 1105, 0, Z) ," &
" 1105 (BC_2, *, control, 0) ," &
" 1106 (BC_8, UART0_TX, bidir, X, 1107, 0, Z) ," &
" 1107 (BC_2, *, control, 0) ," &
" 1108 (BC_8, GPT1_COMPARE, bidir, X, 1109, 0, Z) ," &
" 1109 (BC_2, *, control, 0) ," &
" 1110 (BC_8, GPT1_CAPTURE, bidir, X, 1111, 0, Z) ," &
" 1111 (BC_2, *, control, 0) ," &
" 1112 (BC_8, GPT1_CLK, bidir, X, 1113, 0, Z) ," &
" 1113 (BC_2, *, control, 0) ," &
" 1114 (BC_8, GPT0_COMPARE, bidir, X, 1115, 0, Z) ," &
" 1115 (BC_2, *, control, 0) ," &
" 1116 (BC_8, GPT0_CAPTURE, bidir, X, 1117, 0, Z) ," &
" 1117 (BC_2, *, control, 0) ," &
" 1118 (BC_8, GPT0_CLK, bidir, X, 1119, 0, Z) ," &
" 1119 (BC_2, *, control, 0) ," &
" 1120 (BC_2, *, internal, X) ," &
" 1121 (BC_2, *, internal, X) ," &
" 1122 (BC_8, M41_GPIO0_01, bidir, X, 1123, 0, Z) ," &
" 1123 (BC_2, *, control, 0) ," &
" 1124 (BC_8, M41_GPIO0_00, bidir, X, 1125, 0, Z) ," &
" 1125 (BC_2, *, control, 0) ," &
" 1126 (BC_8, M41_I2C0_SDA, bidir, X, 1127, 0, Z) ," &
" 1127 (BC_2, *, control, 0) ," &
" 1128 (BC_8, M41_I2C0_SCL, bidir, X, 1129, 0, Z) ," &
" 1129 (BC_2, *, control, 0) ," &
" 1130 (BC_8, M40_GPIO0_01, bidir, X, 1131, 0, Z) ," &
" 1131 (BC_2, *, control, 0) ," &
" 1132 (BC_8, M40_GPIO0_00, bidir, X, 1133, 0, Z) ," &
" 1133 (BC_2, *, control, 0) ," &
" 1134 (BC_8, M40_I2C0_SDA, bidir, X, 1135, 0, Z) ," &
" 1135 (BC_2, *, control, 0) ," &
" 1136 (BC_8, M40_I2C0_SCL, bidir, X, 1137, 0, Z) ," &
" 1137 (BC_2, *, control, 0) ," &
" 1138 (BC_2, *, internal, X) ," &
" 1139 (BC_2, *, internal, X) ," &
" 1140 (BC_8, SIM0_GPIO0_00, bidir, X, 1141, 0, Z) ," &
" 1141 (BC_2, *, control, 0) ," &
" 1142 (BC_8, SIM0_POWER_EN, bidir, X, 1143, 0, Z) ," &
" 1143 (BC_2, *, control, 0) ," &
" 1144 (BC_8, SIM0_PD, bidir, X, 1145, 0, Z) ," &
" 1145 (BC_2, *, control, 0) ," &
" 1146 (BC_8, SIM0_IO, bidir, X, 1147, 0, Z) ," &
" 1147 (BC_2, *, control, 0) ," &
" 1148 (BC_8, SIM0_RST, bidir, X, 1149, 0, Z) ," &
" 1149 (BC_2, *, control, 0) ," &
" 1150 (BC_8, SIM0_CLK, bidir, X, 1151, 0, Z) ," &
" 1151 (BC_2, *, control, 0) " ;
end IMX8QM_29x29;
