-- -- BSDL File created/edited by AT&T BSD Editor --Comment: 21 October 1997: -- File updated to reflect PCnet-ISA II FD. Version value now "3". -- Full value of chip ID registers (CSR89+CSR88) = 32261003h --BSDE:Revision: REV. A0 --BSDE:Description: BSDL DESCRIPTION OF PCnet-ISA II (FULL DUPLEX) PART --BSDE:Comments: /* a) XTAL2 output does not have a B-S cell. -- * b) Analog outputs (i.e. DO1, DO0, TXD1, TXD0, TXP1, TXP0, -- * RXD1 and RXD0) are always driven as differential pairs. -- * There is only one B-S cell for each differential pair. -- * c) Analog inputs are always sampled as diffrential inputs. -- * There is only one B-S cell for each differential pair. -- * -- */ entity AM79C961A is generic (PHYSICAL_PIN_MAP : string := "PQFP_132" ); port ( AEN: in bit; AVDD: linkage bit_vector (1 to 4); AVSS: linkage bit_vector (1 to 2); BALE: in bit; BPCSL: out bit; CI0: linkage bit; CI1: in bit; DACKL: in bit_vector (0 to 3); DI0: linkage bit; DI1: in bit; DO0: linkage bit; DO1: out bit; DRQ: inout bit_vector (1 to 3); DRQ0: out bit; DVDD: linkage bit_vector (1 to 7); DVSS: linkage bit_vector (1 to 13); DXCVR: inout bit; EECS: out bit; IOCHRDY: inout bit; IOCS16L: out bit; IORL: in bit; IOWL: in bit; IRQ: out bit_vector (0 to 7); LA: inout bit_vector (17 to 23); LED: out bit_vector (0 to 3); MASTERL: out bit; MEMRL: inout bit; MEMWL: inout bit; PRDB: inout bit_vector (0 to 7); REFL: in bit; RESET: in bit; RXD0: linkage bit; RXD1: in bit; SA: inout bit_vector (0 to 19); SBHEL: inout bit; SD: inout bit_vector (0 to 15); SHFTBSY: inout bit; SLEEPL: in bit; TCK: in bit; TDI: in bit; TDO: out bit; TMS: in bit; TXD0: linkage bit; TXD1: out bit; TXP0: linkage bit; TXP1: out bit; XTAL1: in bit; XTAL2: linkage bit ); use STD_1149_1_1990.all; attribute PIN_MAP of AM79C961A : entity is PHYSICAL_PIN_MAP; constant PQFP_132: PIN_MAP_STRING:= "AEN:44," & "AVDD:(103,108,96,91)," & "AVSS:(100,98)," & "BALE:55," & "BPCSL:126," & "CI0:106," & "CI1:107," & "DACKL:(62,9,8,7)," & "DI0:104," & "DI1:105," & "DO0:101," & "DO1:102," & "DRQ:(61,5,4)," & "DRQ0:3," & "DVDD:(115,132,19,34,52,67,78)," & "DVSS:(112,120,1,14,23,31,39,73,83,6," & "48,60,88)," & "DXCVR:109," & "EECS:127," & "IOCHRDY:45," & "IOCS16L:54," & "IORL:63," & "IOWL:64," & "IRQ:(56,57,58,65,53,51,50,49)," & "LA:(10,11,12,13,15,16,17)," & "LED:(114,113,111,110)," & "MASTERL:2," & "MEMRL:47," & "MEMWL:46," & "PRDB:(124,123,122,121,119,118,117,116)," & "REFL:59," & "RESET:66," & "RXD0:89," & "RXD1:90," & "SA:(20,21,22,24,25,26,27,28,29,30," & "32,33,35,36,37,38,40,41,42,43)," & "SBHEL:18," & "SD:(69,71,74,76,79,81,84,86,70,72," & "75,77,80,82,85,87)," & "SHFTBSY:125," & "SLEEPL:68," & "TCK:131," & "TDI:128," & "TDO:129," & "TMS:130," & "TXD0:93," & "TXD1:95," & "TXP0:92," & "TXP1:94," & "XTAL1:97," & "XTAL2:99"; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (1.00e+07, BOTH); attribute INSTRUCTION_LENGTH of AM79C961A : entity is 4; attribute INSTRUCTION_OPCODE of AM79C961A : entity is "BYPASS ( 1111)," & "EXTEST ( 0000)," & "IDCODE ( 0001)," & "PRIVATE ( 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100," & " 1101, 1110)," & "SAMPLE ( 0010)," & "SETBYP ( 0100)," & "TRIBYP ( 0011)" ; attribute INSTRUCTION_CAPTURE of AM79C961A : entity is "0001"; attribute INSTRUCTION_DISABLE of AM79C961A : entity is "TRIBYP"; attribute INSTRUCTION_PRIVATE of AM79C961A : entity is " PRIVATE"; attribute IDCODE_REGISTER of AM79C961A : entity is "00011" & -- version "0010001001100001" & -- part number "00000000001" & -- manufacturer's id "1"; -- required by standard attribute REGISTER_ACCESS of AM79C961A : entity is "BYPASS ( BYPASS, SETBYP, TRIBYP)," & "BOUNDARY ( EXTEST, SAMPLE)," & "IDCODE ( IDCODE)"; attribute BOUNDARY_CELLS of AM79C961A : entity is " BC_1, BC_4"; attribute BOUNDARY_LENGTH of AM79C961A : entity is 180; attribute BOUNDARY_REGISTER of AM79C961A : entity is " 0 (BC_1, *, control, 0)," & " 1 (BC_1, *, control, 0)," & " 2 (BC_1, *, control, 0)," & " 3 (BC_1, *, control, 0)," & " 4 (BC_1, *, control, 0)," & " 5 (BC_1, *, control, 0)," & " 6 (BC_1, *, control, 0)," & " 7 (BC_1, *, control, 0)," & " 8 (BC_1, *, control, 0)," & " 9 (BC_1, *, control, 0)," & " 10 (BC_1, *, control, 0)," & " 11 (BC_1, *, control, 0)," & " 12 (BC_1, EECS, output2, X)," & " 13 (BC_1, BPCSL, output2, X)," & " 14 (BC_1, SHFTBSY, output3, X, 4, 0, Z)," & " 15 (BC_1, SHFTBSY, input, 0)," & " 16 (BC_1, PRDB(0), output3, X, 6, 0, Z)," & " 17 (BC_1, PRDB(0), input, 0)," & " 18 (BC_1, PRDB(1), output3, X, 6, 0, Z)," & " 19 (BC_1, PRDB(1), input, 0)," & " 20 (BC_1, PRDB(2), output3, X, 5, 0, Z)," & " 21 (BC_1, PRDB(2), input, 0)," & " 22 (BC_1, PRDB(3), output3, X, 5, 0, Z)," & " 23 (BC_1, PRDB(3), input, 0)," & " 24 (BC_1, PRDB(4), output3, X, 5, 0, Z)," & " 25 (BC_1, PRDB(4), input, 0)," & " 26 (BC_1, PRDB(5), output3, X, 5, 0, Z)," & " 27 (BC_1, PRDB(5), input, 0)," & " 28 (BC_1, PRDB(6), output3, X, 5, 0, Z)," & " 29 (BC_1, PRDB(6), input, 0)," & " 30 (BC_1, PRDB(7), output3, X, 5, 0, Z)," & " 31 (BC_1, PRDB(7), input, 0)," & " 32 (BC_1, LED(0), output2, X)," & " 33 (BC_1, LED(1), output2, X)," & " 34 (BC_1, LED(2), output2, X)," & " 35 (BC_1, LED(3), output2, X)," & " 36 (BC_1, DXCVR, output3, X, 0, 0, Z)," & " 37 (BC_1, DXCVR, input, X)," & " 38 (BC_4, XTAL1, clock, 0)," & " 39 (BC_1, RXD1, input, 1)," & " 40 (BC_1, *, control, 0)," & " 41 (BC_1, TXP1, output3, X, 40, 0, Z)," & " 42 (BC_1, TXD1, output3, X, 40, 0, Z)," & " 43 (BC_1, *, control, 0)," & " 44 (BC_1, DO1, output3, X, 43, 0, Z)," & " 45 (BC_4, DI1, input, 1)," & " 46 (BC_4, CI1, input, 1)," & " 47 (BC_1, SD(15), output3, X, 7, 0, Z)," & " 48 (BC_1, SD(15), input, X)," & " 49 (BC_1, SD(7), output3, X, 8, 0, Z)," & " 50 (BC_1, SD(7), input, X)," & " 51 (BC_1, SD(14), output3, X, 7, 0, Z)," & " 52 (BC_1, SD(14), input, X)," & " 53 (BC_1, SD(6), output3, X, 8, 0, Z)," & " 54 (BC_1, SD(6), input, X)," & " 55 (BC_1, SD(13), output3, X, 7, 0, Z)," & " 56 (BC_1, SD(13), input, X)," & " 57 (BC_1, SD(5), output3, X, 8, 0, Z)," & " 58 (BC_1, SD(5), input, X)," & " 59 (BC_1, SD(12), output3, X, 7, 0, Z)," & " 60 (BC_1, SD(12), input, X)," & " 61 (BC_1, SD(4), output3, X, 8, 0, Z)," & " 62 (BC_1, SD(4), input, X)," & " 63 (BC_1, SD(11), output3, X, 7, 0, Z)," & " 64 (BC_1, SD(11), input, X)," & " 65 (BC_1, SD(3), output3, X, 8, 0, Z)," & " 66 (BC_1, SD(3), input, X)," & " 67 (BC_1, SD(10), output3, X, 7, 0, Z)," & " 68 (BC_1, SD(10), input, X)," & " 69 (BC_1, SD(2), output3, X, 8, 0, Z)," & " 70 (BC_1, SD(2), input, X)," & " 71 (BC_1, SD(9), output3, X, 7, 0, Z)," & " 72 (BC_1, SD(9), input, X)," & " 73 (BC_1, SD(1), output3, X, 8, 0, Z)," & " 74 (BC_1, SD(1), input, X)," & " 75 (BC_1, SD(8), output3, X, 7, 0, Z)," & " 76 (BC_1, SD(8), input, X)," & " 77 (BC_1, SD(0), output3, X, 8, 0, Z)," & " 78 (BC_1, SD(0), input, X)," & " 79 (BC_1, SLEEPL, input, 1)," & " 80 (BC_1, RESET, input, 0)," & " 81 (BC_1, *, control, 0)," & " 82 (BC_1, IRQ(3), output3, X, 81, 0, Z)," & " 83 (BC_1, IOWL, input, 1)," & " 84 (BC_1, IORL, input, 1)," & " 85 (BC_1, DACKL(0), input, 1)," & " 86 (BC_1, *, control, 0)," & " 87 (BC_1, DRQ0, output3, X, 86, 0, Z)," & " 88 (BC_1, REFL, input, X)," & " 89 (BC_1, *, control, 0)," & " 90 (BC_1, IRQ(2), output3, X, 89, 0, Z)," & " 91 (BC_1, *, control, 0)," & " 92 (BC_1, IRQ(1), output3, X, 91, 0, Z)," & " 93 (BC_1, *, control, 0)," & " 94 (BC_1, IRQ(0), output3, X, 93, 0, Z)," & " 95 (BC_1, BALE, input, X)," & " 96 (BC_1, *, control, 0)," & " 97 (BC_1, IOCS16L, output3, X, 96, 0, Z)," & " 98 (BC_1, *, control, 0)," & " 99 (BC_1, IRQ(4), output3, X, 98, 0, Z)," & " 100 (BC_1, *, control, 0)," & " 101 (BC_1, IRQ(5), output3, X, 100, 0, Z)," & " 102 (BC_1, *, control, 0)," & " 103 (BC_1, IRQ(6), output3, X, 102, 0, Z)," & " 104 (BC_1, *, control, 0)," & " 105 (BC_1, IRQ(7), output3, X, 104, 0, Z)," & " 106 (BC_1, MEMRL, output3, X, 9, 0, Z)," & " 107 (BC_1, MEMRL, input, X)," & " 108 (BC_1, MEMWL, output3, X, 9, 0, Z)," & " 109 (BC_1, MEMWL, input, X)," & " 110 (BC_1, IOCHRDY, output3, 0, 11, 0, Z)," & " 111 (BC_1, IOCHRDY, input, X)," & " 112 (BC_1, AEN, input, X)," & " 113 (BC_1, SA(19), output3, X, 10, 0, Z)," & " 114 (BC_1, SA(19), input, X)," & " 115 (BC_1, SA(18), output3, X, 9, 0, Z)," & " 116 (BC_1, SA(18), input, X)," & " 117 (BC_1, SA(17), output3, X, 9, 0, Z)," & " 118 (BC_1, SA(17), input, X)," & " 119 (BC_1, SA(16), output3, X, 9, 0, Z)," & " 120 (BC_1, SA(16), input, X)," & " 121 (BC_1, SA(15), output3, X, 10, 0, Z)," & " 122 (BC_1, SA(15), input, X)," & " 123 (BC_1, SA(14), output3, X, 10, 0, Z)," & " 124 (BC_1, SA(14), input, X)," & " 125 (BC_1, SA(13), output3, X, 10, 0, Z)," & " 126 (BC_1, SA(13), input, X)," & " 127 (BC_1, SA(12), output3, X, 10, 0, Z)," & " 128 (BC_1, SA(12), input, X)," & " 129 (BC_1, SA(11), output3, X, 10, 0, Z)," & " 130 (BC_1, SA(11), input, X)," & " 131 (BC_1, SA(10), output3, X, 10, 0, Z)," & " 132 (BC_1, SA(10), input, X)," & " 133 (BC_1, SA(9), output3, X, 10, 0, Z)," & " 134 (BC_1, SA(9), input, X)," & " 135 (BC_1, SA(8), output3, X, 10, 0, Z)," & " 136 (BC_1, SA(8), input, X)," & " 137 (BC_1, SA(7), output3, X, 10, 0, Z)," & " 138 (BC_1, SA(7), input, X)," & " 139 (BC_1, SA(6), output3, X, 10, 0, Z)," & " 140 (BC_1, SA(6), input, X)," & " 141 (BC_1, SA(5), output3, X, 10, 0, Z)," & " 142 (BC_1, SA(5), input, X)," & " 143 (BC_1, SA(4), output3, X, 10, 0, Z)," & " 144 (BC_1, SA(4), input, X)," & " 145 (BC_1, SA(3), output3, X, 10, 0, Z)," & " 146 (BC_1, SA(3), input, X)," & " 147 (BC_1, SA(2), output3, X, 10, 0, Z)," & " 148 (BC_1, SA(2), input, X)," & " 149 (BC_1, SA(1), output3, X, 10, 0, Z)," & " 150 (BC_1, SA(1), input, X)," & " 151 (BC_1, SA(0), output3, X, 10, 0, Z)," & " 152 (BC_1, SA(0), input, X)," & " 153 (BC_1, SBHEL, output3, X, 9, 0, Z)," & " 154 (BC_1, SBHEL, input, 1)," & " 155 (BC_1, LA(23), output3, X, 9, 0, Z)," & " 156 (BC_1, LA(23), input, X)," & " 157 (BC_1, LA(22), output3, X, 9, 0, Z)," & " 158 (BC_1, LA(22), input, X)," & " 159 (BC_1, LA(21), output3, X, 9, 0, Z)," & " 160 (BC_1, LA(21), input, X)," & " 161 (BC_1, LA(20), output3, X, 9, 0, Z)," & " 162 (BC_1, LA(20), input, X)," & " 163 (BC_1, LA(19), output3, X, 9, 0, Z)," & " 164 (BC_1, LA(19), input, X)," & " 165 (BC_1, LA(18), output3, X, 9, 0, Z)," & " 166 (BC_1, LA(18), input, X)," & " 167 (BC_1, LA(17), output3, X, 9, 0, Z)," & " 168 (BC_1, LA(17), input, X)," & " 169 (BC_1, DACKL(1), input, 1)," & " 170 (BC_1, DACKL(2), input, 1)," & " 171 (BC_1, DACKL(3), input, 1)," & " 172 (BC_1, DRQ(1), output3, X, 3, 0, Z)," & " 173 (BC_1, DRQ(1), input, X)," & " 174 (BC_1, DRQ(2), output3, X, 2, 0, Z)," & " 175 (BC_1, DRQ(2), input, X)," & " 176 (BC_1, DRQ(3), output3, X, 1, 0, Z)," & " 177 (BC_1, DRQ(3), input, X)," & " 178 (BC_1, MASTERL, output2, 1, 178, 1, Weak1)," & -- " 179 (BC_1, *, input, X)"; " 179 (BC_1, RESET, input, X)"; attribute DESIGN_WARNING of AM79C961A : entity is "A) TAPDANCE MAY NOT BE ABLE TO HANDLE THE ANALOG" & " I/O'S IN DIFFRENTIAL PAIR CONFIGURATION. IN THAT CASE," & " USE THE POSITIVE VALUES ONLY. "; end AM79C961A;