---------------------------------------------------------------------
--TI TMS320VC5441 16-Bit 169-pin Fixed-Point DSP with Boundary Scan --
----------------------------------------------------------------------
-- Supported Devices: TMS320VC5441 169-pin Revision 1.0 and higher --
----------------------------------------------------------------------
-- --
-- This file contains the boundary scan description --
-- of CPU A of the 5441 only. --
-- --
----------------------------------------------------------------------
-- Created by : Texas Instruments Incorporated --
-- Documentation : TMS320VC54x Users Guide --
-- BSDL Revision : 1.1 - Original --
-- --
-- BSDL status : Preliminary --
-- Date created : 08/03/2000 --
----------------------------------------------------------------------
-- --
-- IMPORTANT NOTICE
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-- changes to its products or to discontinue any semiconductor
-- product or service without notice, and advises its customers to
-- obtain the latest version of the relevant information to
-- verify, before placing orders, that the information being
-- relied on is current.
-- TI warrants performance of its semiconductor products and
-- related software to the specifications applicable at the time
-- of sale in accordance with TI's standard warranty. Testing and
-- other quality control techniques are utilized to the extent TI
-- deems necessary to support this warranty. Specific testing of
-- all parameters of each device is not necessarily performed,
-- except those mandated by government requirements.
--
-- Certain applications using semiconductor devices may involve
-- potential risks of death, personal injury, or severe property
-- or environmental damage ("Critical Applications").
-- TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED,
-- AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN
-- LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER
-- CRITICAL APPLICATIONS.
-- Inclusion of TI products in such applications is understood
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-- appropriate TI officer. Questions concerning potential risk
-- applications should be directed to TI through a local SC sales
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-- In order to minimize risks associated with the customer's
-- applications, adequate design and operating safeguards should
-- be provided by the
-- customer to minimize inherent or procedural hazards.
-- TI assumes no liability for applications assistance, customer
-- product design, software performance, or infringement of
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-- granted under any patent right, copyright, mask work right, or
-- other intellectual property right of TI covering or relating
-- to any combination, machine, or process in which such
-- semiconductor products or services might be or are used.
-- Copyright (c) 2000, Texas Instruments Incorporated
-------------------------------------------------------------------
entity TMS320VC5441_cpu_A is
generic (PHYSICAL_PIN_MAP : string := "GGU");
port
(HD : inout bit_vector(0 to 15);
HA0 : in bit;
HA1 : in bit;
HA2 : inout bit;
HA3 : inout bit;
HA4 : inout bit;
HA5 : inout bit;
HA6 : in bit;
HA7 : in bit;
HA8 : in bit;
HA9 : in bit;
HA10 : in bit;
HA11 : in bit;
HA12 : in bit;
HA13 : in bit;
HA14 : in bit;
HA15 : in bit;
HA16 : in bit;
HA17 : in bit;
HA18 : in bit;
HAS : in bit;
RESET : in bit;
HMODE : in bit;
HRNW : in bit;
HDS1 : in bit;
HDS2 : in bit;
HCS : in bit;
HPI_SEL1 : in bit;
HPI_SEL2 : in bit;
HRDY : out bit;
CLKMD : in bit;
CLKIN : in bit;
A_BCLKR0 : inout bit;
BCLKR2 : inout bit;
A_BCLKX0 : inout bit;
BCLKX2 : inout bit;
A_BDR0 : in bit;
BDR2 : in bit;
A_BDX0 : out bit;
BDX2 : out bit;
A_BFSR0 : inout bit;
BFSR2 : inout bit;
A_BFSX0 : inout bit;
BFSX2 : inout bit;
A_GPIO0 : inout bit;
A_GPIO1 : inout bit;
A_GPIO2 : inout bit;
A_GPIO3 : inout bit;
A_RS : in bit;
A_NMI : in bit;
A_INT : in bit;
CLKOUT : out bit;
TMS : in bit;
TCK : in bit;
TDI : in bit;
TDO : out bit;
TRST : in bit;
EMU0 : in bit;
EMU1 : in bit;
VCCA : linkage bit;
VSSA : linkage bit;
CVDD : linkage bit_vector(1 to 5);
DVDD : linkage bit_vector(1 to 3);
VSS : linkage bit_vector(1 to 5));
use STD_1149_1_1994.all; -- Get standard attributes and definitions
use TI_BIDIR.all; -- Get C54X BIDIR cell attributes
----------------------------------------------------------------------
-- This package type TI_BIDIR must be available to your toolset. --
-- In most cases this text should be placed in a separate file --
-- named 'TI_BIDIR' that can be referenced via the previous --
-- 'use TI_BIDIR.all' statement. --
--
-- package TI_BIDIR is
-- use STD_1149_1_1990.all;
-- constant BC_BIDIR : CELL_INFO;
-- end TI_BIDIR;
--
-- package body TI_BIDIR is
-- constant BC_BIDIR : CELL_INFO :=
-- ((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, PI),
-- (BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI),
-- (BIDIR_IN, INTEST, PI), (BIDIR_OUT, INTEST, PI));
-- end TI_BIDIR;
----------------------------------------------------------------------
-- attribute BOUNDARY_CELLS of TMS320VC5441_cpu_A : entity is
-- "BC_1, BC_2, BC_BIDIR";
attribute COMPONENT_CONFORMANCE of TMS320VC5441_cpu_A: entity is "STD_1149_1_1993";
attribute PIN_MAP of TMS320VC5441_cpu_A : entity is PHYSICAL_PIN_MAP;
constant GGU : PIN_MAP_STRING :=
" HA0 : A01, " &
" HA1 : B01, " &
" HA2 : E05, " &
" HA3 : C02, " &
" HA4 : D04, " &
" HA5 : L01, " &
" HA6 : L02, " &
" HA7 : H06, " &
" HA8 : L03, " &
" HA9 : M02, " &
" HA10 : M13, " &
" HA11 : J09, " &
" HA12 : L12, " &
" HA13 : K10, " &
" HA14 : K11, " &
" HA15 : C12, " &
" HA16 : F08, " &
" HA17 : C11, " &
" HA18 : B13, " &
" HD:(B08,E08,F07,B07,C07,D07,E07,B06, "&
" J06,H07,M07,L07,K07,J07,M08,L08), "&
" HMODE : G08, " &
" HAS : F04, " &
" RESET : G11, " &
" HRNW : G12, " &
" HRDY : G06, " &
" CLKMD : D01, " &
" VSSA : F01, " &
" VCCA : G01, " &
" CLKIN : F05, " &
" HCS : F03, " &
" HPI_SEL1 : F12, " &
" HPI_SEL2 : F11, " &
" HDS2 : G09, " &
" HDS1 : K13, " &
" A_BDR0 : M04, " &
" A_BDX0 : N04, " &
" A_BFSX0 : N01, " &
" A_BFSR0 : M03, " &
" A_BCLKR0 : L06, " &
" A_BCLKX0 : M06, " &
" BDR2 : J02, " &
" BDX2 : J03, " &
" BFSX2 : H03, " &
" BFSR2 : H02, " &
" BCLKR2 : G04, " &
" BCLKX2 : G05, " &
" A_RS : J04, " &
" A_GPIO0 : L04, " &
" TCK : E12, " &
" TMS : E11, " &
" TDO : K03, " &
" EMU0 : G03, " &
" TRST : D13, " &
" TDI : E03, " &
" EMU1 : F10, " &
" A_NMI : K02, " &
" A_GPIO1 : J05, " &
" A_GPIO2 : K06, " &
" A_GPIO3 : K04, " &
" CLKOUT : H04, " &
" A_INT : H05, " &
" CVDD:(A05,A09,B05,B09,C05), "&
" DVDD:(A02,A07,A12), "&
" VSS: (A03,A06,A08,A11,C01)" ;
-- *********************************************************
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of TRST : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (25.00e6, BOTH);
attribute COMPLIANCE_PATTERNS of TMS320VC5441_cpu_A : entity is "(EMU1,EMU0)(11)";
attribute INSTRUCTION_LENGTH of TMS320VC5441_cpu_A : entity is 8;
attribute INSTRUCTION_OPCODE of TMS320VC5441_cpu_A : entity is
"EXTEST (00000000), " &
"BYPASS (11111111), " &
"HIGHZ (00000110), " &
"SAMPLE (00000010) " ;
attribute INSTRUCTION_CAPTURE of TMS320VC5441_cpu_A : entity is "XXXXXX01";
attribute REGISTER_ACCESS of TMS320VC5441_cpu_A : entity is
"BOUNDARY (EXTEST, SAMPLE)," &
"BYPASS (BYPASS, HIGHZ) " ;
attribute BOUNDARY_LENGTH of TMS320VC5441_cpu_A: entity is 88;
attribute BOUNDARY_REGISTER of TMS320VC5441_cpu_A: entity is
----------------------------------------------------------------
-- CELL CELL PIN CELL CNTRL
-- # NAME ,NAME ,TYPE , ,CELL
----------------------------------------------------------------
"0 (BC_1 ,A_INT ,INPUT ,X ), " &
"1 (BC_1 ,A_NMI ,INPUT ,X ), " &
"2 (BC_1 ,A_RS ,INPUT ,X ), " &
"3 (BC_BIDIR ,A_GPIO3 ,BIDIR ,X ,7 ,1 ,Z), " &
"4 (BC_BIDIR ,A_GPIO2 ,BIDIR ,X ,8 ,1 ,Z), " &
"5 (BC_BIDIR ,A_GPIO1 ,BIDIR ,X ,9 ,1 ,Z), " &
"6 (BC_BIDIR ,A_GPIO0 ,BIDIR ,X ,10 ,1 ,Z), " &
"7 (BC_1 ,* ,CONTROL ,1 ), " &
"8 (BC_1 ,* ,CONTROL ,1 ), " &
"9 (BC_1 ,* ,CONTROL ,1 ), " &
"10 (BC_1 ,* ,CONTROL ,1 ), " &
"11 (BC_1 ,A_BDX0 ,OUTPUT3 ,X ,16 ,1 ,Z), " &
"12 (BC_BIDIR ,A_BFSX0 ,BIDIR ,X ,17 ,1 ,Z), " &
"13 (BC_BIDIR ,A_BFSR0 ,BIDIR ,X ,18 ,1 ,Z), " &
"14 (BC_BIDIR ,A_BCLKX0 ,BIDIR ,X ,19 ,1 ,Z), " &
"15 (BC_BIDIR ,A_BCLKR0 ,BIDIR ,X ,20 ,1 ,Z), " &
"16 (BC_1 ,* ,CONTROL ,1 ), " &
"17 (BC_1 ,* ,CONTROL ,1 ), " &
"18 (BC_1 ,* ,CONTROL ,1 ), " &
"19 (BC_1 ,* ,CONTROL ,1 ), " &
"20 (BC_1 ,* ,CONTROL ,1 ), " &
"21 (BC_2 ,A_BDR0 ,INPUT ,X ), " &
"22 (BC_1 ,BDX2 ,OUTPUT3 ,X ,27 ,1 ,Z), " &
"23 (BC_BIDIR ,BFSX2 ,BIDIR ,X ,28 ,1 ,Z), " &
"24 (BC_BIDIR ,BFSR2 ,BIDIR ,X ,29 ,1 ,Z), " &
"25 (BC_BIDIR ,BCLKX2 ,BIDIR ,X ,30 ,1 ,Z), " &
"26 (BC_BIDIR ,BCLKR2 ,BIDIR ,X ,31 ,1 ,Z), " &
"27 (BC_1 ,* ,CONTROL ,1 ), " &
"28 (BC_1 ,* ,CONTROL ,1 ), " &
"29 (BC_1 ,* ,CONTROL ,1 ), " &
"30 (BC_1 ,* ,CONTROL ,1 ), " &
"31 (BC_1 ,* ,CONTROL ,1 ), " &
"32 (BC_2 ,BDR2 ,INPUT ,X ), " &
"33 (BC_1 ,* ,CONTROL ,1 ), " &
"34 (BC_1 ,* ,CONTROL ,1 ), " &
"35 (BC_1 ,CLKOUT ,OUTPUT3 ,X ,34 ,1 ,Z), " &
"36 (BC_1 ,HRDY ,OUTPUT3 ,X ,33 ,1 ,Z), " &
"37 (BC_BIDIR ,HA2 ,BIDIR ,X ,57 ,1 ,Z), " &
"38 (BC_BIDIR ,HA3 ,BIDIR ,X ,58 ,1 ,Z), " &
"39 (BC_BIDIR ,HA4 ,BIDIR ,X ,59 ,1 ,Z), " &
"40 (BC_BIDIR ,HA5 ,BIDIR ,X ,60 ,1 ,Z), " &
"41 (BC_BIDIR ,HD(0) ,BIDIR ,X ,61 ,1 ,Z), " &
"42 (BC_BIDIR ,HD(1) ,BIDIR ,X ,61 ,1 ,Z), " &
"43 (BC_BIDIR ,HD(2) ,BIDIR ,X ,61 ,1 ,Z), " &
"44 (BC_BIDIR ,HD(3) ,BIDIR ,X ,61 ,1 ,Z), " &
"45 (BC_BIDIR ,HD(4) ,BIDIR ,X ,61 ,1 ,Z), " &
"46 (BC_BIDIR ,HD(5) ,BIDIR ,X ,61 ,1 ,Z), " &
"47 (BC_BIDIR ,HD(6) ,BIDIR ,X ,61 ,1 ,Z), " &
"48 (BC_BIDIR ,HD(7) ,BIDIR ,X ,61 ,1 ,Z), " &
"49 (BC_BIDIR ,HD(8) ,BIDIR ,X ,61 ,1 ,Z), " &
"50 (BC_BIDIR ,HD(9) ,BIDIR ,X ,61 ,1 ,Z), " &
"51 (BC_BIDIR ,HD(10) ,BIDIR ,X ,61 ,1 ,Z), " &
"52 (BC_BIDIR ,HD(11) ,BIDIR ,X ,61 ,1 ,Z), " &
"53 (BC_BIDIR ,HD(12) ,BIDIR ,X ,61 ,1 ,Z), " &
"54 (BC_BIDIR ,HD(13) ,BIDIR ,X ,61 ,1 ,Z), " &
"55 (BC_BIDIR ,HD(14) ,BIDIR ,X ,61 ,1 ,Z), " &
"56 (BC_BIDIR ,HD(15) ,BIDIR ,X ,61 ,1 ,Z), " &
"57 (BC_1 ,* ,CONTROL ,1 ), " &
"58 (BC_1 ,* ,CONTROL ,1 ), " &
"59 (BC_1 ,* ,CONTROL ,1 ), " &
"60 (BC_1 ,* ,CONTROL ,1 ), " &
"61 (BC_1 ,* ,CONTROL ,1 ), " &
"62 (BC_2 ,CLKIN ,INPUT ,X ), " &
"63 (BC_2 ,CLKMD ,INPUT ,X ), " &
"64 (BC_2 ,HPI_SEL2 ,INPUT ,X ), " &
"65 (BC_2 ,HPI_SEL1 ,INPUT ,X ), " &
"66 (BC_2 ,HCS ,INPUT ,X ), " &
"67 (BC_2 ,HDS2 ,INPUT ,X ), " &
"68 (BC_2 ,HDS1 ,INPUT ,X ), " &
"69 (BC_2 ,HRNW ,INPUT ,X ), " &
"70 (BC_2 ,HMODE ,INPUT ,X ), " &
"71 (BC_2 ,RESET ,INPUT ,X ), " &
"72 (BC_2 ,HAS ,INPUT ,X ), " &
"73 (BC_2 ,HA18 ,INPUT ,X ), " &
"74 (BC_2 ,HA17 ,INPUT ,X ), " &
"75 (BC_2 ,HA16 ,INPUT ,X ), " &
"76 (BC_2 ,HA15 ,INPUT ,X ), " &
"77 (BC_2 ,HA14 ,INPUT ,X ), " &
"78 (BC_2 ,HA13 ,INPUT ,X ), " &
"79 (BC_2 ,HA12 ,INPUT ,X ), " &
"80 (BC_2 ,HA11 ,INPUT ,X ), " &
"81 (BC_2 ,HA10 ,INPUT ,X ), " &
"82 (BC_2 ,HA9 ,INPUT ,X ), " &
"83 (BC_2 ,HA8 ,INPUT ,X ), " &
"84 (BC_2 ,HA7 ,INPUT ,X ), " &
"85 (BC_2 ,HA6 ,INPUT ,X ), " &
"86 (BC_2 ,HA1 ,INPUT ,X ), " &
"87 (BC_2 ,HA0 ,INPUT ,X )" ;
end TMS320VC5441_cpu_A;