--
-- BSDL File created/edited by AT&T BSD Editor
--
-- BSDE:Revision: Silicon Rev. C0; File REV A3
-- BSDE:Description: BSDL File for the AM79C940 MACE Product;
-- 84-Pin PLCC and 100-Pin PQFP packages.
-- Separate file for 80-Pin TQFP package.
-- BSDE:Comments: /* TQFP Definition has been deleted.
-- * BSDL file checked by AT&T's BCAD2 BSD Editor on 9/7/95
-- */
entity AM79C940 is
generic (PHYSICAL_PIN_MAP : string := "PLCC_PACKAGE" );
port (
ADD: in bit_vector (0 to 4);
AVDD1: linkage bit;
AVDD2: linkage bit;
AVDD3: linkage bit;
AVDD4: linkage bit;
AVSS1: linkage bit;
AVSS2: linkage bit;
BE0_L: in bit;
BE1_L: in bit;
CI0: linkage bit;
CI1: in bit;
CLSN: inout bit;
CS_L: in bit;
DBUS: inout bit_vector (0 to 15);
DI0: linkage bit;
DI1: in bit;
DO0: linkage bit;
DO1: out bit;
DTV_L: out bit;
DVDD1: linkage bit;
DVDD2: linkage bit;
DVDDN: linkage bit;
DVDDP: linkage bit;
DVSS1: linkage bit;
DVSS2: linkage bit;
DVSSN1: linkage bit;
DVSSN2: linkage bit;
DVSSN3: linkage bit;
DVSSP: linkage bit;
DXRCV_L: out bit;
EAM_R_L: in bit;
EDSEL: in bit;
EOF_L: inout bit;
FDS_L: in bit;
INTR_L: out bit;
LNKST_L: out bit;
RDTREQ_L: out bit;
RESET_L: in bit;
RXCRS: inout bit;
RXD0: linkage bit;
RXD1: in bit;
RXDAT: inout bit;
RXPOL_L: out bit;
R_W_L: in bit;
SCLK: in bit;
SF_BD: out bit;
SLEEP_L: in bit;
SRD: out bit;
SRDCLK: inout bit;
STDCLK: inout bit;
TCK: in bit;
TC_L: in bit;
TDI: in bit;
TDO: out bit;
TDTREQ_L: out bit;
TMS: in bit;
TXD0: linkage bit;
TXD1: out bit;
TXDAT0: out bit;
TXDAT1: inout bit;
TXEN_L: inout bit;
TXP0: linkage bit;
TXP1: out bit;
XTAL1: in bit;
XTAL2: linkage bit
);
use STD_1149_1_1990.all;
attribute PIN_MAP of AM79C940 : entity is PHYSICAL_PIN_MAP;
constant PLCC_PACKAGE: PIN_MAP_STRING:=
"ADD:(49,50,51,52,53)," &
"AVDD1:66," &
"AVDD2:71," &
"AVDD3:78," &
"AVDD4:83," &
"AVSS1:73," &
"AVSS2:75," &
"BE0_L:44," &
"BE1_L:45," &
"CI0:81," &
"CI1:82," &
"CLSN:9," &
"CS_L:55," &
"DBUS:(21,23,24,25,26,28,29,30,31,32," &
"33,34,35,36,38,39)," &
"DI0:79," &
"DI1:80," &
"DO0:76," &
"DO1:77," &
"DTV_L:42," &
"DVDD1:63," &
"DVDD2:84," &
"DVDDN:37," &
"DVDDP:18," &
"DVSS1:61," &
"DVSS2:3," &
"DVSSN1:22," &
"DVSSN2:27," &
"DVSSN3:40," &
"DVSSP:6," &
"DXRCV_L:1," &
"EAM_R_L:13," &
"EDSEL:2," &
"EOF_L:41," &
"FDS_L:43," &
"INTR_L:19," &
"LNKST_L:57," &
"RDTREQ_L:48," &
"RESET_L:16," &
"RXCRS:11," &
"RXD0:64," &
"RXD1:65," &
"RXDAT:10," &
"RXPOL_L:56," &
"R_W_L:54," &
"SCLK:46," &
"SF_BD:15," &
"SLEEP_L:17," &
"SRD:14," &
"SRDCLK:12," &
"STDCLK:7," &
"TCK:60," &
"TC_L:20," &
"TDI:62," &
"TDO:58," &
"TDTREQ_L:47," &
"TMS:59," &
"TXD0:68," &
"TXD1:70," &
"TXDAT0:5," &
"TXDAT1:4," &
"TXEN_L:8," &
"TXP0:67," &
"TXP1:69," &
"XTAL1:72," &
"XTAL2:74";
constant PQFP_PACKAGE: PIN_MAP_STRING:=
"ADD:(46,47,48,49,50)," &
"AVDD1:67," &
"AVDD2:72," &
"AVDD3:83," &
"AVDD4:88," &
"AVSS1:74," &
"AVSS2:79," &
"BE0_L:41," &
"BE1_L:42," &
"CI0:86," &
"CI1:87," &
"CLSN:98," &
"CS_L:56," &
"DBUS:(14,16,17,18,19,21,22,23,24,25," &
"29,31,32,33,35,36)," &
"DI0:84," &
"DI1:85," &
"DO0:81," &
"DO1:82," &
"DTV_L:39," &
"DVDD1:64," &
"DVDD2:89," &
"DVDDN:34," &
"DVDDP:11," &
"DVSS1:62," &
"DVSS2:92," &
"DVSSN1:15," &
"DVSSN2:20," &
"DVSSN3:37," &
"DVSSP:95," &
"DXRCV_L:90," &
"EAM_R_L:6," &
"EDSEL:91," &
"EOF_L:38," &
"FDS_L:40," &
"INTR_L:12," &
"LNKST_L:58," &
"RDTREQ_L:45," &
"RESET_L:9," &
"RXCRS:100," &
"RXD0:65," &
"RXD1:66," &
"RXDAT:99," &
"RXPOL_L:57," &
"R_W_L:55," &
"SCLK:43," &
"SF_BD:8," &
"SLEEP_L:10," &
"SRD:7," &
"SRDCLK:5," &
"STDCLK:96," &
"TCK:61," &
"TC_L:13," &
"TDI:63," &
"TDO:59," &
"TDTREQ_L:44," &
"TMS:60," &
"TXD0:69," &
"TXD1:71," &
"TXDAT0:94," &
"TXDAT1:93," &
"TXEN_L:97," &
"TXP0:68," &
"TXP1:70," &
"XTAL1:73," &
"XTAL2:75";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (1.00e+07, BOTH);
attribute INSTRUCTION_LENGTH of AM79C940 : entity is 4;
attribute INSTRUCTION_OPCODE of AM79C940 : entity is
"BYPASS ( 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110," &
" 1111)," &
"EXTEST ( 0000)," &
"IDCODE ( 0001)," &
"SAMPLE ( 0010)," &
"SELFTST ( 0101)," &
"SETBYP ( 0100)," &
"TRIBYP ( 0011)" ;
attribute INSTRUCTION_CAPTURE of AM79C940 : entity is "0001";
attribute INSTRUCTION_DISABLE of AM79C940 : entity is "TRIBYP";
attribute INSTRUCTION_PRIVATE of AM79C940 : entity is
" SELFTST";
attribute IDCODE_REGISTER of AM79C940 : entity is
"0011" & -- version
"1001010000000000" & -- part number
"00000000001" & -- manufacturer's id
"1"; -- required by standard
attribute REGISTER_ACCESS of AM79C940 : entity is
"BYPASS ( BYPASS, SETBYP, TRIBYP)," &
"BOUNDARY ( EXTEST, SAMPLE, SELFTST)," &
"IDCODE ( IDCODE)";
attribute BOUNDARY_CELLS of AM79C940 : entity is
" BC_1, BC_4";
attribute BOUNDARY_LENGTH of AM79C940 : entity is 99;
attribute BOUNDARY_REGISTER of AM79C940 : entity is
" 0 (BC_1, *, control, 0)," &
" 1 (BC_1, LNKST_L, output3, X, 0, 0, Weak1)," &
" 2 (BC_1, RXPOL_L, output3, X, 0, 0, Weak1)," &
" 3 (BC_1, CS_L, input, 1)," &
" 4 (BC_1, R_W_L, input, 1)," &
" 5 (BC_1, ADD(4), input, 0)," &
" 6 (BC_1, ADD(3), input, 0)," &
" 7 (BC_1, ADD(2), input, 0)," &
" 8 (BC_1, ADD(1), input, 0)," &
" 9 (BC_1, ADD(0), input, 0)," &
" 10 (BC_1, *, control, 0)," &
" 11 (BC_1, RDTREQ_L, output3, X, 10, 0, Z)," &
" 12 (BC_1, TDTREQ_L, output3, X, 10, 0, Z)," &
" 13 (BC_4, SCLK, clock, 1)," &
" 14 (BC_1, BE1_L, input, 1)," &
" 15 (BC_1, BE0_L, input, 1)," &
" 16 (BC_1, FDS_L, input, 1)," &
" 17 (BC_1, *, control, 0)," &
" 18 (BC_1, DTV_L, output3, X, 17, 0, Z)," &
" 19 (BC_1, *, control, 0)," &
" 20 (BC_1, EOF_L, output3, X, 19, 0, Z)," &
" 21 (BC_1, EOF_L, input, 1)," &
" 22 (BC_1, *, control, 0)," &
" 23 (BC_1, DBUS(15), output3, X, 22, 0, Z)," &
" 24 (BC_1, DBUS(15), input, 0)," &
" 25 (BC_1, DBUS(14), output3, X, 22, 0, Z)," &
" 26 (BC_1, DBUS(14), input, 0)," &
" 27 (BC_1, DBUS(13), output3, X, 22, 0, Z)," &
" 28 (BC_1, DBUS(13), input, 0)," &
" 29 (BC_1, DBUS(12), output3, X, 22, 0, Z)," &
" 30 (BC_1, DBUS(12), input, 0)," &
" 31 (BC_1, DBUS(11), output3, X, 22, 0, Z)," &
" 32 (BC_1, DBUS(11), input, 0)," &
" 33 (BC_1, DBUS(10), output3, X, 22, 0, Z)," &
" 34 (BC_1, DBUS(10), input, 0)," &
" 35 (BC_1, *, control, 0)," &
" 36 (BC_1, DBUS(9), output3, X, 35, 0, Z)," &
" 37 (BC_1, DBUS(9), input, 0)," &
" 38 (BC_1, DBUS(8), output3, X, 35, 0, Z)," &
" 39 (BC_1, DBUS(8), input, 0)," &
" 40 (BC_1, DBUS(7), output3, X, 35, 0, Z)," &
" 41 (BC_1, DBUS(7), input, 0)," &
" 42 (BC_1, DBUS(6), output3, X, 35, 0, Z)," &
" 43 (BC_1, DBUS(6), input, 0)," &
" 44 (BC_1, DBUS(5), output3, X, 35, 0, Z)," &
" 45 (BC_1, DBUS(5), input, 0)," &
" 46 (BC_1, DBUS(4), output3, X, 35, 0, Z)," &
" 47 (BC_1, DBUS(4), input, 0)," &
" 48 (BC_1, DBUS(3), output3, X, 35, 0, Z)," &
" 49 (BC_1, DBUS(3), input, 0)," &
" 50 (BC_1, DBUS(2), output3, X, 35, 0, Z)," &
" 51 (BC_1, DBUS(2), input, 0)," &
" 52 (BC_1, DBUS(1), output3, X, 35, 0, Z)," &
" 53 (BC_1, DBUS(1), input, 0)," &
" 54 (BC_1, DBUS(0), output3, X, 35, 0, Z)," &
" 55 (BC_1, DBUS(0), input, 0)," &
" 56 (BC_1, TC_L, input, 1)," &
" 57 (BC_1, *, control, 0)," &
" 58 (BC_1, INTR_L, output3, 1, 57, 0, Weak1)," &
" 59 (BC_1, SLEEP_L, input, 1)," &
" 60 (BC_1, RESET_L, input, 1)," &
" 61 (BC_1, *, control, 0)," &
" 62 (BC_1, SF_BD, output3, X, 61, 0, Z)," &
" 63 (BC_1, SRD, output3, X, 61, 0, Z)," &
" 64 (BC_1, EAM_R_L, input, 0)," &
" 65 (BC_1, *, control, 0)," &
" 66 (BC_1, SRDCLK, output3, X, 65, 0, Z)," &
" 67 (BC_1, SRDCLK, input, 0)," &
" 68 (BC_1, *, control, 0)," &
" 69 (BC_1, RXCRS, output3, X, 68, 0, Z)," &
" 70 (BC_1, RXCRS, input, 0)," &
" 71 (BC_1, *, control, 0)," &
" 72 (BC_1, RXDAT, output3, X, 71, 0, Z)," &
" 73 (BC_1, RXDAT, input, 0)," &
" 74 (BC_1, *, control, 0)," &
" 75 (BC_1, CLSN, output3, X, 74, 0, Z)," &
" 76 (BC_1, CLSN, input, 0)," &
" 77 (BC_1, *, control, 0)," &
" 78 (BC_1, TXEN_L, output3, X, 77, 0, Z)," &
" 79 (BC_1, TXEN_L, input, 0)," &
" 80 (BC_1, *, control, 0)," &
" 81 (BC_1, STDCLK, output3, X, 80, 0, Z)," &
" 82 (BC_1, STDCLK, input, 0)," &
" 83 (BC_1, *, control, 0)," &
" 84 (BC_1, TXDAT0, output3, X, 83, 0, Z)," &
" 85 (BC_1, TXDAT1, output3, X, 83, 0, Z)," &
" 86 (BC_1, TXDAT1, input, 1)," &
" 87 (BC_1, EDSEL, input, 1)," &
" 88 (BC_1, *, control, 0)," &
" 89 (BC_1, DXRCV_L, output3, X, 88, 0, Z)," &
" 90 (BC_4, XTAL1, clock, 0)," &
" 91 (BC_1, RXD1, input, 1)," &
" 92 (BC_1, *, control, 0)," &
" 93 (BC_1, TXP1, output3, X, 92, 0, Z)," &
" 94 (BC_1, TXD1, output3, X, 92, 0, Z)," &
" 95 (BC_1, *, control, 0)," &
" 96 (BC_1, DO1, output3, X, 95, 0, Z)," &
" 97 (BC_4, DI1, input, 1)," &
" 98 (BC_4, CI1, input, 1)";
end AM79C940;
