-- Generated by INTEL, INC On 11/2/00
-- Chip Version LXT384LE_B1
-- File Version LXT384LE_B1_01
entity LXT384 is
generic (PHYSICAL_PIN_MAP : string := "LXT384LE");
port (
-- Port List
RTIP : linkage bit_vector( 7 downto 0 );
RRING: linkage bit_vector( 7 downto 0 );
TTIP : linkage bit_vector( 7 downto 0 );
TRING: linkage bit_vector( 7 downto 0 );
TVCC : linkage bit_vector( 7 downto 0 );
TGND : linkage bit_vector( 7 downto 0 );
AT1 : linkage bit;
AT2 : linkage bit;
VCCIO: linkage bit_vector( 1 downto 0 );
GNDIO: linkage bit_vector( 1 downto 0 );
VCC : linkage bit_vector( 1 downto 0 );
GND : linkage bit_vector( 1 downto 0 );
LOOP0: inout bit;
LOOP1: inout bit;
LOOP2: inout bit;
LOOP3: inout bit;
LOOP4: inout bit;
LOOP5: inout bit;
LOOP6: inout bit;
LOOP7: inout bit;
TCLK1: in bit;
TPOS1: in bit;
TNEG1: in bit;
RCLK1: out bit;
RPOS1: out bit;
RNEG1: out bit;
LOS1 : buffer bit;
TCLK0: in bit;
TPOS0: in bit;
TNEG0: in bit;
RCLK0: out bit;
RPOS0: out bit;
RNEG0: out bit;
LOS0 : buffer bit;
MUX : in bit;
LOS3 : buffer bit;
RNEG3: out bit;
RPOS3: out bit;
RCLK3: out bit;
TNEG3: in bit;
TPOS3: in bit;
TCLK3: in bit;
LOS2 : buffer bit;
RNEG2: out bit;
RPOS2: out bit;
RCLK2: out bit;
TNEG2: in bit;
TPOS2: in bit;
TCLK2: in bit;
INT : buffer bit;
ACK : out bit;
WRB : in bit;
RDB : in bit;
ALE : in bit;
CSB : in bit;
MOTO : in bit;
TCLK5: in bit;
TPOS5: in bit;
TNEG5: in bit;
RCLK5: out bit;
RPOS5: out bit;
RNEG5: out bit;
LOS5 : buffer bit;
TCLK4: in bit;
TPOS4: in bit;
TNEG4: in bit;
RCLK4: out bit;
RPOS4: out bit;
RNEG4: out bit;
LOS4 : buffer bit;
OE : in bit;
CLKE : in bit;
LOS7 : buffer bit;
RNEG7: out bit;
RPOS7: out bit;
RCLK7: out bit;
TNEG7: in bit;
TPOS7: in bit;
TCLK7: in bit;
LOS6 : buffer bit;
RNEG6: out bit;
RPOS6: out bit;
RCLK6: out bit;
TNEG6: in bit;
TPOS6: in bit;
TCLK6: in bit;
MCLK : in bit;
MODE : in bit;
A4 : in bit;
A3 : in bit;
A2 : in bit;
A1 : in bit;
A0 : in bit;
TRST : in bit;
TDO : out bit;
TCK : in bit;
TMS : in bit;
TDI : in bit
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of LXT384: entity is "STD_1149_1_1993";
-- Pin mappings
attribute PIN_MAP of LXT384: entity is PHYSICAL_PIN_MAP;
constant LXT384LE: PIN_MAP_STRING:=
"RTIP : (139, 132, 127, 120, 67, 60, 55, 48), " &
"RRING: (138, 133, 126, 121, 66, 61, 54, 49), " &
"TTIP : (136, 129, 124, 117, 64, 57, 52, 45), " &
"TRING: (135, 130, 123, 118, 63, 58, 51, 46), " &
"TVCC : (137, 128, 125, 116, 65, 56, 53, 44), " &
"TGND : (134, 131, 122, 119, 62, 59, 50, 47), " &
"AT1 : 94 , " &
"AT2 : 93 , " &
"VCCIO: (92, 17), " &
"GNDIO: (91, 18), " &
"VCC : (90, 19), " &
"GND : (89, 20), " &
"LOOP0: 21 , " &
"LOOP1: 22 , " &
"LOOP2: 23 , " &
"LOOP3: 24 , " &
"LOOP4: 25 , " &
"LOOP5: 26 , " &
"LOOP6: 27 , " &
"LOOP7: 28 , " &
"TCLK1: 29 , " &
"TPOS1: 30 , " &
"TNEG1: 31 , " &
"RCLK1: 32 , " &
"RPOS1: 33 , " &
"RNEG1: 34 , " &
"LOS1 : 35 , " &
"TCLK0: 36 , " &
"TPOS0: 37 , " &
"TNEG0: 38 , " &
"RCLK0: 39 , " &
"RPOS0: 40 , " &
"RNEG0: 41 , " &
"LOS0 : 42 , " &
"MUX : 43 , " &
"LOS3 : 68 , " &
"RNEG3: 69 , " &
"RPOS3: 70 , " &
"RCLK3: 71 , " &
"TNEG3: 72 , " &
"TPOS3: 73 , " &
"TCLK3: 74 , " &
"LOS2 : 75 , " &
"RNEG2: 76 , " &
"RPOS2: 77 , " &
"RCLK2: 78 , " &
"TNEG2: 79 , " &
"TPOS2: 80 , " &
"TCLK2: 81 , " &
"INT : 82 , " &
"ACK : 83 , " &
"WRB : 84 , " &
"RDB : 85 , " &
"ALE : 86 , " &
"CSB : 87 , " &
"MOTO : 88 , " &
"TCLK5: 100 , " &
"TPOS5: 101 , " &
"TNEG5: 102 , " &
"RCLK5: 103 , " &
"RPOS5: 104 , " &
"RNEG5: 105 , " &
"LOS5 : 106 , " &
"TCLK4: 107 , " &
"TPOS4: 108 , " &
"TNEG4: 109 , " &
"RCLK4: 110 , " &
"RPOS4: 111 , " &
"RNEG4: 112 , " &
"LOS4 : 113 , " &
"OE : 114 , " &
"CLKE : 115 , " &
"LOS7 : 140 , " &
"RNEG7: 141 , " &
"RPOS7: 142 , " &
"RCLK7: 143 , " &
"TNEG7: 144 , " &
"TPOS7: 1 , " &
"TCLK7: 2 , " &
"LOS6 : 3 , " &
"RNEG6: 4 , " &
"RPOS6: 5 , " &
"RCLK6: 6 , " &
"TNEG6: 7 , " &
"TPOS6: 8 , " &
"TCLK6: 9 , " &
"MCLK : 10 , " &
"MODE : 11 , " &
"A4 : 12 , " &
"A3 : 13 , " &
"A2 : 14 , " &
"A1 : 15 , " &
"A0 : 16 , " &
"TRST : 95 , " &
"TDO : 98 , " &
"TCK : 97 , " &
"TMS : 96 , " &
"TDI : 99 " ;
-- IEEE 1149.1 pin definition
attribute TAP_SCAN_RESET of TRST: signal is true;
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (5.0e6, BOTH);
-- IEEE 1149.1 instruction register
attribute INSTRUCTION_LENGTH of LXT384: entity is 3;
attribute INSTRUCTION_OPCODE of LXT384: entity is
"EXTEST (000)," &
"INTEST (010)," &
"SAMPLE (100)," & -- was 001
"IDCODE (110)," & -- was 011
"BYPASS (111)" ;
attribute INSTRUCTION_CAPTURE of LXT384: entity is "x01";
attribute IDCODE_REGISTER of LXT384: entity is
"0101" & -- version
"0000000110000000" & -- part number
"00001111110" & -- manufacturer's identity
"1"; -- required by 1149.1
-- Boundary scan definition
-- Cell 0 is closest to TDO
attribute BOUNDARY_LENGTH of LXT384: entity is 99;
attribute BOUNDARY_REGISTER of LXT384: entity is
-- num cell signalName function safe ccell disval rslt
" 98 (BC_1 , A0 , input , X )," &
" 97 (BC_1 , A1 , input , X )," &
" 96 (BC_1 , A2 , input , X )," &
" 95 (BC_1 , A3 , input , X )," &
" 94 (BC_1 , A4 , input , X )," &
" 93 (BC_1 , MODE , input , X )," &
" 92 (BC_1 , MCLK , input , X )," &
" 91 (BC_1 , TCLK6 , input , X )," &
" 90 (BC_1 , TPOS6 , input , X )," &
" 89 (BC_1 , TNEG6 , input , X )," &
" 88 (BC_1 , RCLK6 , output3 , x, 86, 1, Z )," &
" 87 (BC_1 , RPOS6 , output3 , x, 86, 1, Z )," &
" 86 (BC_1 , * , control , 1 )," &
" 85 (BC_1 , RNEG6 , output3 , x, 86, 1, Z )," &
" 84 (BC_1 , LOS6 , output2 , X )," &
" 83 (BC_1 , TCLK7 , input , X )," &
" 82 (BC_1 , TPOS7 , input , X )," &
" 81 (BC_1 , TNEG7 , input , X )," &
" 80 (BC_1 , RCLK7 , output3 , x, 78, 1, Z )," &
" 79 (BC_1 , RPOS7 , output3 , x, 78, 1, Z )," &
" 78 (BC_1 , * , control , 1 )," &
" 77 (BC_1 , RNEG7 , output3 , x, 78, 1, Z )," &
" 76 (BC_1 , LOS7 , output2 , X )," &
" 75 (BC_1 , CLKE , input , X )," &
" 74 (BC_1 , OE , input , X )," &
" 73 (BC_1 , LOS4 , output2 , X )," &
" 72 (BC_1 , RNEG4 , output3 , x, 71, 1, Z )," &
" 71 (BC_1 , * , control , 1 )," &
" 70 (BC_1 , RPOS4 , output3 , x, 71, 1, Z )," &
" 69 (BC_1 , RCLK4 , output3 , x, 71, 1, Z )," &
" 68 (BC_1 , TNEG4 , input , X )," &
" 67 (BC_1 , TPOS4 , input , X )," &
" 66 (BC_1 , TCLK4 , input , X )," &
" 65 (BC_1 , LOS5 , output2 , X )," &
" 64 (BC_1 , RNEG5 , output3 , x, 63, 1, Z )," &
" 63 (BC_1 , * , control , 1 )," &
" 62 (BC_1 , RPOS5 , output3 , x, 63, 1, Z )," &
" 61 (BC_1 , RCLK5 , output3 , x, 63, 1, Z )," &
" 60 (BC_1 , TNEG5 , input , X )," &
" 59 (BC_1 , TPOS5 , input , X )," &
" 58 (BC_1 , TCLK5 , input , X )," &
" 57 (BC_1 , MOTO , input , X )," &
" 56 (BC_1 , CSB , input , X )," &
" 55 (BC_1 , ALE , input , X )," &
" 54 (BC_1 , RDB , input , X )," &
" 53 (BC_1 , WRB , input , X )," &
" 52 (BC_1 , ACK , output3 , x, 51, 1, Z )," &
" 51 (BC_1 , * , control , 1 )," &
" 50 (BC_1 , INT , output2 , X )," &
" 49 (BC_1 , TCLK2 , input , X )," &
" 48 (BC_1 , TPOS2 , input , X )," &
" 47 (BC_1 , TNEG2 , input , X )," &
" 46 (BC_1 , RCLK2 , output3 , x, 44, 1, Z )," &
" 45 (BC_1 , RPOS2 , output3 , x, 44, 1, Z )," &
" 44 (BC_1 , * , control , 1 )," &
" 43 (BC_1 , RNEG2 , output3 , x, 44, 1, Z )," &
" 42 (BC_1 , LOS2 , output2 , X )," &
" 41 (BC_1 , TCLK3 , input , X )," &
" 40 (BC_1 , TPOS3 , input , X )," &
" 39 (BC_1 , TNEG3 , input , X )," &
" 38 (BC_1 , RCLK3 , output3 , x, 36, 1, Z )," &
" 37 (BC_1 , RPOS3 , output3 , x, 36, 1, Z )," &
" 36 (BC_1 , * , control , 1 )," &
" 35 (BC_1 , RNEG3 , output3 , x, 36, 1, Z )," &
" 34 (BC_1 , LOS3 , output2 , X )," &
" 33 (BC_1 , MUX , input , X )," &
" 32 (BC_1 , LOS0 , output2 , X )," &
" 31 (BC_1 , RNEG0 , output3 , x, 30, 1, Z )," &
" 30 (BC_1 , * , control , 1 )," &
" 29 (BC_1 , RPOS0 , output3 , x, 30, 1, Z )," &
" 28 (BC_1 , RCLK0 , output3 , x, 30, 1, Z )," &
" 27 (BC_1 , TNEG0 , input , X )," &
" 26 (BC_1 , TPOS0 , input , X )," &
" 25 (BC_1 , TCLK0 , input , X )," &
" 24 (BC_1 , LOS1 , output2 , X )," &
" 23 (BC_1 , RNEG1 , output3 , x, 22, 1, Z )," &
" 22 (BC_1 , * , control , 1 )," &
" 21 (BC_1 , RPOS1 , output3 , x, 22, 1, Z )," &
" 20 (BC_1 , RCLK1 , output3 , x, 22, 1, Z )," &
" 19 (BC_1 , TNEG1 , input , X )," &
" 18 (BC_1 , TPOS1 , input , X )," &
" 17 (BC_1 , TCLK1 , input , X )," &
" 16 (BC_1 , LOOP7 , output3 , x, 15, 1, Z )," &
" 15 (BC_1 , * , control , 1 )," &
" 14 (BC_1 , LOOP7 , input , X )," &
" 13 (BC_1 , LOOP6 , output3 , x, 15, 1, Z )," &
" 12 (BC_1 , LOOP6 , input , X )," &
" 11 (BC_1 , LOOP5 , output3 , x, 15, 1, Z )," &
" 10 (BC_1 , LOOP5 , input , X )," &
" 9 (BC_1 , LOOP4 , output3 , x, 15, 1, Z )," &
" 8 (BC_1 , LOOP4 , input , X )," &
" 7 (BC_1 , LOOP3 , output3 , x, 15, 1, Z )," &
" 6 (BC_1 , LOOP3 , input , X )," &
" 5 (BC_1 , LOOP2 , output3 , x, 15, 1, Z )," &
" 4 (BC_1 , LOOP2 , input , X )," &
" 3 (BC_1 , LOOP1 , output3 , x, 15, 1, Z )," &
" 2 (BC_1 , LOOP1 , input , X )," &
" 1 (BC_1 , LOOP0 , output3 , x, 15, 1, Z )," &
" 0 (BC_1 , LOOP0 , input , X )";
end LXT384;
