--*******************************************************************************************************
--** Copyright (c) 2000 Cypress Semiconductor
--** All rights reserved.
--**
--** File Name: cy7c1256a.bsdl
--** Release: 1.0
--** Last Updated: December 8, 2000
--**
--** Function: 512Kx18 Sync NoBL SRAM, BSDL file for JTAG
--** Part #: CY7C1356A/GVT71256ZB36
--**
--** Notes: IMPORTANT NOTE: Please be aware that the CY7C1356A device is NOT IEEE
--** 1149.1 compliant.
--**
--** Ref CY7C1356A/GVT71512ZC18 Datasheet at www.cypress.com/sram/datasheets.html
--**
--** Queries ?: Contact MPD Applications at 408-943-2891 or e-mail: mpd_apps@cypress.com
--*******************************************************************************************************
entity CY7C1356A is
generic (PHYSICAL_PIN_MAP : string := "BGA");
port (
SA: in bit_vector(0 to 18);
ADV_LD_b: in bit;
BWS_A_b: in bit;
BWS_B_b: in bit;
CE_b: in bit;
CE2: in bit;
CE2_b: in bit;
CLK: in bit;
CKE_b: in bit;
DQ_A: in bit_vector(0 to 8);
DQ_B: in bit_vector(0 to 8);
R_W_b: in bit;
OE_b: in bit;
MODE: in bit;
TMS: in bit;
TDI: in bit;
TCK: in bit;
TDO: out bit;
ZZ: linkage bit;
VCC: linkage bit_vector(0 to 4);
VSS: linkage bit_vector(0 to 17);
VCCQ: linkage bit_vector(0 to 9);
NC: linkage bit_vector(0 to 31)
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of CY7C1356A : entity is
"STD_1149_1_1993";
attribute PIN_MAP of CY7C1356A : entity is PHYSICAL_PIN_MAP;
constant BGA:PIN_MAP_STRING:=
"SA: (P4,N4,A2,A3,A5,A6,B3,B5,C2,C3,C5,C6,G4, " &
" R2,R6,T2,T3,T5,T6), " &
-- Address
"ADV_LD_b: B4, " &
"BWS_A_b: L5, " &
"BWS_B_b: G3, " & -- Byte Write
"CE_b: E4, " &
"CE2: B2, " &
"CE2_b: B6, " &
"CLK: K4, " & -- Clock
"CKE_b: M4, " & -- Clock Enable
"DQ_A: (D6,E7,F6,G7,H6,K7,L6,N6,P7), " &
"DQ_B: (D1,E2,G2,H1,K2,L1,M2,N1,P2), " &
"R_W_b: H4, " &
"OE_b: F4, " &
"MODE: R3, " &
"TMS: U2, " &
"TDI: U3, " &
"TCK: U4, " &
"TDO: U5, " &
"VCC: (C4,J2,J4,J6,R4), " &
"VCCQ: (A1,A7,F1,F7,J1,J7,M1,M7,U1,U7), " &
"VSS: (D3,D5,E3,E5,F3,F5,G5,H3,H5,K3,K5, " &
" L3,M3,M5,N3,N5,P3,P5), " &
"ZZ: T7, " &
"NC: (A4,B1,B7,C1,C7,D2,D4,D7,E1,E6,F2,G1, " &
" G6,H2,H7,J3,J5,K1,K6,L2,L4,L7,M6,N2, " &
" N7,P1,P6,R1,R7,T1,T4,U6) ";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (50.0e6, BOTH);
attribute INSTRUCTION_LENGTH of CY7C1356A : entity is 3;
attribute INSTRUCTION_OPCODE of CY7C1356A : entity is
"EXTEST (000)," &
"IDCODE (001)," &
"SAMPLE (010)," & -- Sample-Z
"SAMPLD (100)," & -- Sample/Preload
"BYPASS (111) ";
attribute INSTRUCTION_CAPTURE of CY7C1356A: entity is "001";
attribute IDCODE_REGISTER of CY7C1356A : entity is
"XXXX" & -- Reserved for version number
"00111" & -- Defines the depth of the device
"00011" & -- Defines the width of the device
"XXXXXX" & -- Reserved for future use
"00011100100" & -- Manufacturer identity
"1"; -- ID register Presence indicator
attribute REGISTER_ACCESS of CY7C1356A : entity is
"BOUNDARY (EXTEST,SAMPLE,SAMPLD)," &
"BYPASS (BYPASS)";
attribute BOUNDARY_LENGTH of CY7C1356A : entity is 51;
attribute BOUNDARY_REGISTER of CY7C1356A : entity is
"0 (BC_4, SA(13), input, X)," &
"1 (BC_4, SA(15), input, X)," &
"2 (BC_4, SA(16), input, X)," &
"3 (BC_4, SA(17), input, X)," &
"4 (BC_4, SA(14), input, X)," &
"5 (BC_4, SA(6), input, X)," &
"6 (BC_4, SA(7), input, X)," &
"7 (BC_4, DQ_A(8), input, X)," &
"8 (BC_4, DQ_A(7), input, X)," &
"9 (BC_4, DQ_A(6), input, X)," &
"10 (BC_4, DQ_A(5), input, X)," &
"11 (BC_4, *, internal, X)," &
"12 (BC_4, DQ_A(4), input, X)," &
"13 (BC_4, DQ_A(3), input, X)," &
"14 (BC_4, DQ_A(2), input, X)," &
"15 (BC_4, DQ_A(1), input, X)," &
"16 (BC_4, DQ_A(0), input, X)," &
"17 (BC_4, SA(18), input, X)," &
"18 (BC_4, SA(5), input, X)," &
"19 (BC_4, SA(4), input, X)," &
"20 (BC_4, SA(12), input, X)," &
"21 (BC_4, *, internal, X)," &
"22 (BC_4, ADV_LD_b, input, X)," &
"23 (BC_4, OE_b, input, X)," &
"24 (BC_4, CKE_b, input, X)," &
"25 (BC_4, R_W_b, input, X)," &
"26 (BC_4, CLK, input, X)," &
"27 (BC_4, CE2_b, input, X)," &
"28 (BC_4, BWS_A_b, input, X)," &
"29 (BC_4, BWS_B_b, input, X)," &
"30 (BC_4, CE2, input, X)," &
"31 (BC_4, CE_b, input, X)," &
"32 (BC_4, SA(3), input, X)," &
"33 (BC_4, SA(2), input, X)," &
"34 (BC_4, DQ_B(0), input, X)," &
"35 (BC_4, DQ_B(1), input, X)," &
"36 (BC_4, DQ_B(2), input, X)," &
"37 (BC_4, DQ_B(3), input, X)," &
"38 (BC_4, *, internal, X)," &
"39 (BC_4, DQ_B(4), input, X)," &
"40 (BC_4, DQ_B(5), input, X)," &
"41 (BC_4, DQ_B(6), input, X)," &
"42 (BC_4, DQ_B(7), input, X)," &
"43 (BC_4, DQ_B(8), input, X)," &
"44 (BC_4, MODE, input, X)," &
"45 (BC_4, SA(8), input, X)," &
"46 (BC_4, SA(9), input, X)," &
"47 (BC_4, SA(10), input, X)," &
"48 (BC_4, SA(11), input, X)," &
"49 (BC_4, SA(1), input, X)," &
"50 (BC_4, SA(0), input, X)";
end CY7C1356A;
