-- BSDL for LSI Logic DMN308SS
--
-- Deviations from IEEE Standard 1149.1 standard boundary cells
-- 1. BC_2 as control cell: captures from UPD (update latch) instead
-- of PI (parallel input of cell) during SAMPLE instruction
-- 2. BC_2 as output3 cell: if control cell = 0 (i.e. - output
-- disabled), output3 cell captures from UPD instead of PI during
-- SAMPLE instruction
--
entity LSIL_DMN308SS is
generic (PHYSICAL_PIN_MAP : string := "BGA");
port (AI_D :inout bit_vector(0 to 1);
AI_FSYNC :inout bit;
AI_MCLKO :inout bit;
AI_SCLK :inout bit;
AO_D :inout bit_vector(0 to 3);
AO_FSYNC :inout bit;
AO_IEC958 :inout bit;
AO_MCLKO :inout bit;
AO_SCLK :inout bit;
ATAPI_ADDR :inout bit_vector(0 to 4);
ATAPI_DATA :inout bit_vector(0 to 15);
ATAPI_DIOR_L :inout bit;
ATAPI_DIOW_L :inout bit;
ATAPI_DMAACK_L :inout bit;
ATAPI_DMARQ :inout bit;
ATAPI_INTRQ :inout bit;
ATAPI_IORDY :inout bit;
ATAPI_RESET :inout bit;
BIO_LINK_ON :inout bit;
BIO_LPS :inout bit;
BIO_LREQ :inout bit;
BIO_PHY_CLK :inout bit;
BIO_PHY_CTL :inout bit_vector(0 to 1);
BIO_PHY_DATA :inout bit_vector(0 to 7);
CLKO :inout bit;
H_ADDR :inout bit_vector(0 to 2);
H_CS_L :inout bit;
H_DATA :inout bit_vector(0 to 31);
H_DMAREQ :inout bit;
H_DTACK_L :inout bit;
H_INT_L :inout bit;
H_RD_L :inout bit;
H_RD_WR_L :inout bit;
H_RST_L :inout bit;
H_WAIT_L :inout bit;
M_ALE :inout bit;
M_OE_L :inout bit;
MCONFIG :inout bit_vector(0 to 1);
PLL_BYPASS :inout bit;
SDRAM_A :out bit_vector(0 to 15);
SDRAM_CAS_L :out bit;
SDRAM_CKE :out bit;
SDRAM_CLK :out bit_vector(0 to 1);
SDRAM_CLK_L :inout bit_vector(0 to 1);
SDRAM_DQ :inout bit_vector(0 to 31);
SDRAM_DQM :out bit_vector(0 to 3);
SDRAM_DQS :inout bit_vector(0 to 3);
SDRAM_RAS_L :out bit;
SDRAM_WE_L :out bit;
SIO_IRRX :inout bit;
SIO_IRTX1 :inout bit;
SIO_IRTX2 :inout bit;
SIO_SCL :inout bit;
SIO_SDA :inout bit;
SIO_SPI_CLK :inout bit;
SIO_SPI_CS :inout bit_vector(0 to 3);
SIO_SPI_MISO :inout bit;
SIO_SPI_MOSI :inout bit;
SIO_UART1_CTS :inout bit;
SIO_UART1_RTS :inout bit;
SIO_UART1_RX :inout bit;
SIO_UART1_TX :inout bit;
SIO_UART2_RX :inout bit;
SIO_UART2_TX :inout bit;
TCK :in bit;
TDI :in bit;
TDO :out bit;
TMS :in bit;
TRST_L :in bit;
VI_CLK :inout bit_vector(0 to 0);
VI_D :inout bit_vector(2 to 9);
VI_VSYNC :inout bit_vector(0 to 0);
VO_CLK :inout bit;
VO_D :inout bit_vector(0 to 15));
--
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of LSIL_DMN308SS : entity is
"STD_1149_1_1990";
--
attribute PIN_MAP of LSIL_DMN308SS : entity is PHYSICAL_PIN_MAP;
constant BGA: PIN_MAP_STRING :=
"AI_D:(C13,D12),"&
"AI_FSYNC:C12,"&
"AI_MCLKO:A13,"&
"AI_SCLK:B12,"&
"AO_D:(D14,C14,B15,A15),"&
"AO_FSYNC:D13,"&
"AO_IEC958:B14,"&
"AO_MCLKO:B13,"&
"AO_SCLK:A14,"&
"ATAPI_ADDR:(W3,V2,V1,U3,V4),"&
"ATAPI_DATA:(R4,R3,P4,P3,P1,N4,N2,N1,M4,N3,P2,R1,R2,T2,U2,Y2),"&
"ATAPI_DIOR_L:V3,"&
"ATAPI_DIOW_L:T1,"&
"ATAPI_DMAACK_L:U1,"&
"ATAPI_DMARQ:W1,"&
"ATAPI_INTRQ:W2,"&
"ATAPI_IORDY:T3,"&
"ATAPI_RESET:Y1,"&
"BIO_LINK_ON:K4,"&
"BIO_LPS:L4,"&
"BIO_LREQ:M1,"&
"BIO_PHY_CLK:L1,"&
"BIO_PHY_CTL:(J3,L2),"&
"BIO_PHY_DATA:(J2,L3,M3,M2,J1,K1,K2,K3),"&
"CLKO:A12,"&
"H_ADDR:(Y13,W10,W9),"&
"H_CS_L:Y9,"&
"H_DATA:(W15,W14,W13,V14,Y14,U12,W12,V13,U11,W11,V12,Y12,V10,V11,"&
"U10,Y11,W8,V8,Y7,Y8,W7,V7,W6,U6,Y6,Y5,V6,Y4,W5,V5,Y3,W4),"&
"H_DMAREQ:V15,"&
"H_DTACK_L:U9,"&
"H_INT_L:U7,"&
"H_RD_L:Y10,"&
"H_RD_WR_L:U8,"&
"H_RST_L:W16,"&
"H_WAIT_L:V9,"&
"M_ALE:U13,"&
"M_OE_L:Y15,"&
"MCONFIG:(M16,Y16),"&
"PLL_BYPASS:A7,"&
"SDRAM_A:(A19,B19,A17,C17,B18,A20,C18,B20,D18,D19,C19,F17,E17,E18,C20,A18),"&
"SDRAM_CAS_L:B17,"&
"SDRAM_CKE:C15,"&
"SDRAM_CLK:(P20,G20),"&
"SDRAM_CLK_L:(N20,H20),"&
"SDRAM_DQ:(R17,T19,R18,T20,P17,R20,P18,P19,L18,N19,M20,L19,M17,L20,M18,N18,"&
"K19,K18,K17,J20,J18,J17,H18,H19,D20,E19,F18,G17,G18,H17,F19,F20),"&
"SDRAM_DQM:(N17,L17,K20,G19),"&
"SDRAM_DQS:(R19,M19,J19,E20),"&
"SDRAM_RAS_L:B16,"&
"SDRAM_WE_L:A16,"&
"SIO_IRRX:Y20,"&
"SIO_IRTX1:U14,"&
"SIO_IRTX2:W17,"&
"SIO_SCL:V19,"&
"SIO_SDA:Y18,"&
"SIO_SPI_CLK:Y17,"&
"SIO_SPI_CS:(Y19,V18,V16,W18),"&
"SIO_SPI_MISO:T18,"&
"SIO_SPI_MOSI:U18,"&
"SIO_UART1_CTS:V17,"&
"SIO_UART1_RTS:V20,"&
"SIO_UART1_RX:W19,"&
"SIO_UART1_TX:U20,"&
"SIO_UART2_RX:W20,"&
"SIO_UART2_TX:U19,"&
"TCK:D8,"&
"TDI:C7,"&
"TDO:B7,"&
"TMS:B6,"&
"TRST_L:D7,"&
"VI_CLK:(A5),"&
"VI_D:(B2,C3,C2,D3,C4,B3,A2,A1),"&
"VI_VSYNC:(C1),"&
"VO_CLK:H1,"&
"VO_D:(J4,H2,H3,H4,G1,G2,G3,F1,F2,G4,E1,F3,E2,D1,E3,F4)";
--
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6,BOTH);
attribute TAP_SCAN_RESET of TRST_L : signal is true;
attribute INSTRUCTION_LENGTH of LSIL_DMN308SS : entity is 3;
attribute INSTRUCTION_OPCODE of LSIL_DMN308SS : entity is
"extest (000),"&
"sample (001),"&
"bypass (111)";
attribute INSTRUCTION_CAPTURE of LSIL_DMN308SS : entity is "001";
--
attribute BOUNDARY_LENGTH of LSIL_DMN308SS : entity is 596;
attribute BOUNDARY_REGISTER of LSIL_DMN308SS : entity is
-- num cell port function safe [ccell disval rslt]
"0 (BC_2, *, control, 0)," &
"1 (BC_6, ATAPI_DMAACK_L , bidir, X, 0, 0, Z), "&
"2 (BC_2, *, control, 0)," &
"3 (BC_6, ATAPI_DATA(0) , bidir, X, 2, 0, Z), "&
"4 (BC_2, *, control, 0)," &
"5 (BC_6, ATAPI_DATA(13) , bidir, X, 4, 0, Z), "&
"6 (BC_2, *, control, 0)," &
"7 (BC_6, ATAPI_DATA(1) , bidir, X, 6, 0, Z), "&
"8 (BC_2, *, control, 0)," &
"9 (BC_6, ATAPI_DIOW_L , bidir, X, 8, 0, Z), "&
"10 (BC_2, *, control, 0)," &
"11 (BC_6, ATAPI_DATA(12) , bidir, X, 10, 0, Z), "&
"12 (BC_2, *, control, 0)," &
"13 (BC_6, ATAPI_DATA(2) , bidir, X, 12, 0, Z), "&
"14 (BC_2, *, control, 0)," &
"15 (BC_6, ATAPI_DATA(11) , bidir, X, 14, 0, Z), "&
"16 (BC_2, *, control, 0)," &
"17 (BC_6, ATAPI_DATA(3) , bidir, X, 16, 0, Z), "&
"18 (BC_2, *, control, 0)," &
"19 (BC_6, ATAPI_DATA(10) , bidir, X, 18, 0, Z), "&
"20 (BC_2, *, control, 0)," &
"21 (BC_6, ATAPI_DATA(4) , bidir, X, 20, 0, Z), "&
"22 (BC_2, *, control, 0)," &
"23 (BC_6, ATAPI_DATA(5) , bidir, X, 22, 0, Z), "&
"24 (BC_2, *, control, 0)," &
"25 (BC_6, ATAPI_DATA(9) , bidir, X, 24, 0, Z), "&
"26 (BC_2, *, control, 0)," &
"27 (BC_6, ATAPI_DATA(6) , bidir, X, 26, 0, Z), "&
"28 (BC_2, *, control, 0)," &
"29 (BC_6, ATAPI_DATA(7) , bidir, X, 28, 0, Z), "&
"30 (BC_2, *, control, 0)," &
"31 (BC_6, ATAPI_DATA(8) , bidir, X, 30, 0, Z), "&
"32 (BC_0, *, internal, 0)," &
"33 (BC_0, *, internal, X)," &
"34 (BC_0, *, internal, 0)," &
"35 (BC_0, *, internal, X)," &
"36 (BC_0, *, internal, 0)," &
"37 (BC_0, *, internal, X)," &
"38 (BC_0, *, internal, 0)," &
"39 (BC_0, *, internal, X)," &
"40 (BC_0, *, internal, 0)," &
"41 (BC_0, *, internal, X)," &
"42 (BC_0, *, internal, 0)," &
"43 (BC_0, *, internal, X)," &
"44 (BC_0, *, internal, 0)," &
"45 (BC_0, *, internal, X)," &
"46 (BC_0, *, internal, 0)," &
"47 (BC_0, *, internal, X)," &
"48 (BC_0, *, internal, 0)," &
"49 (BC_0, *, internal, X)," &
"50 (BC_2, *, control, 0)," &
"51 (BC_6, BIO_PHY_DATA(2) , bidir, X, 50, 0, Z), "&
"52 (BC_2, *, control, 0)," &
"53 (BC_6, BIO_PHY_DATA(3) , bidir, X, 52, 0, Z), "&
"54 (BC_0, *, internal, 0)," &
"55 (BC_0, *, internal, X)," &
"56 (BC_2, *, control, 0)," &
"57 (BC_6, BIO_LREQ , bidir, X, 56, 0, Z), "&
"58 (BC_0, *, internal, 0)," &
"59 (BC_0, *, internal, X)," &
"60 (BC_2, *, control, 0)," &
"61 (BC_6, BIO_LPS , bidir, X, 60, 0, Z), "&
"62 (BC_2, *, control, 0)," &
"63 (BC_6, BIO_PHY_DATA(1) , bidir, X, 62, 0, Z), "&
"64 (BC_2, *, control, 0)," &
"65 (BC_6, BIO_PHY_CLK , bidir, X, 64, 0, Z), "&
"66 (BC_2, *, control, 0)," &
"67 (BC_6, BIO_PHY_CTL(1) , bidir, X, 66, 0, Z), "&
"68 (BC_2, *, control, 0)," &
"69 (BC_6, BIO_LINK_ON , bidir, X, 68, 0, Z), "&
"70 (BC_2, *, control, 0)," &
"71 (BC_6, BIO_PHY_DATA(7) , bidir, X, 70, 0, Z), "&
"72 (BC_2, *, control, 0)," &
"73 (BC_6, BIO_PHY_DATA(6) , bidir, X, 72, 0, Z), "&
"74 (BC_2, *, control, 0)," &
"75 (BC_6, BIO_PHY_DATA(5) , bidir, X, 74, 0, Z), "&
"76 (BC_2, *, control, 0)," &
"77 (BC_6, BIO_PHY_DATA(4) , bidir, X, 76, 0, Z), "&
"78 (BC_2, *, control, 0)," &
"79 (BC_6, BIO_PHY_DATA(0) , bidir, X, 78, 0, Z), "&
"80 (BC_2, *, control, 0)," &
"81 (BC_6, BIO_PHY_CTL(0) , bidir, X, 80, 0, Z), "&
"82 (BC_0, *, internal, 0)," &
"83 (BC_0, *, internal, X)," &
"84 (BC_0, *, internal, 0)," &
"85 (BC_0, *, internal, X)," &
"86 (BC_0, *, internal, 0)," &
"87 (BC_0, *, internal, X)," &
"88 (BC_0, *, internal, 0)," &
"89 (BC_0, *, internal, X)," &
"90 (BC_0, *, internal, 0)," &
"91 (BC_0, *, internal, X)," &
"92 (BC_0, *, internal, 0)," &
"93 (BC_0, *, internal, X)," &
"94 (BC_0, *, internal, 0)," &
"95 (BC_0, *, internal, X)," &
"96 (BC_0, *, internal, 0)," &
"97 (BC_0, *, internal, X)," &
"98 (BC_0, *, internal, 0)," &
"99 (BC_0, *, internal, X)," &
"100 (BC_0, *, internal, 0)," &
"101 (BC_0, *, internal, X)," &
"102 (BC_0, *, internal, 0)," &
"103 (BC_0, *, internal, X)," &
"104 (BC_2, *, control, 0)," &
"105 (BC_6, VO_CLK , bidir, X, 104, 0, Z), "&
"106 (BC_0, *, internal, 0)," &
"107 (BC_0, *, internal, X)," &
"108 (BC_0, *, internal, 0)," &
"109 (BC_0, *, internal, X)," &
"110 (BC_2, *, control, 0)," &
"111 (BC_6, VO_D(0) , bidir, X, 110, 0, Z), "&
"112 (BC_0, *, internal, 0)," &
"113 (BC_0, *, internal, X)," &
"114 (BC_0, *, internal, 0)," &
"115 (BC_0, *, internal, X)," &
"116 (BC_2, *, control, 0)," &
"117 (BC_6, VO_D(1) , bidir, X, 116, 0, Z), "&
"118 (BC_2, *, control, 0)," &
"119 (BC_6, VO_D(2) , bidir, X, 118, 0, Z), "&
"120 (BC_2, *, control, 0)," &
"121 (BC_6, VO_D(3) , bidir, X, 120, 0, Z), "&
"122 (BC_2, *, control, 0)," &
"123 (BC_6, VO_D(4) , bidir, X, 122, 0, Z), "&
"124 (BC_2, *, control, 0)," &
"125 (BC_6, VO_D(5) , bidir, X, 124, 0, Z), "&
"126 (BC_2, *, control, 0)," &
"127 (BC_6, VO_D(6) , bidir, X, 126, 0, Z), "&
"128 (BC_2, *, control, 0)," &
"129 (BC_6, VO_D(7) , bidir, X, 128, 0, Z), "&
"130 (BC_2, *, control, 0)," &
"131 (BC_6, VO_D(8) , bidir, X, 130, 0, Z), "&
"132 (BC_2, *, control, 0)," &
"133 (BC_6, VO_D(9) , bidir, X, 132, 0, Z), "&
"134 (BC_2, *, control, 0)," &
"135 (BC_6, VO_D(10) , bidir, X, 134, 0, Z), "&
"136 (BC_2, *, control, 0)," &
"137 (BC_6, VO_D(11) , bidir, X, 136, 0, Z), "&
"138 (BC_2, *, control, 0)," &
"139 (BC_6, VO_D(12) , bidir, X, 138, 0, Z), "&
"140 (BC_2, *, control, 0)," &
"141 (BC_6, VO_D(13) , bidir, X, 140, 0, Z), "&
"142 (BC_2, *, control, 0)," &
"143 (BC_6, VO_D(15) , bidir, X, 142, 0, Z), "&
"144 (BC_0, *, internal, 0)," &
"145 (BC_0, *, internal, X)," &
"146 (BC_2, *, control, 0)," &
"147 (BC_6, VO_D(14) , bidir, X, 146, 0, Z), "&
"148 (BC_0, *, internal, 0)," &
"149 (BC_0, *, internal, X)," &
"150 (BC_0, *, internal, 0)," &
"151 (BC_0, *, internal, X)," &
"152 (BC_0, *, internal, 0)," &
"153 (BC_0, *, internal, X)," &
"154 (BC_0, *, internal, 0)," &
"155 (BC_0, *, internal, X)," &
"156 (BC_0, *, internal, 0)," &
"157 (BC_0, *, internal, X)," &
"158 (BC_0, *, internal, 0)," &
"159 (BC_0, *, internal, X)," &
"160 (BC_0, *, internal, 0)," &
"161 (BC_0, *, internal, X)," &
"162 (BC_0, *, internal, 0)," &
"163 (BC_0, *, internal, X)," &
"164 (BC_0, *, internal, 0)," &
"165 (BC_0, *, internal, X)," &
"166 (BC_0, *, internal, 0)," &
"167 (BC_0, *, internal, X)," &
"168 (BC_0, *, internal, 0)," &
"169 (BC_0, *, internal, X)," &
"170 (BC_0, *, internal, 0)," &
"171 (BC_0, *, internal, X)," &
"172 (BC_2, *, control, 0)," &
"173 (BC_6, VI_VSYNC(0) , bidir, X, 172, 0, Z), "&
"174 (BC_2, *, control, 0)," &
"175 (BC_6, VI_D(5) , bidir, X, 174, 0, Z), "&
"176 (BC_2, *, control, 0)," &
"177 (BC_6, VI_D(4) , bidir, X, 176, 0, Z), "&
"178 (BC_0, *, internal, 0)," &
"179 (BC_0, *, internal, X)," &
"180 (BC_2, *, control, 0)," &
"181 (BC_6, VI_D(3) , bidir, X, 180, 0, Z), "&
"182 (BC_2, *, control, 0)," &
"183 (BC_6, VI_D(2) , bidir, X, 182, 0, Z), "&
"184 (BC_2, *, control, 0)," &
"185 (BC_6, VI_D(9) , bidir, X, 184, 0, Z), "&
"186 (BC_2, *, control, 0)," &
"187 (BC_6, VI_D(8) , bidir, X, 186, 0, Z), "&
"188 (BC_2, *, control, 0)," &
"189 (BC_6, VI_D(7) , bidir, X, 188, 0, Z), "&
"190 (BC_2, *, control, 0)," &
"191 (BC_6, VI_D(6) , bidir, X, 190, 0, Z), "&
"192 (BC_0, *, internal, 0)," &
"193 (BC_0, *, internal, X)," &
"194 (BC_0, *, internal, 0)," &
"195 (BC_0, *, internal, X)," &
"196 (BC_0, *, internal, 0)," &
"197 (BC_0, *, internal, X)," &
"198 (BC_0, *, internal, 0)," &
"199 (BC_0, *, internal, X)," &
"200 (BC_0, *, internal, 0)," &
"201 (BC_0, *, internal, X)," &
"202 (BC_0, *, internal, 0)," &
"203 (BC_0, *, internal, X)," &
"204 (BC_0, *, internal, 0)," &
"205 (BC_0, *, internal, X)," &
"206 (BC_0, *, internal, 0)," &
"207 (BC_0, *, internal, X)," &
"208 (BC_0, *, internal, 0)," &
"209 (BC_0, *, internal, X)," &
"210 (BC_2, *, control, 0)," &
"211 (BC_6, VI_CLK(0) , bidir, X, 210, 0, Z), "&
"212 (BC_0, *, internal, 0)," &
"213 (BC_0, *, internal, X)," &
"214 (BC_2, *, control, 0)," &
"215 (BC_6, PLL_BYPASS , bidir, X, 214, 0, Z), "&
"216 (BC_2, *, control, 0)," &
"217 (BC_6, CLKO , bidir, X, 216, 0, Z), "&
"218 (BC_2, *, control, 0)," &
"219 (BC_6, AI_SCLK , bidir, X, 218, 0, Z), "&
"220 (BC_0, *, internal, 0)," &
"221 (BC_0, *, internal, X)," &
"222 (BC_2, *, control, 0)," &
"223 (BC_6, AI_FSYNC , bidir, X, 222, 0, Z), "&
"224 (BC_0, *, internal, 0)," &
"225 (BC_0, *, internal, X)," &
"226 (BC_0, *, internal, 0)," &
"227 (BC_0, *, internal, X)," &
"228 (BC_2, *, control, 0)," &
"229 (BC_6, AI_D(1) , bidir, X, 228, 0, Z), "&
"230 (BC_2, *, control, 0)," &
"231 (BC_6, AI_MCLKO , bidir, X, 230, 0, Z), "&
"232 (BC_2, *, control, 0)," &
"233 (BC_6, AO_MCLKO , bidir, X, 232, 0, Z), "&
"234 (BC_0, *, internal, 0)," &
"235 (BC_0, *, internal, X)," &
"236 (BC_2, *, control, 0)," &
"237 (BC_6, AI_D(0) , bidir, X, 236, 0, Z), "&
"238 (BC_2, *, control, 0)," &
"239 (BC_6, AO_IEC958 , bidir, X, 238, 0, Z), "&
"240 (BC_2, *, control, 0)," &
"241 (BC_6, AO_FSYNC , bidir, X, 240, 0, Z), "&
"242 (BC_0, *, internal, 0)," &
"243 (BC_0, *, internal, X)," &
"244 (BC_2, *, control, 0)," &
"245 (BC_6, AO_SCLK , bidir, X, 244, 0, Z), "&
"246 (BC_0, *, internal, 0)," &
"247 (BC_0, *, internal, X)," &
"248 (BC_2, *, control, 0)," &
"249 (BC_6, AO_D(1) , bidir, X, 248, 0, Z), "&
"250 (BC_2, *, control, 0)," &
"251 (BC_6, AO_D(2) , bidir, X, 250, 0, Z), "&
"252 (BC_0, *, internal, 0)," &
"253 (BC_0, *, internal, X)," &
"254 (BC_2, *, control, 0)," &
"255 (BC_6, AO_D(0) , bidir, X, 254, 0, Z), "&
"256 (BC_0, *, internal, 0)," &
"257 (BC_0, *, internal, X)," &
"258 (BC_0, *, internal, 0)," &
"259 (BC_0, *, internal, X)," &
"260 (BC_0, *, internal, 0)," &
"261 (BC_0, *, internal, X)," &
"262 (BC_2, *, control, 0)," &
"263 (BC_6, AO_D(3) , bidir, X, 262, 0, Z), "&
"264 (BC_0, *, internal, 0)," &
"265 (BC_0, *, internal, X)," &
"266 (BC_0, *, internal, 0)," &
"267 (BC_0, *, internal, X)," &
"268 (BC_0, *, internal, 0)," &
"269 (BC_0, *, internal, X)," &
"270 (BC_0, *, internal, 0)," &
"271 (BC_0, *, internal, X)," &
"272 (BC_0, *, internal, 0)," &
"273 (BC_0, *, internal, X)," &
"274 (BC_0, *, internal, 0)," &
"275 (BC_0, *, internal, X)," &
"276 (BC_0, *, internal, 0)," &
"277 (BC_0, *, internal, X)," &
"278 (BC_0, *, internal, 0)," &
"279 (BC_0, *, internal, X)," &
"280 (BC_0, *, internal, 0)," &
"281 (BC_0, *, internal, X)," &
"282 (BC_0, *, internal, 0)," &
"283 (BC_0, *, internal, X)," &
"284 (BC_0, *, internal, 0)," &
"285 (BC_0, *, internal, X)," &
"286 (BC_0, *, internal, 0)," &
"287 (BC_0, *, internal, X)," &
"288 (BC_0, *, internal, 0)," &
"289 (BC_0, *, internal, X)," &
"290 (BC_2, *, control, 0)," &
"291 (BC_2, SDRAM_WE_L , output3, X, 290, 0, Z), "&
"292 (BC_2, *, control, 0)," &
"293 (BC_2, SDRAM_CKE , output3, X, 292, 0, Z), "&
"294 (BC_2, *, control, 0)," &
"295 (BC_2, SDRAM_RAS_L , output3, X, 294, 0, Z), "&
"296 (BC_2, *, control, 0)," &
"297 (BC_2, SDRAM_CAS_L , output3, X, 296, 0, Z), "&
"298 (BC_2, *, control, 0)," &
"299 (BC_2, SDRAM_A(2) , output3, X, 298, 0, Z), "&
"300 (BC_2, *, control, 0)," &
"301 (BC_2, SDRAM_A(15) , output3, X, 300, 0, Z), "&
"302 (BC_2, *, control, 0)," &
"303 (BC_2, SDRAM_A(3) , output3, X, 302, 0, Z), "&
"304 (BC_2, *, control, 0)," &
"305 (BC_2, SDRAM_A(4) , output3, X, 304, 0, Z), "&
"306 (BC_2, *, control, 0)," &
"307 (BC_2, SDRAM_A(0) , output3, X, 306, 0, Z), "&
"308 (BC_2, *, control, 0)," &
"309 (BC_2, SDRAM_A(6) , output3, X, 308, 0, Z), "&
"310 (BC_2, *, control, 0)," &
"311 (BC_2, SDRAM_A(1) , output3, X, 310, 0, Z), "&
"312 (BC_2, *, control, 0)," &
"313 (BC_2, SDRAM_A(5) , output3, X, 312, 0, Z), "&
"314 (BC_2, *, control, 0)," &
"315 (BC_2, SDRAM_A(12) , output3, X, 314, 0, Z), "&
"316 (BC_2, *, control, 0)," &
"317 (BC_2, SDRAM_A(8) , output3, X, 316, 0, Z), "&
"318 (BC_2, *, control, 0)," &
"319 (BC_2, SDRAM_A(10) , output3, X, 318, 0, Z), "&
"320 (BC_2, *, control, 0)," &
"321 (BC_2, SDRAM_A(7) , output3, X, 320, 0, Z), "&
"322 (BC_2, *, control, 0)," &
"323 (BC_2, SDRAM_A(11) , output3, X, 322, 0, Z), "&
"324 (BC_2, *, control, 0)," &
"325 (BC_2, SDRAM_A(13) , output3, X, 324, 0, Z), "&
"326 (BC_2, *, control, 0)," &
"327 (BC_2, SDRAM_A(9) , output3, X, 326, 0, Z), "&
"328 (BC_2, *, control, 0)," &
"329 (BC_2, SDRAM_A(14) , output3, X, 328, 0, Z), "&
"330 (BC_2, *, control, 0)," &
"331 (BC_6, SDRAM_DQ(24) , bidir, X, 330, 0, Z), "&
"332 (BC_2, *, control, 0)," &
"333 (BC_6, SDRAM_DQ(25) , bidir, X, 332, 0, Z), "&
"334 (BC_2, *, control, 0)," &
"335 (BC_6, SDRAM_DQ(26) , bidir, X, 334, 0, Z), "&
"336 (BC_2, *, control, 0)," &
"337 (BC_6, SDRAM_DQ(27) , bidir, X, 336, 0, Z), "&
"338 (BC_2, *, control, 0)," &
"339 (BC_6, SDRAM_DQS(3) , bidir, X, 338, 0, Z), "&
"340 (BC_2, *, control, 0)," &
"341 (BC_6, SDRAM_DQ(30) , bidir, X, 340, 0, Z), "&
"342 (BC_2, *, control, 0)," &
"343 (BC_6, SDRAM_DQ(28) , bidir, X, 342, 0, Z), "&
"344 (BC_2, *, control, 0)," &
"345 (BC_6, SDRAM_DQ(29) , bidir, X, 344, 0, Z), "&
"346 (BC_2, *, control, 0)," &
"347 (BC_6, SDRAM_DQ(31) , bidir, X, 346, 0, Z), "&
"348 (BC_2, *, control, 0)," &
"349 (BC_2, SDRAM_DQM(3) , output3, X, 348, 0, Z), "&
"350 (BC_2, *, control, 0)," &
"351 (BC_6, SDRAM_CLK_L(1) , bidir, X, 350, 0, Z), "&
"352 (BC_2, *, control, 0)," &
"353 (BC_2, SDRAM_CLK(1) , output3, X, 352, 0, Z), "&
"354 (BC_2, *, control, 0)," &
"355 (BC_6, SDRAM_DQ(23) , bidir, X, 354, 0, Z), "&
"356 (BC_2, *, control, 0)," &
"357 (BC_6, SDRAM_DQ(22) , bidir, X, 356, 0, Z), "&
"358 (BC_2, *, control, 0)," &
"359 (BC_6, SDRAM_DQ(21) , bidir, X, 358, 0, Z), "&
"360 (BC_2, *, control, 0)," &
"361 (BC_6, SDRAM_DQ(20) , bidir, X, 360, 0, Z), "&
"362 (BC_2, *, control, 0)," &
"363 (BC_6, SDRAM_DQS(2) , bidir, X, 362, 0, Z), "&
"364 (BC_2, *, control, 0)," &
"365 (BC_6, SDRAM_DQ(19) , bidir, X, 364, 0, Z), "&
"366 (BC_2, *, control, 0)," &
"367 (BC_6, SDRAM_DQ(18) , bidir, X, 366, 0, Z), "&
"368 (BC_2, *, control, 0)," &
"369 (BC_6, SDRAM_DQ(17) , bidir, X, 368, 0, Z), "&
"370 (BC_2, *, control, 0)," &
"371 (BC_6, SDRAM_DQ(16) , bidir, X, 370, 0, Z), "&
"372 (BC_2, *, control, 0)," &
"373 (BC_2, SDRAM_DQM(2) , output3, X, 372, 0, Z), "&
"374 (BC_2, *, control, 0)," &
"375 (BC_2, SDRAM_DQM(1) , output3, X, 374, 0, Z), "&
"376 (BC_2, *, control, 0)," &
"377 (BC_6, SDRAM_DQ(8) , bidir, X, 376, 0, Z), "&
"378 (BC_2, *, control, 0)," &
"379 (BC_6, SDRAM_DQ(11) , bidir, X, 378, 0, Z), "&
"380 (BC_2, *, control, 0)," &
"381 (BC_6, SDRAM_DQ(13) , bidir, X, 380, 0, Z), "&
"382 (BC_2, *, control, 0)," &
"383 (BC_6, SDRAM_DQ(10) , bidir, X, 382, 0, Z), "&
"384 (BC_2, *, control, 0)," &
"385 (BC_6, SDRAM_DQS(1) , bidir, X, 384, 0, Z), "&
"386 (BC_2, *, control, 0)," &
"387 (BC_6, SDRAM_DQ(14) , bidir, X, 386, 0, Z), "&
"388 (BC_2, *, control, 0)," &
"389 (BC_6, SDRAM_DQ(12) , bidir, X, 388, 0, Z), "&
"390 (BC_2, *, control, 0)," &
"391 (BC_6, SDRAM_DQ(9) , bidir, X, 390, 0, Z), "&
"392 (BC_2, *, control, 0)," &
"393 (BC_6, SDRAM_DQ(15) , bidir, X, 392, 0, Z), "&
"394 (BC_2, *, control, 0)," &
"395 (BC_2, SDRAM_DQM(0) , output3, X, 394, 0, Z), "&
"396 (BC_2, *, control, 0)," &
"397 (BC_6, SDRAM_CLK_L(0) , bidir, X, 396, 0, Z), "&
"398 (BC_2, *, control, 0)," &
"399 (BC_2, SDRAM_CLK(0) , output3, X, 398, 0, Z), "&
"400 (BC_2, *, control, 0)," &
"401 (BC_6, SDRAM_DQ(7) , bidir, X, 400, 0, Z), "&
"402 (BC_2, *, control, 0)," &
"403 (BC_6, SDRAM_DQ(6) , bidir, X, 402, 0, Z), "&
"404 (BC_2, *, control, 0)," &
"405 (BC_6, SDRAM_DQ(5) , bidir, X, 404, 0, Z), "&
"406 (BC_2, *, control, 0)," &
"407 (BC_6, SDRAM_DQ(4) , bidir, X, 406, 0, Z), "&
"408 (BC_2, *, control, 0)," &
"409 (BC_6, SDRAM_DQS(0) , bidir, X, 408, 0, Z), "&
"410 (BC_2, *, control, 0)," &
"411 (BC_6, SDRAM_DQ(3) , bidir, X, 410, 0, Z), "&
"412 (BC_2, *, control, 0)," &
"413 (BC_6, SDRAM_DQ(2) , bidir, X, 412, 0, Z), "&
"414 (BC_2, *, control, 0)," &
"415 (BC_6, SDRAM_DQ(1) , bidir, X, 414, 0, Z), "&
"416 (BC_2, *, control, 0)," &
"417 (BC_6, SDRAM_DQ(0) , bidir, X, 416, 0, Z), "&
"418 (BC_0, *, internal, 0)," &
"419 (BC_0, *, internal, X)," &
"420 (BC_0, *, internal, 0)," &
"421 (BC_0, *, internal, X)," &
"422 (BC_2, *, control, 0)," &
"423 (BC_6, SIO_UART1_TX , bidir, X, 422, 0, Z), "&
"424 (BC_2, *, control, 0)," &
"425 (BC_6, SIO_SPI_MISO , bidir, X, 424, 0, Z), "&
"426 (BC_2, *, control, 0)," &
"427 (BC_6, SIO_UART2_TX , bidir, X, 426, 0, Z), "&
"428 (BC_0, *, internal, 0)," &
"429 (BC_0, *, internal, X)," &
"430 (BC_0, *, internal, 0)," &
"431 (BC_0, *, internal, X)," &
"432 (BC_2, *, control, 0)," &
"433 (BC_6, SIO_UART1_RTS , bidir, X, 432, 0, Z), "&
"434 (BC_2, *, control, 0)," &
"435 (BC_6, SIO_SPI_MOSI , bidir, X, 434, 0, Z), "&
"436 (BC_2, *, control, 0)," &
"437 (BC_6, SIO_SCL , bidir, X, 436, 0, Z), "&
"438 (BC_2, *, control, 0)," &
"439 (BC_6, SIO_UART2_RX , bidir, X, 438, 0, Z), "&
"440 (BC_2, *, control, 0)," &
"441 (BC_6, SIO_SPI_CS(1) , bidir, X, 440, 0, Z), "&
"442 (BC_2, *, control, 0)," &
"443 (BC_6, SIO_UART1_RX , bidir, X, 442, 0, Z), "&
"444 (BC_2, *, control, 0)," &
"445 (BC_6, SIO_IRRX , bidir, X, 444, 0, Z), "&
"446 (BC_2, *, control, 0)," &
"447 (BC_6, SIO_SPI_CS(0) , bidir, X, 446, 0, Z), "&
"448 (BC_2, *, control, 0)," &
"449 (BC_6, SIO_SPI_CS(3) , bidir, X, 448, 0, Z), "&
"450 (BC_2, *, control, 0)," &
"451 (BC_6, SIO_UART1_CTS , bidir, X, 450, 0, Z), "&
"452 (BC_2, *, control, 0)," &
"453 (BC_6, SIO_SDA , bidir, X, 452, 0, Z), "&
"454 (BC_2, *, control, 0)," &
"455 (BC_6, SIO_IRTX2 , bidir, X, 454, 0, Z), "&
"456 (BC_2, *, control, 0)," &
"457 (BC_6, SIO_SPI_CS(2) , bidir, X, 456, 0, Z), "&
"458 (BC_2, *, control, 0)," &
"459 (BC_6, SIO_SPI_CLK , bidir, X, 458, 0, Z), "&
"460 (BC_2, *, control, 0)," &
"461 (BC_6, SIO_IRTX1 , bidir, X, 460, 0, Z), "&
"462 (BC_2, *, control, 0)," &
"463 (BC_6, H_RST_L , bidir, X, 462, 0, Z), "&
"464 (BC_2, *, control, 0)," &
"465 (BC_6, H_DMAREQ , bidir, X, 464, 0, Z), "&
"466 (BC_2, *, control, 0)," &
"467 (BC_6, MCONFIG(1) , bidir, X, 466, 0, Z), "&
"468 (BC_0, *, internal, 0)," &
"469 (BC_0, *, internal, X)," &
"470 (BC_0, *, internal, 0)," &
"471 (BC_0, *, internal, X)," &
"472 (BC_2, *, control, 0)," &
"473 (BC_6, M_ALE , bidir, X, 472, 0, Z), "&
"474 (BC_2, *, control, 0)," &
"475 (BC_6, H_DATA(0) , bidir, X, 474, 0, Z), "&
"476 (BC_2, *, control, 0)," &
"477 (BC_6, M_OE_L , bidir, X, 476, 0, Z), "&
"478 (BC_2, *, control, 0)," &
"479 (BC_6, H_DATA(3) , bidir, X, 478, 0, Z), "&
"480 (BC_2, *, control, 0)," &
"481 (BC_6, H_DATA(1) , bidir, X, 480, 0, Z), "&
"482 (BC_2, *, control, 0)," &
"483 (BC_6, H_DATA(5) , bidir, X, 482, 0, Z), "&
"484 (BC_2, *, control, 0)," &
"485 (BC_6, H_DATA(4) , bidir, X, 484, 0, Z), "&
"486 (BC_2, *, control, 0)," &
"487 (BC_6, H_DATA(7) , bidir, X, 486, 0, Z), "&
"488 (BC_2, *, control, 0)," &
"489 (BC_6, H_DATA(2) , bidir, X, 488, 0, Z), "&
"490 (BC_2, *, control, 0)," &
"491 (BC_6, H_ADDR(0) , bidir, X, 490, 0, Z), "&
"492 (BC_2, *, control, 0)," &
"493 (BC_6, H_DATA(8) , bidir, X, 492, 0, Z), "&
"494 (BC_2, *, control, 0)," &
"495 (BC_6, H_DATA(10) , bidir, X, 494, 0, Z), "&
"496 (BC_2, *, control, 0)," &
"497 (BC_6, H_DATA(6) , bidir, X, 496, 0, Z), "&
"498 (BC_2, *, control, 0)," &
"499 (BC_6, H_DATA(11) , bidir, X, 498, 0, Z), "&
"500 (BC_2, *, control, 0)," &
"501 (BC_6, H_DATA(14) , bidir, X, 500, 0, Z), "&
"502 (BC_2, *, control, 0)," &
"503 (BC_6, H_DATA(13) , bidir, X, 502, 0, Z), "&
"504 (BC_2, *, control, 0)," &
"505 (BC_6, H_DATA(9) , bidir, X, 504, 0, Z), "&
"506 (BC_2, *, control, 0)," &
"507 (BC_6, H_DATA(15) , bidir, X, 506, 0, Z), "&
"508 (BC_2, *, control, 0)," &
"509 (BC_6, H_RD_L , bidir, X, 508, 0, Z), "&
"510 (BC_2, *, control, 0)," &
"511 (BC_6, H_ADDR(1) , bidir, X, 510, 0, Z), "&
"512 (BC_2, *, control, 0)," &
"513 (BC_6, H_DATA(12) , bidir, X, 512, 0, Z), "&
"514 (BC_0, *, internal, 0)," &
"515 (BC_0, *, internal, X)," &
"516 (BC_2, *, control, 0)," &
"517 (BC_6, H_DTACK_L , bidir, X, 516, 0, Z), "&
"518 (BC_0, *, internal, 0)," &
"519 (BC_0, *, internal, X)," &
"520 (BC_0, *, internal, 0)," &
"521 (BC_0, *, internal, X)," &
"522 (BC_2, *, control, 0)," &
"523 (BC_6, H_CS_L , bidir, X, 522, 0, Z), "&
"524 (BC_2, *, control, 0)," &
"525 (BC_6, H_ADDR(2) , bidir, X, 524, 0, Z), "&
"526 (BC_2, *, control, 0)," &
"527 (BC_6, H_WAIT_L , bidir, X, 526, 0, Z), "&
"528 (BC_2, *, control, 0)," &
"529 (BC_6, H_RD_WR_L , bidir, X, 528, 0, Z), "&
"530 (BC_2, *, control, 0)," &
"531 (BC_6, H_DATA(19) , bidir, X, 530, 0, Z), "&
"532 (BC_2, *, control, 0)," &
"533 (BC_6, H_DATA(16) , bidir, X, 532, 0, Z), "&
"534 (BC_2, *, control, 0)," &
"535 (BC_6, H_DATA(17) , bidir, X, 534, 0, Z), "&
"536 (BC_2, *, control, 0)," &
"537 (BC_6, H_DATA(18) , bidir, X, 536, 0, Z), "&
"538 (BC_2, *, control, 0)," &
"539 (BC_6, H_INT_L , bidir, X, 538, 0, Z), "&
"540 (BC_2, *, control, 0)," &
"541 (BC_6, H_DATA(20) , bidir, X, 540, 0, Z), "&
"542 (BC_2, *, control, 0)," &
"543 (BC_6, H_DATA(21) , bidir, X, 542, 0, Z), "&
"544 (BC_2, *, control, 0)," &
"545 (BC_6, H_DATA(24) , bidir, X, 544, 0, Z), "&
"546 (BC_2, *, control, 0)," &
"547 (BC_6, H_DATA(22) , bidir, X, 546, 0, Z), "&
"548 (BC_0, *, internal, 0)," &
"549 (BC_0, *, internal, X)," &
"550 (BC_2, *, control, 0)," &
"551 (BC_6, H_DATA(23) , bidir, X, 550, 0, Z), "&
"552 (BC_2, *, control, 0)," &
"553 (BC_6, H_DATA(25) , bidir, X, 552, 0, Z), "&
"554 (BC_2, *, control, 0)," &
"555 (BC_6, H_DATA(26) , bidir, X, 554, 0, Z), "&
"556 (BC_2, *, control, 0)," &
"557 (BC_6, H_DATA(28) , bidir, X, 556, 0, Z), "&
"558 (BC_2, *, control, 0)," &
"559 (BC_6, H_DATA(27) , bidir, X, 558, 0, Z), "&
"560 (BC_0, *, internal, 0)," &
"561 (BC_0, *, internal, X)," &
"562 (BC_2, *, control, 0)," &
"563 (BC_6, MCONFIG(0) , bidir, X, 562, 0, Z), "&
"564 (BC_2, *, control, 0)," &
"565 (BC_6, H_DATA(29) , bidir, X, 564, 0, Z), "&
"566 (BC_2, *, control, 0)," &
"567 (BC_6, H_DATA(31) , bidir, X, 566, 0, Z), "&
"568 (BC_2, *, control, 0)," &
"569 (BC_6, H_DATA(30) , bidir, X, 568, 0, Z), "&
"570 (BC_0, *, internal, 0)," &
"571 (BC_0, *, internal, X)," &
"572 (BC_2, *, control, 0)," &
"573 (BC_6, ATAPI_ADDR(4) , bidir, X, 572, 0, Z), "&
"574 (BC_2, *, control, 0)," &
"575 (BC_6, ATAPI_ADDR(0) , bidir, X, 574, 0, Z), "&
"576 (BC_2, *, control, 0)," &
"577 (BC_6, ATAPI_DATA(15) , bidir, X, 576, 0, Z), "&
"578 (BC_2, *, control, 0)," &
"579 (BC_6, ATAPI_RESET , bidir, X, 578, 0, Z), "&
"580 (BC_2, *, control, 0)," &
"581 (BC_6, ATAPI_INTRQ , bidir, X, 580, 0, Z), "&
"582 (BC_2, *, control, 0)," &
"583 (BC_6, ATAPI_DIOR_L , bidir, X, 582, 0, Z), "&
"584 (BC_2, *, control, 0)," &
"585 (BC_6, ATAPI_DMARQ , bidir, X, 584, 0, Z), "&
"586 (BC_2, *, control, 0)," &
"587 (BC_6, ATAPI_ADDR(1) , bidir, X, 586, 0, Z), "&
"588 (BC_2, *, control, 0)," &
"589 (BC_6, ATAPI_ADDR(3) , bidir, X, 588, 0, Z), "&
"590 (BC_2, *, control, 0)," &
"591 (BC_6, ATAPI_ADDR(2) , bidir, X, 590, 0, Z), "&
"592 (BC_2, *, control, 0)," &
"593 (BC_6, ATAPI_DATA(14) , bidir, X, 592, 0, Z), "&
"594 (BC_2, *, control, 0)," &
"595 (BC_6, ATAPI_IORDY , bidir, X, 594, 0, Z)";
--
end LSIL_DMN308SS;