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-- Copyright (C) 2014 Infineon Technologies AG. All rights reserved.
--
-- Infineon Technologies AG (Infineon) is supplying this software for use with
-- Infineon's microcontrollers. This file can be freely distributed within
-- development tools that are supporting such microcontrollers.
--
-- THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-- OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-- MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-- INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
-- OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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-- The XMC4000 micro controller family contains 2 different TAP controllers
-- TAP1 and TAP2.
--
-- Only the first one (TAP1) will be used for boundary scan operation.
--
-- TDO of TAP1 is connected to TDI of TAP2. This results in one additional
-- shift cycle in case TAP2 is configured to bypass mode (IR 1111) for any data
-- register operation.
--
-- In case of an instruction register operation each instruction for TAP1 has to
-- be expanded by "1111" to keep TAP2 in bypass mode.
--
-- The ID code for TAP2 is for all products: 0x4BA0_0477.
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-- DATE & TIME : 27.01.2014
-- File Type : BSDL Description for Top-level Entity XMC4200
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entity XMC4200 is
generic(PHYSICAL_PIN_MAP : string := "LQFP48");
port(
P0_0 : inout bit;
P0_1 : inout bit;
P0_2 : inout bit;
P0_3 : inout bit;
P0_4 : inout bit;
P0_5 : inout bit;
P0_6 : inout bit;
P0_7 : in bit;
P0_8 : in bit;
P1_0 : inout bit;
P1_1 : inout bit;
P1_2 : inout bit;
P1_3 : inout bit;
P1_4 : inout bit;
P1_5 : inout bit;
P2_0 : inout bit;
P2_1 : out bit;
P2_2 : inout bit;
P2_3 : inout bit;
P2_4 : inout bit;
P2_5 : inout bit;
USB_DM : inout bit;
USB_DP : inout bit;
VDDP_1 : linkage bit;
VDDC_1 : linkage bit;
HIB_IO_0 : out bit;
RTC_XTAL1 : linkage bit;
RTC_XTAL2 : linkage bit;
VBAT : linkage bit;
VSS : linkage bit;
XTAL1 : linkage bit;
XTAL2 : linkage bit;
VDDC_3 : linkage bit;
VDDP_3 : linkage bit;
PORST : linkage bit;
TMS : in bit;
TCK : in bit;
VDDP_4 : linkage bit;
P14_0 : in bit;
P14_3 : in bit;
P14_4 : in bit;
P14_5 : in bit;
P14_6 : in bit;
P14_7 : in bit;
P14_8 : in bit;
P14_9 : in bit;
VAGND : linkage bit;
VAREF : linkage bit
);
use STD_1149_1_1994.all; -- Get IEEE 1149.1-1994 attributes and definitions
attribute COMPONENT_CONFORMANCE of XMC4200 : entity is "STD_1149_1_1993";
attribute PIN_MAP of XMC4200 : entity is PHYSICAL_PIN_MAP;
constant LQFP48 : PIN_MAP_STRING :=
"P0_0 : 2,"&
"P0_1 : 1,"&
"P0_2 : 48,"&
"P0_3 : 47,"&
"P0_4 : 46,"&
"P0_5 : 45,"&
"P0_6 : 44,"&
"P0_7 : 43,"&
"P0_8 : 42,"&
"P1_0 : 40,"&
"P1_1 : 39,"&
"P1_2 : 38,"&
"P1_3 : 37,"&
"P1_4 : 36,"&
"P1_5 : 35,"&
"P2_0 : 26,"&
"P2_1 : 25,"&
"P2_2 : 24,"&
"P2_3 : 23,"&
"P2_4 : 22,"&
"P2_5 : 21,"&
"USB_DM : 3,"&
"USB_DP : 4,"&
"VDDP_1 : 5,"&
"VDDC_1 : 6,"&
"HIB_IO_0 : 7,"&
"RTC_XTAL1 : 8,"&
"RTC_XTAL2 : 9,"&
"VBAT : 10,"&
"VSS : 27,"&
"XTAL1 : 29,"&
"XTAL2 : 30,"&
"VDDC_3 : 31,"&
"VDDP_3 : 28,"&
"PORST : 32,"&
"TMS : 33,"&
"TCK : 34,"&
"VDDP_4 : 41,"&
"P14_0 : 16,"&
"P14_3 : 15,"&
"P14_4 : 14,"&
"P14_5 : 13,"&
"P14_6 : 12,"&
"P14_7 : 11,"&
"P14_8 : 20,"&
"P14_9 : 19,"&
"VAGND : 17,"&
"VAREF : 18";
attribute TAP_SCAN_IN of P0_7 : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of P2_1 : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (5.00000000e+06, BOTH);
attribute TAP_SCAN_RESET of P0_8 : signal is true;
attribute INSTRUCTION_LENGTH of XMC4200 : entity is 8;
attribute INSTRUCTION_OPCODE of XMC4200 : entity is
"extest (00001000)," &
"bypass (11111111)," &
"sample (00000010)," &
"intest (00000001)," &
"idcode (00000100)," &
"clamp (00000110)," &
"highz (00000111)," &
"test_trc0 (01010111)," &
"test_trc1 (01011000)," &
"test_trc2 (01011001)," &
"test_trc3 (01011010)," &
"test_trc4 (01011011)," &
"test_trc5 (01010010)," &
"test_trc6 (01010011)," &
"test_trc7 (01010100)," &
"test_trc8 (01010101)," &
"test_trc9 (01011100)," &
"test_trc10 (01011101)," &
"test_trc11 (01011110)," &
"test_trc12 (01100000)," &
"test_trc13 (01100001)," &
"test_pll_m (01010110)," &
"test_pll_usb (01011111)," &
"testmode (01100010)," &
"fw_trace_err (01100011)," &
"mem_repair (01100100)," &
"algo_sel (01100101)," &
"ssw1 (01100110)," &
"ssw2 (01100111)," &
"ssw3 (01101000)," &
"ssw4 (01101001)," &
"ssw5 (01101010)," &
"ssw6 (01101011)," &
"ssw7 (01101100)," &
"cm1_reg (01110110)," &
"wakeup_reg (01110111)," &
"misr_sig_out (01101101)";
attribute INSTRUCTION_CAPTURE of XMC4200 : entity is "00000001";
attribute IDCODE_REGISTER of XMC4200 : entity is -- XMC4200 JTAG_ID is h'301DD083
"0011" & -- Version Number
"0000000111011101" & -- Part Number
"00001000001" & -- Manufacturer ID
"1"; -- Required by IEEE Std. 1149.1-1990
attribute REGISTER_ACCESS of XMC4200 : entity is
"BOUNDARY (extest, sample, intest), " &
"DEVICE_ID (idcode), " &
"BYPASS (bypass, clamp, highz), " &
"trc0[38] (test_trc0), " &
"trc1[27] (test_trc1), " &
"trc2[48] (test_trc2), " &
"trc3[35] (test_trc3), " &
"trc4[41] (test_trc4), " &
"trc5[99] (test_trc5), " &
"trc6[99] (test_trc6), " &
"trc7[99] (test_trc7), " &
"trc8[99] (test_trc8), " &
"trc9[82] (test_trc9), " &
"trc10[16] (test_trc10), " &
"trc11[74] (test_trc11), " &
"trc12[97] (test_trc12), " &
"trc13[56] (test_trc13), " &
"pll_trc_m[95] (test_pll_m), " &
"pll_trc_usb[75] (test_pll_usb), " &
"testmode[64] (testmode), " &
"fw_trace_err[32] (fw_trace_err), " &
"mem_repair[82] (mem_repair), " &
"algosel[36] (algo_sel), " &
"ssw1[16] (ssw1), " &
"ssw2[32] (ssw2), " &
"ssw3[32] (ssw3), " &
"ssw4[32] (ssw4), " &
"ssw5[32] (ssw5), " &
"ssw6[32] (ssw6), " &
"ssw7[32] (ssw7), " &
"cm1_reg[51] (cm1_reg), " &
"wakeup_reg[9] (wakeup_reg), " &
"misr_sig_out[32] (misr_sig_out)";
attribute BOUNDARY_LENGTH of XMC4200 : entity is 191;
attribute BOUNDARY_REGISTER of XMC4200 : entity is
--- num cell port function safe [ccell disval rslt]
" 0 ( bc_1, *, internal, 0)," &
" 1 ( bc_1, *, internal, 0)," &
" 2 ( bc_1, *, internal, 0)," &
" 3 ( bc_1, *, internal, 0)," &
" 4 ( bc_1, *, internal, 0)," &
" 5 ( bc_1, HIB_IO_0, output2, 0, 5, 1, WEAK1)," &
" 6 ( bc_1, *, internal, 0)," &
" 7 ( bc_1, P14_0, input, 0)," &
" 8 ( bc_1, *, internal, 0)," &
" 9 ( bc_1, *, internal, 0)," &
" 10 ( bc_1, P14_3, input, 0)," &
" 11 ( bc_1, P14_4, input, 0)," &
" 12 ( bc_1, P14_5, input, 0)," &
" 13 ( bc_1, P14_6, input, 0)," &
" 14 ( bc_1, P14_7, input, 0)," &
" 15 ( bc_1, P14_8, input, 0)," &
" 16 ( bc_1, P14_9, input, 0)," &
" 17 ( bc_1, *, internal, 0)," &
" 18 ( bc_1, *, internal, 0)," &
" 19 ( bc_1, *, internal, 0)," &
" 20 ( bc_1, *, internal, 0)," &
" 21 ( bc_1, *, internal, 0)," &
" 22 ( bc_1, *, internal, 0)," &
" 23 ( bc_1, *, internal, 0)," &
" 24 ( bc_1, *, internal, 0)," &
" 25 ( bc_1, *, internal, 0)," &
" 26 ( bc_1, *, internal, 0)," &
" 27 ( bc_1, *, internal, 0)," &
" 28 ( bc_1, *, internal, 0)," &
" 29 ( bc_1, *, internal, 0)," &
" 30 ( bc_1, *, internal, 0)," &
" 31 ( bc_1, *, internal, 0)," &
" 32 ( bc_1, *, internal, 0)," &
" 33 ( bc_1, *, internal, 0)," &
" 34 ( bc_1, *, internal, 0)," &
" 35 ( bc_1, *, internal, 0)," &
" 36 ( bc_1, *, internal, 0)," &
" 37 ( bc_1, *, internal, 0)," &
" 38 ( bc_1, *, internal, 0)," &
" 39 ( bc_1, *, internal, 0)," &
" 40 ( bc_1, *, internal, 0)," &
" 41 ( bc_1, *, internal, 0)," &
" 42 ( bc_1, *, internal, 0)," &
" 43 ( bc_1, *, internal, 0)," &
" 44 ( bc_1, *, internal, 0)," &
" 45 ( bc_1, *, internal, 0)," &
" 46 ( bc_1, *, internal, 0)," &
" 47 ( bc_1, *, control, 1)," &
" 48 ( bc_1, P2_0, output3, 0, 47, 1, Z)," &
" 49 ( bc_1, P2_0, input, 0)," &
" 50 ( bc_1, *, internal, 0)," &
" 51 ( bc_1, *, internal, 0)," &
" 52 ( bc_1, *, internal, 0)," &
" 53 ( bc_1, *, control, 1)," &
" 54 ( bc_1, P2_2, output3, 0, 53, 1, Z)," &
" 55 ( bc_1, P2_2, input, 0)," &
" 56 ( bc_1, *, control, 1)," &
" 57 ( bc_1, P2_3, output3, 0, 56, 1, Z)," &
" 58 ( bc_1, P2_3, input, 0)," &
" 59 ( bc_1, *, control, 1)," &
" 60 ( bc_1, P2_4, output3, 0, 59, 1, Z)," &
" 61 ( bc_1, P2_4, input, 0)," &
" 62 ( bc_1, *, control, 1)," &
" 63 ( bc_1, P2_5, output3, 0, 62, 1, Z)," &
" 64 ( bc_1, P2_5, input, 0)," &
" 65 ( bc_1, *, internal, 0)," &
" 66 ( bc_1, *, internal, 0)," &
" 67 ( bc_1, *, internal, 0)," &
" 68 ( bc_1, *, internal, 0)," &
" 69 ( bc_1, *, internal, 0)," &
" 70 ( bc_1, *, internal, 0)," &
" 71 ( bc_1, *, control, 1)," &
" 72 ( bc_1, USB_DM, output3, 0, 71, 1, Z)," &
" 73 ( bc_1, USB_DM, input, 0)," &
" 74 ( bc_1, *, control, 1)," &
" 75 ( bc_1, USB_DP, output3, 0, 74, 1, Z)," &
" 76 ( bc_1, USB_DP, input, 0)," &
" 77 ( bc_1, *, internal, 0)," &
" 78 ( bc_1, *, internal, 0)," &
" 79 ( bc_1, *, internal, 0)," &
" 80 ( bc_1, *, internal, 0)," &
" 81 ( bc_1, *, internal, 0)," &
" 82 ( bc_1, *, internal, 0)," &
" 83 ( bc_1, *, internal, 0)," &
" 84 ( bc_1, *, internal, 0)," &
" 85 ( bc_1, *, internal, 0)," &
" 86 ( bc_1, *, internal, 0)," &
" 87 ( bc_1, *, internal, 0)," &
" 88 ( bc_1, *, internal, 0)," &
" 89 ( bc_1, *, internal, 0)," &
" 90 ( bc_1, *, internal, 0)," &
" 91 ( bc_1, *, internal, 0)," &
" 92 ( bc_1, *, internal, 0)," &
" 93 ( bc_1, *, internal, 0)," &
" 94 ( bc_1, *, internal, 0)," &
" 95 ( bc_1, *, control, 1)," &
" 96 ( bc_1, P1_0, output3, 0, 95, 1, Z)," &
" 97 ( bc_1, P1_0, input, 0)," &
" 98 ( bc_1, *, control, 1)," &
" 99 ( bc_1, P1_1, output3, 0, 98, 1, Z)," &
" 100 ( bc_1, P1_1, input, 0)," &
" 101 ( bc_1, *, control, 1)," &
" 102 ( bc_1, P1_2, output3, 0, 101, 1, Z)," &
" 103 ( bc_1, P1_2, input, 0)," &
" 104 ( bc_1, *, control, 1)," &
" 105 ( bc_1, P1_3, output3, 0, 104, 1, Z)," &
" 106 ( bc_1, P1_3, input, 0)," &
" 107 ( bc_1, *, control, 1)," &
" 108 ( bc_1, P1_4, output3, 0, 107, 1, Z)," &
" 109 ( bc_1, P1_4, input, 0)," &
" 110 ( bc_1, *, control, 1)," &
" 111 ( bc_1, P1_5, output3, 0, 110, 1, Z)," &
" 112 ( bc_1, P1_5, input, 0)," &
" 113 ( bc_1, *, internal, 0)," &
" 114 ( bc_1, *, internal, 0)," &
" 115 ( bc_1, *, internal, 0)," &
" 116 ( bc_1, *, internal, 0)," &
" 117 ( bc_1, *, internal, 0)," &
" 118 ( bc_1, *, internal, 0)," &
" 119 ( bc_1, *, internal, 0)," &
" 120 ( bc_1, *, internal, 0)," &
" 121 ( bc_1, *, internal, 0)," &
" 122 ( bc_1, *, internal, 0)," &
" 123 ( bc_1, *, internal, 0)," &
" 124 ( bc_1, *, internal, 0)," &
" 125 ( bc_1, *, internal, 0)," &
" 126 ( bc_1, *, internal, 0)," &
" 127 ( bc_1, *, internal, 0)," &
" 128 ( bc_1, *, internal, 0)," &
" 129 ( bc_1, *, internal, 0)," &
" 130 ( bc_1, *, internal, 0)," &
" 131 ( bc_1, *, internal, 0)," &
" 132 ( bc_1, *, internal, 0)," &
" 133 ( bc_1, *, internal, 0)," &
" 134 ( bc_1, *, internal, 0)," &
" 135 ( bc_1, *, internal, 0)," &
" 136 ( bc_1, *, internal, 0)," &
" 137 ( bc_1, *, internal, 0)," &
" 138 ( bc_1, *, internal, 0)," &
" 139 ( bc_1, *, internal, 0)," &
" 140 ( bc_1, *, internal, 0)," &
" 141 ( bc_1, *, internal, 0)," &
" 142 ( bc_1, *, internal, 0)," &
" 143 ( bc_1, *, control, 1)," &
" 144 ( bc_1, P0_0, output3, 0, 143, 1, Z)," &
" 145 ( bc_1, P0_0, input, 0)," &
" 146 ( bc_1, *, control, 1)," &
" 147 ( bc_1, P0_1, output3, 0, 146, 1, Z)," &
" 148 ( bc_1, P0_1, input, 0)," &
" 149 ( bc_1, *, control, 1)," &
" 150 ( bc_1, P0_2, output3, 0, 149, 1, Z)," &
" 151 ( bc_1, P0_2, input, 0)," &
" 152 ( bc_1, *, control, 1)," &
" 153 ( bc_1, P0_3, output3, 0, 152, 1, Z)," &
" 154 ( bc_1, P0_3, input, 0)," &
" 155 ( bc_1, *, control, 1)," &
" 156 ( bc_1, P0_4, output3, 0, 155, 1, Z)," &
" 157 ( bc_1, P0_4, input, 0)," &
" 158 ( bc_1, *, control, 1)," &
" 159 ( bc_1, P0_5, output3, 0, 158, 1, Z)," &
" 160 ( bc_1, P0_5, input, 0)," &
" 161 ( bc_1, *, control, 1)," &
" 162 ( bc_1, P0_6, output3, 0, 161, 1, Z)," &
" 163 ( bc_1, P0_6, input, 0)," &
" 164 ( bc_1, *, internal, 0)," &
" 165 ( bc_1, *, internal, 0)," &
" 166 ( bc_1, *, internal, 0)," &
" 167 ( bc_1, *, internal, 0)," &
" 168 ( bc_1, *, internal, 0)," &
" 169 ( bc_1, *, internal, 0)," &
" 170 ( bc_1, *, internal, 0)," &
" 171 ( bc_1, *, internal, 0)," &
" 172 ( bc_1, *, internal, 0)," &
" 173 ( bc_1, *, internal, 0)," &
" 174 ( bc_1, *, internal, 0)," &
" 175 ( bc_1, *, internal, 0)," &
" 176 ( bc_1, *, internal, 0)," &
" 177 ( bc_1, *, internal, 0)," &
" 178 ( bc_1, *, internal, 0)," &
" 179 ( bc_1, *, internal, 0)," &
" 180 ( bc_1, *, internal, 0)," &
" 181 ( bc_1, *, internal, 0)," &
" 182 ( bc_1, *, internal, 0)," &
" 183 ( bc_1, *, internal, 0)," &
" 184 ( bc_1, *, internal, 0)," &
" 185 ( bc_1, *, internal, 0)," &
" 186 ( bc_1, *, internal, 0)," &
" 187 ( bc_1, *, internal, 0)," &
" 188 ( bc_1, *, internal, 0)," &
" 189 ( bc_1, *, internal, 0)," &
" 190 ( bc_1, *, internal, 0)";
end XMC4200;
