entity gc5016 is generic (PHYSICAL_PIN_MAP: string:="PB"); -- port( wlch, ck, ce, wr, rd: in bit; a: in bit_vector (0 to 4); c: inout bit_vector (0 to 15); ai: in bit_vector (0 to 15); bi: in bit_vector (0 to 15); ci: in bit_vector (0 to 15); di: in bit_vector (0 to 15); ao: out bit_vector (0 to 15); bo: out bit_vector (0 to 15); co: inout bit_vector (0 to 15); do: inout bit_vector (0 to 15); ack, bck, cck, dck: out bit; afs, bfs, cfs, dfs: out bit; iflg: out bit; rst, sia, sib: in bit; so: out bit; trst, tdi, tms, tck: in bit; tdo: out bit; gnd: linkage bit_vector (0 to 42); vpad: linkage bit_vector (0 to 20); vcor: linkage bit_vector (0 to 15) ); -- use STD_1149_1_1994.all; -- {} for private VHDL package we probably never use -- attribute COMPONENT_CONFORMANCE of gc5016: entity is "STD_1149_1_1993"; -- attribute PIN_MAP of gc5016: entity is PHYSICAL_PIN_MAP; constant PB:PIN_MAP_STRING:= "bck:A2, " & "iflg:A14, " & "tms:A15, " & "tdi:B14, " & "trst:B15, " & "rst:B16, " & "afs:C4, " & "so:C13, " & "sib:C15, " & "bfs:D4, " & "ack:D5, " & "tdo:D12, " & "tck:D13, " & "sia:E13, " & "ck:L3, " & "cck:L13, " & "dfs:M13, " & "ce:N1, " & "rd:N2, " & "wlch:N3, " & "dck:N14, " & "wr:P1, " & "cfs:P16, " & "ai:(C3,B1,D3,D2,G4,D1,E2,F3,F1,G2,H2,J4,J3,K1,K3,L1), " & "bi:(B2,E4,C2,C1,F4,E3,E1,F2,G3,G1,H4,H3,J2,K2,K4,L2), " & "ci:(N15,M14,M16,L15,K15,K13,K16,J14,G16,G14,G13,F15,F14,D16,F13,C16), " & "di:(N16,M15,L14,L16,K14,J13,J15,H15,G15,H13,F16,E16,E15,E14,D15,D14), " & "ao:(D11,A13,D10,C11,B11,C10,A10,C8,D9,B7,A6,A5,C6,D6,B4,B3), " & "bo:(B13,C12,B12,A12,A11,B10,C9,D8,A7,C7,B6,B5,D7,A4,A3,C5), " & "co:(T5,T6,N9,R7,P8,T10,P10,N10,T12,R12,T14,P12,N11,P13,R15,N13), " & "do:(R6,N8,P7,T7,P9,R10,T11,R11,P11,T13,R13,T15,R14,N12,R16,P15), " & "a:(L4,M1,M2,M3,M4), " & "c:(N4,P2,R1,N5,R2,P4,R3,T2,P5,N6,N7,T3,R4,R5,P6,T4), " & "gnd:(A1,A8,A9,A16,C14,E5,E12,F6,F7,F10,F11" & ",G6,G7,G8,G9,G10,G11,H1,H7,H10,H16,J1" & ",J7,J10,J16,K6,K7,K8,K9,K10,K11,L6,L7" & ",L10,L11,M5,M12,P3,P14,T1,T8,T9,T16)," & "vpad:(B8,B9,E6,E7,E8,E9,E10,E11,F8,F9,H14" & ",L8,L9,M6,M7,M8,M9,M10,M11,R8,R9)," & "vcor:(F5,F12,G5,G12,H5,H6,H11,H12,J5,J6,J11" & ",J12,K5,K12,L5,L12)"; -- attribute TAP_SCAN_CLOCK of tck: signal is (20.0e6, BOTH); attribute TAP_SCAN_IN of tdi: signal is true; attribute TAP_SCAN_MODE of tms: signal is true; attribute TAP_SCAN_RESET of trst: signal is true; attribute TAP_SCAN_OUT of tdo: signal is true; -- {} NONE -- attribute INSTRUCTION_LENGTH of gc5016: entity is 2; attribute INSTRUCTION_OPCODE of gc5016: entity is "EXTEST (00), " & "BYPASS (11), " & "SAMPLE (10), " & "IDCODE (01) "; attribute INSTRUCTION_CAPTURE of gc5016: entity is "01"; -- {} attribute IDCODE_REGISTER of gc5016: entity is -- 0x02329119 FROM gc9001 -- version 0 -- part code 0x2329 -- Manufacturer ID = 0x118/2 = 0x8c -- Fixed 1 "0001" & -- Version 1 "0001001110011000" & -- Part number 5016 = 0x0fb0 "00010001100" & -- Manufacturer ID 0x8c "1"; -- mandatory bit. -- {} NONE -- attribute BOUNDARY_LENGTH of gc5016: entity is 225; attribute BOUNDARY_REGISTER of gc5016: entity is --num cell port function safe ccell disval rslt "224 (BC_1, *, control, 0), " & "223 (BC_1, iflg, output3, X, 224, 0, Z), " & "222 (BC_1, so, output3, X, 224, 0, Z), " & "221 (BC_1, ao(0), output3, X, 184, 0, Z), " & "220 (BC_1, bo(0), output3, X, 182, 0, Z), " & "219 (BC_1, ao(1), output3, X, 184, 0, Z), " & "218 (BC_1, bo(1), output3, X, 182, 0, Z), " & "217 (BC_1, ao(2), output3, X, 184, 0, Z), " & "216 (BC_1, bo(2), output3, X, 182, 0, Z), " & "215 (BC_1, ao(3), output3, X, 184, 0, Z), " & "214 (BC_1, bo(3), output3, X, 182, 0, Z), " & "213 (BC_1, ao(4), output3, X, 184, 0, Z), " & "212 (BC_1, bo(4), output3, X, 182, 0, Z), " & "211 (BC_1, ao(5), output3, X, 184, 0, Z), " & "210 (BC_1, bo(5), output3, X, 182, 0, Z), " & "209 (BC_1, ao(6), output3, X, 184, 0, Z), " & "208 (BC_1, bo(6), output3, X, 182, 0, Z), " & "207 (BC_1, ao(7), output3, X, 184, 0, Z), " & "206 (BC_1, bo(7), output3, X, 182, 0, Z), " & "205 (BC_1, ao(8), output3, X, 184, 0, Z), " & "204 (BC_1, bo(8), output3, X, 182, 0, Z), " & "203 (BC_1, ao(9), output3, X, 184, 0, Z), " & "202 (BC_1, bo(9), output3, X, 182, 0, Z), " & "201 (BC_1, ao(10), output3, X, 184, 0, Z), " & "200 (BC_1, bo(10), output3, X, 182, 0, Z), " & "199 (BC_1, ao(11), output3, X, 184, 0, Z), " & "198 (BC_1, bo(11), output3, X, 182, 0, Z), " & "197 (BC_1, ao(12), output3, X, 184, 0, Z), " & "196 (BC_1, bo(12), output3, X, 182, 0, Z), " & "195 (BC_1, ao(13), output3, X, 184, 0, Z), " & "194 (BC_1, bo(13), output3, X, 182, 0, Z), " & "193 (BC_1, ao(14), output3, X, 184, 0, Z), " & "192 (BC_1, bo(14), output3, X, 182, 0, Z), " & "191 (BC_1, ao(15), output3, X, 184, 0, Z), " & "190 (BC_1, bo(15), output3, X, 182, 0, Z), " & "189 (BC_1, ack, output3, X, 180, 0, Z), " & "188 (BC_1, afs, output3, X, 180, 0, Z), " & "187 (BC_1, bck, output3, X, 178, 0, Z), " & "186 (BC_1, bfs, output3, X, 178, 0, Z), " & "185 (BC_4, ai(0), input, X), " & "184 (BC_1, *, control, 0), " & "183 (BC_4, bi(0), input, X), " & "182 (BC_1, *, control, 0), " & "181 (BC_4, ai(1), input, X), " & "180 (BC_1, *, control, 0), " & "179 (BC_4, bi(1), input, X), " & "178 (BC_1, *, control, 0), " & "177 (BC_4, ai(2), input, X), " & "176 (BC_4, bi(2), input, X), " & "175 (BC_4, ai(3), input, X), " & "174 (BC_4, bi(3), input, X), " & "173 (BC_4, ai(4), input, X), " & "172 (BC_4, bi(4), input, X), " & "171 (BC_4, ai(5), input, X), " & "170 (BC_4, bi(5), input, X), " & "169 (BC_4, ai(6), input, X), " & "168 (BC_4, bi(6), input, X), " & "167 (BC_4, ai(7), input, X), " & "166 (BC_4, bi(7), input, X), " & "165 (BC_4, ai(8), input, X), " & "164 (BC_4, bi(8), input, X), " & "163 (BC_4, ai(9), input, X), " & "162 (BC_4, bi(9), input, X), " & "161 (BC_4, ai(10), input, X), " & "160 (BC_4, bi(10), input, X), " & "159 (BC_4, ai(11), input, X), " & "158 (BC_4, bi(11), input, X), " & "157 (BC_4, ai(12), input, X), " & "156 (BC_4, bi(12), input, X), " & "155 (BC_4, ai(13), input, X), " & "154 (BC_4, bi(13), input, X), " & "153 (BC_4, ai(14), input, X), " & "152 (BC_4, bi(14), input, X), " & "151 (BC_4, ai(15), input, X), " & "150 (BC_4, bi(15), input, X), " & "149 (BC_4, ck, input, X), " & "148 (BC_4, a(0), input, X), " & "147 (BC_4, a(1), input, X), " & "146 (BC_4, a(2), input, X), " & "145 (BC_4, a(3), input, X), " & "144 (BC_4, a(4), input, X), " & "143 (BC_4, ce, input, X), " & "142 (BC_4, rd, input, X), " & "141 (BC_4, wr, input, X), " & "140 (BC_4, wlch, input, X), " & "139 (BC_1, *, control, 0), " & "138 (BC_4, c(0), input, X), " & "137 (BC_1, c(0), output3, X, 139, 0, Z), " & "136 (BC_4, c(1), input, X), " & "135 (BC_1, c(1), output3, X, 139, 0, Z), " & "134 (BC_4, c(2), input, X), " & "133 (BC_1, c(2), output3, X, 139, 0, Z), " & "132 (BC_4, c(3), input, X), " & "131 (BC_1, c(3), output3, X, 139, 0, Z), " & "130 (BC_4, c(4), input, X), " & "129 (BC_1, c(4), output3, X, 139, 0, Z), " & "128 (BC_4, c(5), input, X), " & "127 (BC_1, c(5), output3, X, 139, 0, Z), " & "126 (BC_4, c(6), input, X), " & "125 (BC_1, c(6), output3, X, 139, 0, Z), " & "124 (BC_4, c(7), input, X), " & "123 (BC_1, c(7), output3, X, 139, 0, Z), " & "122 (BC_4, c(8), input, X), " & "121 (BC_1, c(8), output3, X, 139, 0, Z), " & "120 (BC_4, c(9), input, X), " & "119 (BC_1, c(9), output3, X, 139, 0, Z), " & "118 (BC_4, c(10), input, X), " & "117 (BC_1, c(10), output3, X, 139, 0, Z), " & "116 (BC_4, c(11), input, X), " & "115 (BC_1, c(11), output3, X, 139, 0, Z), " & "114 (BC_4, c(12), input, X), " & "113 (BC_1, c(12), output3, X, 139, 0, Z), " & "112 (BC_4, c(13), input, X), " & "111 (BC_1, c(13), output3, X, 139, 0, Z), " & "110 (BC_4, c(14), input, X), " & "109 (BC_1, c(14), output3, X, 139, 0, Z), " & "108 (BC_4, c(15), input, X), " & "107 (BC_1, c(15), output3, X, 139, 0, Z), " & "106 (BC_4, co(0), input, X), " & "105 (BC_1, co(0), output3, X, 37, 0, Z), " & "104 (BC_4, do(0), input, X), " & "103 (BC_1, do(0), output3, X, 35, 0, Z), " & "102 (BC_4, co(1), input, X), " & "101 (BC_1, co(1), output3, X, 37, 0, Z), " & "100 (BC_4, do(1), input, X), " & " 99 (BC_1, do(1), output3, X, 35, 0, Z), " & " 98 (BC_4, co(2), input, X), " & " 97 (BC_1, co(2), output3, X, 37, 0, Z), " & " 96 (BC_4, do(2), input, X), " & " 95 (BC_1, do(2), output3, X, 35, 0, Z), " & " 94 (BC_4, co(3), input, X), " & " 93 (BC_1, co(3), output3, X, 37, 0, Z), " & " 92 (BC_4, do(3), input, X), " & " 91 (BC_1, do(3), output3, X, 35, 0, Z), " & " 90 (BC_4, co(4), input, X), " & " 89 (BC_1, co(4), output3, X, 37, 0, Z), " & " 88 (BC_4, do(4), input, X), " & " 87 (BC_1, do(4), output3, X, 35, 0, Z), " & " 86 (BC_4, co(5), input, X), " & " 85 (BC_1, co(5), output3, X, 37, 0, Z), " & " 84 (BC_4, do(5), input, X), " & " 83 (BC_1, do(5), output3, X, 35, 0, Z), " & " 82 (BC_4, co(6), input, X), " & " 81 (BC_1, co(6), output3, X, 37, 0, Z), " & " 80 (BC_4, do(6), input, X), " & " 79 (BC_1, do(6), output3, X, 35, 0, Z), " & " 78 (BC_4, co(7), input, X), " & " 77 (BC_1, co(7), output3, X, 37, 0, Z), " & " 76 (BC_4, do(7), input, X), " & " 75 (BC_1, do(7), output3, X, 35, 0, Z), " & " 74 (BC_4, co(8), input, X), " & " 73 (BC_1, co(8), output3, X, 37, 0, Z), " & " 72 (BC_4, do(8), input, X), " & " 71 (BC_1, do(8), output3, X, 35, 0, Z), " & " 70 (BC_4, co(9), input, X), " & " 69 (BC_1, co(9), output3, X, 37, 0, Z), " & " 68 (BC_4, do(9), input, X), " & " 67 (BC_1, do(9), output3, X, 35, 0, Z), " & " 66 (BC_4, co(10), input, X), " & " 65 (BC_1, co(10), output3, X, 37, 0, Z), " & " 64 (BC_4, do(10), input, X), " & " 63 (BC_1, do(10), output3, X, 35, 0, Z), " & " 62 (BC_4, co(11), input, X), " & " 61 (BC_1, co(11), output3, X, 37, 0, Z), " & " 60 (BC_4, do(11), input, X), " & " 59 (BC_1, do(11), output3, X, 35, 0, Z), " & " 58 (BC_4, co(12), input, X), " & " 57 (BC_1, co(12), output3, X, 37, 0, Z), " & " 56 (BC_4, do(12), input, X), " & " 55 (BC_1, do(12), output3, X, 35, 0, Z), " & " 54 (BC_4, co(13), input, X), " & " 53 (BC_1, co(13), output3, X, 37, 0, Z), " & " 52 (BC_4, do(13), input, X), " & " 51 (BC_1, do(13), output3, X, 35, 0, Z), " & " 50 (BC_4, co(14), input, X), " & " 49 (BC_1, co(14), output3, X, 37, 0, Z), " & " 48 (BC_4, do(14), input, X), " & " 47 (BC_1, do(14), output3, X, 35, 0, Z), " & " 46 (BC_4, co(15), input, X), " & " 45 (BC_1, co(15), output3, X, 37, 0, Z), " & " 44 (BC_4, do(15), input, X), " & " 43 (BC_1, do(15), output3, X, 35, 0, Z), " & " 42 (BC_1, cfs, output3, X, 33, 0, Z), " & " 41 (BC_1, cck, output3, X, 33, 0, Z), " & " 40 (BC_1, dfs, output3, X, 31, 0, Z), " & " 39 (BC_1, dck, output3, X, 31, 0, Z), " & " 38 (BC_4, ci(0), input, X), " & " 37 (BC_1, *, control, 0), " & " 36 (BC_4, di(0), input, X), " & " 35 (BC_1, *, control, 0), " & " 34 (BC_4, ci(1), input, X), " & " 33 (BC_1, *, control, 0), " & " 32 (BC_4, di(1), input, X), " & " 31 (BC_1, *, control, 0), " & " 30 (BC_4, ci(2), input, X), " & " 29 (BC_4, di(2), input, X), " & " 28 (BC_4, ci(3), input, X), " & " 27 (BC_4, di(3), input, X), " & " 26 (BC_4, ci(4), input, X), " & " 25 (BC_4, di(4), input, X), " & " 24 (BC_4, ci(5), input, X), " & " 23 (BC_4, di(5), input, X), " & " 22 (BC_4, ci(6), input, X), " & " 21 (BC_4, di(6), input, X), " & " 20 (BC_4, ci(7), input, X), " & " 19 (BC_4, di(7), input, X), " & " 18 (BC_4, ci(8), input, X), " & " 17 (BC_4, di(8), input, X), " & " 16 (BC_4, ci(9), input, X), " & " 15 (BC_4, di(9), input, X), " & " 14 (BC_4, ci(10), input, X), " & " 13 (BC_4, di(10), input, X), " & " 12 (BC_4, ci(11), input, X), " & " 11 (BC_4, di(11), input, X), " & " 10 (BC_4, ci(12), input, X), " & " 9 (BC_4, di(12), input, X), " & " 8 (BC_4, ci(13), input, X), " & " 7 (BC_4, di(13), input, X), " & " 6 (BC_4, ci(14), input, X), " & " 5 (BC_4, di(14), input, X), " & " 4 (BC_4, ci(15), input, X), " & " 3 (BC_4, di(15), input, X), " & " 2 (BC_4, sia, input, X), " & " 1 (BC_4, sib, input, X), " & " 0 (BC_4, rst, input, X)"; -- {} NONE -- {} NONE -- {} NONE -- {} attribute DESIGN_WARNING of gc5016: entity is "Dynamic device, " & "stopping the clock will cause the chip to lose state."; end gc5016;