-- Part: IDT5T9891 -- Ver: 0.0 Tuesday, January 13, 2004 entity IDT5T9891_R1 is -- Generic parameter generic (PHYSICAL_PIN_MAP: string := "NL68"); -- Logical port description port ( REF0 : in bit; REF0X_VREF0 : in bit; REF1 : in bit; REF1X_VREF1 : in bit; FB : in bit; FBX_VREF2 : in bit; s1OEX : in bit; s2OEX : in bit; s3OEX : in bit; s4OEX : in bit; s5OEX : in bit; Q1 : out bit; Q1X : out bit; Q2 : out bit; Q2X : out bit; Q3 : out bit; Q3X : out bit; Q4 : out bit; Q4X : out bit; Q5 : out bit; Q5X : out bit; QFB : out bit; QFBX : out bit; PLL_ENX : in bit; TRSTX : in bit; PDX : in bit; REF_SEL : in bit; TMS : in bit; TCK : in bit; TDO : out bit; TDI : in bit; LOCK : out bit; OMODE : in bit; VDD : linkage bit_vector(0 to 30); GND : linkage bit ); -- Standard use STD_1149_1_1994.all; -- Component conformance attribute COMPONENT_CONFORMANCE of IDT5T9891_R1: entity is "STD_1149_1_1993"; -- Device package pin mappings attribute PIN_MAP of IDT5T9891_R1: entity is PHYSICAL_PIN_MAP; -- Pin-port map for package NL68 constant NL68: PIN_MAP_STRING := "TDI : 2, " & "TCK : 3, " & "REF_SEL : 5, " & "REF1 : 6, " & "REF1X_VREF1 : 7, " & "REF0 : 8, " & "REF0X_VREF0 : 9, " & "FB : 10, " & "FBX_VREF2 : 11, " & "PDX : 20, " & "PLL_ENX : 21, " & "QFBX : 24, " & "QFB : 25, " & "Q5X : 30, " & "Q5 : 31, " & "s5OEX : 34, " & "s4OEX : 36, " & "Q4 : 39, " & "Q4X : 40, " & "Q3X : 45, " & "Q3 : 46, " & "s3OEX : 49, " & "OMODE : 50, " & "TRSTX : 51, " & "s2OEX : 52, " & "Q2 : 55, " & "Q2X : 56, " & "Q1X : 61, " & "Q1 : 62, " & "s1OEX : 65, " & "LOCK : 66, " & "TDO : 67, " & "TMS : 68, " & "VDD : (1, 4, 12, 13, 18, 19, 22, 23, 26, 27, " & " 28, 29, 32, 33, 35, 37, 38, 41, 42, 43, " & " 44, 47, 48, 53, 54, 57, 58, 59, 60, " & " 63, 64), " & "GND : 69 " ; -- Scan port identification attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH); attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_RESET of TRSTX : signal is true; attribute COMPLIANCE_PATTERNS of IDT5T9891_R1 : entity is "(PDX) (1)" ; -- Instruction register description attribute INSTRUCTION_LENGTH of IDT5T9891_R1: entity is 4; attribute INSTRUCTION_OPCODE of IDT5T9891_R1: entity is "SAMPLE (0001)," & "EXTEST (0000)," & "IDCODE (0010)," & "HIGHZ (1001)," & "CLAMP (1000)," & "BYPASS (1111)," & "PRIVATE (0011, 0100, 0101, 0110, 0111,1010, 1011, 1100, 1101, 1110)"; attribute INSTRUCTION_CAPTURE of IDT5T9891_R1: entity is "0101"; attribute INSTRUCTION_PRIVATE of IDT5T9891_R1: entity is "PRIVATE"; -- Optional register description attribute IDCODE_REGISTER of IDT5T9891_R1: entity is "0000" & -- version "0000001110101001" & -- part number "00000110011" & -- manufacturer's identity "1"; -- required by 1149.1 -- Register access description attribute REGISTER_ACCESS of IDT5T9891_R1: entity is "BYPASS (BYPASS, HIGHZ, CLAMP), " & "BOUNDARY (SAMPLE, EXTEST), " & "DEVICE_ID (IDCODE)"; -- Boundary-Scan register description attribute BOUNDARY_LENGTH of IDT5T9891_R1: entity is 36; attribute BOUNDARY_REGISTER of IDT5T9891_R1: entity is -- -- num cell port function safe [ccell disval rslt] -- " 0 (BC_4, REF_SEL, input, X), " & " 1 (BC_4, REF1, input, X), " & " 2 (BC_4, REF1X_VREF1, input, X), " & " 3 (BC_4, REF0, input, X), " & " 4 (BC_4, REF0X_VREF0, input, X), " & " 5 (BC_4, FB, input, X), " & " 6 (BC_4, FBX_VREF2, input, X), " & " 7 (BC_4, *, internal, X), " & " 8 (BC_4, *, internal, X), " & " 9 (BC_4, *, internal, X), " & " 10 (BC_4, *, internal, X), " & " 11 (BC_4, *, internal, X), " & " 12 (BC_4, *, internal, X), " & " 13 (BC_4, PLL_ENX, input, X), " & " 14 (BC_1, QFBX, output3, X, 26, 0, Z), " & " 15 (BC_1, QFB, output3, X, 26, 0, Z), " & " 16 (BC_1, Q5X, output3, X, 26, 0, Z), " & " 17 (BC_1, Q5, output3, X, 26, 0, Z), " & " 18 (BC_4, s5OEX, input, X), " & " 19 (BC_4, *, internal, X), " & " 20 (BC_4, *, internal, X), " & " 21 (BC_4, s4OEX, input, X), " & " 22 (BC_1, Q4, output3, X, 26, 0, Z), " & " 23 (BC_1, Q4X, output3, X, 26, 0, Z), " & " 24 (BC_1, Q3X, output3, X, 26, 0, Z), " & " 25 (BC_1, Q3, output3, X, 26, 0, Z), " & " 26 (BC_1, *, control, 0), " & " 27 (BC_4, s3OEX, input, X), " & " 28 (BC_4, OMODE, input, X), " & " 29 (BC_4, s2OEX, input, X), " & " 30 (BC_1, Q2, output3, X, 26, 0, Z), " & " 31 (BC_1, Q2X, output3, X, 26, 0, Z), " & " 32 (BC_1, Q1X, output3, X, 26, 0, Z), " & " 33 (BC_1, Q1, output3, X, 26, 0, Z), " & " 34 (BC_4, s1OEX, input, X), " & " 35 (BC_1, LOCK, output3, X, 26, 0, Z) " ; end IDT5T9891_R1;