------------------------------------------------------------------------ -- A T M E L A R M M I C R O C O N T R O L L E R S -- ------------------------------------------------------------------------ -- BSDL file -- -- File Name: AT91M42800A_BGA.BSD -- File Revision: 1.2 -- Date created: 2002-10-07 -- Created by: Atmel Corporation -- File Status: Released -- -- Device: AT91M42800A -- Package: BGA 144 -- -- Visit http://www.atmel.com for a updated list of BSDL files. -- ------------------------------------------------------------------------ -- Syntax and Semantics are checked against the IEEE 1149.1 standard. -- -- The logical functioning of the standard Boundary-Scan instructions -- -- and of the associated bypass, idcode and boundary-scan register -- -- described in this BSDL file has been verified against its related -- -- silicon by JTAG Technologies B.V. -- ------------------------------------------------------------------------ ------------------------------------------------------------------------ -- IMPORTANT NOTICE -- -- -- -- Copyright 2002 Atmel Corporation. All Rights Reserved. -- -- -- -- Atmel assumes no responsibility or liability arising out -- -- this application or use of any information described herein -- -- except as expressly agreed to in writing by Atmel Corporation. -- -- -- -- ------------------------------------------------------------------ -- -- This BSDL File has been verified on severals BSDL Syntax -- -- Checker/Compilers -- -- -- -- -- -- AGILENT 3070 BSDL COMPILER on Mon Jun 16 10:07:27 MDT 2003. -- -- BSDL File AT91M42800A_BGA.bsd, package BGA_144 compiled -- -- successfully. 0 ERRORS, 0 WARNINGS, OBJECT PRODUCED -- -- -- -- RS JTAG Technologies (www.jtag.com) -- -- -- -- ScanWorks from Asset-Intertech (www.asset-intertech.com) -- -- -- -- onTAP Boundary Scan Test Software (www.flynn.com) -- ------------------------------------------------------------------------ entity at56544a is generic (PHYSICAL_PIN_MAP: string := "BGA_144"); port ( MODE1 : in bit; NRST : in bit; NTRST : in bit; NWAIT : in bit; TCK : in bit; TDI : in bit; MODE0 : in bit; TMS : in bit; A_1 : out bit; A_10 : out bit; A_11 : out bit; A_12 : out bit; A_13 : out bit; A_14 : out bit; A_15 : out bit; A_16 : out bit; A_17 : out bit; A_18 : out bit; A_19 : out bit; A_2 : out bit; A_3 : out bit; A_4 : out bit; A_5 : out bit; A_6 : out bit; A_7 : out bit; A_8 : out bit; A_9 : out bit; D_0 : inout bit; D_1 : inout bit; D_10 : inout bit; D_11 : inout bit; D_12 : inout bit; D_13 : inout bit; D_14 : inout bit; D_15 : inout bit; D_2 : inout bit; D_3 : inout bit; D_4 : inout bit; D_5 : inout bit; D_6 : inout bit; D_7 : inout bit; D_8 : inout bit; D_9 : inout bit; NCS0 : out bit; NCS1 : out bit; NLBA0 : out bit; NOENRD : inout bit; NUBNWR1 : inout bit; NWENWR0 : inout bit; PA0IRQ0 : inout bit; PA10RXD1 : inout bit; PA11SPCKA : inout bit; PA12MISOA : inout bit; PA13MOSIA : inout bit; PA14NPCSA0 : inout bit; PA15NPCSA1 : inout bit; PA16NPCSA2 : inout bit; PA17NPCSA3 : inout bit; PA18SPCKB : inout bit; PA19MISOB : inout bit; PA1IRQ1 : inout bit; PA20MOSIB : inout bit; PA21NPCSB0 : inout bit; PA22NPCSB1 : inout bit; PA23NPCSB2 : inout bit; PA24NPCSB3 : inout bit; PA25MCKO : inout bit; PA26 : inout bit; PA27BMS : inout bit; PA28 : inout bit; PA29PME : inout bit; PA2IRQ2 : inout bit; PA3IRQ3 : inout bit; PA4FIQ : inout bit; PA5SCK0 : inout bit; PA6TXD0 : inout bit; PA7RXD0 : inout bit; PA8SCK1 : inout bit; PA9TXD1NTRI : inout bit; PB0NCS2 : inout bit; PB10TIOA1 : inout bit; PB11TIOB1 : inout bit; PB12TCLK2 : inout bit; PB13TIOA2 : inout bit; PB14TIOB2 : inout bit; PB15TCLK3 : inout bit; PB16TIOA3 : inout bit; PB17TIOB3 : inout bit; PB18TCLK4 : inout bit; PB19TIOA4 : inout bit; PB1NCS3 : inout bit; PB20TIOB4 : inout bit; PB21TCLK5 : inout bit; PB22TIOA5 : inout bit; PB23TIOB5 : inout bit; PB2A20CS7 : inout bit; PB3A21CS6 : inout bit; PB4A22CS5 : inout bit; PB5A23CS4 : inout bit; PB6TCLK0 : inout bit; PB7TIOA0 : inout bit; PB8TIOB0 : inout bit; PB9TCLK1 : inout bit; NWDOVF : out bit; TDO : out bit; PLLRCA : linkage bit; PLLRCB : linkage bit; XIN : linkage bit; XOUT : linkage bit; GND : linkage bit_vector (1 to 17); VDDCORE : linkage bit_vector (1 to 4); VDDIO : linkage bit_vector (1 to 12); VDDPLL : linkage bit_vector (1 to 2) ); use STD_1149_1_1994.all; attribute COMPONENT_CONFORMANCE of at56544a: entity is "STD_1149_1_1993"; attribute PIN_MAP of at56544a: entity is PHYSICAL_PIN_MAP; constant BGA_144 : PIN_MAP_STRING := "MODE1: D9,"& "NRST: C6,"& "NTRST: E8,"& "NWAIT: D4,"& "PLLRCA: A7,"& "PLLRCB: A5,"& "TCK: D7,"& "TDI: C7,"& "MODE0: A11,"& "TMS: D8,"& "XIN: A10,"& "A_1: C2,"& "A_10: F4,"& "A_11: G3,"& "A_12: F2,"& "A_13: G4,"& "A_14: H4,"& "A_15: H3,"& "A_16: G2,"& "A_17: G1,"& "A_18: H1,"& "A_19: H5,"& "A_2: D1,"& "A_3: D2,"& "A_4: D3,"& "A_5: E4,"& "A_6: E3,"& "A_7: E1,"& "A_8: F1,"& "A_9: F3,"& "D_0: J2,"& "D_1: K1,"& "D_10: K5,"& "D_11: M4,"& "D_12: M5,"& "D_13: L6,"& "D_14: K6,"& "D_15: J6,"& "D_2: L2,"& "D_3: L1,"& "D_4: M1,"& "D_5: L3,"& "D_6: M2,"& "D_7: M3,"& "D_8: L4,"& "D_9: K4,"& "NCS0: A2,"& "NCS1: A3,"& "NLBA0: C1,"& "NOENRD: C4,"& "NUBNWR1: B1,"& "NWENWR0: B4,"& "PA0IRQ0: J11,"& "PA10RXD1: G10,"& "PA11SPCKA: F11,"& "PA12MISOA: F9,"& "PA13MOSIA: E9,"& "PA14NPCSA0: F12,"& "PA15NPCSA1: F10,"& "PA16NPCSA2: E10,"& "PA17NPCSA3: E12,"& "PA18SPCKB: D12,"& "PA19MISOB: B10,"& "PA1IRQ1: J12,"& "PA20MOSIB: C12,"& "PA21NPCSB0: D11,"& "PA22NPCSB1: A12,"& "PA23NPCSB2: B12,"& "PA24NPCSB3: B11,"& "PA25MCKO: D10,"& "PA26: B9,"& "PA27BMS: C9,"& "PA28: D6,"& "PA29PME: D5,"& "PA2IRQ2: J10,"& "PA3IRQ3: J9,"& "PA4FIQ: H10,"& "PA5SCK0: H12,"& "PA6TXD0: H9,"& "PA7RXD0: G12,"& "PA8SCK1: G11,"& "PA9TXD1NTRI: G9,"& "PB0NCS2: 141,"& "PB10TIOA1: J8,"& "PB11TIOB1: K9,"& "PB12TCLK2: M7,"& "PB13TIOA2: K8,"& "PB14TIOB2: M9,"& "PB15TCLK3: M8,"& "PB16TIOA3: K11,"& "PB17TIOB3: L9,"& "PB18TCLK4: M10,"& "PB19TIOA4: M11,"& "PB1NCS3: A1,"& "PB20TIOB4: L11,"& "PB21TCLK5: M12,"& "PB22TIOA5: L12,"& "PB23TIOB5: K12,"& "PB2A20CS7: J5,"& "PB3A21CS6: J4,"& "PB4A22CS5: J3,"& "PB5A23CS4: J1,"& "PB6TCLK0: J7,"& "PB7TIOA0: M6,"& "PB8TIOB0: L7,"& "PB9TCLK1: K7,"& "NWDOVF: B8,"& "TDO: B6,"& "XOUT: A9,"& "GND: (A4, A6, A8, E5, E6, E7, F5, F6,"& " F7, F8, G5, G6, G7, G8, H6, H7, H8),"& "VDDCORE: (B3, C11, K2, L10),"& "VDDIO: (C3, C5, C8, C10, E2, E11, H2,"& " H11, K3, K10, L5, L8),"& "VDDPLL: (B5, B7)"; -- This section specifies the TAP ports. -- For the TAP TCK port, the parameters in the brackets are: -- First Field : Maximum TCK frequency. -- Second Field: Allowable states TCK may be stopped in. attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH); attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_RESET of NTRST: signal is true; -- Specifies the compliance enable patterns for the design. -- It lists a set of design ports and the values that they -- should be set to, in order to enable compliance to IEEE -- Std 1149.1 attribute COMPLIANCE_PATTERNS of at56544a: entity is "(MODE1 , MODE0) (10)"; -- Specifies the number of bits in the instruction register. attribute INSTRUCTION_LENGTH of at56544a: entity is 2; -- Specifies the boundary-scan instructions implemented in the -- design and their opcodes. attribute INSTRUCTION_OPCODE of at56544a: entity is "BYPASS (11), " & "EXTEST (00), " & "SAMPLE (01)"; -- Specifies the bit pattern that is loaded into the instruction -- register when the TAP controller passes through the Capture-IR -- state. The standard mandates that the two LSBs must be "01". -- The remaining bits are design specific. attribute INSTRUCTION_CAPTURE of at56544a: entity is "01"; -- This section specifies the test data register placed between TDI -- and TDO for each implemented instruction. attribute REGISTER_ACCESS of at56544a: entity is "BYPASS (BYPASS), " & "BOUNDARY (EXTEST, SAMPLE)"; -- Specifies the length of the boundary scan register. attribute BOUNDARY_LENGTH of at56544a: entity is 237; -- The following list specifies the characteristics of each cell -- in the boundary scan register from TDI to TDO. -- The following is a description of the label fields: -- num : Is the cell number. -- cell : Is the cell type as defined by the standard. -- port : Is the design port name. Control cells do not -- have a port name. -- function: Is the function of the cell as defined by the -- standard. Is one of input, output2, output3 , -- bidir, control or controlr. -- safe : Specifies the value that the BSR cell should be -- loaded with for safe operation when the software -- might otherwise choose a random value. -- ccell : The control cell number. Specifies the control -- cell that drives the output enable for this port. -- disval : Specifies the value that is loaded into the -- control cell to disable the output enable for -- the corresponding port. -- rslt : Resulting state. Shows the state of the driver -- when it is disabled. attribute BOUNDARY_REGISTER of at56544a: entity is -- -- num cell port function safe [ccell disval rslt] -- "236 (BC_1, *, controlr, 1), " & "235 (BC_4, PA26, input, X), " & "234 (BC_1, PA26, output3, X, 236, 1, Z), " & "233 (BC_1, *, controlr, 1), " & "232 (BC_1, NWDOVF, output3, X, 233, 1, Z), " & "231 (BC_1, *, controlr, 1), " & "230 (BC_4, PA27BMS, input, X), " & "229 (BC_1, PA27BMS, output3, X, 231, 1, Z), " & "228 (BC_4, NRST, input, X), " & "227 (BC_1, *, controlr, 1), " & "226 (BC_4, PA28, input, X), " & "225 (BC_1, PA28, output3, X, 227, 1, Z), " & "224 (BC_1, *, controlr, 1), " & "223 (BC_4, PA29PME, input, X), " & "222 (BC_1, PA29PME, output3, X, 224, 1, Z), " & "221 (BC_4, NWAIT, input, X), " & "220 (BC_1, *, controlr, 1), " & "219 (BC_4, NOENRD, input, X), " & "218 (BC_1, NOENRD, output3, X, 220, 1, Z), " & "217 (BC_4, NWENWR0, input, X), " & "216 (BC_1, NWENWR0, output3, X, 220, 1, Z), " & "215 (BC_4, NUBNWR1, input, X), " & "214 (BC_1, NUBNWR1, output3, X, 220, 1, Z), " & "213 (BC_1, *, controlr, 1), " & "212 (BC_1, NCS0, output3, X, 213, 1, Z), " & "211 (BC_1, NCS1, output3, X, 220, 1, Z), " & "210 (BC_1, *, controlr, 1), " & "209 (BC_4, PB0NCS2, input, X), " & "208 (BC_1, PB0NCS2, output3, X, 210, 1, Z), " & "207 (BC_1, *, controlr, 1), " & "206 (BC_4, PB1NCS3, input, X), " & "205 (BC_1, PB1NCS3, output3, X, 207, 1, Z), " & "204 (BC_1, *, controlr, 1), " & "203 (BC_1, NLBA0, output3, X, 204, 1, Z), " & "202 (BC_1, A_1, output3, X, 204, 1, Z), " & "201 (BC_1, A_2, output3, X, 204, 1, Z), " & "200 (BC_1, A_3, output3, X, 204, 1, Z), " & "199 (BC_1, *, controlr, 1), " & "198 (BC_1, A_4, output3, X, 199, 1, Z), " & "197 (BC_1, A_5, output3, X, 199, 1, Z), " & "196 (BC_1, A_6, output3, X, 199, 1, Z), " & "195 (BC_1, A_7, output3, X, 199, 1, Z), " & "194 (BC_1, *, controlr, 1), " & "193 (BC_1, A_8, output3, X, 194, 1, Z), " & "192 (BC_1, A_9, output3, X, 194, 1, Z), " & "191 (BC_1, A_10, output3, X, 194, 1, Z), " & "190 (BC_1, A_11, output3, X, 194, 1, Z), " & "189 (BC_1, *, controlr, 1), " & "188 (BC_1, A_12, output3, X, 189, 1, Z), " & "187 (BC_1, A_13, output3, X, 189, 1, Z), " & "186 (BC_1, A_14, output3, X, 189, 1, Z), " & "185 (BC_1, A_15, output3, X, 189, 1, Z), " & "184 (BC_1, *, controlr, 1), " & "183 (BC_1, A_16, output3, X, 184, 1, Z), " & "182 (BC_1, A_17, output3, X, 184, 1, Z), " & "181 (BC_1, A_18, output3, X, 184, 1, Z), " & "180 (BC_1, A_19, output3, X, 184, 1, Z), " & "179 (BC_1, *, controlr, 1), " & "178 (BC_4, PB2A20CS7, input, X), " & "177 (BC_1, PB2A20CS7, output3, X, 179, 1, Z), " & "176 (BC_1, *, controlr, 1), " & "175 (BC_4, PB3A21CS6, input, X), " & "174 (BC_1, PB3A21CS6, output3, X, 176, 1, Z), " & "173 (BC_1, *, controlr, 1), " & "172 (BC_4, PB4A22CS5, input, X), " & "171 (BC_1, PB4A22CS5, output3, X, 173, 1, Z), " & "170 (BC_1, *, controlr, 1), " & "169 (BC_4, PB5A23CS4, input, X), " & "168 (BC_1, PB5A23CS4, output3, X, 170, 1, Z), " & "167 (BC_1, *, controlr, 1), " & "166 (BC_4, D_0, input, X), " & "165 (BC_1, D_0, output3, X, 167, 1, Z), " & "164 (BC_4, D_1, input, X), " & "163 (BC_1, D_1, output3, X, 167, 1, Z), " & "162 (BC_4, D_2, input, X), " & "161 (BC_1, D_2, output3, X, 167, 1, Z), " & "160 (BC_4, D_3, input, X), " & "159 (BC_1, D_3, output3, X, 167, 1, Z), " & "158 (BC_1, *, controlr, 1), " & "157 (BC_4, D_4, input, X), " & "156 (BC_1, D_4, output3, X, 158, 1, Z), " & "155 (BC_4, D_5, input, X), " & "154 (BC_1, D_5, output3, X, 158, 1, Z), " & "153 (BC_4, D_6, input, X), " & "152 (BC_1, D_6, output3, X, 158, 1, Z), " & "151 (BC_4, D_7, input, X), " & "150 (BC_1, D_7, output3, X, 158, 1, Z), " & "149 (BC_1, *, controlr, 1), " & "148 (BC_4, D_8, input, X), " & "147 (BC_1, D_8, output3, X, 149, 1, Z), " & "146 (BC_4, D_9, input, X), " & "145 (BC_1, D_9, output3, X, 149, 1, Z), " & "144 (BC_4, D_10, input, X), " & "143 (BC_1, D_10, output3, X, 149, 1, Z), " & "142 (BC_4, D_11, input, X), " & "141 (BC_1, D_11, output3, X, 149, 1, Z), " & "140 (BC_1, *, controlr, 1), " & "139 (BC_4, D_12, input, X), " & "138 (BC_1, D_12, output3, X, 140, 1, Z), " & "137 (BC_4, D_13, input, X), " & "136 (BC_1, D_13, output3, X, 140, 1, Z), " & "135 (BC_4, D_14, input, X), " & "134 (BC_1, D_14, output3, X, 140, 1, Z), " & "133 (BC_4, D_15, input, X), " & "132 (BC_1, D_15, output3, X, 140, 1, Z), " & "131 (BC_1, *, controlr, 1), " & "130 (BC_4, PB6TCLK0, input, X), " & "129 (BC_1, PB6TCLK0, output3, X, 131, 1, Z), " & "128 (BC_1, *, controlr, 1), " & "127 (BC_4, PB7TIOA0, input, X), " & "126 (BC_1, PB7TIOA0, output3, X, 128, 1, Z), " & "125 (BC_1, *, controlr, 1), " & "124 (BC_4, PB8TIOB0, input, X), " & "123 (BC_1, PB8TIOB0, output3, X, 125, 1, Z), " & "122 (BC_1, *, controlr, 1), " & "121 (BC_4, PB9TCLK1, input, X), " & "120 (BC_1, PB9TCLK1, output3, X, 122, 1, Z), " & "119 (BC_1, *, controlr, 1), " & "118 (BC_4, PB10TIOA1, input, X), " & "117 (BC_1, PB10TIOA1, output3, X, 119, 1, Z), " & "116 (BC_1, *, controlr, 1), " & "115 (BC_4, PB11TIOB1, input, X), " & "114 (BC_1, PB11TIOB1, output3, X, 116, 1, Z), " & "113 (BC_1, *, controlr, 1), " & "112 (BC_4, PB12TCLK2, input, X), " & "111 (BC_1, PB12TCLK2, output3, X, 113, 1, Z), " & "110 (BC_1, *, controlr, 1), " & "109 (BC_4, PB13TIOA2, input, X), " & "108 (BC_1, PB13TIOA2, output3, X, 110, 1, Z), " & "107 (BC_1, *, controlr, 1), " & "106 (BC_4, PB14TIOB2, input, X), " & "105 (BC_1, PB14TIOB2, output3, X, 107, 1, Z), " & "104 (BC_1, *, controlr, 1), " & "103 (BC_4, PB15TCLK3, input, X), " & "102 (BC_1, PB15TCLK3, output3, X, 104, 1, Z), " & "101 (BC_1, *, controlr, 1), " & "100 (BC_4, PB16TIOA3, input, X), " & "99 (BC_1, PB16TIOA3, output3, X, 101, 1, Z), " & "98 (BC_1, *, controlr, 1), " & "97 (BC_4, PB17TIOB3, input, X), " & "96 (BC_1, PB17TIOB3, output3, X, 98, 1, Z), " & "95 (BC_1, *, controlr, 1), " & "94 (BC_4, PB18TCLK4, input, X), " & "93 (BC_1, PB18TCLK4, output3, X, 95, 1, Z), " & "92 (BC_1, *, controlr, 1), " & "91 (BC_4, PB19TIOA4, input, X), " & "90 (BC_1, PB19TIOA4, output3, X, 92, 1, Z), " & "89 (BC_1, *, controlr, 1), " & "88 (BC_4, PB20TIOB4, input, X), " & "87 (BC_1, PB20TIOB4, output3, X, 89, 1, Z), " & "86 (BC_1, *, controlr, 1), " & "85 (BC_4, PB21TCLK5, input, X), " & "84 (BC_1, PB21TCLK5, output3, X, 86, 1, Z), " & "83 (BC_1, *, controlr, 1), " & "82 (BC_4, PB22TIOA5, input, X), " & "81 (BC_1, PB22TIOA5, output3, X, 83, 1, Z), " & "80 (BC_1, *, controlr, 1), " & "79 (BC_4, PB23TIOB5, input, X), " & "78 (BC_1, PB23TIOB5, output3, X, 80, 1, Z), " & "77 (BC_1, *, controlr, 1), " & "76 (BC_4, PA0IRQ0, input, X), " & "75 (BC_1, PA0IRQ0, output3, X, 77, 1, Z), " & "74 (BC_1, *, controlr, 1), " & "73 (BC_4, PA1IRQ1, input, X), " & "72 (BC_1, PA1IRQ1, output3, X, 74, 1, Z), " & "71 (BC_1, *, controlr, 1), " & "70 (BC_4, PA2IRQ2, input, X), " & "69 (BC_1, PA2IRQ2, output3, X, 71, 1, Z), " & "68 (BC_1, *, controlr, 1), " & "67 (BC_4, PA3IRQ3, input, X), " & "66 (BC_1, PA3IRQ3, output3, X, 68, 1, Z), " & "65 (BC_1, *, controlr, 1), " & "64 (BC_4, PA4FIQ, input, X), " & "63 (BC_1, PA4FIQ, output3, X, 65, 1, Z), " & "62 (BC_1, *, controlr, 1), " & "61 (BC_4, PA5SCK0, input, X), " & "60 (BC_1, PA5SCK0, output3, X, 62, 1, Z), " & "59 (BC_1, *, controlr, 1), " & "58 (BC_4, PA6TXD0, input, X), " & "57 (BC_1, PA6TXD0, output3, X, 59, 1, Z), " & "56 (BC_1, *, controlr, 1), " & "55 (BC_4, PA7RXD0, input, X), " & "54 (BC_1, PA7RXD0, output3, X, 56, 1, Z), " & "53 (BC_1, *, controlr, 1), " & "52 (BC_4, PA8SCK1, input, X), " & "51 (BC_1, PA8SCK1, output3, X, 53, 1, Z), " & "50 (BC_1, *, controlr, 1), " & "49 (BC_4, PA9TXD1NTRI, input, X), " & "48 (BC_1, PA9TXD1NTRI, output3, X, 50, 1, Z), " & "47 (BC_1, *, controlr, 1), " & "46 (BC_4, PA10RXD1, input, X), " & "45 (BC_1, PA10RXD1, output3, X, 47, 1, Z), " & "44 (BC_1, *, controlr, 1), " & "43 (BC_4, PA11SPCKA, input, X), " & "42 (BC_1, PA11SPCKA, output3, X, 44, 1, Z), " & "41 (BC_1, *, controlr, 1), " & "40 (BC_4, PA12MISOA, input, X), " & "39 (BC_1, PA12MISOA, output3, X, 41, 1, Z), " & "38 (BC_1, *, controlr, 1), " & "37 (BC_4, PA13MOSIA, input, X), " & "36 (BC_1, PA13MOSIA, output3, X, 38, 1, Z), " & "35 (BC_1, *, controlr, 1), " & "34 (BC_4, PA14NPCSA0, input, X), " & "33 (BC_1, PA14NPCSA0, output3, X, 35, 1, Z), " & "32 (BC_1, *, controlr, 1), " & "31 (BC_4, PA15NPCSA1, input, X), " & "30 (BC_1, PA15NPCSA1, output3, X, 32, 1, Z), " & "29 (BC_1, *, controlr, 1), " & "28 (BC_4, PA16NPCSA2, input, X), " & "27 (BC_1, PA16NPCSA2, output3, X, 29, 1, Z), " & "26 (BC_1, *, controlr, 1), " & "25 (BC_4, PA17NPCSA3, input, X), " & "24 (BC_1, PA17NPCSA3, output3, X, 26, 1, Z), " & "23 (BC_1, *, controlr, 1), " & "22 (BC_4, PA18SPCKB, input, X), " & "21 (BC_1, PA18SPCKB, output3, X, 23, 1, Z), " & "20 (BC_1, *, controlr, 1), " & "19 (BC_4, PA19MISOB, input, X), " & "18 (BC_1, PA19MISOB, output3, X, 20, 1, Z), " & "17 (BC_1, *, controlr, 1), " & "16 (BC_4, PA20MOSIB, input, X), " & "15 (BC_1, PA20MOSIB, output3, X, 17, 1, Z), " & "14 (BC_1, *, controlr, 1), " & "13 (BC_4, PA21NPCSB0, input, X), " & "12 (BC_1, PA21NPCSB0, output3, X, 14, 1, Z), " & "11 (BC_1, *, controlr, 1), " & "10 (BC_4, PA22NPCSB1, input, X), " & "9 (BC_1, PA22NPCSB1, output3, X, 11, 1, Z), " & "8 (BC_1, *, controlr, 1), " & "7 (BC_4, PA23NPCSB2, input, X), " & "6 (BC_1, PA23NPCSB2, output3, X, 8, 1, Z), " & "5 (BC_1, *, controlr, 1), " & "4 (BC_4, PA24NPCSB3, input, X), " & "3 (BC_1, PA24NPCSB3, output3, X, 5, 1, Z), " & "2 (BC_1, *, controlr, 1), " & "1 (BC_4, PA25MCKO, input, X), " & "0 (BC_1, PA25MCKO, output3, X, 2, 1, Z) "; end at56544a;