--------------------------------------------------------------------- -- -- BCM5482 BSDL -- -- -- Revision : A1 -- -- Package : 121 BGA -- -- Date : October 12, 2006 -- --------------------------------------------------------------------- entity bcm5482 is generic (PHYSICAL_PIN_MAP : string := "BGA_121"); port ( PAD_gtx_clk : in bit_vector(1 to 2); PAD_mdc : in bit_vector(1 to 2); PAD_reset_n : in bit; PAD_test : in bit_vector(0 to 1); PAD_test_pt : in bit_vector(0 to 1); PAD_tx_en : in bit_vector(1 to 2); PAD_txd1 : in bit_vector(0 to 3); PAD_txd2 : in bit_vector(0 to 3); PAD_clk125 : inout bit; PAD_ledb1 : inout bit_vector(1 to 2); PAD_ledb2 : inout bit_vector(1 to 2); PAD_mdio : inout bit_vector(1 to 2); PAD_phya : inout bit_vector(0 to 4); PAD_rx_dv : inout bit_vector(1 to 2); PAD_rxc : inout bit_vector(1 to 2); PAD_rxd1 : inout bit_vector(0 to 3); PAD_rxd2 : inout bit_vector(0 to 3); PAD_tck : in bit; PAD_tdi : in bit; PAD_tms : in bit; PAD_trstb : in bit; PAD_tdo : out bit; PAD_srxdn : in bit_vector(1 to 4); PAD_srxdp : in bit_vector(1 to 4); PAD_stxcn : buffer bit_vector(1 to 2); PAD_stxcp : buffer bit_vector(1 to 2); PAD_stxdn : buffer bit_vector(1 to 4); PAD_stxdp : buffer bit_vector(1 to 4); PAD_interf_sel : linkage bit_vector(0 to 3); PAD_tdn1_0 : linkage bit; PAD_tdn1_1 : linkage bit; PAD_tdn1_2 : linkage bit; PAD_tdn1_3 : linkage bit; PAD_tdp1_0 : linkage bit; PAD_tdp1_1 : linkage bit; PAD_tdp1_2 : linkage bit; PAD_tdp1_3 : linkage bit; PAD_tdn2_0 : linkage bit; PAD_tdn2_1 : linkage bit; PAD_tdn2_2 : linkage bit; PAD_tdn2_3 : linkage bit; PAD_tdp2_0 : linkage bit; PAD_tdp2_1 : linkage bit; PAD_tdp2_2 : linkage bit; PAD_tdp2_3 : linkage bit; PAD_serplldvdd : linkage bit; PAD_serplldvss : linkage bit; PAD_xtali : linkage bit; PAD_xtalo : linkage bit; PAD_xtalvdd : linkage bit; PAD_stvcoi : linkage bit; PAD_seravddt12 : linkage bit; PAD_seravddt25 : linkage bit; PAD_sergnd : linkage bit; PAD_pllagnd : linkage bit; PAD_pllavdd : linkage bit; PAD_tvcoi : linkage bit; CORE_VDD : linkage bit; CORE_VSS : linkage bit; OGND : linkage bit; OVDD1 : linkage bit; OVDD2 : linkage bit; PVDD : linkage bit; PAD_agnd0_0 : linkage bit; PAD_avddh0_0 : linkage bit; PAD_avddl0_0 : linkage bit; PAD_bavdd_0 : linkage bit; PAD_roc_flrdp : linkage bit; PAD_roc_flrdn : linkage bit; PAD_roc_fltdp : linkage bit; PAD_roc_fltdn : linkage bit; PAD_reg_sense : linkage bit_vector(1 to 2); PAD_reg_supply : linkage bit_vector(1 to 2); PAD_hstl_vref : linkage bit; PAD_rdac1 : linkage bit; PAD_vpp_otp_rom : linkage bit ); use STD_1149_1_2001.all; use STD_1149_6_2003.all; -- Component Conformance Statement attribute COMPONENT_CONFORMANCE of bcm5482 : entity is "STD_1149_1_2001"; -- Device Package Pin Mappings attribute PIN_MAP of bcm5482 : entity is PHYSICAL_PIN_MAP; constant BGA_121: PIN_MAP_STRING := "PAD_gtx_clk : (C1, C11)," & "PAD_interf_sel : (H5, H4, G5, G6)," & "PAD_mdc : (F11, G11)," & "PAD_reset_n : G10," & "PAD_test : (F8, F9)," & "PAD_test_pt : (F4, G4)," & "PAD_tx_en : (D5, D8)," & "PAD_txd1 : (C5, C4, C3, C2)," & "PAD_txd2 : (D10, D9, C9, C10)," & "PAD_clk125 : E3," & "PAD_ledb1 : (H7, H8)," & "PAD_ledb2 : (H9, H10)," & "PAD_mdio : (E10, F10)," & "PAD_phya : (J9, H11, J11, K11, L11)," & "PAD_rx_dv : (D2, E8)," & "PAD_rxc : (D1, D11)," & "PAD_rxd1 : (E4, E5, D4, D3)," & "PAD_rxd2 : (C7, C8, D7, E7)," & "PAD_tck : F7," & "PAD_tdi : G8," & "PAD_tms : G7," & "PAD_trstb : H6," & "PAD_tdo : G9," & "PAD_srxdn : (B1, B7, B3, B9)," & "PAD_srxdp : (A1, A7, A3, A9)," & "PAD_stxcn : (B4, B10)," & "PAD_stxcp : (A4, A10)," & "PAD_stxdn : (B5, B11, B2, B8)," & "PAD_stxdp : (A5, A11, A2, A8)," & "PAD_tdn1_0 : L3," & "PAD_tdn1_1 : L4," & "PAD_tdn1_2 : L5," & "PAD_tdn1_3 : L6," & "PAD_tdp1_0 : K3," & "PAD_tdp1_1 : K4," & "PAD_tdp1_2 : K5," & "PAD_tdp1_3 : K6," & "PAD_tdn2_0 : L10," & "PAD_tdn2_1 : L9," & "PAD_tdn2_2 : L8," & "PAD_tdn2_3 : L7," & "PAD_tdp2_0 : K10," & "PAD_tdp2_1 : K9," & "PAD_tdp2_2 : K8," & "PAD_tdp2_3 : K7," & "PAD_serplldvdd : E6," & "PAD_serplldvss : D6," & "PAD_xtali : A6," & "PAD_xtalo : B6," & "PAD_xtalvdd : C6," & "PAD_stvcoi : F6," & "PAD_seravddt12 : J3," & "PAD_seravddt25 : J6," & "PAD_sergnd : J4," & "PAD_pllagnd : G2," & "PAD_pllavdd : H1," & "PAD_tvcoi : H2," & "CORE_VDD : G1," & "CORE_VSS : H3," & "OGND : J5," & "OVDD1 : E11," & "OVDD2 : G3," & "PVDD : F3," & "PAD_agnd0_0 : J8," & "PAD_avddh0_0 : J10," & "PAD_avddl0_0 : J7," & "PAD_bavdd_0 : L2," & "PAD_roc_flrdp : J1," & "PAD_roc_flrdn : J2," & "PAD_roc_fltdp : K1," & "PAD_roc_fltdn : K2," & "PAD_reg_sense : (E2, F2)," & "PAD_reg_supply : (E1, F1)," & "PAD_rdac1 : L1," & "PAD_hstl_vref : F5," & "PAD_vpp_otp_rom: E9 " ; -- Grouped Port Identification attribute PORT_GROUPING of bcm5482 : entity is "DIFFERENTIAL_VOLTAGE (" & "(PAD_srxdp(1) , PAD_srxdn(1)) ," & "(PAD_srxdp(2) , PAD_srxdn(2)) ," & "(PAD_srxdp(3) , PAD_srxdn(3)) ," & "(PAD_srxdp(4) , PAD_srxdn(4)) ," & "(PAD_stxcp(1) , PAD_stxcn(1)) ," & "(PAD_stxcp(2) , PAD_stxcn(2)) ," & "(PAD_stxdp(1) , PAD_stxdn(1)) ," & "(PAD_stxdp(2) , PAD_stxdn(2)) ," & "(PAD_stxdp(3) , PAD_stxdn(3)) ," & "(PAD_stxdp(4) , PAD_stxdn(4)) )" ; -- Scan Port Identification attribute TAP_SCAN_RESET of PAD_trstb : signal is true; attribute TAP_SCAN_IN of PAD_tdi : signal is true; attribute TAP_SCAN_MODE of PAD_tms : signal is true; attribute TAP_SCAN_OUT of PAD_tdo : signal is true; attribute TAP_SCAN_CLOCK of PAD_tck : signal is (5.0e+6, BOTH); -- Instruction Register Description attribute INSTRUCTION_LENGTH of bcm5482: entity is 11; attribute INSTRUCTION_OPCODE of bcm5482: entity is "BYPASS (11111111111)," & "IDCODE (00000000001)," & "PRELOAD (00000000010)," & "SAMPLE (00000000010)," & "HIGHZ (00000000011)," & "CLAMP (00000000100)," & "EXTEST (00000000000, 00000000101)," & -- IEEE Std 1149.6 "EXTEST_PULSE (00000000110)," & "EXTEST_TRAIN (00000000111)," & -- User "PriInsVendorDebug_0 (10000000000) "; attribute INSTRUCTION_CAPTURE of bcm5482: entity is "00000000001"; attribute INSTRUCTION_PRIVATE of bcm5482: entity is "PriInsVendorDebug_0"; -- Device ID register attribute IDCODE_REGISTER of bcm5482: entity is --!# "0001" & -- Version (4 bits) "0010" & -- Version (4 bits) "0101010010000010" & -- Part number (16 bits) "00010111111" & -- Manufacturer code (11 bits) "1"; -- Mandatory LSB (1 bit) -- Register Access Description attribute REGISTER_ACCESS of bcm5482: entity is "BOUNDARY ( EXTEST_PULSE, EXTEST_TRAIN )," & "BYPASS ( HIGHZ, CLAMP ), " & "UDR[32] ( PriInsVendorDebug_0) " ; --Boundary Scan Register Description attribute BOUNDARY_LENGTH of bcm5482 : entity is 90; attribute BOUNDARY_REGISTER of bcm5482 : entity is -- num cell port function safe [ccell disval rslt] " 89 (BC_2 , * , control , 1 ),"& " 88 (BC_7 , PAD_rxd1(3) , bidir , X , 89 , 1 , Z ),"& " 87 (BC_2 , * , control , 1 ),"& " 86 (BC_7 , PAD_rxd1(2) , bidir , X , 87 , 1 , Z ),"& " 85 (BC_2 , * , control , 1 ),"& " 84 (BC_7 , PAD_rxd1(1) , bidir , X , 85 , 1 , Z ),"& " 83 (BC_2 , * , control , 1 ),"& " 82 (BC_7 , PAD_rxd1(0) , bidir , X , 83 , 1 , Z ),"& " 81 (BC_2 , * , control , 1 ),"& " 80 (BC_7 , PAD_phya(4) , bidir , X , 81 , 1 , Z ),"& " 79 (BC_2 , * , control , 1 ),"& " 78 (BC_7 , PAD_phya(3) , bidir , X , 79 , 1 , Z ),"& " 77 (BC_2 , * , control , 1 ),"& " 76 (BC_7 , PAD_phya(2) , bidir , X , 77 , 1 , Z ),"& " 75 (BC_2 , * , control , 1 ),"& " 74 (BC_7 , PAD_phya(1) , bidir , X , 75 , 1 , Z ),"& " 73 (BC_2 , * , control , 1 ),"& " 72 (BC_7 , PAD_phya(0) , bidir , X , 73 , 1 , Z ),"& " 71 (BC_2 , * , internal , X ),"& " 70 (BC_4 , * , internal , X ),"& " 69 (BC_2 , * , internal , X ),"& " 68 (BC_4 , * , internal , X ),"& " 67 (BC_2 , * , internal , X ),"& " 66 (BC_4 , * , internal , X ),"& " 65 (BC_2 , * , internal , X ),"& " 64 (BC_4 , * , internal , X ),"& " 63 (BC_2 , * , control , 1 ),"& " 62 (BC_7 , PAD_ledb2(2) , bidir , X , 63 , 1 , Z ),"& " 61 (BC_2 , * , control , 1 ),"& " 60 (BC_7 , PAD_ledb2(1) , bidir , X , 61 , 1 , Z ),"& " 59 (BC_2 , * , control , 1 ),"& " 58 (BC_7 , PAD_ledb1(2) , bidir , X , 59 , 1 , Z ),"& " 57 (BC_2 , * , control , 1 ),"& " 56 (BC_7 , PAD_ledb1(1) , bidir , X , 57 , 1 , Z ),"& " 55 (BC_4 , PAD_reset_n , observe_only , X ),"& " 54 (BC_4 , PAD_test(0) , observe_only , X ),"& " 53 (BC_4 , PAD_test(1) , observe_only , X ),"& " 52 (BC_4 , PAD_test_pt(0), observe_only , X ),"& " 51 (BC_4 , PAD_test_pt(1), observe_only , X ),"& " 50 (BC_2 , * , control , 1 ),"& " 49 (BC_7 , PAD_mdio(2) , bidir , X , 50 , 1 , Z ),"& " 48 (BC_4 , PAD_mdc(2) , observe_only , X ),"& " 47 (BC_2 , * , control , 1 ),"& " 46 (BC_7 , PAD_mdio(1) , bidir , X , 47 , 1 , Z ),"& " 45 (BC_4 , PAD_mdc(1) , observe_only , X ),"& " 44 (BC_2 , * , control , 1 ),"& " 43 (BC_7 , PAD_clk125 , bidir , X , 44 , 1 , Z ),"& " 42 (BC_4 , PAD_txd2(0) , observe_only , X ),"& " 41 (BC_4 , PAD_txd2(1) , observe_only , X ),"& " 40 (BC_4 , PAD_txd2(2) , observe_only , X ),"& " 39 (BC_4 , PAD_txd2(3) , observe_only , X ),"& " 38 (BC_4 , PAD_tx_en(2) , observe_only , X ),"& " 37 (BC_4 , PAD_gtx_clk(2), observe_only , X ),"& " 36 (BC_2 , * , control , 1 ),"& " 35 (BC_7 , PAD_rxc(2) , bidir , X , 36 , 1 , Z ),"& " 34 (BC_2 , * , control , 1 ),"& " 33 (BC_7 , PAD_rx_dv(2) , bidir , X , 34 , 1 , Z ),"& " 32 (BC_2 , * , control , 1 ),"& " 31 (BC_7 , PAD_rxd2(3) , bidir , X , 32 , 1 , Z ),"& " 30 (BC_2 , * , control , 1 ),"& " 29 (BC_7 , PAD_rxd2(2) , bidir , X , 30 , 1 , Z ),"& " 28 (BC_2 , * , control , 1 ),"& " 27 (BC_7 , PAD_rxd2(1) , bidir , X , 28 , 1 , Z ),"& " 26 (BC_2 , * , control , 1 ),"& " 25 (BC_7 , PAD_rxd2(0) , bidir , X , 26 , 1 , Z ),"& " 24 (BC_4 , PAD_txd1(0) , observe_only , X ),"& " 23 (BC_4 , PAD_txd1(1) , observe_only , X ),"& " 22 (BC_4 , PAD_txd1(2) , observe_only , X ),"& " 21 (BC_4 , PAD_txd1(3) , observe_only , X ),"& " 20 (BC_4 , PAD_tx_en(1) , observe_only , X ),"& " 19 (BC_4 , PAD_gtx_clk(1), observe_only , X ),"& " 18 (BC_2 , * , control , 1 ),"& " 17 (BC_7 , PAD_rxc(1) , bidir , X , 18 , 1 , Z ),"& " 16 (BC_2 , * , control , 1 ),"& " 15 (BC_7 , PAD_rx_dv(1) , bidir , X , 16 , 1 , Z ),"& " 14 (BC_4 , * , internal , X ),"& " 13 (BC_4 , PAD_srxdp(1) , observe_only , X ),"& " 12 (BC_4 , PAD_srxdn(1) , observe_only , X ),"& " 11 (AC_1 , PAD_stxcp(1) , output2 , X ),"& " 10 (AC_1 , PAD_stxdp(1) , output2 , X ),"& " 9 (BC_4 , PAD_srxdp(2) , observe_only , X ),"& " 8 (BC_4 , PAD_srxdn(2) , observe_only , X ),"& " 7 (AC_1 , PAD_stxcp(2) , output2 , X ),"& " 6 (AC_1 , PAD_stxdp(2) , output2 , X ),"& " 5 (BC_4 , PAD_srxdp(3) , observe_only , X ),"& " 4 (BC_4 , PAD_srxdn(3) , observe_only , X ),"& " 3 (AC_1 , PAD_stxdp(3) , output2 , X ),"& " 2 (BC_4 , PAD_srxdp(4) , observe_only , X ),"& " 1 (BC_4 , PAD_srxdn(4) , observe_only , X ),"& " 0 (AC_1 , PAD_stxdp(4) , output2 , X ) "; -- Advanced I/O Description attribute AIO_COMPONENT_CONFORMANCE of bcm5482 : entity is "STD_1149_6_2003"; attribute AIO_EXTEST_Pulse_Execution of bcm5482 : entity is "Wait_Duration PAD_tck 16"; attribute AIO_EXTEST_Train_Execution of bcm5482 : entity is "train 16"; attribute AIO_PIN_BEHAVIOR of bcm5482 : entity is "PAD_srxdp : LP_time=1.5e-8 HP_time=4.5e-7 On_Chip; " & "PAD_stxcp; " & "PAD_stxdp " ; end bcm5482;