-- Boundary Scan Description Language (BSDL) for MITEL MT90500 IC -- File name : MT90500.bsd -- DEVICE : MITEL MT90500 Multi-Channel AAL1 SAR -- BSDL revision : STD_1149_1_1990 -- Date created : 96/Dec/13 -- Last updated : 97/Nov/21 GAJ -- Documentation : MT90500 Data Sheet, and Programmer's Guide. -- Packages : 240 pins PQFP -- -- IMPORTANT NOTICE -- -- MITEL and MT90500 are trademarks of MITEL Corporation. MITEL products, -- marketed under trademarks are protected under numerous US and foreign -- patents and pending applications, maskwork rights, and copyrights. -- -- MITEL reserves the right to make changes to any products and services -- at any time without notice. MITEL assumes no responsibility or -- liability arising out of the application or use of any information, -- product, or service described herein except as expressly agreed to -- in writing by MITEL Corporation. MITEL customers are advised to obtain -- the latest version of device specifications before relying on any -- published information and before placing orders for products or services. entity MT90500 is generic (PHYSICAL_PIN_MAP : string := "PQFP"); port ( nrd_nds : in bit ; rdy_ndtack : out bit ; nwr_rw : in bit ; locx2 : inout bit ; corsigb : inout bit ; sec8k : inout bit ; clkx1 : inout bit ; fsync : inout bit ; clkx2po : inout bit ; clkx2pi : in bit ; clkx2no : out bit ; clkx2ni : linkage bit ; -- differential input, see clkx2pi ref8kclk : buffer bit ; pll16mclk : in bit ; ad : inout bit_vector (0 to 15); ncs : in bit ; a1 : in bit ; a2 : in bit ; a3 : inout bit ; a4 : inout bit ; a5 : inout bit ; a6 : inout bit ; a7 : inout bit ; a8 : inout bit ; a9 : inout bit ; a10 : inout bit ; a11 : in bit ; a12 : in bit ; a13 : in bit ; a14 : in bit ; a15 : inout bit ; aem : inout bit ; nmem_oe : buffer bit ; nmem_cs1h : buffer bit ; nmem_cs0h : buffer bit ; nmem_wr : buffer bit_vector (0 to 3); nmem_cs1l : buffer bit ; nmem_cs0l : buffer bit ; mem_dat : inout bit_vector (0 to 35); mem_add : buffer bit_vector (0 to 17); mem_clk : inout bit ; tms : in bit ; tdo : out bit ; tdi : in bit ; trstn : in bit ; tck : in bit ; ntristate : in bit ; -- note: tristates all outputs iddtn : linkage bit ; -- note: powers down memories & pullups, not boundary-scanned mclk : in bit ; stxclk : in bit ; nint : out bit ; ex_8ka : in bit ; ptxclk : inout bit ; prxclk : in bit ; nreset : in bit ; stxdata : in bit_vector (0 to 7); stxsoc : in bit ; nstxen : in bit ; stxclav : buffer bit ; prxdata : in bit_vector (0 to 7); prxsoc : in bit ; nprxen : in bit ; prxclav : in bit ; ptxclav : in bit ; ptxsoc : buffer bit ; nptxen : buffer bit ; ptxpar : buffer bit ; ptxdata : buffer bit_vector (0 to 7); intel_nmotorola : in bit ; access_mode : in bit ; corsige : inout bit ; corsigd : inout bit ; corsigc : inout bit ; corsiga : inout bit ; frun : buffer bit ; nsfsync : in bit ; lsync : inout bit ; locsti : in bit ; locsto : buffer bit ; st : inout bit_vector (0 to 15); locx1 : inout bit ; GND_IO : linkage bit_vector(1 to 19); GND_CORE : linkage bit_vector(1 to 3); GND_RING : linkage bit_vector(1 to 5); VDD_3V_IO : linkage bit_vector(1 to 8); VDD_3V_CORE : linkage bit_vector(1 to 3); VDD_3V_RING : linkage bit_vector(1 to 5); VDD_5V_IO : linkage bit_vector(1 to 10) ) ; use STD_1149_1_1990.all; attribute PIN_MAP of MT90500 : entity is PHYSICAL_PIN_MAP ; constant PQFP : PIN_MAP_STRING := "locx1 : 3, st : ( 4, 5, 6, 8, 9, 10, 11, 12, 14, " & "15, 17, 18, 19, 22, 23, 25 ), locsto : 26, " & "locsti : 27, lsync : 28, nsfsync : 30, " & "frun : 31, corsiga : 32, corsigc : 33, " & "corsigd : 34, corsige : 35, access_mode : 36, " & "intel_nmotorola : 37, ptxdata : ( 38, 39, 44, 45, 46, 47, 48, 49 ), ptxpar : 50, " & "nptxen : 51, ptxsoc : 52, ptxclav : 53, " & "prxclav : 54, nprxen : 55, prxsoc : 56, " & "prxdata : ( 66, 65, 64, 63, 62, 59, 58, 57 ), stxclav : 67, nstxen : 68, " & "stxsoc : 69, stxdata : ( 77, 76, 75, 74, 73, 72, 71, 70 ), nreset : 78, " & "prxclk : 79, ptxclk : 82, ex_8ka : 83, " & "nint : 84, stxclk : 85, mclk : 87, " & "iddtn : 89, ntristate : 90, tck : 93, " & "trstn : 94, tdi : 95, tdo : 96, " & "tms : 97, mem_clk : 98, mem_add : ( 124, 125, 126, 127, 128, 130, 144, 146, " & "99, 102, 103, 115, 116, 117, 118, 121, 122, 123 )," & "mem_dat : ( 114, 113, 112, 109, 108, 107, 106, 105, 104, " & "143, 142, 138, 137, 136, 135, 134, 133, 131, " & "164, 162, 159, 158, 156, 155, 154, 153, 152, " & "175, 174, 173, 171, 170, 168, 167, 166, 165 ), " & "nmem_cs0l : 147, nmem_cs1l : 148, " & "nmem_wr : ( 150, 149, 179, 178 ), nmem_cs0h : 176, nmem_cs1h : 177, " & "nmem_oe : 180, aem : 184, a15 : 185, " & "a14 : 186, a13 : 187, a12 : 188, " & "a11 : 189, a10 : 190, a9 : 191, " & "a8 : 192, a7 : 193, a6 : 194, " & "a5 : 195, a4 : 196, a3 : 198, " & "a2 : 199, a1 : 202, ncs : 203, " & "ad : ( 204, 205, 206, 208, 209, 210, 211, 212, 214, " & "215, 216, 217, 218, 219, 222, 223 ), pll16mclk : 224, ref8kclk : 226, " & "clkx2ni : 227, clkx2no : 228, clkx2pi : 230, " & "clkx2po : 231, fsync : 232, clkx1 : 233, " & "sec8k : 234, corsigb : 235, locx2 : 236, " & "nwr_rw : 237, rdy_ndtack : 238, nrd_nds : 239, " & -- Power pins "GND_IO: (1, 7, 16, 29, 43, 61, 86, 91, 110, 119, 129, " & "139, 151, 163, 172, 182, 197, 213, 229 ), " & "GND_CORE: (100, 141, 161 ), " & "GND_RING: (20, 40, 80, 201, 221 ), " & "VDD_3V_IO: (92, 111, 120, 132, 145, 157, 169, 181 ), " & "VDD_3V_CORE: (101, 140, 160 ), " & "VDD_3V_RING: (21, 41, 81, 200, 220 ), " & "VDD_5V_IO: (2, 13, 24, 42, 60, 88, 183, 207, 225, 240 ) " ; attribute TAP_SCAN_IN of tdi : signal is true; attribute TAP_SCAN_OUT of tdo : signal is true; attribute TAP_SCAN_MODE of tms : signal is true; attribute TAP_SCAN_RESET of trstn : signal is true; attribute TAP_SCAN_CLOCK of tck : signal is ( 1.200000e+07, BOTH ); -- Compliance Enable description -- The nTRISTATE pin tristates all pins when low (including TDO). -- attribute COMPLIANCE PATTERNS of MT90500: entity is -- "(ntristate) (1) "; attribute INSTRUCTION_LENGTH of MT90500 : entity is 4; attribute INSTRUCTION_OPCODE of MT90500 : entity is "IDCODE (0101)," & ------ "RUNBIST (0011)," & "SAMPLE (0001)," & "BYPASS (1111)," & "EXTEST (0000)," & "highz (0111)," & "clamp (0110)," & "intest (0010)," & "rambista (0100)," & "rambistb (1000)," & "scan (1001)," & "bistselftest (1010)" ; attribute INSTRUCTION_CAPTURE of MT90500 : entity is "0001"; attribute INSTRUCTION_DISABLE of MT90500 : entity is "HIGHZ"; attribute INSTRUCTION_GUARD of MT90500 : entity is "CLAMP"; attribute INSTRUCTION_PRIVATE of MT90500 : entity is "bistselftest,scan,rambistb,rambista"; attribute IDCODE_REGISTER of MT90500 : entity is -- hex"0 0500 14B" "0000" & -- 4-bit version (0) "0000010100000000" & -- 16-bit part number (0x0500) "00010100101" & -- 11-bit manufacturer (Mitel) "1" ; -- mandatory LSB attribute REGISTER_ACCESS of MT90500 : entity is "LSI_SCAN[1] (scan)," & "IDCODE (IDCODE)," & "BOUNDARY (INTEST, SAMPLE, EXTEST)," & "BYPASS (CLAMP, HIGHZ, BYPASS)" ; attribute BOUNDARY_CELLS of MT90500 : entity is "BC_2, BC_1"; attribute BOUNDARY_LENGTH of MT90500 : entity is 316; attribute BOUNDARY_REGISTER of MT90500 : entity is -- num cell port function safe [ccell disval rslt] "0 ( BC_1, *, controlr, 1 ) ," & -- st0 enable "1 ( BC_1, *, controlr, 1 ) ," & -- st10 enable "2 ( BC_1, *, controlr, 1 ) ," & -- st11 enable "3 ( BC_1, *, controlr, 1 ) ," & -- . "4 ( BC_1, *, controlr, 1 ) ," & -- . "5 ( BC_1, *, controlr, 1 ) ," & -- . "6 ( BC_1, *, controlr, 1 ) ," & -- st15 enable "7 ( BC_1, *, controlr, 1 ) ," & -- st1 enable "8 ( BC_1, *, controlr, 1 ) ," & -- st2 enable "9 ( BC_1, *, controlr, 1 ) ," & -- st3 enable "10 ( BC_1, *, controlr, 1 ) ," & -- . "11 ( BC_1, *, controlr, 1 ) ," & -- . "12 ( BC_1, *, controlr, 1 ) ," & -- . "13 ( BC_1, *, controlr, 1 ) ," & "14 ( BC_1, *, controlr, 1 ) ," & "15 ( BC_1, *, controlr, 1 ) ," & -- st9 enable "16 ( BC_1, *, controlr, 1 ) ," & -- a15 enable "17 ( BC_1, *, controlr, 1 ) ," & -- aem enable "18 ( BC_1, *, controlr, 1 ) ," & -- a3 enable "19 ( BC_1, *, controlr, 1 ) ," & -- a4 enable "20 ( BC_1, *, controlr, 1 ) ," & -- . "21 ( BC_1, *, controlr, 1 ) ," & -- . "22 ( BC_1, *, controlr, 1 ) ," & -- . "23 ( BC_1, *, controlr, 1 ) ," & "24 ( BC_1, *, controlr, 1 ) ," & "25 ( BC_1, *, controlr, 1 ) ," & -- a10 enable "26 ( BC_1, *, controlr, 1 ) ," & -- databus enable "27 ( BC_1, *, controlr, 1 ) ," & -- corsiga enable "28 ( BC_1, *, internal, X ) ," & -- tclk_oe (observe only) "29 ( BC_1, *, controlr, 1 ) ," & -- corsige enable "30 ( BC_1, *, controlr, 1 ) ," & -- corsigd enable "31 ( BC_1, *, controlr, 1 ) ," & -- corsigc enable "32 ( BC_1, *, controlr, 1 ) ," & -- nint enable "33 ( BC_1, *, controlr, 1 ) ," & -- locx1 enable "34 ( BC_1, *, controlr, 1 ) ," & -- locx2 enable "35 ( BC_1, *, controlr, 1 ) ," & -- lsync enable "36 ( BC_1, *, controlr, 1 ) ," & -- corsigb enable "37 ( BC_1, *, controlr, 1 ) ," & -- mem_dat bus enable "38 ( BC_1, *, controlr, 1 ) ," & -- ptxclk enable "39 ( BC_1, *, controlr, 1 ) ," & -- rdy_ndtack enable "40 ( BC_1, *, controlr, 1 ) ," & -- sec8k enable "41 ( BC_1, *, internal, X ) ," & -- tclk_oe (observe only) "42 ( BC_1, *, controlr, 1 ) ," & -- tclk_oe "43 ( BC_1, *, controlr, 1 ) ," & -- mem_clk "44 ( BC_2, nrd_nds, input, X ) ," & "45 ( BC_1, rdy_ndtack, output3, X , 39, 1, Z)," & "46 ( BC_2, nwr_rw, input, X ) ," & "47 ( BC_1, locx2, output3, X , 34, 1, Z)," & "48 ( BC_2, locx2, input, X ) ," & "49 ( BC_1, corsigb, output3, X , 36, 1, Z)," & "50 ( BC_2, corsigb, input, X ) ," & "51 ( BC_1, sec8k, output3, X , 40, 1, Z)," & "52 ( BC_2, sec8k, input, X ) ," & "53 ( BC_1, clkx1, output3, X , 42, 1, Z)," & "54 ( BC_2, clkx1, input, X ) ," & "55 ( BC_1, fsync, output3, X , 42, 1, Z)," & "56 ( BC_2, fsync, input, X ) ," & "57 ( BC_1, clkx2po, output3, X , 42, 1, Z)," & "58 ( BC_2, clkx2po, input, X ) ," & "59 ( BC_2, clkx2pi, input, X ) ," & -- differential value of clkx2pi & clkx2ni "60 ( BC_1, clkx2no, output3, X , 42, 1, Z)," & "61 ( BC_1, ref8kclk, output2, X ) ," & "62 ( BC_2, pll16mclk, input, X ) ," & "63 ( BC_1, ad(15), output3, X , 26, 1, Z)," & "64 ( BC_2, ad(15), input, X ) ," & "65 ( BC_1, ad(14), output3, X , 26, 1, Z)," & "66 ( BC_2, ad(14), input, X ) ," & "67 ( BC_1, ad(13), output3, X , 26, 1, Z)," & "68 ( BC_2, ad(13), input, X ) ," & "69 ( BC_1, ad(12), output3, X , 26, 1, Z)," & "70 ( BC_2, ad(12), input, X ) ," & "71 ( BC_1, ad(11), output3, X , 26, 1, Z)," & "72 ( BC_2, ad(11), input, X ) ," & "73 ( BC_1, ad(10), output3, X , 26, 1, Z)," & "74 ( BC_2, ad(10), input, X ) ," & "75 ( BC_1, ad(9), output3, X , 26, 1, Z)," & "76 ( BC_2, ad(9), input, X ) ," & "77 ( BC_1, ad(8), output3, X , 26, 1, Z)," & "78 ( BC_2, ad(8), input, X ) ," & "79 ( BC_1, ad(7), output3, X , 26, 1, Z)," & "80 ( BC_2, ad(7), input, X ) ," & "81 ( BC_1, ad(6), output3, X , 26, 1, Z)," & "82 ( BC_2, ad(6), input, X ) ," & "83 ( BC_1, ad(5), output3, X , 26, 1, Z)," & "84 ( BC_2, ad(5), input, X ) ," & "85 ( BC_1, ad(4), output3, X , 26, 1, Z)," & "86 ( BC_2, ad(4), input, X ) ," & "87 ( BC_1, ad(3), output3, X , 26, 1, Z)," & "88 ( BC_2, ad(3), input, X ) ," & "89 ( BC_1, ad(2), output3, X , 26, 1, Z)," & "90 ( BC_2, ad(2), input, X ) ," & "91 ( BC_1, ad(1), output3, X , 26, 1, Z)," & "92 ( BC_2, ad(1), input, X ) ," & "93 ( BC_1, ad(0), output3, X , 26, 1, Z)," & "94 ( BC_2, ad(0), input, X ) ," & "95 ( BC_2, ncs, input, X ) ," & "96 ( BC_2, a1, input, X ) ," & "97 ( BC_2, a2, input, X ) ," & "98 ( BC_1, a3, output3, X , 18, 1, Z)," & "99 ( BC_2, a3, input, X ) ," & "100 ( BC_1, a4, output3, X , 19, 1, Z)," & "101 ( BC_2, a4, input, X ) ," & "102 ( BC_1, a5, output3, X , 20, 1, Z)," & "103 ( BC_2, a5, input, X ) ," & "104 ( BC_1, a6, output3, X , 21, 1, Z)," & "105 ( BC_2, a6, input, X ) ," & "106 ( BC_1, a7, output3, X , 22, 1, Z)," & "107 ( BC_2, a7, input, X ) ," & "108 ( BC_1, a8, output3, X , 23, 1, Z)," & "109 ( BC_2, a8, input, X ) ," & "110 ( BC_1, a9, output3, X , 24, 1, Z)," & "111 ( BC_2, a9, input, X ) ," & "112 ( BC_1, a10, output3, X , 25, 1, Z)," & "113 ( BC_2, a10, input, X ) ," & "114 ( BC_2, a11, input, X ) ," & "115 ( BC_2, a12, input, X ) ," & "116 ( BC_2, a13, input, X ) ," & "117 ( BC_2, a14, input, X ) ," & "118 ( BC_1, a15, output3, X , 16, 1, Z)," & "119 ( BC_2, a15, input, X ) ," & "120 ( BC_1, aem, output3, X , 17, 1, Z)," & "121 ( BC_2, aem, input, X ) ," & "122 ( BC_1, nmem_oe, output2, X ) ," & "123 ( BC_1, nmem_wr(2), output2, X ) ," & "124 ( BC_1, nmem_wr(3), output2, X ) ," & "125 ( BC_1, nmem_cs1h, output2, X ) ," & "126 ( BC_1, nmem_cs0h, output2, X ) ," & "127 ( BC_1, mem_dat(27), output3, X , 37, 1, Z)," & "128 ( BC_2, mem_dat(27), input, X ) ," & "129 ( BC_1, mem_dat(28), output3, X , 37, 1, Z)," & "130 ( BC_2, mem_dat(28), input, X ) ," & "131 ( BC_1, mem_dat(29), output3, X , 37, 1, Z)," & "132 ( BC_2, mem_dat(29), input, X ) ," & "133 ( BC_1, mem_dat(30), output3, X , 37, 1, Z)," & "134 ( BC_2, mem_dat(30), input, X ) ," & "135 ( BC_1, mem_dat(31), output3, X , 37, 1, Z)," & "136 ( BC_2, mem_dat(31), input, X ) ," & "137 ( BC_1, mem_dat(32), output3, X , 37, 1, Z)," & "138 ( BC_2, mem_dat(32), input, X ) ," & "139 ( BC_1, mem_dat(33), output3, X , 37, 1, Z)," & "140 ( BC_2, mem_dat(33), input, X ) ," & "141 ( BC_1, mem_dat(34), output3, X , 37, 1, Z)," & "142 ( BC_2, mem_dat(34), input, X ) ," & "143 ( BC_1, mem_dat(35), output3, X , 37, 1, Z)," & "144 ( BC_2, mem_dat(35), input, X ) ," & "145 ( BC_1, mem_dat(18), output3, X , 37, 1, Z)," & "146 ( BC_2, mem_dat(18), input, X ) ," & "147 ( BC_1, mem_dat(19), output3, X , 37, 1, Z)," & "148 ( BC_2, mem_dat(19), input, X ) ," & "149 ( BC_1, mem_dat(20), output3, X , 37, 1, Z)," & "150 ( BC_2, mem_dat(20), input, X ) ," & "151 ( BC_1, mem_dat(21), output3, X , 37, 1, Z)," & "152 ( BC_2, mem_dat(21), input, X ) ," & "153 ( BC_1, mem_dat(22), output3, X , 37, 1, Z)," & "154 ( BC_2, mem_dat(22), input, X ) ," & "155 ( BC_1, mem_dat(23), output3, X , 37, 1, Z)," & "156 ( BC_2, mem_dat(23), input, X ) ," & "157 ( BC_1, mem_dat(24), output3, X , 37, 1, Z)," & "158 ( BC_2, mem_dat(24), input, X ) ," & "159 ( BC_1, mem_dat(25), output3, X , 37, 1, Z)," & "160 ( BC_2, mem_dat(25), input, X ) ," & "161 ( BC_1, mem_dat(26), output3, X , 37, 1, Z)," & "162 ( BC_2, mem_dat(26), input, X ) ," & "163 ( BC_1, nmem_wr(0), output2, X ) ," & "164 ( BC_1, nmem_wr(1), output2, X ) ," & "165 ( BC_1, nmem_cs1l, output2, X ) ," & "166 ( BC_1, nmem_cs0l, output2, X ) ," & "167 ( BC_1, mem_add(7), output2, X ) ," & "168 ( BC_1, mem_add(6), output2, X ) ," & "169 ( BC_1, mem_dat(9), output3, X , 37, 1, Z)," & "170 ( BC_2, mem_dat(9), input, X ) ," & "171 ( BC_1, mem_dat(10), output3, X , 37, 1, Z)," & "172 ( BC_2, mem_dat(10), input, X ) ," & "173 ( BC_1, mem_dat(11), output3, X , 37, 1, Z)," & "174 ( BC_2, mem_dat(11), input, X ) ," & "175 ( BC_1, mem_dat(12), output3, X , 37, 1, Z)," & "176 ( BC_2, mem_dat(12), input, X ) ," & "177 ( BC_1, mem_dat(13), output3, X , 37, 1, Z)," & "178 ( BC_2, mem_dat(13), input, X ) ," & "179 ( BC_1, mem_dat(14), output3, X , 37, 1, Z)," & "180 ( BC_2, mem_dat(14), input, X ) ," & "181 ( BC_1, mem_dat(15), output3, X , 37, 1, Z)," & "182 ( BC_2, mem_dat(15), input, X ) ," & "183 ( BC_1, mem_dat(16), output3, X , 37, 1, Z)," & "184 ( BC_2, mem_dat(16), input, X ) ," & "185 ( BC_1, mem_dat(17), output3, X , 37, 1, Z)," & "186 ( BC_2, mem_dat(17), input, X ) ," & "187 ( BC_1, mem_add(5), output2, X ) ," & "188 ( BC_1, mem_add(4), output2, X ) ," & "189 ( BC_1, mem_add(3), output2, X ) ," & "190 ( BC_1, mem_add(2), output2, X ) ," & "191 ( BC_1, mem_add(1), output2, X ) ," & "192 ( BC_1, mem_add(0), output2, X ) ," & "193 ( BC_1, mem_add(17), output2, X ) ," & "194 ( BC_1, mem_add(16), output2, X ) ," & "195 ( BC_1, mem_add(15), output2, X ) ," & "196 ( BC_1, mem_add(14), output2, X ) ," & "197 ( BC_1, mem_add(13), output2, X ) ," & "198 ( BC_1, mem_add(12), output2, X ) ," & "199 ( BC_1, mem_add(11), output2, X ) ," & "200 ( BC_1, mem_dat(0), output3, X , 37, 1, Z)," & "201 ( BC_2, mem_dat(0), input, X ) ," & "202 ( BC_1, mem_dat(1), output3, X , 37, 1, Z)," & "203 ( BC_2, mem_dat(1), input, X ) ," & "204 ( BC_1, mem_dat(2), output3, X , 37, 1, Z)," & "205 ( BC_2, mem_dat(2), input, X ) ," & "206 ( BC_1, mem_dat(3), output3, X , 37, 1, Z)," & "207 ( BC_2, mem_dat(3), input, X ) ," & "208 ( BC_1, mem_dat(4), output3, X , 37, 1, Z)," & "209 ( BC_2, mem_dat(4), input, X ) ," & "210 ( BC_1, mem_dat(5), output3, X , 37, 1, Z)," & "211 ( BC_2, mem_dat(5), input, X ) ," & "212 ( BC_1, mem_dat(6), output3, X , 37, 1, Z)," & "213 ( BC_2, mem_dat(6), input, X ) ," & "214 ( BC_1, mem_dat(7), output3, X , 37, 1, Z)," & "215 ( BC_2, mem_dat(7), input, X ) ," & "216 ( BC_1, mem_dat(8), output3, X , 37, 1, Z)," & "217 ( BC_2, mem_dat(8), input, X ) ," & "218 ( BC_1, mem_add(10), output2, X ) ," & "219 ( BC_1, mem_add(9), output2, X ) ," & "220 ( BC_1, mem_add(8), output2, X ) ," & "221 ( BC_1, mem_clk, output3, X , 43, 1, Z)," & "222 ( BC_2, mem_clk, input, X ) ," & "223 ( BC_2, ntristate, input, 0 ) ," & "224 ( BC_2, mclk, input, X ) ," & "225 ( BC_2, stxclk, input, X ) ," & "226 ( BC_1, nint, output3, X , 32, 1, Z)," & "227 ( BC_2, ex_8ka, input, X ) ," & "228 ( BC_1, ptxclk, output3, X , 38, 1, Z)," & "229 ( BC_2, ptxclk, input, X ) ," & "230 ( BC_2, prxclk, input, X ) ," & "231 ( BC_2, nreset, input, X ) ," & "232 ( BC_2, stxdata(0), input, X ) ," & "233 ( BC_2, stxdata(1), input, X ) ," & "234 ( BC_2, stxdata(2), input, X ) ," & "235 ( BC_2, stxdata(3), input, X ) ," & "236 ( BC_2, stxdata(4), input, X ) ," & "237 ( BC_2, stxdata(5), input, X ) ," & "238 ( BC_2, stxdata(6), input, X ) ," & "239 ( BC_2, stxdata(7), input, X ) ," & "240 ( BC_2, stxsoc, input, X ) ," & "241 ( BC_2, nstxen, input, X ) ," & "242 ( BC_1, stxclav, output2, X ) ," & "243 ( BC_2, prxdata(0), input, X ) ," & "244 ( BC_2, prxdata(1), input, X ) ," & "245 ( BC_2, prxdata(2), input, X ) ," & "246 ( BC_2, prxdata(3), input, X ) ," & "247 ( BC_2, prxdata(4), input, X ) ," & "248 ( BC_2, prxdata(5), input, X ) ," & "249 ( BC_2, prxdata(6), input, X ) ," & "250 ( BC_2, prxdata(7), input, X ) ," & "251 ( BC_2, prxsoc, input, X ) ," & "252 ( BC_2, nprxen, input, X ) ," & "253 ( BC_2, prxclav, input, X ) ," & "254 ( BC_2, ptxclav, input, X ) ," & "255 ( BC_1, ptxsoc, output2, X ) ," & "256 ( BC_1, nptxen, output2, X ) ," & "257 ( BC_1, ptxpar, output2, X ) ," & "258 ( BC_1, ptxdata(7), output2, X ) ," & "259 ( BC_1, ptxdata(6), output2, X ) ," & "260 ( BC_1, ptxdata(5), output2, X ) ," & "261 ( BC_1, ptxdata(4), output2, X ) ," & "262 ( BC_1, ptxdata(3), output2, X ) ," & "263 ( BC_1, ptxdata(2), output2, X ) ," & "264 ( BC_1, ptxdata(1), output2, X ) ," & "265 ( BC_1, ptxdata(0), output2, X ) ," & "266 ( BC_2, intel_nmotorola, input, X ) ," & "267 ( BC_2, access_mode, input, X ) ," & "268 ( BC_1, corsige, output3, X , 29, 1, Z)," & "269 ( BC_2, corsige, input, X ) ," & "270 ( BC_1, corsigd, output3, X , 30, 1, Z)," & "271 ( BC_2, corsigd, input, X ) ," & "272 ( BC_1, corsigc, output3, X , 31, 1, Z)," & "273 ( BC_2, corsigc, input, X ) ," & "274 ( BC_1, corsiga, output3, X , 27, 1, Z)," & "275 ( BC_2, corsiga, input, X ) ," & "276 ( BC_1, frun, output2, X ) ," & "277 ( BC_2, nsfsync, input, X ) ," & "278 ( BC_1, lsync, output3, X , 35, 1, Z)," & "279 ( BC_2, lsync, input, X ) ," & "280 ( BC_2, locsti, input, X ) ," & "281 ( BC_1, locsto, output2, X ) ," & "282 ( BC_1, st(15), output3, X , 6, 1, Z)," & "283 ( BC_2, st(15), input, X ) ," & "284 ( BC_1, st(14), output3, X , 5, 1, Z)," & "285 ( BC_2, st(14), input, X ) ," & "286 ( BC_1, st(13), output3, X , 4, 1, Z)," & "287 ( BC_2, st(13), input, X ) ," & "288 ( BC_1, st(12), output3, X , 3, 1, Z)," & "289 ( BC_2, st(12), input, X ) ," & "290 ( BC_1, st(11), output3, X , 2, 1, Z)," & "291 ( BC_2, st(11), input, X ) ," & "292 ( BC_1, st(10), output3, X , 1, 1, Z)," & "293 ( BC_2, st(10), input, X ) ," & "294 ( BC_1, st(9), output3, X , 15, 1, Z)," & "295 ( BC_2, st(9), input, X ) ," & "296 ( BC_1, st(8), output3, X , 14, 1, Z)," & "297 ( BC_2, st(8), input, X ) ," & "298 ( BC_1, st(7), output3, X , 13, 1, Z)," & "299 ( BC_2, st(7), input, X ) ," & "300 ( BC_1, st(6), output3, X , 12, 1, Z)," & "301 ( BC_2, st(6), input, X ) ," & "302 ( BC_1, st(5), output3, X , 11, 1, Z)," & "303 ( BC_2, st(5), input, X ) ," & "304 ( BC_1, st(4), output3, X , 10, 1, Z)," & "305 ( BC_2, st(4), input, X ) ," & "306 ( BC_1, st(3), output3, X , 9, 1, Z)," & "307 ( BC_2, st(3), input, X ) ," & "308 ( BC_1, st(2), output3, X , 8, 1, Z)," & "309 ( BC_2, st(2), input, X ) ," & "310 ( BC_1, st(1), output3, X , 7, 1, Z)," & "311 ( BC_2, st(1), input, X ) ," & "312 ( BC_1, st(0), output3, X , 0, 1, Z)," & "313 ( BC_2, st(0), input, X ) ," & "314 ( BC_1, locx1, output3, X , 33, 1, Z)," & "315 ( BC_2, locx1, input, X ) "; end MT90500;