---------------------------------------------------------------- -- BSDL model for ISSI's IS61NLP102418 Synch SRAM -- Author: Alan Deng -- Modified : by Igor -- Revision History: Rev0.1 (7/27/04) ---------------------------------------------------------------- entity IS61NLP102418 is generic (PHYSICAL_PIN_MAP : string := "BGA_11x15"); port ( A : in bit_vector(0 to 17); A0 : in bit; A1 : in bit; ADV : in bit; BWa_L : in bit; BWb_L : in bit; CLK : in bit; DQa : in bit_vector(0 to 8); DQb : in bit_vector(0 to 8); CE_L : in bit; CE2 : in bit; CE2_L : in bit; TCK : in bit; TDI : in bit; TDO : out bit; TMS : in bit; MODE : in bit; OE_L : in bit; CKE_L : in bit; WE_L : in bit; NC : linkage bit_vector(0 to 37); Vdd : linkage bit_vector(0 to 18); Vddq : linkage bit_vector(0 to 19); Vss : linkage bit_vector(0 to 33); ZZ : in bit); use STD_1149_1_1994.all; attribute COMPONENT_CONFORMANCE of IS61NLP102418: entity is "STD_1149_1_1993"; attribute PIN_MAP of IS61NLP102418: entity is PHYSICAL_PIN_MAP; constant BGA_11x15: PIN_MAP_STRING := " A: (A2, A9, A10, A11, B2, B9, B10, P3, P4, P8, P9, P10, " & " R3, R4, R8, R9, R10, R11), " & " A0: R6, " & " A1: P6, " & " ADV: A8, " & " BWa_L: B5, " & " BWb_L: A4, " & " CLK: B6, " & " DQa: (C11, D11, E11, F11, G11, J10, K10, L10, M10), " & " DQb: (D2, E2, F2, G2, J1, K1, L1, M1, N1), " & " CE_L: A3, " & " CE2: B3, " & " CE2_L: A6, " & " TCK: R7, " & " TDI: P5, " & " TDO: P7, " & " TMS: R5, " & " MODE: R1, " & " OE_L: B8, " & " CKE_L: A7, " & " WE_L: B7, " & " NC: (A1, B1, C1, D1, E1, F1, G1, H1, P1, C2, J2, K2, L2, " & " M2, N2, P2, R2, H3, B4, A5, N5, N6, N7, H9, C10, D10, " & " E10, F10, G10, H10, N10, B11, J11, K11, L11, M11, " & " N11, P11), " & " Vdd: (D4, E4, F4, G4, H4, J4, K4, L4, M4, D8, E8, F8, G8, " & " H8, J8, K8, L8, M8, H2), " & " Vddq: (C3, D3, E3, F3, G3, J3, K3, L3, M3, N3, C9, D9, E9, " & " F9, G9, J9, K9, L9, M9, N9), " & " Vss: (C4, N4, C5, D5, E5, F5, G5, H5, J5, K5, L5, M5, C6, " & " D6, E6, F6, G6, H6, J6, K6, L6, M6, C7, D7, E7, F7, " & " G7, H7, J7, K7, L7, M7, C8, N8), " & " ZZ: H11 " ; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (100.0e6, BOTH); attribute INSTRUCTION_LENGTH of IS61NLP102418 : entity is 3; attribute INSTRUCTION_OPCODE of IS61NLP102418 : entity is "EXTEST (000), " & "IDCODE (001), " & "SAMPLEZ (010), " & "SAMPLE (010), " & "PRELOAD (010), " & "SAMPLE_PLD (100), " & "BYPASS (111) " ; attribute INSTRUCTION_CAPTURE of IS61NLP102418 : entity is "001"; attribute IDCODE_REGISTER of IS61NLP102418 : entity is "xxxx" & -- Revision Number "0100000011" & -- Part configuration "xxxxxx" & -- ISSI Device ID "00011010101" & -- ISSI JEDEC ID "1" ; -- Presence Register attribute REGISTER_ACCESS of IS61NLP102418 : entity is "BOUNDARY (EXTEST, SAMPLEZ, SAMPLE_PLD, SAMPLE, PRELOAD), " & "BYPASS (BYPASS) " ; attribute BOUNDARY_LENGTH of IS61NLP102418 : entity is 75; attribute BOUNDARY_REGISTER of IS61NLP102418 : entity is "0 (BC_4, MODE, input, X), " & "1 (BC_4, *, internal, 0), " & "2 (BC_4, *, internal, 0), " & "3 (BC_4, A(10), input, X), " & "4 (BC_4, A(9), input, X), " & "5 (BC_4, A(8), input, X), " & "6 (BC_4, A(7), input, X), " & "7 (BC_4, A(6), input, X), " & "8 (BC_4, A(5), input, X), " & "9 (BC_4, A(4), input, X), " & "10 (BC_4, ZZ, input, X), " & "11 (BC_4, *, internal, 0), " & "12 (BC_4, *, internal, 0), " & "13 (BC_4, *, internal, 0), " & "14 (BC_4, *, internal, 0), " & "15 (BC_4, *, internal, 0), " & "16 (BC_4, DQa(8), input, X), " & "17 (BC_4, DQa(7), input, X), " & "18 (BC_4, DQa(6), input, X), " & "19 (BC_4, DQa(5), input, X), " & "20 (BC_4, DQa(4), input, X), " & "21 (BC_4, DQa(3), input, X), " & "22 (BC_4, DQa(2), input, X), " & "23 (BC_4, DQa(1), input, X), " & "24 (BC_4, DQa(0), input, X), " & "25 (BC_4, *, internal, 0), " & "26 (BC_4, *, internal, 0), " & "27 (BC_4, *, internal, 0), " & "28 (BC_4, *, internal, 0), " & "29 (BC_4, A(17), input, X), " & "30 (BC_4, A(3), input, X), " & "31 (BC_4, A(14), input, X), " & "32 (BC_4, A(13), input, X), " & "33 (BC_4, A(12), input, X), " & "34 (BC_4, ADV, input, X), " & "35 (BC_4, OE_L, input, X), " & "36 (BC_4, CKE_L, input, X), " & "37 (BC_4, WE_L, input, X), " & "38 (BC_4, CLK, input, X), " & "39 (BC_4, *, internal, 0), " & "40 (BC_4, *, internal, 0), " & "41 (BC_4, CE2_L, input, X), " & "42 (BC_4, BWa_L, input, X), " & "43 (BC_4, *, internal, 0), " & "44 (BC_4, BWb_L, input, X), " & "45 (BC_4, *, internal, 0), " & "46 (BC_4, CE2, input, X), " & "47 (BC_4, CE_L, input, X), " & "48 (BC_4, A(15), input, X), " & "49 (BC_4, A(16), input, X), " & "50 (BC_4, *, internal, 0), " & "51 (BC_4, *, internal, 0), " & "52 (BC_4, *, internal, 0), " & "53 (BC_4, *, internal, 0), " & "54 (BC_4, *, internal, 0), " & "55 (BC_4, *, internal, 0), " & "56 (BC_4, DQb(8), input, X), " & "57 (BC_4, DQb(7), input, X), " & "58 (BC_4, DQb(6), input, X), " & "59 (BC_4, DQb(5), input, X), " & "60 (BC_4, DQb(4), input, X), " & "61 (BC_4, DQb(3), input, X), " & "62 (BC_4, DQb(2), input, X), " & "63 (BC_4, DQb(1), input, X), " & "64 (BC_4, DQb(0), input, X), " & "65 (BC_4, *, internal, 0), " & "66 (BC_4, *, internal, 0), " & "67 (BC_4, *, internal, 0), " & "68 (BC_4, *, internal, 0), " & "69 (BC_4, A(11), input, X), " & "70 (BC_4, A(2), input, X), " & "71 (BC_4, A(1), input, X), " & "72 (BC_4, A(0), input, X), " & "73 (BC_4, A1, input, X), " & "74 (BC_4, A0, input, X) " ; end IS61NLP102418;