--************************************************************************** --* --* File Name: K7K1618T2C_FC_R02.BSL --* Revision: 0.2 --* Date: DEC. 01, 2009 --* Model: BSDL --* Simulator: Agilent Technologies --* --* Dependencies: None --* --* Author: YUNWOO KIM --* Email: yoonoo.kim@samsung.com --* Phone: 82-31-208-7485 --* Company: SAMSUNG ELECTRONICS --* Model: K7K1618T2C (1M x 18 DDRII SRAM 2-Word Burst) --* --* Description: Samsung Electronics 18 Meg (1M X 18) DDRII SRAM 2-Word Burst --* BSDL model --* --* Limitation: IEEE 1149.1 Serial Boundary Scan (JTAG) --* --* Copyright 2002, SAMSUNG ELECTRONICS,. --* All rights reserved --* --* Rev Author Phone Date Changes --* --- -------------- -------------- ---------- ------------------------------------- --* 0.0 YUNWOO KIM (82) 31-208-7485 02/09/2006 --* 0.1 YUNWOO KIM (82) 31-208-7725 08/22/2006 Change the manufacturer ID --* 0.2 YUNWOO KIM (82) 31-208-7725 12/01/2009 Change the PIN_MAP & BOUNDARY_REGISTER --*************************************************************************/ entity K7K1618T2C is generic (PHYSICAL_PIN_MAP : string := "FBGA"); port ( SA: in bit_vector(1 to 19); CQB: buffer bit; R_WB: in bit; BW1B: in bit; KB: in bit; LDB: in bit; CQ: buffer bit; K: in bit; BW0B: in bit; QVAL: in bit; DOFFB: in bit; DQ: inout bit_vector (0 to 17); TMS: in bit; TDI: in bit; TCK: in bit; TDO: out bit; --ZQ: in bit; VREF: linkage bit_vector(0 to 1); Vdd: linkage bit_vector(0 to 9); Vss: linkage bit_vector(0 to 24); VDDQ: linkage bit_vector(0 to 15); NC: linkage bit_vector(0 to 59)); use STD_1149_1_2001.all; attribute COMPONENT_CONFORMANCE of K7K1618T2C : entity is "STD_1149_1_2001"; attribute PIN_MAP of K7K1618T2C : entity is PHYSICAL_PIN_MAP; constant FBGA:PIN_MAP_STRING:= " SA: (C7,R5,N5,P5,P4,R4,R3,N6,P7,N7, " & " R7,R8,P8,R9,A9,B8,C5,B4,A3), " & --Address " CQB: A1, " & --Neg Echo Clock " R_WB: A4, " & --Write " BW1B: A5, " & --BYTE WRITE " KB: A6, " & --Out Negative Clock " LDB: A8, " & --Read " CQ: A11, " & --Pos Echo Clock " K: B6, " & --In Positive Clock " BW0B: B7, " & --BYTE WRITE " QVAL: P6, " & --Out Positive Clock " DQ: (P11,M10,L11,K11,J10,F11,E11,C10,B11, " & " B2,D3,E3,F2,G3,K3,L2,N3,P3), " & " TMS: R10, " & --Test Mode Select " TDI: R11, " & --Test Data-In " TCK: R2, " & --Test Clock " TDO: R1, " & --Test Data-Out " DOFFB: H1, " & --Clock --" ZQ: H11, " & --Input Impedance Match " VREF: (H2,H10), " & --HSTL Input Reference Voltage " VDD: (F5,F7,G5,G7,H5,H7,J5,J7,K5,K7), " & " VSS: (C4,C8,D4,D5,D6,D7,D8,E5,E6,E7,F6,G6, " & " H6,J6,K6,L5,L6,L7,M4,M5,M6,M7,M8,N4,N8), " & " VDDQ: (E4,E8,F4,F8,G4,G8,H3,H4,H8,H9,J4,J8,K4,K8,L4,L8), " & " NC: (A2,A7,B1,B3,B5,B9,B10,C1,C2,C3,C6,C9,C11,D1,D2, " & " D9,D10,D11,E1,E2,E9,E10,F1,F3,F9, F10, " & " G1,G2,G9,G10,G11,J1,J2,J3,J9,J11,K1, " & " K2,K9,K10,L1,L3,L9,L10,M1,M2,M3,M9, " & " M11,N1,N2,N9,N10,N11,P1,P2,P9,P10,R6,A10) " ; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (50.0e6, BOTH); attribute INSTRUCTION_LENGTH of K7K1618T2C : entity is 3; attribute INSTRUCTION_OPCODE of K7K1618T2C : entity is "EXTEST (000), " & "IDCODE (001), " & "SAMPLEZ (010), " & "RESERV1 (011), " & "SAMPLE (100), " & "PRELOAD (100), " & "RESERV2 (101), " & "RESERV3 (110), " & "BYPASS (111) " ; attribute INSTRUCTION_CAPTURE of K7K1618T2C : entity is "001"; attribute INSTRUCTION_PRIVATE of K7K1618T2C : entity is "RESERV1, RESERV2 ,RESERV3" ; attribute IDCODE_REGISTER of K7K1618T2C : entity is "000" & -- version "00001010010100010" & -- part configuration "00011001110" & -- Samsung JEDEC Code "1"; -- 1149.1 requirement attribute REGISTER_ACCESS of K7K1618T2C : entity is "BOUNDARY (EXTEST,SAMPLEZ,SAMPLE), " & "BYPASS (BYPASS) " ; attribute BOUNDARY_LENGTH of K7K1618T2C : entity is 109; attribute BOUNDARY_REGISTER of K7K1618T2C : entity is "0 (BC_4, *, internal, X), " & "1 (BC_4, QVAL, input, X), " & "2 (BC_4, SA(8), input, X), " & "3 (BC_4, SA(9), input, X), " & "4 (BC_4, SA(10), input, X), " & "5 (BC_4, SA(11), input, X), " & "6 (BC_4, SA(12), input, X), " & "7 (BC_4, SA(13), input, X), " & "8 (BC_4, SA(14), input, X), " & "9 (BC_7, DQ(0), bidir, X, 108, 0, Z), " & "10 (BC_4, *, internal, X), " & "11 (BC_4, *, internal, X), " & "12 (BC_4, *, internal, X), " & "13 (BC_7, DQ(1), bidir, X, 108, 0, Z), " & "14 (BC_4, *, internal, X), " & "15 (BC_4, *, internal, X), " & "16 (BC_4, *, internal, X), " & "17 (BC_7, DQ(2), bidir, X, 108, 0, Z), " & "18 (BC_4, *, internal, X), " & "19 (BC_4, *, internal, X), " & "20 (BC_4, *, internal, X), " & "21 (BC_7, DQ(3), bidir, X, 108, 0, Z), " & "22 (BC_4, *, internal, X), " & "23 (BC_4, *, internal, X), " & "24 (BC_4, *, internal, X), " & "25 (BC_7, DQ(4), bidir, X, 108, 0, Z), " & "26 (BC_4, *, internal, X), " & "27 (BC_4, *, internal, X), " & "28 (BC_4, *, internal, X), " & "29 (BC_4, *, internal, X), " & "30 (BC_7, DQ(5), bidir, X, 108, 0, Z), " & "31 (BC_4, *, internal, X), " & "32 (BC_4, *, internal, X), " & "33 (BC_4, *, internal, X), " & "34 (BC_7, DQ(6), bidir, X, 108, 0, Z), " & "35 (BC_4, *, internal, X), " & "36 (BC_4, *, internal, X), " & "37 (BC_4, *, internal, X), " & "38 (BC_7, DQ(7), bidir, X, 108, 0, Z), " & "39 (BC_4, *, internal, X), " & "40 (BC_4, *, internal, X), " & "41 (BC_4, *, internal, X), " & "42 (BC_7, DQ(8), bidir, X, 108, 0, Z), " & "43 (BC_4, *, internal, X), " & "44 (BC_4, *, internal, X), " & "45 (BC_4, *, internal, X), " & "46 (BC_9, CQ, output2, X), " & "47 (BC_4, *, internal, X), " & "48 (BC_4, SA(15), input, X), " & "49 (BC_4, SA(16), input, X), " & "50 (BC_4, SA(1), input, X), " & "51 (BC_4, * , internal, X), " & "52 (BC_4, LDB, input, X), " & "53 (BC_4, *, internal, X), " & "54 (BC_4, BW0B, input, X), " & "55 (BC_4, K, input, X), " & "56 (BC_4, KB, input, X), " & "57 (BC_4, *, internal, X), " & "58 (BC_4, BW1B, input, X), " & "59 (BC_4, R_WB, input, X), " & "60 (BC_4, SA(17), input, X), " & "61 (BC_4, SA(18), input, X), " & "62 (BC_4, SA(19), input, X), " & "63 (BC_4, *, internal, X), " & "64 (BC_9, CQB, output2, X), " & "65 (BC_7, DQ(9), bidir, X, 108, 0, Z), " & "66 (BC_4, *, internal, X), " & "67 (BC_4, *, internal, X), " & "68 (BC_4, *, internal, X), " & "69 (BC_7, DQ(10), bidir, X, 108, 0, Z), " & "70 (BC_4, *, internal, X), " & "71 (BC_4, *, internal, X), " & "72 (BC_4, *, internal, X), " & "73 (BC_7, DQ(11), bidir, X, 108, 0, Z), " & "74 (BC_4, *, internal, X), " & "75 (BC_4, *, internal, X), " & "76 (BC_4, *, internal, X), " & "77 (BC_7, DQ(12), bidir, X, 108, 0, Z), " & "78 (BC_4, *, internal, X), " & "79 (BC_4, *, internal, X), " & "80 (BC_4, *, internal, X), " & "81 (BC_7, DQ(13), bidir, X, 108, 0, Z), " & "82 (BC_4, *, internal, X), " & "83 (BC_4, DOFFB, input, X), " & "84 (BC_4, *, internal, X), " & "85 (BC_4, *, internal, X), " & "86 (BC_7, DQ(14), bidir, X, 108, 0, Z), " & "87 (BC_4, *, internal, X), " & "88 (BC_4, *, internal, X), " & "89 (BC_4, *, internal, X), " & "90 (BC_7, DQ(15), bidir, X, 108, 0, Z), " & "91 (BC_4, *, internal, X), " & "92 (BC_4, *, internal, X), " & "93 (BC_4, *, internal, X), " & "94 (BC_7, DQ(16), bidir, X, 108, 0, Z), " & "95 (BC_4, *, internal, X), " & "96 (BC_4, *, internal, X), " & "97 (BC_4, *, internal, X), " & "98 (BC_7, DQ(17), bidir, X, 108, 0, Z), " & "99 (BC_4, *, internal, X), " & "100 (BC_4, *, internal, X), " & "101 (BC_4, *, internal, X), " & "102 (BC_4, SA(7), input, X), " & "103 (BC_4, SA(6), input, X), " & "104 (BC_4, SA(5), input, X), " & "105 (BC_4, SA(4), input, X), " & "106 (BC_4, SA(3), input, X), " & "107 (BC_4, SA(2), input, X), " & "108 (BC_2, * , controlr, 0) " ; --NOTE: --The BC_2 version of a control cell needs to be decided by the --designer. The CONTROLR indicates that the scan cell is "set" --with the safe value at power up AND when the JTAG TAP controller --enters the Test LOGIC RESET STATE end K7K1618T2C;