----------------------------------------------------------------------------------- -- DATE & TIME : Wed Nov 24 03:40:54 2004 -- File Type : BSDL Description for Top-Level Entity np1e ----------------------------------------------------------------------------------- entity np1e_top is generic(PHYSICAL_PIN_MAP : string := "DW"); port ( clk_ref_core_p : inout bit; clk_ref_fast_0_p : in bit; clk_ref_fast_0_n : in bit; clk_ref_fast_1_p : in bit; clk_ref_fast_1_n : in bit; clk_ref_rgmii_p : inout bit; nmaddr0 : inout bit_vector(13 downto 0); nmaddr1 : inout bit_vector(13 downto 0); nmba0 : inout bit_vector(2 downto 0); nmba1 : inout bit_vector(2 downto 0); nmcas_0 : inout bit; nmcas_1 : inout bit; nmck_0_p : inout bit; nmck_1_p : inout bit; nmcke_0 : inout bit; nmcke_1 : inout bit; nmcs0_0 : inout bit; nmcs0_1 : inout bit; nmcs1_0 : inout bit; nmcs1_1 : inout bit; nmdq_0 : inout bit_vector(15 downto 0); nmdq_1 : inout bit_vector(15 downto 0); nmdqs_0_0_p : inout bit; nmdqs_0_1_p : inout bit; nmdqs_1_0_p : inout bit; nmdqs_1_1_p : inout bit; nmecc_0 : inout bit_vector(1 downto 0); nmecc_1 : inout bit_vector(1 downto 0); nmodt0_0 : inout bit; nmodt0_1 : inout bit; nmodt1_0 : inout bit; nmodt1_1 : inout bit; nmras_0 : inout bit; nmras_1 : inout bit; nmwe_0 : inout bit; nmwe_1 : inout bit; pci_ad : inout bit_vector(31 downto 0); pci_c_be_n : inout bit_vector(3 downto 0); pci_clk : inout bit; pci_devsel_n : inout bit; pci_frame_n : inout bit; pci_idsel : inout bit; pci_intr : inout bit; pci_irdy_n : inout bit; pci_par : inout bit; pci_perr_n : inout bit; pci_serr_n : inout bit; pci_stop_n : inout bit; pci_trdy_n : inout bit; pll_clk_ref_0 : in bit; pll_clk_ref_1 : in bit; pll_clk_ref_2 : in bit; pll_clk_ref_3 : in bit; reset_n : inout bit; rgmii_0_rd : inout bit_vector(3 downto 0); rgmii_0_rx_ctl : inout bit; rgmii_0_rxclk : inout bit; rgmii_0_td : inout bit_vector(3 downto 0); rgmii_0_tx_ctl : inout bit; rgmii_0_txclk : inout bit; rgmii_1_rd : inout bit_vector(3 downto 0); rgmii_1_rx_ctl : inout bit; rgmii_1_rxclk : inout bit; rgmii_1_td : inout bit_vector(3 downto 0); rgmii_1_tx_ctl : inout bit; rgmii_1_txclk : inout bit; rgmii_2_rd : inout bit_vector(3 downto 0); rgmii_2_rx_ctl : inout bit; rgmii_2_rxclk : inout bit; rgmii_2_td : inout bit_vector(3 downto 0); rgmii_2_tx_ctl : inout bit; rgmii_2_txclk : inout bit; rgmii_3_rd : inout bit_vector(3 downto 0); rgmii_3_rx_ctl : inout bit; rgmii_3_rxclk : inout bit; rgmii_3_td : inout bit_vector(3 downto 0); rgmii_3_tx_ctl : inout bit; rgmii_3_txclk : inout bit; rgmii_4_rd : inout bit_vector(3 downto 0); rgmii_4_rx_ctl : inout bit; rgmii_4_rxclk : inout bit; rgmii_4_td : inout bit_vector(3 downto 0); rgmii_4_tx_ctl : inout bit; rgmii_4_txclk : inout bit; rgmii_5_rd : inout bit_vector(3 downto 0); rgmii_5_rx_ctl : inout bit; rgmii_5_rxclk : inout bit; rgmii_5_td : inout bit_vector(3 downto 0); rgmii_5_tx_ctl : inout bit; rgmii_5_txclk : inout bit; rgmii_6_rd : inout bit_vector(3 downto 0); rgmii_6_rx_ctl : inout bit; rgmii_6_rxclk : inout bit; rgmii_6_td : inout bit_vector(3 downto 0); rgmii_6_tx_ctl : inout bit; rgmii_6_txclk : inout bit; rgmii_7_rd : inout bit_vector(3 downto 0); rgmii_7_rx_ctl : inout bit; rgmii_7_rxclk : inout bit; rgmii_7_td : inout bit_vector(3 downto 0); rgmii_7_tx_ctl : inout bit; rgmii_7_txclk : inout bit; rgmii_8_rd : inout bit_vector(3 downto 0); rgmii_8_rx_ctl : inout bit; rgmii_8_rxclk : inout bit; rgmii_8_td : inout bit_vector(3 downto 0); rgmii_8_tx_ctl : inout bit; rgmii_8_txclk : inout bit; rgmii_9_rd : inout bit_vector(3 downto 0); rgmii_9_rx_ctl : inout bit; rgmii_9_rxclk : inout bit; rgmii_9_td : inout bit_vector(3 downto 0); rgmii_9_tx_ctl : inout bit; rgmii_9_txclk : inout bit; rgmii_mdc : inout bit; rgmii_mdio : inout bit; smaddr : inout bit_vector(14 downto 0); smba : inout bit_vector(2 downto 0); smcas : inout bit; smck_p : inout bit; smcke : inout bit; smcs0 : inout bit; smcs1 : inout bit; smdq : inout bit_vector(63 downto 0); smdqs_0_p : inout bit; smdqs_1_p : inout bit; smdqs_2_p : inout bit; smdqs_3_p : inout bit; smdqs_4_p : inout bit; smdqs_5_p : inout bit; smdqs_6_p : inout bit; smdqs_7_p : inout bit; smecc : inout bit_vector(7 downto 0); smodt0 : inout bit; smodt1 : inout bit; smras : inout bit; smwe : inout bit; spia_rxclk_p : in bit; spia_rxclk_n : in bit; spia_rxctl_p : in bit; spia_rxctl_n : in bit; spia_rxdata_0_p : in bit; spia_rxdata_0_n : in bit; spia_rxdata_10_p : in bit; spia_rxdata_10_n : in bit; spia_rxdata_11_p : in bit; spia_rxdata_11_n : in bit; spia_rxdata_12_p : in bit; spia_rxdata_12_n : in bit; spia_rxdata_13_p : in bit; spia_rxdata_13_n : in bit; spia_rxdata_14_p : in bit; spia_rxdata_14_n : in bit; spia_rxdata_15_p : in bit; spia_rxdata_15_n : in bit; spia_rxdata_1_p : in bit; spia_rxdata_1_n : in bit; spia_rxdata_2_p : in bit; spia_rxdata_2_n : in bit; spia_rxdata_3_p : in bit; spia_rxdata_3_n : in bit; spia_rxdata_4_p : in bit; spia_rxdata_4_n : in bit; spia_rxdata_5_p : in bit; spia_rxdata_5_n : in bit; spia_rxdata_6_p : in bit; spia_rxdata_6_n : in bit; spia_rxdata_7_p : in bit; spia_rxdata_7_n : in bit; spia_rxdata_8_p : in bit; spia_rxdata_8_n : in bit; spia_rxdata_9_p : in bit; spia_rxdata_9_n : in bit; spia_rxhpar_p : in bit; spia_rxhpar_n : in bit; spia_rxsclk : inout bit; spia_rxstat : inout bit_vector(1 downto 0); spia_txclk_p : buffer bit; spia_txclk_n : buffer bit; spia_txctl_p : buffer bit; spia_txctl_n : buffer bit; spia_txdata_0_p : buffer bit; spia_txdata_0_n : buffer bit; spia_txdata_10_p : buffer bit; spia_txdata_10_n : buffer bit; spia_txdata_11_p : buffer bit; spia_txdata_11_n : buffer bit; spia_txdata_12_p : buffer bit; spia_txdata_12_n : buffer bit; spia_txdata_13_p : buffer bit; spia_txdata_13_n : buffer bit; spia_txdata_14_p : buffer bit; spia_txdata_14_n : buffer bit; spia_txdata_15_p : buffer bit; spia_txdata_15_n : buffer bit; spia_txdata_1_p : buffer bit; spia_txdata_1_n : buffer bit; spia_txdata_2_p : buffer bit; spia_txdata_2_n : buffer bit; spia_txdata_3_p : buffer bit; spia_txdata_3_n : buffer bit; spia_txdata_4_p : buffer bit; spia_txdata_4_n : buffer bit; spia_txdata_5_p : buffer bit; spia_txdata_5_n : buffer bit; spia_txdata_6_p : buffer bit; spia_txdata_6_n : buffer bit; spia_txdata_7_p : buffer bit; spia_txdata_7_n : buffer bit; spia_txdata_8_p : buffer bit; spia_txdata_8_n : buffer bit; spia_txdata_9_p : buffer bit; spia_txdata_9_n : buffer bit; spia_txhpar_p : buffer bit; spia_txhpar_n : buffer bit; spia_txsclk : inout bit; spia_txstat : inout bit_vector(1 downto 0); spib_rxclk_p : in bit; spib_rxclk_n : in bit; spib_rxctl_p : in bit; spib_rxctl_n : in bit; spib_rxdata_0_p : in bit; spib_rxdata_0_n : in bit; spib_rxdata_10_p : in bit; spib_rxdata_10_n : in bit; spib_rxdata_11_p : in bit; spib_rxdata_11_n : in bit; spib_rxdata_12_p : in bit; spib_rxdata_12_n : in bit; spib_rxdata_13_p : in bit; spib_rxdata_13_n : in bit; spib_rxdata_14_p : in bit; spib_rxdata_14_n : in bit; spib_rxdata_15_p : in bit; spib_rxdata_15_n : in bit; spib_rxdata_1_p : in bit; spib_rxdata_1_n : in bit; spib_rxdata_2_p : in bit; spib_rxdata_2_n : in bit; spib_rxdata_3_p : in bit; spib_rxdata_3_n : in bit; spib_rxdata_4_p : in bit; spib_rxdata_4_n : in bit; spib_rxdata_5_p : in bit; spib_rxdata_5_n : in bit; spib_rxdata_6_p : in bit; spib_rxdata_6_n : in bit; spib_rxdata_7_p : in bit; spib_rxdata_7_n : in bit; spib_rxdata_8_p : in bit; spib_rxdata_8_n : in bit; spib_rxdata_9_p : in bit; spib_rxdata_9_n : in bit; spib_rxsclk : inout bit; spib_rxstat : inout bit_vector(1 downto 0); spib_txclk_p : buffer bit; spib_txclk_n : buffer bit; spib_txctl_p : buffer bit; spib_txctl_n : buffer bit; spib_txdata_0_p : buffer bit; spib_txdata_0_n : buffer bit; spib_txdata_10_p : buffer bit; spib_txdata_10_n : buffer bit; spib_txdata_11_p : buffer bit; spib_txdata_11_n : buffer bit; spib_txdata_12_p : buffer bit; spib_txdata_12_n : buffer bit; spib_txdata_13_p : buffer bit; spib_txdata_13_n : buffer bit; spib_txdata_14_p : buffer bit; spib_txdata_14_n : buffer bit; spib_txdata_15_p : buffer bit; spib_txdata_15_n : buffer bit; spib_txdata_1_p : buffer bit; spib_txdata_1_n : buffer bit; spib_txdata_2_p : buffer bit; spib_txdata_2_n : buffer bit; spib_txdata_3_p : buffer bit; spib_txdata_3_n : buffer bit; spib_txdata_4_p : buffer bit; spib_txdata_4_n : buffer bit; spib_txdata_5_p : buffer bit; spib_txdata_5_n : buffer bit; spib_txdata_6_p : buffer bit; spib_txdata_6_n : buffer bit; spib_txdata_7_p : buffer bit; spib_txdata_7_n : buffer bit; spib_txdata_8_p : buffer bit; spib_txdata_8_n : buffer bit; spib_txdata_9_p : buffer bit; spib_txdata_9_n : buffer bit; spib_txsclk : inout bit; spib_txstat : inout bit_vector(1 downto 0); sram0_data_in : inout bit_vector(8 downto 0); sram0_data_out : inout bit_vector(8 downto 0); sram1_data_in : inout bit_vector(8 downto 0); sram1_data_out : inout bit_vector(8 downto 0); sram2_data_in : inout bit_vector(5 downto 0); sram2_data_out : inout bit_vector(5 downto 0); sram_cq_in : inout bit_vector(2 downto 0); sram_cq_n_in : inout bit_vector(2 downto 0); sram_k_0_p : inout bit; sram_k_1_p : inout bit; sram_k_2_p : inout bit; sram_r_n : inout bit; sram_rd_wr_addr : inout bit_vector(23 downto 0); sram_w_n : inout bit; test_in : inout bit; test_out : inout bit; wmaddr_0 : inout bit_vector(13 downto 0); wmaddr_1 : inout bit_vector(13 downto 0); wmba_0 : inout bit_vector(2 downto 0); wmba_1 : inout bit_vector(2 downto 0); wmcas_0 : inout bit; wmcas_1 : inout bit; wmck_0_p : inout bit; wmck_1_p : inout bit; wmcke_0 : inout bit; wmcke_1 : inout bit; wmcs0_0 : inout bit; wmcs0_1 : inout bit; wmcs1_0 : inout bit; wmcs1_1 : inout bit; wmdq_0 : inout bit_vector(63 downto 0); wmdq_1 : inout bit_vector(63 downto 0); wmdqs_0_0_p : inout bit; wmdqs_0_1_p : inout bit; wmdqs_0_2_p : inout bit; wmdqs_0_3_p : inout bit; wmdqs_0_4_p : inout bit; wmdqs_0_5_p : inout bit; wmdqs_0_6_p : inout bit; wmdqs_0_7_p : inout bit; wmdqs_1_0_p : inout bit; wmdqs_1_1_p : inout bit; wmdqs_1_2_p : inout bit; wmdqs_1_3_p : inout bit; wmdqs_1_4_p : inout bit; wmdqs_1_5_p : inout bit; wmdqs_1_6_p : inout bit; wmdqs_1_7_p : inout bit; wmecc_0 : inout bit_vector(7 downto 0); wmecc_1 : inout bit_vector(7 downto 0); wmodt0_0 : inout bit; wmodt0_1 : inout bit; wmodt1_0 : inout bit; wmodt1_1 : inout bit; wmras_0 : inout bit; wmras_1 : inout bit; wmwe_0 : inout bit; wmwe_1 : inout bit; xgmii_mdc : inout bit; xgmii_mdio : inout bit; jtag_tdi : in bit; jtag_tms : in bit; jtag_tck : in bit; jtag_tdo : out bit; jtag_trst : in bit; clk_ref_core_n : inout bit; clk_ref_rgmii_n : inout bit; nmck_0_n : inout bit; nmck_1_n : inout bit; nmdqs_0_0_n : inout bit; nmdqs_0_1_n : inout bit; nmdqs_1_0_n : inout bit; nmdqs_1_1_n : inout bit; smck_n : inout bit; smdqs_0_n : inout bit; smdqs_1_n : inout bit; smdqs_2_n : inout bit; smdqs_3_n : inout bit; smdqs_4_n : inout bit; smdqs_5_n : inout bit; smdqs_6_n : inout bit; smdqs_7_n : inout bit; sram_k_0_n : inout bit; sram_k_1_n : inout bit; sram_k_2_n : inout bit; wmck_0_n : inout bit; wmck_1_n : inout bit; wmdqs_0_0_n : inout bit; wmdqs_0_1_n : inout bit; wmdqs_0_2_n : inout bit; wmdqs_0_3_n : inout bit; wmdqs_0_4_n : inout bit; wmdqs_0_5_n : inout bit; wmdqs_0_6_n : inout bit; wmdqs_0_7_n : inout bit; wmdqs_1_0_n : inout bit; wmdqs_1_1_n : inout bit; wmdqs_1_2_n : inout bit; wmdqs_1_3_n : inout bit; wmdqs_1_4_n : inout bit; wmdqs_1_5_n : inout bit; wmdqs_1_6_n : inout bit; wmdqs_1_7_n : inout bit ); use STD_1149_1_1994.all; -- Get IEEE 1149.1-1994 attributes and definitions attribute COMPONENT_CONFORMANCE of np1e_top : entity is "STD_1149_1_1993"; attribute PIN_MAP of np1e_top : entity is PHYSICAL_PIN_MAP; constant DW : PIN_MAP_STRING := "clk_ref_core_p: F18," & "clk_ref_fast_0_p: P30," & "clk_ref_fast_0_n: P31," & "clk_ref_fast_1_p: R29," & "clk_ref_fast_1_n: R30," & "clk_ref_rgmii_p: J18," & "nmaddr0: (AN2,AL5,AL4,AM1,AM2,AK6,AK7,AJ7,AJ8,AH10,AH9,AH6,AH7,AK3)," & "nmaddr1: (AF3,AF4,AC10,AE1,AE2,AD7,AD6,AD3,AD4,AC7,AC8,AD1,AD2,AB9)," & "nmba0: (AK4,AK1,AJ4)," & "nmba1: (AC5,AC4,AB10)," & "nmcas_0: AK2," & "nmcas_1: AC1," & "nmck_0_p: AL1," & "nmck_1_p: AB4," & "nmcke_0: AF9," & "nmcke_1: Y3," & "nmcs0_0: AG11," & "nmcs0_1: AB6," & "nmcs1_0: AG10," & "nmcs1_1: AB7," & "nmdq_0: (AF6,AF7,AE10,AE11,AH1,AJ1,AJ2,AG7,AN1,AN4,AN5,AL7,AL8,AP3,AP4,AM6)," & "nmdq_1: (AA1,AA2,AA4,AA5,Y6,Y7,AA7,AA8,AG5,AE8,AE7,AD10,AD9,AE4,AE5,AH2)," & "nmdqs_0_0_p: AH3," & "nmdqs_0_1_p: AR4," & "nmdqs_1_0_p: AB1," & "nmdqs_1_1_p: AG1," & "nmecc_0: (AG8,AM7)," & "nmecc_1: (AA10,AG4)," & "nmodt0_0: AM4," & "nmodt0_1: AF2," & "nmodt1_0: AM3," & "nmodt1_1: AF1," & "nmras_0: AF10," & "nmras_1: Y4," & "nmwe_0: AJ5," & "nmwe_1: AC2," & "pci_ad: (B19,A17,A18,B17,A19,C20,D20,F20,B20,K21,L21,A20,D21,E21,B21,A21,A23,D23,E23,L23,K23,H23,G23,B24,C24,K25,K24,M24,D24,A24,L25,J24)," & "pci_c_be_n: (G20,H21,B23,F24)," & "pci_clk: C22," & "pci_devsel_n: J22," & "pci_frame_n: G22," & "pci_idsel: G24," & "pci_intr: M20," & "pci_irdy_n: F22," & "pci_par: G21," & "pci_perr_n: A22," & "pci_serr_n: B22," & "pci_stop_n: K22," & "pci_trdy_n: D22," & "pll_clk_ref_0: AT2," & "pll_clk_ref_1: AR1," & "pll_clk_ref_2: AV38," & "pll_clk_ref_3: AU37," & "reset_n: D18," & "rgmii_0_rd: (L39,L38,K39,K38)," & "rgmii_0_rx_ctl: K36," & "rgmii_0_rxclk: K37," & "rgmii_0_td: (M36,M37,L36,M34)," & "rgmii_0_tx_ctl: L35," & "rgmii_0_txclk: M33," & "rgmii_1_rd: (K30,K31,K34,L32)," & "rgmii_1_rx_ctl: K33," & "rgmii_1_rxclk: L30," & "rgmii_1_td: (L33,N32,N30,M31)," & "rgmii_1_tx_ctl: M30," & "rgmii_1_txclk: N29," & "rgmii_2_rd: (H34,J35,J36,J33)," & "rgmii_2_rx_ctl: J32," & "rgmii_2_rxclk: H33," & "rgmii_2_td: (H39,J39,J38,H38)," & "rgmii_2_tx_ctl: H37," & "rgmii_2_txclk: H36," & "rgmii_3_rd: (F34,E36,E38,E39)," & "rgmii_3_rx_ctl: F37," & "rgmii_3_rxclk: F36," & "rgmii_3_td: (G39,F39,F38,G38)," & "rgmii_3_tx_ctl: G36," & "rgmii_3_txclk: G35," & "rgmii_4_rd: (A36,A37,B37,B38)," & "rgmii_4_rx_ctl: C36," & "rgmii_4_rxclk: B36," & "rgmii_4_td: (D39,C38,D38,C39)," & "rgmii_4_tx_ctl: D36," & "rgmii_4_txclk: D37," & "rgmii_5_rd: (D33,B33,A33,E33)," & "rgmii_5_rx_ctl: D34," & "rgmii_5_rxclk: E34," & "rgmii_5_td: (A34,A35,B34,B35)," & "rgmii_5_tx_ctl: D35," & "rgmii_5_txclk: E35," & "rgmii_6_rd: (J28,K28,H29,F30)," & "rgmii_6_rx_ctl: G29," & "rgmii_6_rxclk: G30," & "rgmii_6_td: (K29,J30,G31,H31)," & "rgmii_6_tx_ctl: F32," & "rgmii_6_txclk: G32," & "rgmii_7_rd: (D30,C30,B30,A30)," & "rgmii_7_rx_ctl: A31," & "rgmii_7_rxclk: B31," & "rgmii_7_td: (B32,D32,E31,A32)," & "rgmii_7_tx_ctl: C32," & "rgmii_7_txclk: D31," & "rgmii_8_rd: (C28,A26,B27,E27)," & "rgmii_8_rx_ctl: D27," & "rgmii_8_rxclk: D28," & "rgmii_8_td: (D29,B29,A27,B28)," & "rgmii_8_tx_ctl: A29," & "rgmii_8_txclk: E29," & "rgmii_9_rd: (E25,F26,D25,J26)," & "rgmii_9_rx_ctl: G26," & "rgmii_9_rxclk: K26," & "rgmii_9_td: (L27,F28,K27,G27)," & "rgmii_9_tx_ctl: H27," & "rgmii_9_txclk: G28," & "rgmii_mdc: B25," & "rgmii_mdio: A25," & "smaddr: (P1,P2,T12,V12,N1,N2,R10,R11,N5,N4,M3,M4,N8,N7,L1)," & "smba: (L2,L4,L5)," & "smcas: M6," & "smck_p: M1," & "smcke: V1," & "smcs0: P10," & "smcs1: P9," & "smdq: (W1,W2,V3,V4,V6,V7,U7,U8,Y1,Y2,W7,Y9,Y10,W8,V9,W10,U1,U2,R1,T6,U10,U11,T7,T9,R2,R7,R8,P6,P7,T1,T2,P3,K6,K7,J5,M10,J4,H1,H2,G1,N11,N10,M9,L7,L8,K1,K2,H3,G2,F2,E1,E2,D3,H6,H7,G4,B2,B3,A3,C4,B4,D4,E4,C1)," & "smdqs_0_p: U5," & "smdqs_1_p: W5," & "smdqs_2_p: T3," & "smdqs_3_p: R4," & "smdqs_4_p: J1," & "smdqs_5_p: K3," & "smdqs_6_p: F3," & "smdqs_7_p: D1," & "smecc: (V10,W11,T10,P4,F1,H4,G5,C2)," & "smodt0: J7," & "smodt1: J8," & "smras: V2," & "smwe: M7," & "spia_rxclk_p: AE35," & "spia_rxclk_n: AE36," & "spia_rxctl_p: AF33," & "spia_rxctl_n: AF34," & "spia_rxdata_0_p: AD36," & "spia_rxdata_0_n: AD37," & "spia_rxdata_10_p: AG39," & "spia_rxdata_10_n: AG38," & "spia_rxdata_11_p: AF30," & "spia_rxdata_11_n: AF31," & "spia_rxdata_12_p: AH38," & "spia_rxdata_12_n: AH39," & "spia_rxdata_13_p: AH36," & "spia_rxdata_13_n: AH37," & "spia_rxdata_14_p: AG35," & "spia_rxdata_14_n: AG36," & "spia_rxdata_15_p: AG29," & "spia_rxdata_15_n: AG30," & "spia_rxdata_1_p: AD28," & "spia_rxdata_1_n: AE28," & "spia_rxdata_2_p: AE38," & "spia_rxdata_2_n: AE39," & "spia_rxdata_3_p: AD33," & "spia_rxdata_3_n: AD34," & "spia_rxdata_4_p: AD38," & "spia_rxdata_4_n: AD39," & "spia_rxdata_5_p: AD30," & "spia_rxdata_5_n: AD31," & "spia_rxdata_6_p: AE29," & "spia_rxdata_6_n: AE30," & "spia_rxdata_7_p: AF36," & "spia_rxdata_7_n: AF37," & "spia_rxdata_8_p: AE32," & "spia_rxdata_8_n: AE33," & "spia_rxdata_9_p: AF38," & "spia_rxdata_9_n: AF39," & "spia_rxhpar_p: AC29," & "spia_rxhpar_n: AC30," & "spia_rxsclk: N39," & "spia_rxstat: (P38,P37)," & "spia_txclk_p: AL35," & "spia_txclk_n: AL36," & "spia_txctl_p: AJ38," & "spia_txctl_n: AJ39," & "spia_txdata_0_p: AK33," & "spia_txdata_0_n: AK34," & "spia_txdata_10_p: AK38," & "spia_txdata_10_n: AK39," & "spia_txdata_11_p: AK36," & "spia_txdata_11_n: AK37," & "spia_txdata_12_p: AH33," & "spia_txdata_12_n: AH34," & "spia_txdata_13_p: AJ35," & "spia_txdata_13_n: AJ36," & "spia_txdata_14_p: AM36," & "spia_txdata_14_n: AM37," & "spia_txdata_15_p: AG32," & "spia_txdata_15_n: AG33," & "spia_txdata_1_p: AN38," & "spia_txdata_1_n: AN39," & "spia_txdata_2_p: AP38," & "spia_txdata_2_n: AP39," & "spia_txdata_3_p: AP36," & "spia_txdata_3_n: AP37," & "spia_txdata_4_p: AJ32," & "spia_txdata_4_n: AJ33," & "spia_txdata_5_p: AM33," & "spia_txdata_5_n: AM34," & "spia_txdata_6_p: AL38," & "spia_txdata_6_n: AL39," & "spia_txdata_7_p: AM38," & "spia_txdata_7_n: AM39," & "spia_txdata_8_p: AH30," & "spia_txdata_8_n: AH31," & "spia_txdata_9_p: AL32," & "spia_txdata_9_n: AL33," & "spia_txhpar_p: AN35," & "spia_txhpar_n: AN36," & "spia_txsclk: N33," & "spia_txstat: (P34,P33)," & "spib_rxclk_p: U35," & "spib_rxclk_n: U36," & "spib_rxctl_p: W29," & "spib_rxctl_n: W30," & "spib_rxdata_0_p: R35," & "spib_rxdata_0_n: R36," & "spib_rxdata_10_p: U38," & "spib_rxdata_10_n: U39," & "spib_rxdata_11_p: U29," & "spib_rxdata_11_n: U30," & "spib_rxdata_12_p: V38," & "spib_rxdata_12_n: V39," & "spib_rxdata_13_p: W32," & "spib_rxdata_13_n: W33," & "spib_rxdata_14_p: V33," & "spib_rxdata_14_n: V34," & "spib_rxdata_15_p: T28," & "spib_rxdata_15_n: U28," & "spib_rxdata_1_p: T30," & "spib_rxdata_1_n: T31," & "spib_rxdata_2_p: T36," & "spib_rxdata_2_n: T37," & "spib_rxdata_3_p: R32," & "spib_rxdata_3_n: R33," & "spib_rxdata_4_p: R38," & "spib_rxdata_4_n: R39," & "spib_rxdata_5_p: T33," & "spib_rxdata_5_n: T34," & "spib_rxdata_6_p: U32," & "spib_rxdata_6_n: U33," & "spib_rxdata_7_p: V36," & "spib_rxdata_7_n: V37," & "spib_rxdata_8_p: V30," & "spib_rxdata_8_n: V31," & "spib_rxdata_9_p: T38," & "spib_rxdata_9_n: T39," & "spib_rxsclk: N38," & "spib_rxstat: (M38,M39)," & "spib_txclk_p: AA35," & "spib_txclk_n: AA36," & "spib_txctl_p: W36," & "spib_txctl_n: W35," & "spib_txdata_0_p: AB30," & "spib_txdata_0_n: AB31," & "spib_txdata_10_p: W38," & "spib_txdata_10_n: W39," & "spib_txdata_11_p: Y36," & "spib_txdata_11_n: Y37," & "spib_txdata_12_p: Y33," & "spib_txdata_12_n: Y34," & "spib_txdata_13_p: Y30," & "spib_txdata_13_n: Y31," & "spib_txdata_14_p: AB36," & "spib_txdata_14_n: AB37," & "spib_txdata_15_p: AA28," & "spib_txdata_15_n: Y28," & "spib_txdata_1_p: AB38," & "spib_txdata_1_n: AB39," & "spib_txdata_2_p: AC38," & "spib_txdata_2_n: AC39," & "spib_txdata_3_p: AC35," & "spib_txdata_3_n: AC36," & "spib_txdata_4_p: AA32," & "spib_txdata_4_n: AA33," & "spib_txdata_5_p: AC32," & "spib_txdata_5_n: AC33," & "spib_txdata_6_p: Y38," & "spib_txdata_6_n: Y39," & "spib_txdata_7_p: AA38," & "spib_txdata_7_n: AA39," & "spib_txdata_8_p: AA29," & "spib_txdata_8_n: AA30," & "spib_txdata_9_p: AB33," & "spib_txdata_9_n: AB34," & "spib_txsclk: P36," & "spib_txstat: (N35,N36)," & "sram0_data_in: (D8,C8,B8,A8,A6,B6,G9,H9,G8)," & "sram0_data_out: (F6,E7,D7,B5,A5,A4,E5,D5,E9)," & "sram1_data_in: (K13,H11,D11,A11,B11,E11,G11,G10,L13)," & "sram1_data_out: (K11,L11,D10,A10,A9,B9,D9,F8,F10)," & "sram2_data_in: (H17,G17,E17,D17,C16,D16)," & "sram2_data_out: (K17,L17,E15,D15,F16,G16)," & "sram_cq_in: (B7,B12,B16)," & "sram_cq_n_in: (A7,A12,A16)," & "sram_k_0_p: C6," & "sram_k_1_p: C10," & "sram_k_2_p: A15," & "sram_r_n: A14," & "sram_rd_wr_addr: (C14,D14,B13,A13,G14,F14,H15,G15,J16,K16,E13,D13,H13,G13,L15,K15,J14,K14,K12,J12,D12,C12,G12,F12)," & "sram_w_n: B14," & "test_in: G19," & "test_out: J20," & "wmaddr_0: (AK28,AK29,AK27,AL28,AJ27,AH26,AK26,AL26,AW28,AV28,AM27,AR27,AT27,AN27)," & "wmaddr_1: (AW15,AT14,AV14,AW14,AU14,AV13,AW13,AM13,AN13,AV12,AW12,AU12,AT12,AV11)," & "wmba_0: (AJ25,AK25,AP26)," & "wmba_1: (AW11,AN12,AP12)," & "wmcas_0: AT26," & "wmcas_1: AR11," & "wmck_0_p: AT28," & "wmck_1_p: AR13," & "wmcke_0: AL30," & "wmcke_1: AU18," & "wmcs0_0: AW29," & "wmcs0_1: AR15," & "wmcs1_0: AV29," & "wmcs1_1: AT15," & "wmdq_0: (AN31,AM31,AP32,AN32,AW34,AU34,AT34,AN33,AV34,AV35,AT35,AR35,AR36,AW36,AV36,AU36,AV33,AW33,AV32,AW32,AW31,AV31,AT31,AR31,AW30,AV30,AU30,AT30,AP30,AN28,AP28,AN29,AW24,AW25,AT23,AT24,AR23,AN24,AL24,AK23,AV25,AV26,AW26,AV27,AW27,AP24,AN25,AM25,AN23,AM23,AL22,AJ23,AU22,AT22,AN21,AM21,AK19,AL20,AK20,AJ21,AK22,AW21,AV21,AT21)," & "wmdq_1: (AN18,AL18,AK18,AH16,AV19,AW19,AV18,AW18,AN20,AP20,AN19,AM19,AH20,AV20,AW20,AR19,AN17,AM17,AK17,AJ17,AT16,AP16,AN15,AM15,AV16,AW16,AU16,AV15,AN16,AL16,AK16,AK15,AW10,AV10,AU10,AT10,AK13,AJ13,AL12,AK12,AW8,AW7,AV8,AT7,AR7,AN11,AM11,AR9,AU8,AV7,AT6,AN9,AM9,AL10,AK10,AK11,AW6,AP6,AN7,AK9,AU2,AW5,AV5,AW3)," & "wmdqs_0_0_p: AT33," & "wmdqs_0_1_p: AW37," & "wmdqs_0_2_p: AU32," & "wmdqs_0_3_p: AT29," & "wmdqs_0_4_p: AV24," & "wmdqs_0_5_p: AR25," & "wmdqs_0_6_p: AW23," & "wmdqs_0_7_p: AW22," & "wmdqs_1_0_p: AR17," & "wmdqs_1_1_p: AT20," & "wmdqs_1_2_p: AV17," & "wmdqs_1_3_p: AN14," & "wmdqs_1_4_p: AV9," & "wmdqs_1_5_p: AT9," & "wmdqs_1_6_p: AV6," & "wmdqs_1_7_p: AV4," & "wmecc_0: (AP34,AT36,AN30,AM29,AK24,AN26,AK21,AR21)," & "wmecc_1: (AP18,AT19,AH18,AJ15,AN10,AP10,AJ11,AV3)," & "wmodt0_0: AP22," & "wmodt0_1: AN8," & "wmodt1_0: AN22," & "wmodt1_1: AP8," & "wmras_0: AK30," & "wmras_1: AT18," & "wmwe_0: AU26," & "wmwe_1: AT11," & "xgmii_mdc: D26," & "xgmii_mdio: C26," & "jtag_tdi: L19," & "jtag_tms: H19," & "jtag_tck: K19," & "jtag_tdo: M18," & "jtag_trst: K20," & "clk_ref_core_n: G18," & "clk_ref_rgmii_n: K18," & "nmck_0_n: AL2," & "nmck_1_n: AB3," & "nmdqs_0_0_n: AH4," & "nmdqs_0_1_n: AR5," & "nmdqs_1_0_n: AB2," & "nmdqs_1_1_n: AG2," & "smck_n: M2," & "smdqs_0_n: U4," & "smdqs_1_n: W4," & "smdqs_2_n: T4," & "smdqs_3_n: R5," & "smdqs_4_n: J2," & "smdqs_5_n: K4," & "smdqs_6_n: F4," & "smdqs_7_n: D2," & "sram_k_0_n: D6," & "sram_k_1_n: B10," & "sram_k_2_n: B15," & "wmck_0_n: AU28," & "wmck_1_n: AT13," & "wmdqs_0_0_n: AR33," & "wmdqs_0_1_n: AV37," & "wmdqs_0_2_n: AT32," & "wmdqs_0_3_n: AR29," & "wmdqs_0_4_n: AU24," & "wmdqs_0_5_n: AT25," & "wmdqs_0_6_n: AV23," & "wmdqs_0_7_n: AV22," & "wmdqs_1_0_n: AT17," & "wmdqs_1_1_n: AU20," & "wmdqs_1_2_n: AW17," & "wmdqs_1_3_n: AP14," & "wmdqs_1_4_n: AW9," & "wmdqs_1_5_n: AT8," & "wmdqs_1_6_n: AU6," & "wmdqs_1_7_n: AW4" ; attribute PORT_GROUPING of np1e_top : entity is "Differential_Voltage ( (clk_ref_fast_0_p, clk_ref_fast_0_n), " & "(clk_ref_fast_1_p, clk_ref_fast_1_n), " & "(spia_rxclk_p, spia_rxclk_n), " & "(spia_rxctl_p, spia_rxctl_n), " & "(spia_rxdata_0_p, spia_rxdata_0_n), " & "(spia_rxdata_10_p, spia_rxdata_10_n), " & "(spia_rxdata_11_p, spia_rxdata_11_n), " & "(spia_rxdata_12_p, spia_rxdata_12_n), " & "(spia_rxdata_13_p, spia_rxdata_13_n), " & "(spia_rxdata_14_p, spia_rxdata_14_n), " & "(spia_rxdata_15_p, spia_rxdata_15_n), " & "(spia_rxdata_1_p, spia_rxdata_1_n), " & "(spia_rxdata_2_p, spia_rxdata_2_n), " & "(spia_rxdata_3_p, spia_rxdata_3_n), " & "(spia_rxdata_4_p, spia_rxdata_4_n), " & "(spia_rxdata_5_p, spia_rxdata_5_n), " & "(spia_rxdata_6_p, spia_rxdata_6_n), " & "(spia_rxdata_7_p, spia_rxdata_7_n), " & "(spia_rxdata_8_p, spia_rxdata_8_n), " & "(spia_rxdata_9_p, spia_rxdata_9_n), " & "(spia_rxhpar_p, spia_rxhpar_n), " & "(spia_txclk_p, spia_txclk_n), " & "(spia_txctl_p, spia_txctl_n), " & "(spia_txdata_0_p, spia_txdata_0_n), " & "(spia_txdata_10_p, spia_txdata_10_n), " & "(spia_txdata_11_p, spia_txdata_11_n), " & "(spia_txdata_12_p, spia_txdata_12_n), " & "(spia_txdata_13_p, spia_txdata_13_n), " & "(spia_txdata_14_p, spia_txdata_14_n), " & "(spia_txdata_15_p, spia_txdata_15_n), " & "(spia_txdata_1_p, spia_txdata_1_n), " & "(spia_txdata_2_p, spia_txdata_2_n), " & "(spia_txdata_3_p, spia_txdata_3_n), " & "(spia_txdata_4_p, spia_txdata_4_n), " & "(spia_txdata_5_p, spia_txdata_5_n), " & "(spia_txdata_6_p, spia_txdata_6_n), " & "(spia_txdata_7_p, spia_txdata_7_n), " & "(spia_txdata_8_p, spia_txdata_8_n), " & "(spia_txdata_9_p, spia_txdata_9_n), " & "(spia_txhpar_p, spia_txhpar_n), " & "(spib_rxclk_p, spib_rxclk_n), " & "(spib_rxctl_p, spib_rxctl_n), " & "(spib_rxdata_0_p, spib_rxdata_0_n), " & "(spib_rxdata_10_p, spib_rxdata_10_n), " & "(spib_rxdata_11_p, spib_rxdata_11_n), " & "(spib_rxdata_12_p, spib_rxdata_12_n), " & "(spib_rxdata_13_p, spib_rxdata_13_n), " & "(spib_rxdata_14_p, spib_rxdata_14_n), " & "(spib_rxdata_15_p, spib_rxdata_15_n), " & "(spib_rxdata_1_p, spib_rxdata_1_n), " & "(spib_rxdata_2_p, spib_rxdata_2_n), " & "(spib_rxdata_3_p, spib_rxdata_3_n), " & "(spib_rxdata_4_p, spib_rxdata_4_n), " & "(spib_rxdata_5_p, spib_rxdata_5_n), " & "(spib_rxdata_6_p, spib_rxdata_6_n), " & "(spib_rxdata_7_p, spib_rxdata_7_n), " & "(spib_rxdata_8_p, spib_rxdata_8_n), " & "(spib_rxdata_9_p, spib_rxdata_9_n), " & "(spib_txclk_p, spib_txclk_n), " & "(spib_txctl_p, spib_txctl_n), " & "(spib_txdata_0_p, spib_txdata_0_n), " & "(spib_txdata_10_p, spib_txdata_10_n), " & "(spib_txdata_11_p, spib_txdata_11_n), " & "(spib_txdata_12_p, spib_txdata_12_n), " & "(spib_txdata_13_p, spib_txdata_13_n), " & "(spib_txdata_14_p, spib_txdata_14_n), " & "(spib_txdata_15_p, spib_txdata_15_n), " & "(spib_txdata_1_p, spib_txdata_1_n), " & "(spib_txdata_2_p, spib_txdata_2_n), " & "(spib_txdata_3_p, spib_txdata_3_n), " & "(spib_txdata_4_p, spib_txdata_4_n), " & "(spib_txdata_5_p, spib_txdata_5_n), " & "(spib_txdata_6_p, spib_txdata_6_n), " & "(spib_txdata_7_p, spib_txdata_7_n), " & "(spib_txdata_8_p, spib_txdata_8_n), " & "(spib_txdata_9_p, spib_txdata_9_n), " & "(clk_ref_core_p, clk_ref_core_n), " & "(clk_ref_rgmii_p, clk_ref_rgmii_n), " & "(nmck_0_p, nmck_0_n), " & "(nmck_1_p, nmck_1_n), " & "(nmdqs_0_0_p, nmdqs_0_0_n), " & "(nmdqs_0_1_p, nmdqs_0_1_n), " & "(nmdqs_1_0_p, nmdqs_1_0_n), " & "(nmdqs_1_1_p, nmdqs_1_1_n), " & "(smck_p, smck_n), " & "(smdqs_0_p, smdqs_0_n), " & "(smdqs_1_p, smdqs_1_n), " & "(smdqs_2_p, smdqs_2_n), " & "(smdqs_3_p, smdqs_3_n), " & "(smdqs_4_p, smdqs_4_n), " & "(smdqs_5_p, smdqs_5_n), " & "(smdqs_6_p, smdqs_6_n), " & "(smdqs_7_p, smdqs_7_n), " & "(sram_k_0_p, sram_k_0_n), " & "(sram_k_1_p, sram_k_1_n), " & "(sram_k_2_p, sram_k_2_n), " & "(wmck_0_p, wmck_0_n), " & "(wmck_1_p, wmck_1_n), " & "(wmdqs_0_0_p, wmdqs_0_0_n), " & "(wmdqs_0_1_p, wmdqs_0_1_n), " & "(wmdqs_0_2_p, wmdqs_0_2_n), " & "(wmdqs_0_3_p, wmdqs_0_3_n), " & "(wmdqs_0_4_p, wmdqs_0_4_n), " & "(wmdqs_0_5_p, wmdqs_0_5_n), " & "(wmdqs_0_6_p, wmdqs_0_6_n), " & "(wmdqs_0_7_p, wmdqs_0_7_n), " & "(wmdqs_1_0_p, wmdqs_1_0_n), " & "(wmdqs_1_1_p, wmdqs_1_1_n), " & "(wmdqs_1_2_p, wmdqs_1_2_n), " & "(wmdqs_1_3_p, wmdqs_1_3_n), " & "(wmdqs_1_4_p, wmdqs_1_4_n), " & "(wmdqs_1_5_p, wmdqs_1_5_n), " & "(wmdqs_1_6_p, wmdqs_1_6_n), " & "(wmdqs_1_7_p, wmdqs_1_7_n)) " ; attribute TAP_SCAN_IN of jtag_tdi : signal is true; attribute TAP_SCAN_MODE of jtag_tms : signal is true; attribute TAP_SCAN_OUT of jtag_tdo : signal is true; attribute TAP_SCAN_CLOCK of jtag_tck : signal is (1.00000000e+07, BOTH); attribute TAP_SCAN_RESET of jtag_trst : signal is true; attribute INSTRUCTION_LENGTH of np1e_top : entity is 4; attribute INSTRUCTION_OPCODE of np1e_top : entity is "EXTEST (0000)," & "BYPASS (1111)," & "SAMPLE (0010)," & --seba sample/preload -- "PRELOAD (0010)," & -- mod seba, add commento "IDCODE (0001)," & "CLAMP (0011)," & "HIGHZ (0100)," & "PAD_TEST (0111)," & "SMS_CTRL (0101)," & "JPC_WIR (1000)," & "JPC_WDR (1001)," & "SMS_WIR (1010)," & "SMS_WDR (1011)," & "PLL_TEST (1100)," & "DLL_TEST (1101)," & "SCAN_TEST (1110)"; attribute INSTRUCTION_CAPTURE of np1e_top : entity is "1001"; attribute IDCODE_REGISTER of np1e_top : entity is "0000" & -- Version Number "0000000010000000" & -- Part Number "00101111001" & -- Manufacturer ID "1"; -- Required by IEEE Std. 1149.1-1990 attribute REGISTER_ACCESS of np1e_top : entity is "BOUNDARY (EXTEST, SAMPLE), " & -- mod seba, era (EXTEST, SAMPLE, PRELOAD) "DEVICE_ID (IDCODE), " & "BYPASS (BYPASS, CLAMP, HIGHZ), " & "SMSG_DATA[20] (JPC_WIR, JPC_WDR, SMS_WIR, SMS_WDR), " & "SCAN_TEST[6] (SCAN_TEST), " & "PAD_TEST[10] (PAD_TEST), " & "DLL_TEST[35] (DLL_TEST), " & "PLL_TEST[37] (PLL_TEST), " & "SMS_CTRL[8] (SMS_CTRL)"; attribute BOUNDARY_LENGTH of np1e_top : entity is 1444; attribute BOUNDARY_REGISTER of np1e_top : entity is --- num cell port function safe [ccell disval rslt] "0 ( BC_2, *, control, 1)," & "1 ( BC_7, test_out, bidir, X, 0, 1, Z)," & "2 ( BC_2, *, control, 1)," & "3 ( BC_7, reset_n, bidir, X, 2, 1, Z)," & "4 ( BC_2, *, control, 1)," & "5 ( BC_7, test_in, bidir, X, 4, 1, Z)," & "6 ( BC_2, *, control, 1)," & "7 ( BC_7, pci_intr, bidir, X, 6, 1, Z)," & "8 ( BC_2, *, control, 1)," & "9 ( BC_7, pci_ad(3), bidir, X, 8, 1, Z)," & "10 ( BC_2, *, control, 1)," & "11 ( BC_7, pci_ad(2), bidir, X, 10, 1, Z)," & "12 ( BC_2, *, control, 1)," & "13 ( BC_7, pci_ad(1), bidir, X, 12, 1, Z)," & "14 ( BC_2, *, control, 1)," & "15 ( BC_7, pci_ad(7), bidir, X, 14, 1, Z)," & "16 ( BC_2, *, control, 1)," & "17 ( BC_7, pci_ad(0), bidir, X, 16, 1, Z)," & "18 ( BC_2, *, control, 1)," & "19 ( BC_7, pci_c_be_n(0), bidir, X, 18, 1, Z)," & "20 ( BC_2, *, control, 1)," & "21 ( BC_7, pci_ad(4), bidir, X, 20, 1, Z)," & "22 ( BC_2, *, control, 1)," & "23 ( BC_7, pci_ad(8), bidir, X, 22, 1, Z)," & "24 ( BC_2, *, control, 1)," & "25 ( BC_7, pci_ad(6), bidir, X, 24, 1, Z)," & "26 ( BC_2, *, control, 1)," & "27 ( BC_7, pci_ad(11), bidir, X, 26, 1, Z)," & "28 ( BC_2, *, control, 1)," & "29 ( BC_7, pci_ad(5), bidir, X, 28, 1, Z)," & "30 ( BC_2, *, control, 1)," & "31 ( BC_7, pci_ad(14), bidir, X, 30, 1, Z)," & "32 ( BC_2, *, control, 1)," & "33 ( BC_7, pci_ad(15), bidir, X, 32, 1, Z)," & "34 ( BC_2, *, control, 1)," & "35 ( BC_7, pci_ad(12), bidir, X, 34, 1, Z)," & "36 ( BC_2, *, control, 1)," & "37 ( BC_7, pci_ad(10), bidir, X, 36, 1, Z)," & "38 ( BC_2, *, control, 1)," & "39 ( BC_7, pci_ad(13), bidir, X, 38, 1, Z)," & "40 ( BC_2, *, control, 1)," & "41 ( BC_7, pci_ad(9), bidir, X, 40, 1, Z)," & "42 ( BC_2, *, control, 1)," & "43 ( BC_7, pci_serr_n, bidir, X, 42, 1, Z)," & "44 ( BC_2, *, control, 1)," & "45 ( BC_7, pci_c_be_n(1), bidir, X, 44, 1, Z)," & "46 ( BC_2, *, control, 1)," & "47 ( BC_7, pci_perr_n, bidir, X, 46, 1, Z)," & "48 ( BC_2, *, control, 1)," & "49 ( BC_7, pci_par, bidir, X, 48, 1, Z)," & "50 ( BC_2, *, control, 1)," & "51 ( BC_7, pci_clk, bidir, X, 50, 1, Z)," & "52 ( BC_2, *, control, 1)," & "53 ( BC_7, pci_stop_n, bidir, X, 52, 1, Z)," & "54 ( BC_2, *, control, 1)," & "55 ( BC_7, pci_trdy_n, bidir, X, 54, 1, Z)," & "56 ( BC_2, *, control, 1)," & "57 ( BC_7, pci_devsel_n, bidir, X, 56, 1, Z)," & "58 ( BC_2, *, control, 1)," & "59 ( BC_7, pci_c_be_n(2), bidir, X, 58, 1, Z)," & "60 ( BC_2, *, control, 1)," & "61 ( BC_7, pci_frame_n, bidir, X, 60, 1, Z)," & "62 ( BC_2, *, control, 1)," & "63 ( BC_7, pci_ad(16), bidir, X, 62, 1, Z)," & "64 ( BC_2, *, control, 1)," & "65 ( BC_7, pci_irdy_n, bidir, X, 64, 1, Z)," & "66 ( BC_2, *, control, 1)," & "67 ( BC_7, pci_ad(17), bidir, X, 66, 1, Z)," & "68 ( BC_2, *, control, 1)," & "69 ( BC_7, pci_ad(19), bidir, X, 68, 1, Z)," & "70 ( BC_2, *, control, 1)," & "71 ( BC_7, pci_ad(18), bidir, X, 70, 1, Z)," & "72 ( BC_2, *, control, 1)," & "73 ( BC_7, pci_ad(20), bidir, X, 72, 1, Z)," & "74 ( BC_2, *, control, 1)," & "75 ( BC_7, pci_ad(23), bidir, X, 74, 1, Z)," & "76 ( BC_2, *, control, 1)," & "77 ( BC_7, pci_ad(21), bidir, X, 76, 1, Z)," & "78 ( BC_2, *, control, 1)," & "79 ( BC_7, pci_ad(29), bidir, X, 78, 1, Z)," & "80 ( BC_2, *, control, 1)," & "81 ( BC_7, pci_ad(22), bidir, X, 80, 1, Z)," & "82 ( BC_2, *, control, 1)," & "83 ( BC_7, pci_ad(24), bidir, X, 82, 1, Z)," & "84 ( BC_2, *, control, 1)," & "85 ( BC_7, pci_ad(26), bidir, X, 84, 1, Z)," & "86 ( BC_2, *, control, 1)," & "87 ( BC_7, pci_ad(28), bidir, X, 86, 1, Z)," & "88 ( BC_2, *, control, 1)," & "89 ( BC_7, pci_ad(31), bidir, X, 88, 1, Z)," & "90 ( BC_2, *, control, 1)," & "91 ( BC_7, pci_ad(25), bidir, X, 90, 1, Z)," & "92 ( BC_2, *, control, 1)," & "93 ( BC_7, pci_idsel, bidir, X, 92, 1, Z)," & "94 ( BC_2, *, control, 1)," & "95 ( BC_7, pci_ad(27), bidir, X, 94, 1, Z)," & "96 ( BC_2, *, control, 1)," & "97 ( BC_7, pci_c_be_n(3), bidir, X, 96, 1, Z)," & "98 ( BC_2, *, control, 1)," & "99 ( BC_7, pci_ad(30), bidir, X, 98, 1, Z)," & "100 ( BC_2, *, control, 1)," & "101 ( BC_7, xgmii_mdc, bidir, X, 100, 1, Z)," & "102 ( BC_2, *, control, 1)," & "103 ( BC_7, rgmii_mdc, bidir, X, 102, 1, Z)," & "104 ( BC_2, *, control, 1)," & "105 ( BC_7, xgmii_mdio, bidir, X, 104, 1, Z)," & "106 ( BC_2, *, control, 1)," & "107 ( BC_7, rgmii_mdio, bidir, X, 106, 1, Z)," & "108 ( BC_2, *, control, 1)," & "109 ( BC_7, rgmii_9_rd(0), bidir, X, 108, 1, Z)," & "110 ( BC_2, *, control, 1)," & "111 ( BC_7, rgmii_9_rd(1), bidir, X, 110, 1, Z)," & "112 ( BC_2, *, control, 1)," & "113 ( BC_7, rgmii_9_rd(2), bidir, X, 112, 1, Z)," & "114 ( BC_2, *, control, 1)," & "115 ( BC_7, rgmii_9_rx_ctl, bidir, X, 114, 1, Z)," & "116 ( BC_2, *, control, 1)," & "117 ( BC_7, rgmii_9_rxclk, bidir, X, 116, 1, Z)," & "118 ( BC_2, *, control, 1)," & "119 ( BC_7, rgmii_9_rd(3), bidir, X, 118, 1, Z)," & "120 ( BC_2, *, control, 1)," & "121 ( BC_7, rgmii_8_rd(0), bidir, X, 120, 1, Z)," & "122 ( BC_2, *, control, 1)," & "123 ( BC_7, rgmii_8_rd(1), bidir, X, 122, 1, Z)," & "124 ( BC_2, *, control, 1)," & "125 ( BC_7, rgmii_8_rd(2), bidir, X, 124, 1, Z)," & "126 ( BC_2, *, control, 1)," & "127 ( BC_7, rgmii_8_rx_ctl, bidir, X, 126, 1, Z)," & "128 ( BC_2, *, control, 1)," & "129 ( BC_7, rgmii_8_rxclk, bidir, X, 128, 1, Z)," & "130 ( BC_2, *, control, 1)," & "131 ( BC_7, rgmii_8_rd(3), bidir, X, 130, 1, Z)," & "132 ( BC_2, *, control, 1)," & "133 ( BC_7, rgmii_9_tx_ctl, bidir, X, 132, 1, Z)," & "134 ( BC_2, *, control, 1)," & "135 ( BC_7, rgmii_9_td(3), bidir, X, 134, 1, Z)," & "136 ( BC_2, *, control, 1)," & "137 ( BC_7, rgmii_9_td(0), bidir, X, 136, 1, Z)," & "138 ( BC_2, *, control, 1)," & "139 ( BC_7, rgmii_9_td(2), bidir, X, 138, 1, Z)," & "140 ( BC_2, *, control, 1)," & "141 ( BC_7, rgmii_9_txclk, bidir, X, 140, 1, Z)," & "142 ( BC_2, *, control, 1)," & "143 ( BC_7, rgmii_8_td(2), bidir, X, 142, 1, Z)," & "144 ( BC_2, *, control, 1)," & "145 ( BC_7, rgmii_9_td(1), bidir, X, 144, 1, Z)," & "146 ( BC_2, *, control, 1)," & "147 ( BC_7, rgmii_8_td(3), bidir, X, 146, 1, Z)," & "148 ( BC_2, *, control, 1)," & "149 ( BC_7, rgmii_8_td(1), bidir, X, 148, 1, Z)," & "150 ( BC_2, *, control, 1)," & "151 ( BC_7, rgmii_8_txclk, bidir, X, 150, 1, Z)," & "152 ( BC_2, *, control, 1)," & "153 ( BC_7, rgmii_8_td(0), bidir, X, 152, 1, Z)," & "154 ( BC_2, *, control, 1)," & "155 ( BC_7, rgmii_8_tx_ctl, bidir, X, 154, 1, Z)," & "156 ( BC_2, *, control, 1)," & "157 ( BC_7, rgmii_7_rd(2), bidir, X, 156, 1, Z)," & "158 ( BC_2, *, control, 1)," & "159 ( BC_7, rgmii_7_rd(1), bidir, X, 158, 1, Z)," & "160 ( BC_2, *, control, 1)," & "161 ( BC_7, rgmii_7_rd(3), bidir, X, 160, 1, Z)," & "162 ( BC_2, *, control, 1)," & "163 ( BC_7, rgmii_7_rd(0), bidir, X, 162, 1, Z)," & "164 ( BC_2, *, control, 1)," & "165 ( BC_7, rgmii_7_rxclk, bidir, X, 164, 1, Z)," & "166 ( BC_2, *, control, 1)," & "167 ( BC_7, rgmii_7_rx_ctl, bidir, X, 166, 1, Z)," & "168 ( BC_2, *, control, 1)," & "169 ( BC_7, rgmii_6_rd(3), bidir, X, 168, 1, Z)," & "170 ( BC_2, *, control, 1)," & "171 ( BC_7, rgmii_6_rxclk, bidir, X, 170, 1, Z)," & "172 ( BC_2, *, control, 1)," & "173 ( BC_7, rgmii_6_rd(1), bidir, X, 172, 1, Z)," & "174 ( BC_2, *, control, 1)," & "175 ( BC_7, rgmii_6_rx_ctl, bidir, X, 174, 1, Z)," & "176 ( BC_2, *, control, 1)," & "177 ( BC_7, rgmii_6_rd(0), bidir, X, 176, 1, Z)," & "178 ( BC_2, *, control, 1)," & "179 ( BC_7, rgmii_6_rd(2), bidir, X, 178, 1, Z)," & "180 ( BC_2, *, control, 1)," & "181 ( BC_7, rgmii_7_td(1), bidir, X, 180, 1, Z)," & "182 ( BC_2, *, control, 1)," & "183 ( BC_7, rgmii_7_tx_ctl, bidir, X, 182, 1, Z)," & "184 ( BC_2, *, control, 1)," & "185 ( BC_7, rgmii_7_td(0), bidir, X, 184, 1, Z)," & "186 ( BC_2, *, control, 1)," & "187 ( BC_7, rgmii_7_td(3), bidir, X, 186, 1, Z)," & "188 ( BC_2, *, control, 1)," & "189 ( BC_7, rgmii_7_td(2), bidir, X, 188, 1, Z)," & "190 ( BC_2, *, control, 1)," & "191 ( BC_7, rgmii_6_td(2), bidir, X, 190, 1, Z)," & "192 ( BC_2, *, control, 1)," & "193 ( BC_7, rgmii_7_txclk, bidir, X, 192, 1, Z)," & "194 ( BC_2, *, control, 1)," & "195 ( BC_7, rgmii_6_td(3), bidir, X, 194, 1, Z)," & "196 ( BC_2, *, control, 1)," & "197 ( BC_7, rgmii_6_td(1), bidir, X, 196, 1, Z)," & "198 ( BC_2, *, control, 1)," & "199 ( BC_7, rgmii_6_td(0), bidir, X, 198, 1, Z)," & "200 ( BC_2, *, control, 1)," & "201 ( BC_7, rgmii_5_rd(1), bidir, X, 200, 1, Z)," & "202 ( BC_2, *, control, 1)," & "203 ( BC_7, rgmii_5_rd(2), bidir, X, 202, 1, Z)," & "204 ( BC_2, *, control, 1)," & "205 ( BC_7, rgmii_6_txclk, bidir, X, 204, 1, Z)," & "206 ( BC_2, *, control, 1)," & "207 ( BC_7, rgmii_5_rd(0), bidir, X, 206, 1, Z)," & "208 ( BC_2, *, control, 1)," & "209 ( BC_7, rgmii_6_tx_ctl, bidir, X, 208, 1, Z)," & "210 ( BC_2, *, control, 1)," & "211 ( BC_7, rgmii_5_rd(3), bidir, X, 210, 1, Z)," & "212 ( BC_2, *, control, 1)," & "213 ( BC_7, rgmii_5_rx_ctl, bidir, X, 212, 1, Z)," & "214 ( BC_2, *, control, 1)," & "215 ( BC_7, rgmii_5_rxclk, bidir, X, 214, 1, Z)," & "216 ( BC_2, *, control, 1)," & "217 ( BC_7, rgmii_5_td(0), bidir, X, 216, 1, Z)," & "218 ( BC_2, *, control, 1)," & "219 ( BC_7, rgmii_5_tx_ctl, bidir, X, 218, 1, Z)," & "220 ( BC_2, *, control, 1)," & "221 ( BC_7, rgmii_5_td(1), bidir, X, 220, 1, Z)," & "222 ( BC_2, *, control, 1)," & "223 ( BC_7, rgmii_5_td(3), bidir, X, 222, 1, Z)," & "224 ( BC_2, *, control, 1)," & "225 ( BC_7, rgmii_5_txclk, bidir, X, 224, 1, Z)," & "226 ( BC_2, *, control, 1)," & "227 ( BC_7, rgmii_5_td(2), bidir, X, 226, 1, Z)," & "228 ( BC_2, *, control, 1)," & "229 ( BC_7, rgmii_4_rd(3), bidir, X, 228, 1, Z)," & "230 ( BC_2, *, control, 1)," & "231 ( BC_7, rgmii_4_rd(2), bidir, X, 230, 1, Z)," & "232 ( BC_2, *, control, 1)," & "233 ( BC_7, rgmii_4_rd(1), bidir, X, 232, 1, Z)," & "234 ( BC_2, *, control, 1)," & "235 ( BC_7, rgmii_4_rxclk, bidir, X, 234, 1, Z)," & "236 ( BC_2, *, control, 1)," & "237 ( BC_7, rgmii_4_rd(0), bidir, X, 236, 1, Z)," & "238 ( BC_2, *, control, 1)," & "239 ( BC_7, rgmii_4_rx_ctl, bidir, X, 238, 1, Z)," & "240 ( BC_2, *, control, 1)," & "241 ( BC_7, rgmii_4_td(3), bidir, X, 240, 1, Z)," & "242 ( BC_2, *, control, 1)," & "243 ( BC_7, rgmii_4_td(1), bidir, X, 242, 1, Z)," & "244 ( BC_2, *, control, 1)," & "245 ( BC_7, rgmii_4_td(0), bidir, X, 244, 1, Z)," & "246 ( BC_2, *, control, 1)," & "247 ( BC_7, rgmii_4_tx_ctl, bidir, X, 246, 1, Z)," & "248 ( BC_2, *, control, 1)," & "249 ( BC_7, rgmii_4_td(2), bidir, X, 248, 1, Z)," & "250 ( BC_2, *, control, 1)," & "251 ( BC_7, rgmii_4_txclk, bidir, X, 250, 1, Z)," & "252 ( BC_2, *, control, 1)," & "253 ( BC_7, rgmii_3_rd(3), bidir, X, 252, 1, Z)," & "254 ( BC_2, *, control, 1)," & "255 ( BC_7, rgmii_3_rxclk, bidir, X, 254, 1, Z)," & "256 ( BC_2, *, control, 1)," & "257 ( BC_7, rgmii_3_rd(2), bidir, X, 256, 1, Z)," & "258 ( BC_2, *, control, 1)," & "259 ( BC_7, rgmii_3_rx_ctl, bidir, X, 258, 1, Z)," & "260 ( BC_2, *, control, 1)," & "261 ( BC_7, rgmii_3_td(2), bidir, X, 260, 1, Z)," & "262 ( BC_2, *, control, 1)," & "263 ( BC_7, rgmii_3_rd(1), bidir, X, 262, 1, Z)," & "264 ( BC_2, *, control, 1)," & "265 ( BC_7, rgmii_3_rd(0), bidir, X, 264, 1, Z)," & "266 ( BC_2, *, control, 1)," & "267 ( BC_7, rgmii_3_td(1), bidir, X, 266, 1, Z)," & "268 ( BC_2, *, control, 1)," & "269 ( BC_7, rgmii_3_td(3), bidir, X, 268, 1, Z)," & "270 ( BC_2, *, control, 1)," & "271 ( BC_7, rgmii_3_td(0), bidir, X, 270, 1, Z)," & "272 ( BC_2, *, control, 1)," & "273 ( BC_7, rgmii_3_tx_ctl, bidir, X, 272, 1, Z)," & "274 ( BC_2, *, control, 1)," & "275 ( BC_7, rgmii_3_txclk, bidir, X, 274, 1, Z)," & "276 ( BC_2, *, control, 1)," & "277 ( BC_7, rgmii_2_rx_ctl, bidir, X, 276, 1, Z)," & "278 ( BC_2, *, control, 1)," & "279 ( BC_7, rgmii_2_rxclk, bidir, X, 278, 1, Z)," & "280 ( BC_2, *, control, 1)," & "281 ( BC_7, rgmii_2_rd(3), bidir, X, 280, 1, Z)," & "282 ( BC_2, *, control, 1)," & "283 ( BC_7, rgmii_2_rd(0), bidir, X, 282, 1, Z)," & "284 ( BC_2, *, control, 1)," & "285 ( BC_7, rgmii_2_rd(1), bidir, X, 284, 1, Z)," & "286 ( BC_2, *, control, 1)," & "287 ( BC_7, rgmii_2_rd(2), bidir, X, 286, 1, Z)," & "288 ( BC_2, *, control, 1)," & "289 ( BC_7, rgmii_2_tx_ctl, bidir, X, 288, 1, Z)," & "290 ( BC_2, *, control, 1)," & "291 ( BC_7, rgmii_2_txclk, bidir, X, 290, 1, Z)," & "292 ( BC_2, *, control, 1)," & "293 ( BC_7, rgmii_2_td(1), bidir, X, 292, 1, Z)," & "294 ( BC_2, *, control, 1)," & "295 ( BC_7, rgmii_2_td(3), bidir, X, 294, 1, Z)," & "296 ( BC_2, *, control, 1)," & "297 ( BC_7, rgmii_2_td(2), bidir, X, 296, 1, Z)," & "298 ( BC_2, *, control, 1)," & "299 ( BC_7, rgmii_2_td(0), bidir, X, 298, 1, Z)," & "300 ( BC_2, *, control, 1)," & "301 ( BC_7, rgmii_1_rx_ctl, bidir, X, 300, 1, Z)," & "302 ( BC_2, *, control, 1)," & "303 ( BC_7, rgmii_1_rd(2), bidir, X, 302, 1, Z)," & "304 ( BC_2, *, control, 1)," & "305 ( BC_7, rgmii_1_rd(1), bidir, X, 304, 1, Z)," & "306 ( BC_2, *, control, 1)," & "307 ( BC_7, rgmii_1_rd(0), bidir, X, 306, 1, Z)," & "308 ( BC_2, *, control, 1)," & "309 ( BC_7, rgmii_0_rd(2), bidir, X, 308, 1, Z)," & "310 ( BC_2, *, control, 1)," & "311 ( BC_7, rgmii_1_rd(3), bidir, X, 310, 1, Z)," & "312 ( BC_2, *, control, 1)," & "313 ( BC_7, rgmii_0_rd(0), bidir, X, 312, 1, Z)," & "314 ( BC_2, *, control, 1)," & "315 ( BC_7, rgmii_1_rxclk, bidir, X, 314, 1, Z)," & "316 ( BC_2, *, control, 1)," & "317 ( BC_7, rgmii_0_rxclk, bidir, X, 316, 1, Z)," & "318 ( BC_2, *, control, 1)," & "319 ( BC_7, rgmii_0_rd(3), bidir, X, 318, 1, Z)," & "320 ( BC_2, *, control, 1)," & "321 ( BC_7, rgmii_0_rx_ctl, bidir, X, 320, 1, Z)," & "322 ( BC_2, *, control, 1)," & "323 ( BC_7, rgmii_0_rd(1), bidir, X, 322, 1, Z)," & "324 ( BC_2, *, control, 1)," & "325 ( BC_7, rgmii_1_td(2), bidir, X, 324, 1, Z)," & "326 ( BC_2, *, control, 1)," & "327 ( BC_7, rgmii_1_txclk, bidir, X, 326, 1, Z)," & "328 ( BC_2, *, control, 1)," & "329 ( BC_7, rgmii_1_td(3), bidir, X, 328, 1, Z)," & "330 ( BC_2, *, control, 1)," & "331 ( BC_7, rgmii_1_tx_ctl, bidir, X, 330, 1, Z)," & "332 ( BC_2, *, control, 1)," & "333 ( BC_7, rgmii_1_td(0), bidir, X, 332, 1, Z)," & "334 ( BC_2, *, control, 1)," & "335 ( BC_7, rgmii_1_td(1), bidir, X, 334, 1, Z)," & "336 ( BC_2, *, control, 1)," & "337 ( BC_7, rgmii_0_td(2), bidir, X, 336, 1, Z)," & "338 ( BC_2, *, control, 1)," & "339 ( BC_7, rgmii_0_tx_ctl, bidir, X, 338, 1, Z)," & "340 ( BC_2, *, control, 1)," & "341 ( BC_7, rgmii_0_td(0), bidir, X, 340, 1, Z)," & "342 ( BC_2, *, control, 1)," & "343 ( BC_7, rgmii_0_txclk, bidir, X, 342, 1, Z)," & "344 ( BC_2, *, control, 1)," & "345 ( BC_7, rgmii_0_td(1), bidir, X, 344, 1, Z)," & "346 ( BC_2, *, control, 1)," & "347 ( BC_7, rgmii_0_td(3), bidir, X, 346, 1, Z)," & "348 ( BC_2, *, control, 1)," & "349 ( BC_7, spib_rxstat(1), bidir, X, 348, 1, Z)," & "350 ( BC_2, *, control, 1)," & "351 ( BC_7, spib_rxstat(0), bidir, X, 350, 1, Z)," & "352 ( BC_2, *, control, 1)," & "353 ( BC_7, spib_rxsclk, bidir, X, 352, 1, Z)," & "354 ( BC_2, *, control, 1)," & "355 ( BC_7, spib_txsclk, bidir, X, 354, 1, Z)," & "356 ( BC_2, *, control, 1)," & "357 ( BC_7, spib_txstat(0), bidir, X, 356, 1, Z)," & "358 ( BC_2, *, control, 1)," & "359 ( BC_7, spia_txsclk, bidir, X, 358, 1, Z)," & "360 ( BC_2, *, control, 1)," & "361 ( BC_7, spib_txstat(1), bidir, X, 360, 1, Z)," & "362 ( BC_2, *, control, 1)," & "363 ( BC_7, spia_rxsclk, bidir, X, 362, 1, Z)," & "364 ( BC_2, *, control, 1)," & "365 ( BC_7, spia_txstat(1), bidir, X, 364, 1, Z)," & "366 ( BC_2, *, control, 1)," & "367 ( BC_7, spia_rxstat(0), bidir, X, 366, 1, Z)," & "368 ( BC_2, *, control, 1)," & "369 ( BC_7, spia_txstat(0), bidir, X, 368, 1, Z)," & "370 ( BC_2, *, control, 1)," & "371 ( BC_7, spia_rxstat(1), bidir, X, 370, 1, Z)," & "372 ( BC_2, clk_ref_fast_0_p, input, X)," & "373 ( BC_2, clk_ref_fast_1_p, input, X)," & "374 ( BC_2, spib_rxdata_0_p, input, X)," & "375 ( BC_2, spib_rxdata_3_p, input, X)," & "376 ( BC_2, spib_rxdata_1_p, input, X)," & "377 ( BC_2, spib_rxdata_4_p, input, X)," & "378 ( BC_2, spib_rxdata_11_p, input, X)," & "379 ( BC_2, spib_rxdata_15_p, input, X)," & "380 ( BC_2, spib_rxdata_5_p, input, X)," & "381 ( BC_2, spib_rxdata_2_p, input, X)," & "382 ( BC_2, spib_rxclk_p, input, X)," & "383 ( BC_2, spib_rxdata_6_p, input, X)," & "384 ( BC_2, spib_rxdata_9_p, input, X)," & "385 ( BC_2, spib_rxdata_10_p, input, X)," & "386 ( BC_2, spib_rxdata_14_p, input, X)," & "387 ( BC_2, spib_rxdata_8_p, input, X)," & "388 ( BC_2, spib_rxdata_7_p, input, X)," & "389 ( BC_2, spib_rxdata_12_p, input, X)," & "390 ( BC_2, spib_rxdata_13_p, input, X)," & "391 ( BC_2, spib_rxctl_p, input, X)," & "392 ( BC_2, spib_txctl_p, output2, X)," & "393 ( BC_2, spib_txdata_10_p, output2, X)," & "394 ( BC_2, spib_txdata_13_p, output2, X)," & "395 ( BC_2, spib_txdata_15_p, output2, X)," & "396 ( BC_2, spib_txdata_12_p, output2, X)," & "397 ( BC_2, spib_txdata_11_p, output2, X)," & "398 ( BC_2, spib_txdata_4_p, output2, X)," & "399 ( BC_2, spib_txdata_8_p, output2, X)," & "400 ( BC_2, spib_txdata_6_p, output2, X)," & "401 ( BC_2, spib_txclk_p, output2, X)," & "402 ( BC_2, spib_txdata_7_p, output2, X)," & "403 ( BC_2, spib_txdata_0_p, output2, X)," & "404 ( BC_2, spib_txdata_9_p, output2, X)," & "405 ( BC_2, spib_txdata_14_p, output2, X)," & "406 ( BC_2, spib_txdata_2_p, output2, X)," & "407 ( BC_2, spib_txdata_1_p, output2, X)," & "408 ( BC_2, spib_txdata_5_p, output2, X)," & "409 ( BC_2, spib_txdata_3_p, output2, X)," & "410 ( BC_2, spia_rxdata_4_p, input, X)," & "411 ( BC_2, spia_rxdata_0_p, input, X)," & "412 ( BC_2, spia_rxdata_3_p, input, X)," & "413 ( BC_2, spia_rxhpar_p, input, X)," & "414 ( BC_2, spia_rxclk_p, input, X)," & "415 ( BC_2, spia_rxdata_2_p, input, X)," & "416 ( BC_2, spia_rxdata_1_p, input, X)," & "417 ( BC_2, spia_rxdata_5_p, input, X)," & "418 ( BC_2, spia_rxdata_8_p, input, X)," & "419 ( BC_2, spia_rxdata_6_p, input, X)," & "420 ( BC_2, spia_rxdata_7_p, input, X)," & "421 ( BC_2, spia_rxdata_9_p, input, X)," & "422 ( BC_2, spia_rxctl_p, input, X)," & "423 ( BC_2, spia_rxdata_10_p, input, X)," & "424 ( BC_2, spia_rxdata_11_p, input, X)," & "425 ( BC_2, spia_rxdata_14_p, input, X)," & "426 ( BC_2, spia_rxdata_12_p, input, X)," & "427 ( BC_2, spia_rxdata_15_p, input, X)," & "428 ( BC_2, spia_txdata_15_p, output2, X)," & "429 ( BC_2, spia_rxdata_13_p, input, X)," & "430 ( BC_2, spia_txctl_p, output2, X)," & "431 ( BC_2, spia_txdata_12_p, output2, X)," & "432 ( BC_2, spia_txdata_13_p, output2, X)," & "433 ( BC_2, spia_txdata_10_p, output2, X)," & "434 ( BC_2, spia_txdata_4_p, output2, X)," & "435 ( BC_2, spia_txdata_8_p, output2, X)," & "436 ( BC_2, spia_txdata_6_p, output2, X)," & "437 ( BC_2, spia_txdata_11_p, output2, X)," & "438 ( BC_2, spia_txclk_p, output2, X)," & "439 ( BC_2, spia_txdata_0_p, output2, X)," & "440 ( BC_2, spia_txdata_14_p, output2, X)," & "441 ( BC_2, spia_txdata_7_p, output2, X)," & "442 ( BC_2, spia_txdata_9_p, output2, X)," & "443 ( BC_2, spia_txdata_5_p, output2, X)," & "444 ( BC_2, spia_txhpar_p, output2, X)," & "445 ( BC_2, spia_txdata_1_p, output2, X)," & "446 ( BC_2, spia_txdata_2_p, output2, X)," & "447 ( BC_2, spia_txdata_3_p, output2, X)," & "448 ( BC_4, pll_clk_ref_3, input, X)," & "449 ( BC_4, pll_clk_ref_2, input, X)," & "450 ( BC_2, *, control, 1)," & "451 ( BC_7, wmdqs_0_1_p, bidir, X, 450, 1, Z)," & "452 ( BC_2, *, control, 1)," & "453 ( BC_7, wmdq_0(15), bidir, X, 452, 1, Z)," & "454 ( BC_2, *, control, 1)," & "455 ( BC_7, wmdq_0(13), bidir, X, 454, 1, Z)," & "456 ( BC_2, *, control, 1)," & "457 ( BC_7, wmdq_0(9), bidir, X, 456, 1, Z)," & "458 ( BC_2, *, control, 1)," & "459 ( BC_7, wmecc_0(1), bidir, X, 458, 1, Z)," & "460 ( BC_2, *, control, 1)," & "461 ( BC_7, wmdq_0(14), bidir, X, 460, 1, Z)," & "462 ( BC_2, *, control, 1)," & "463 ( BC_7, wmdq_0(12), bidir, X, 462, 1, Z)," & "464 ( BC_2, *, control, 1)," & "465 ( BC_7, wmdq_0(11), bidir, X, 464, 1, Z)," & "466 ( BC_2, *, control, 1)," & "467 ( BC_7, wmdq_0(10), bidir, X, 466, 1, Z)," & "468 ( BC_2, *, control, 1)," & "469 ( BC_7, wmdq_0(8), bidir, X, 468, 1, Z)," & "470 ( BC_2, *, control, 1)," & "471 ( BC_7, wmdq_0(4), bidir, X, 470, 1, Z)," & "472 ( BC_2, *, control, 1)," & "473 ( BC_7, wmdq_0(7), bidir, X, 472, 1, Z)," & "474 ( BC_2, *, control, 1)," & "475 ( BC_7, wmdq_0(5), bidir, X, 474, 1, Z)," & "476 ( BC_2, *, control, 1)," & "477 ( BC_7, wmecc_0(0), bidir, X, 476, 1, Z)," & "478 ( BC_2, *, control, 1)," & "479 ( BC_7, wmdq_0(6), bidir, X, 478, 1, Z)," & "480 ( BC_2, *, control, 1)," & "481 ( BC_7, wmdqs_0_0_p, bidir, X, 480, 1, Z)," & "482 ( BC_2, *, control, 1)," & "483 ( BC_7, wmras_0, bidir, X, 482, 1, Z)," & "484 ( BC_2, *, control, 1)," & "485 ( BC_7, wmcke_0, bidir, X, 484, 1, Z)," & "486 ( BC_2, *, control, 1)," & "487 ( BC_7, wmdq_0(1), bidir, X, 486, 1, Z)," & "488 ( BC_2, *, control, 1)," & "489 ( BC_7, wmdq_0(2), bidir, X, 488, 1, Z)," & "490 ( BC_2, *, control, 1)," & "491 ( BC_7, wmdq_0(0), bidir, X, 490, 1, Z)," & "492 ( BC_2, *, control, 1)," & "493 ( BC_7, wmdq_0(3), bidir, X, 492, 1, Z)," & "494 ( BC_2, *, control, 1)," & "495 ( BC_7, wmdq_0(16), bidir, X, 494, 1, Z)," & "496 ( BC_2, *, control, 1)," & "497 ( BC_7, wmdq_0(17), bidir, X, 496, 1, Z)," & "498 ( BC_2, *, control, 1)," & "499 ( BC_7, wmdq_0(18), bidir, X, 498, 1, Z)," & "500 ( BC_2, *, control, 1)," & "501 ( BC_7, wmdq_0(19), bidir, X, 500, 1, Z)," & "502 ( BC_2, *, control, 1)," & "503 ( BC_7, wmdq_0(21), bidir, X, 502, 1, Z)," & "504 ( BC_2, *, control, 1)," & "505 ( BC_7, wmdqs_0_2_p, bidir, X, 504, 1, Z)," & "506 ( BC_2, *, control, 1)," & "507 ( BC_7, wmdq_0(20), bidir, X, 506, 1, Z)," & "508 ( BC_2, *, control, 1)," & "509 ( BC_7, wmdq_0(23), bidir, X, 508, 1, Z)," & "510 ( BC_2, *, control, 1)," & "511 ( BC_7, wmdq_0(22), bidir, X, 510, 1, Z)," & "512 ( BC_2, *, control, 1)," & "513 ( BC_7, wmecc_0(2), bidir, X, 512, 1, Z)," & "514 ( BC_2, *, control, 1)," & "515 ( BC_7, wmdq_0(28), bidir, X, 514, 1, Z)," & "516 ( BC_2, *, control, 1)," & "517 ( BC_7, wmdq_0(27), bidir, X, 516, 1, Z)," & "518 ( BC_2, *, control, 1)," & "519 ( BC_7, wmdq_0(31), bidir, X, 518, 1, Z)," & "520 ( BC_2, *, control, 1)," & "521 ( BC_7, wmdq_0(26), bidir, X, 520, 1, Z)," & "522 ( BC_2, *, control, 1)," & "523 ( BC_7, wmecc_0(3), bidir, X, 522, 1, Z)," & "524 ( BC_2, *, control, 1)," & "525 ( BC_7, wmdqs_0_3_p, bidir, X, 524, 1, Z)," & "526 ( BC_2, *, control, 1)," & "527 ( BC_7, wmdq_0(25), bidir, X, 526, 1, Z)," & "528 ( BC_2, *, control, 1)," & "529 ( BC_7, wmdq_0(24), bidir, X, 528, 1, Z)," & "530 ( BC_2, *, control, 1)," & "531 ( BC_7, wmaddr_0(0), bidir, X, 530, 1, Z)," & "532 ( BC_2, *, control, 1)," & "533 ( BC_7, wmcs0_0, bidir, X, 532, 1, Z)," & "534 ( BC_2, *, control, 1)," & "535 ( BC_7, wmaddr_0(1), bidir, X, 534, 1, Z)," & "536 ( BC_2, *, control, 1)," & "537 ( BC_7, wmcs1_0, bidir, X, 536, 1, Z)," & "538 ( BC_2, *, control, 1)," & "539 ( BC_7, wmdq_0(29), bidir, X, 538, 1, Z)," & "540 ( BC_2, *, control, 1)," & "541 ( BC_7, wmdq_0(30), bidir, X, 540, 1, Z)," & "542 ( BC_2, *, control, 1)," & "543 ( BC_7, wmaddr_0(2), bidir, X, 542, 1, Z)," & "544 ( BC_2, *, control, 1)," & "545 ( BC_7, wmaddr_0(3), bidir, X, 544, 1, Z)," & "546 ( BC_2, *, control, 1)," & "547 ( BC_7, wmaddr_0(6), bidir, X, 546, 1, Z)," & "548 ( BC_2, *, control, 1)," & "549 ( BC_7, wmaddr_0(4), bidir, X, 548, 1, Z)," & "550 ( BC_2, *, control, 1)," & "551 ( BC_7, wmaddr_0(7), bidir, X, 550, 1, Z)," & "552 ( BC_2, *, control, 1)," & "553 ( BC_7, wmaddr_0(5), bidir, X, 552, 1, Z)," & "554 ( BC_2, *, control, 1)," & "555 ( BC_7, wmck_0_p, bidir, X, 554, 1, Z)," & "556 ( BC_2, *, control, 1)," & "557 ( BC_7, wmaddr_0(8), bidir, X, 556, 1, Z)," & "558 ( BC_2, *, control, 1)," & "559 ( BC_7, wmaddr_0(9), bidir, X, 558, 1, Z)," & "560 ( BC_2, *, control, 1)," & "561 ( BC_7, wmaddr_0(10), bidir, X, 560, 1, Z)," & "562 ( BC_2, *, control, 1)," & "563 ( BC_7, wmaddr_0(11), bidir, X, 562, 1, Z)," & "564 ( BC_2, *, control, 1)," & "565 ( BC_7, wmaddr_0(13), bidir, X, 564, 1, Z)," & "566 ( BC_2, *, control, 1)," & "567 ( BC_7, wmaddr_0(12), bidir, X, 566, 1, Z)," & "568 ( BC_2, *, control, 1)," & "569 ( BC_7, wmba_0(0), bidir, X, 568, 1, Z)," & "570 ( BC_2, *, control, 1)," & "571 ( BC_7, wmba_0(1), bidir, X, 570, 1, Z)," & "572 ( BC_2, *, control, 1)," & "573 ( BC_7, wmba_0(2), bidir, X, 572, 1, Z)," & "574 ( BC_2, *, control, 1)," & "575 ( BC_7, wmecc_0(5), bidir, X, 574, 1, Z)," & "576 ( BC_2, *, control, 1)," & "577 ( BC_7, wmdq_0(43), bidir, X, 576, 1, Z)," & "578 ( BC_2, *, control, 1)," & "579 ( BC_7, wmcas_0, bidir, X, 578, 1, Z)," & "580 ( BC_2, *, control, 1)," & "581 ( BC_7, wmdq_0(44), bidir, X, 580, 1, Z)," & "582 ( BC_2, *, control, 1)," & "583 ( BC_7, wmwe_0, bidir, X, 582, 1, Z)," & "584 ( BC_2, *, control, 1)," & "585 ( BC_7, wmdq_0(47), bidir, X, 584, 1, Z)," & "586 ( BC_2, *, control, 1)," & "587 ( BC_7, wmdq_0(46), bidir, X, 586, 1, Z)," & "588 ( BC_2, *, control, 1)," & "589 ( BC_7, wmdq_0(42), bidir, X, 588, 1, Z)," & "590 ( BC_2, *, control, 1)," & "591 ( BC_7, wmdq_0(41), bidir, X, 590, 1, Z)," & "592 ( BC_2, *, control, 1)," & "593 ( BC_7, wmdq_0(40), bidir, X, 592, 1, Z)," & "594 ( BC_2, *, control, 1)," & "595 ( BC_7, wmdqs_0_5_p, bidir, X, 594, 1, Z)," & "596 ( BC_2, *, control, 1)," & "597 ( BC_7, wmdq_0(33), bidir, X, 596, 1, Z)," & "598 ( BC_2, *, control, 1)," & "599 ( BC_7, wmdq_0(37), bidir, X, 598, 1, Z)," & "600 ( BC_2, *, control, 1)," & "601 ( BC_7, wmdq_0(45), bidir, X, 600, 1, Z)," & "602 ( BC_2, *, control, 1)," & "603 ( BC_7, wmdq_0(38), bidir, X, 602, 1, Z)," & "604 ( BC_2, *, control, 1)," & "605 ( BC_7, wmecc_0(4), bidir, X, 604, 1, Z)," & "606 ( BC_2, *, control, 1)," & "607 ( BC_7, wmdq_0(35), bidir, X, 606, 1, Z)," & "608 ( BC_2, *, control, 1)," & "609 ( BC_7, wmdqs_0_4_p, bidir, X, 608, 1, Z)," & "610 ( BC_2, *, control, 1)," & "611 ( BC_7, wmdq_0(32), bidir, X, 610, 1, Z)," & "612 ( BC_2, *, control, 1)," & "613 ( BC_7, wmdq_0(49), bidir, X, 612, 1, Z)," & "614 ( BC_2, *, control, 1)," & "615 ( BC_7, wmdq_0(48), bidir, X, 614, 1, Z)," & "616 ( BC_2, *, control, 1)," & "617 ( BC_7, wmdq_0(39), bidir, X, 616, 1, Z)," & "618 ( BC_2, *, control, 1)," & "619 ( BC_7, wmdq_0(51), bidir, X, 618, 1, Z)," & "620 ( BC_2, *, control, 1)," & "621 ( BC_7, wmdq_0(36), bidir, X, 620, 1, Z)," & "622 ( BC_2, *, control, 1)," & "623 ( BC_7, wmdqs_0_6_p, bidir, X, 622, 1, Z)," & "624 ( BC_2, *, control, 1)," & "625 ( BC_7, wmdq_0(34), bidir, X, 624, 1, Z)," & "626 ( BC_2, *, control, 1)," & "627 ( BC_7, wmodt1_0, bidir, X, 626, 1, Z)," & "628 ( BC_2, *, control, 1)," & "629 ( BC_7, wmodt0_0, bidir, X, 628, 1, Z)," & "630 ( BC_2, *, control, 1)," & "631 ( BC_7, wmdq_0(50), bidir, X, 630, 1, Z)," & "632 ( BC_2, *, control, 1)," & "633 ( BC_7, wmdq_0(60), bidir, X, 632, 1, Z)," & "634 ( BC_2, *, control, 1)," & "635 ( BC_7, wmdq_0(59), bidir, X, 634, 1, Z)," & "636 ( BC_2, *, control, 1)," & "637 ( BC_7, wmdq_0(53), bidir, X, 636, 1, Z)," & "638 ( BC_2, *, control, 1)," & "639 ( BC_7, wmecc_0(6), bidir, X, 638, 1, Z)," & "640 ( BC_2, *, control, 1)," & "641 ( BC_7, wmdq_0(52), bidir, X, 640, 1, Z)," & "642 ( BC_2, *, control, 1)," & "643 ( BC_7, wmdqs_0_7_p, bidir, X, 642, 1, Z)," & "644 ( BC_2, *, control, 1)," & "645 ( BC_7, wmdq_0(54), bidir, X, 644, 1, Z)," & "646 ( BC_2, *, control, 1)," & "647 ( BC_7, wmdq_0(55), bidir, X, 646, 1, Z)," & "648 ( BC_2, *, control, 1)," & "649 ( BC_7, wmecc_0(7), bidir, X, 648, 1, Z)," & "650 ( BC_2, *, control, 1)," & "651 ( BC_7, wmdq_0(62), bidir, X, 650, 1, Z)," & "652 ( BC_2, *, control, 1)," & "653 ( BC_7, wmdq_0(63), bidir, X, 652, 1, Z)," & "654 ( BC_2, *, control, 1)," & "655 ( BC_7, wmdq_0(61), bidir, X, 654, 1, Z)," & "656 ( BC_2, *, control, 1)," & "657 ( BC_7, wmdq_0(58), bidir, X, 656, 1, Z)," & "658 ( BC_2, *, control, 1)," & "659 ( BC_7, wmdq_0(56), bidir, X, 658, 1, Z)," & "660 ( BC_2, *, control, 1)," & "661 ( BC_7, wmdq_0(57), bidir, X, 660, 1, Z)," & "662 ( BC_2, *, control, 1)," & "663 ( BC_7, wmdq_1(12), bidir, X, 662, 1, Z)," & "664 ( BC_2, *, control, 1)," & "665 ( BC_7, wmdq_1(8), bidir, X, 664, 1, Z)," & "666 ( BC_2, *, control, 1)," & "667 ( BC_7, wmdqs_1_1_p, bidir, X, 666, 1, Z)," & "668 ( BC_2, *, control, 1)," & "669 ( BC_7, wmdq_1(9), bidir, X, 668, 1, Z)," & "670 ( BC_2, *, control, 1)," & "671 ( BC_7, wmdq_1(13), bidir, X, 670, 1, Z)," & "672 ( BC_2, *, control, 1)," & "673 ( BC_7, wmdq_1(14), bidir, X, 672, 1, Z)," & "674 ( BC_2, *, control, 1)," & "675 ( BC_7, wmdq_1(10), bidir, X, 674, 1, Z)," & "676 ( BC_2, *, control, 1)," & "677 ( BC_7, wmdq_1(11), bidir, X, 676, 1, Z)," & "678 ( BC_2, *, control, 1)," & "679 ( BC_7, wmdq_1(4), bidir, X, 678, 1, Z)," & "680 ( BC_2, *, control, 1)," & "681 ( BC_7, wmdq_1(15), bidir, X, 680, 1, Z)," & "682 ( BC_2, *, control, 1)," & "683 ( BC_7, wmdq_1(5), bidir, X, 682, 1, Z)," & "684 ( BC_2, *, control, 1)," & "685 ( BC_7, wmecc_1(1), bidir, X, 684, 1, Z)," & "686 ( BC_2, *, control, 1)," & "687 ( BC_7, wmdq_1(6), bidir, X, 686, 1, Z)," & "688 ( BC_2, *, control, 1)," & "689 ( BC_7, wmdq_1(7), bidir, X, 688, 1, Z)," & "690 ( BC_2, *, control, 1)," & "691 ( BC_7, wmcke_1, bidir, X, 690, 1, Z)," & "692 ( BC_2, *, control, 1)," & "693 ( BC_7, wmras_1, bidir, X, 692, 1, Z)," & "694 ( BC_2, *, control, 1)," & "695 ( BC_7, wmdq_1(2), bidir, X, 694, 1, Z)," & "696 ( BC_2, *, control, 1)," & "697 ( BC_7, wmdq_1(0), bidir, X, 696, 1, Z)," & "698 ( BC_2, *, control, 1)," & "699 ( BC_7, wmdq_1(1), bidir, X, 698, 1, Z)," & "700 ( BC_2, *, control, 1)," & "701 ( BC_7, wmecc_1(0), bidir, X, 700, 1, Z)," & "702 ( BC_2, *, control, 1)," & "703 ( BC_7, wmdq_1(3), bidir, X, 702, 1, Z)," & "704 ( BC_2, *, control, 1)," & "705 ( BC_7, wmecc_1(2), bidir, X, 704, 1, Z)," & "706 ( BC_2, *, control, 1)," & "707 ( BC_7, wmdq_1(17), bidir, X, 706, 1, Z)," & "708 ( BC_2, *, control, 1)," & "709 ( BC_7, wmdq_1(16), bidir, X, 708, 1, Z)," & "710 ( BC_2, *, control, 1)," & "711 ( BC_7, wmdq_1(18), bidir, X, 710, 1, Z)," & "712 ( BC_2, *, control, 1)," & "713 ( BC_7, wmdqs_1_0_p, bidir, X, 712, 1, Z)," & "714 ( BC_2, *, control, 1)," & "715 ( BC_7, wmdq_1(19), bidir, X, 714, 1, Z)," & "716 ( BC_2, *, control, 1)," & "717 ( BC_7, wmdq_1(20), bidir, X, 716, 1, Z)," & "718 ( BC_2, *, control, 1)," & "719 ( BC_7, wmdq_1(26), bidir, X, 718, 1, Z)," & "720 ( BC_2, *, control, 1)," & "721 ( BC_7, wmdq_1(21), bidir, X, 720, 1, Z)," & "722 ( BC_2, *, control, 1)," & "723 ( BC_7, wmdq_1(28), bidir, X, 722, 1, Z)," & "724 ( BC_2, *, control, 1)," & "725 ( BC_7, wmdq_1(23), bidir, X, 724, 1, Z)," & "726 ( BC_2, *, control, 1)," & "727 ( BC_7, wmdqs_1_2_p, bidir, X, 726, 1, Z)," & "728 ( BC_2, *, control, 1)," & "729 ( BC_7, wmdq_1(22), bidir, X, 728, 1, Z)," & "730 ( BC_2, *, control, 1)," & "731 ( BC_7, wmdq_1(24), bidir, X, 730, 1, Z)," & "732 ( BC_2, *, control, 1)," & "733 ( BC_7, wmdq_1(25), bidir, X, 732, 1, Z)," & "734 ( BC_2, *, control, 1)," & "735 ( BC_7, wmdq_1(27), bidir, X, 734, 1, Z)," & "736 ( BC_2, *, control, 1)," & "737 ( BC_7, wmaddr_1(0), bidir, X, 736, 1, Z)," & "738 ( BC_2, *, control, 1)," & "739 ( BC_7, wmcs0_1, bidir, X, 738, 1, Z)," & "740 ( BC_2, *, control, 1)," & "741 ( BC_7, wmdq_1(29), bidir, X, 740, 1, Z)," & "742 ( BC_2, *, control, 1)," & "743 ( BC_7, wmcs1_1, bidir, X, 742, 1, Z)," & "744 ( BC_2, *, control, 1)," & "745 ( BC_7, wmdq_1(30), bidir, X, 744, 1, Z)," & "746 ( BC_2, *, control, 1)," & "747 ( BC_7, wmdqs_1_3_p, bidir, X, 746, 1, Z)," & "748 ( BC_2, *, control, 1)," & "749 ( BC_7, wmdq_1(31), bidir, X, 748, 1, Z)," & "750 ( BC_2, *, control, 1)," & "751 ( BC_7, wmecc_1(3), bidir, X, 750, 1, Z)," & "752 ( BC_2, *, control, 1)," & "753 ( BC_7, wmaddr_1(1), bidir, X, 752, 1, Z)," & "754 ( BC_2, *, control, 1)," & "755 ( BC_7, wmaddr_1(2), bidir, X, 754, 1, Z)," & "756 ( BC_2, *, control, 1)," & "757 ( BC_7, wmaddr_1(4), bidir, X, 756, 1, Z)," & "758 ( BC_2, *, control, 1)," & "759 ( BC_7, wmaddr_1(3), bidir, X, 758, 1, Z)," & "760 ( BC_2, *, control, 1)," & "761 ( BC_7, wmaddr_1(5), bidir, X, 760, 1, Z)," & "762 ( BC_2, *, control, 1)," & "763 ( BC_7, wmaddr_1(6), bidir, X, 762, 1, Z)," & "764 ( BC_2, *, control, 1)," & "765 ( BC_7, wmaddr_1(7), bidir, X, 764, 1, Z)," & "766 ( BC_2, *, control, 1)," & "767 ( BC_7, wmaddr_1(8), bidir, X, 766, 1, Z)," & "768 ( BC_2, *, control, 1)," & "769 ( BC_7, wmaddr_1(9), bidir, X, 768, 1, Z)," & "770 ( BC_2, *, control, 1)," & "771 ( BC_7, wmck_1_p, bidir, X, 770, 1, Z)," & "772 ( BC_2, *, control, 1)," & "773 ( BC_7, wmaddr_1(10), bidir, X, 772, 1, Z)," & "774 ( BC_2, *, control, 1)," & "775 ( BC_7, wmba_1(1), bidir, X, 774, 1, Z)," & "776 ( BC_2, *, control, 1)," & "777 ( BC_7, wmba_1(2), bidir, X, 776, 1, Z)," & "778 ( BC_2, *, control, 1)," & "779 ( BC_7, wmaddr_1(13), bidir, X, 778, 1, Z)," & "780 ( BC_2, *, control, 1)," & "781 ( BC_7, wmba_1(0), bidir, X, 780, 1, Z)," & "782 ( BC_2, *, control, 1)," & "783 ( BC_7, wmcas_1, bidir, X, 782, 1, Z)," & "784 ( BC_2, *, control, 1)," & "785 ( BC_7, wmaddr_1(11), bidir, X, 784, 1, Z)," & "786 ( BC_2, *, control, 1)," & "787 ( BC_7, wmwe_1, bidir, X, 786, 1, Z)," & "788 ( BC_2, *, control, 1)," & "789 ( BC_7, wmaddr_1(12), bidir, X, 788, 1, Z)," & "790 ( BC_2, *, control, 1)," & "791 ( BC_7, wmdq_1(32), bidir, X, 790, 1, Z)," & "792 ( BC_2, *, control, 1)," & "793 ( BC_7, wmdq_1(33), bidir, X, 792, 1, Z)," & "794 ( BC_2, *, control, 1)," & "795 ( BC_7, wmdq_1(37), bidir, X, 794, 1, Z)," & "796 ( BC_2, *, control, 1)," & "797 ( BC_7, wmdq_1(36), bidir, X, 796, 1, Z)," & "798 ( BC_2, *, control, 1)," & "799 ( BC_7, wmdq_1(46), bidir, X, 798, 1, Z)," & "800 ( BC_2, *, control, 1)," & "801 ( BC_7, wmdq_1(39), bidir, X, 800, 1, Z)," & "802 ( BC_2, *, control, 1)," & "803 ( BC_7, wmdq_1(45), bidir, X, 802, 1, Z)," & "804 ( BC_2, *, control, 1)," & "805 ( BC_7, wmdq_1(38), bidir, X, 804, 1, Z)," & "806 ( BC_2, *, control, 1)," & "807 ( BC_7, wmdqs_1_4_p, bidir, X, 806, 1, Z)," & "808 ( BC_2, *, control, 1)," & "809 ( BC_7, wmdq_1(34), bidir, X, 808, 1, Z)," & "810 ( BC_2, *, control, 1)," & "811 ( BC_7, wmdq_1(35), bidir, X, 810, 1, Z)," & "812 ( BC_2, *, control, 1)," & "813 ( BC_7, wmecc_1(4), bidir, X, 812, 1, Z)," & "814 ( BC_2, *, control, 1)," & "815 ( BC_7, wmdq_1(42), bidir, X, 814, 1, Z)," & "816 ( BC_2, *, control, 1)," & "817 ( BC_7, wmecc_1(5), bidir, X, 816, 1, Z)," & "818 ( BC_2, *, control, 1)," & "819 ( BC_7, wmdq_1(40), bidir, X, 818, 1, Z)," & "820 ( BC_2, *, control, 1)," & "821 ( BC_7, wmdq_1(49), bidir, X, 820, 1, Z)," & "822 ( BC_2, *, control, 1)," & "823 ( BC_7, wmdq_1(41), bidir, X, 822, 1, Z)," & "824 ( BC_2, *, control, 1)," & "825 ( BC_7, wmdq_1(47), bidir, X, 824, 1, Z)," & "826 ( BC_2, *, control, 1)," & "827 ( BC_7, wmdq_1(48), bidir, X, 826, 1, Z)," & "828 ( BC_2, *, control, 1)," & "829 ( BC_7, wmdq_1(44), bidir, X, 828, 1, Z)," & "830 ( BC_2, *, control, 1)," & "831 ( BC_7, wmdqs_1_5_p, bidir, X, 830, 1, Z)," & "832 ( BC_2, *, control, 1)," & "833 ( BC_7, wmdq_1(43), bidir, X, 832, 1, Z)," & "834 ( BC_2, *, control, 1)," & "835 ( BC_7, wmdq_1(51), bidir, X, 834, 1, Z)," & "836 ( BC_2, *, control, 1)," & "837 ( BC_7, wmdq_1(52), bidir, X, 836, 1, Z)," & "838 ( BC_2, *, control, 1)," & "839 ( BC_7, wmdq_1(54), bidir, X, 838, 1, Z)," & "840 ( BC_2, *, control, 1)," & "841 ( BC_7, wmdq_1(53), bidir, X, 840, 1, Z)," & "842 ( BC_2, *, control, 1)," & "843 ( BC_7, wmecc_1(6), bidir, X, 842, 1, Z)," & "844 ( BC_2, *, control, 1)," & "845 ( BC_7, wmdq_1(56), bidir, X, 844, 1, Z)," & "846 ( BC_2, *, control, 1)," & "847 ( BC_7, wmdq_1(55), bidir, X, 846, 1, Z)," & "848 ( BC_2, *, control, 1)," & "849 ( BC_7, wmdq_1(50), bidir, X, 848, 1, Z)," & "850 ( BC_2, *, control, 1)," & "851 ( BC_7, wmdqs_1_6_p, bidir, X, 850, 1, Z)," & "852 ( BC_2, *, control, 1)," & "853 ( BC_7, wmdq_1(59), bidir, X, 852, 1, Z)," & "854 ( BC_2, *, control, 1)," & "855 ( BC_7, wmdq_1(60), bidir, X, 854, 1, Z)," & "856 ( BC_2, *, control, 1)," & "857 ( BC_7, wmodt0_1, bidir, X, 856, 1, Z)," & "858 ( BC_2, *, control, 1)," & "859 ( BC_7, wmdqs_1_7_p, bidir, X, 858, 1, Z)," & "860 ( BC_2, *, control, 1)," & "861 ( BC_7, wmodt1_1, bidir, X, 860, 1, Z)," & "862 ( BC_2, *, control, 1)," & "863 ( BC_7, wmecc_1(7), bidir, X, 862, 1, Z)," & "864 ( BC_2, *, control, 1)," & "865 ( BC_7, wmdq_1(61), bidir, X, 864, 1, Z)," & "866 ( BC_2, *, control, 1)," & "867 ( BC_7, wmdq_1(57), bidir, X, 866, 1, Z)," & "868 ( BC_2, *, control, 1)," & "869 ( BC_7, wmdq_1(58), bidir, X, 868, 1, Z)," & "870 ( BC_2, *, control, 1)," & "871 ( BC_7, wmdq_1(62), bidir, X, 870, 1, Z)," & "872 ( BC_2, *, control, 1)," & "873 ( BC_7, wmdq_1(63), bidir, X, 872, 1, Z)," & "874 ( BC_4, pll_clk_ref_0, input, X)," & "875 ( BC_4, pll_clk_ref_1, input, X)," & "876 ( BC_2, *, control, 1)," & "877 ( BC_7, nmdqs_0_1_p, bidir, X, 876, 1, Z)," & "878 ( BC_2, *, control, 1)," & "879 ( BC_7, nmdq_0(9), bidir, X, 878, 1, Z)," & "880 ( BC_2, *, control, 1)," & "881 ( BC_7, nmdq_0(10), bidir, X, 880, 1, Z)," & "882 ( BC_2, *, control, 1)," & "883 ( BC_7, nmdq_0(13), bidir, X, 882, 1, Z)," & "884 ( BC_2, *, control, 1)," & "885 ( BC_7, nmdq_0(12), bidir, X, 884, 1, Z)," & "886 ( BC_2, *, control, 1)," & "887 ( BC_7, nmdq_0(11), bidir, X, 886, 1, Z)," & "888 ( BC_2, *, control, 1)," & "889 ( BC_7, nmdq_0(15), bidir, X, 888, 1, Z)," & "890 ( BC_2, *, control, 1)," & "891 ( BC_7, nmdq_0(14), bidir, X, 890, 1, Z)," & "892 ( BC_2, *, control, 1)," & "893 ( BC_7, nmecc_0(1), bidir, X, 892, 1, Z)," & "894 ( BC_2, *, control, 1)," & "895 ( BC_7, nmodt1_0, bidir, X, 894, 1, Z)," & "896 ( BC_2, *, control, 1)," & "897 ( BC_7, nmodt0_0, bidir, X, 896, 1, Z)," & "898 ( BC_2, *, control, 1)," & "899 ( BC_7, nmdq_0(8), bidir, X, 898, 1, Z)," & "900 ( BC_2, *, control, 1)," & "901 ( BC_7, nmaddr0(1), bidir, X, 900, 1, Z)," & "902 ( BC_2, *, control, 1)," & "903 ( BC_7, nmaddr0(0), bidir, X, 902, 1, Z)," & "904 ( BC_2, *, control, 1)," & "905 ( BC_7, nmaddr0(2), bidir, X, 904, 1, Z)," & "906 ( BC_2, *, control, 1)," & "907 ( BC_7, nmaddr0(3), bidir, X, 906, 1, Z)," & "908 ( BC_2, *, control, 1)," & "909 ( BC_7, nmaddr0(4), bidir, X, 908, 1, Z)," & "910 ( BC_2, *, control, 1)," & "911 ( BC_7, nmaddr0(5), bidir, X, 910, 1, Z)," & "912 ( BC_2, *, control, 1)," & "913 ( BC_7, nmaddr0(6), bidir, X, 912, 1, Z)," & "914 ( BC_2, *, control, 1)," & "915 ( BC_7, nmaddr0(7), bidir, X, 914, 1, Z)," & "916 ( BC_2, *, control, 1)," & "917 ( BC_7, nmaddr0(9), bidir, X, 916, 1, Z)," & "918 ( BC_2, *, control, 1)," & "919 ( BC_7, nmaddr0(8), bidir, X, 918, 1, Z)," & "920 ( BC_2, *, control, 1)," & "921 ( BC_7, nmaddr0(10), bidir, X, 920, 1, Z)," & "922 ( BC_2, *, control, 1)," & "923 ( BC_7, nmaddr0(11), bidir, X, 922, 1, Z)," & "924 ( BC_2, *, control, 1)," & "925 ( BC_7, nmaddr0(12), bidir, X, 924, 1, Z)," & "926 ( BC_2, *, control, 1)," & "927 ( BC_7, nmaddr0(13), bidir, X, 926, 1, Z)," & "928 ( BC_2, *, control, 1)," & "929 ( BC_7, nmba0(0), bidir, X, 928, 1, Z)," & "930 ( BC_2, *, control, 1)," & "931 ( BC_7, nmck_0_p, bidir, X, 930, 1, Z)," & "932 ( BC_2, *, control, 1)," & "933 ( BC_7, nmcs1_0, bidir, X, 932, 1, Z)," & "934 ( BC_2, *, control, 1)," & "935 ( BC_7, nmcs0_0, bidir, X, 934, 1, Z)," & "936 ( BC_2, *, control, 1)," & "937 ( BC_7, nmba0(1), bidir, X, 936, 1, Z)," & "938 ( BC_2, *, control, 1)," & "939 ( BC_7, nmcas_0, bidir, X, 938, 1, Z)," & "940 ( BC_2, *, control, 1)," & "941 ( BC_7, nmba0(2), bidir, X, 940, 1, Z)," & "942 ( BC_2, *, control, 1)," & "943 ( BC_7, nmwe_0, bidir, X, 942, 1, Z)," & "944 ( BC_2, *, control, 1)," & "945 ( BC_7, nmras_0, bidir, X, 944, 1, Z)," & "946 ( BC_2, *, control, 1)," & "947 ( BC_7, nmdq_0(7), bidir, X, 946, 1, Z)," & "948 ( BC_2, *, control, 1)," & "949 ( BC_7, nmcke_0, bidir, X, 948, 1, Z)," & "950 ( BC_2, *, control, 1)," & "951 ( BC_7, nmecc_0(0), bidir, X, 950, 1, Z)," & "952 ( BC_2, *, control, 1)," & "953 ( BC_7, nmdqs_0_0_p, bidir, X, 952, 1, Z)," & "954 ( BC_2, *, control, 1)," & "955 ( BC_7, nmdq_0(5), bidir, X, 954, 1, Z)," & "956 ( BC_2, *, control, 1)," & "957 ( BC_7, nmdq_0(6), bidir, X, 956, 1, Z)," & "958 ( BC_2, *, control, 1)," & "959 ( BC_7, nmdq_0(3), bidir, X, 958, 1, Z)," & "960 ( BC_2, *, control, 1)," & "961 ( BC_7, nmdq_0(0), bidir, X, 960, 1, Z)," & "962 ( BC_2, *, control, 1)," & "963 ( BC_7, nmdq_0(2), bidir, X, 962, 1, Z)," & "964 ( BC_2, *, control, 1)," & "965 ( BC_7, nmdq_0(1), bidir, X, 964, 1, Z)," & "966 ( BC_2, *, control, 1)," & "967 ( BC_7, nmdq_0(4), bidir, X, 966, 1, Z)," & "968 ( BC_2, *, control, 1)," & "969 ( BC_7, nmdq_1(15), bidir, X, 968, 1, Z)," & "970 ( BC_2, *, control, 1)," & "971 ( BC_7, nmecc_1(1), bidir, X, 970, 1, Z)," & "972 ( BC_2, *, control, 1)," & "973 ( BC_7, nmdq_1(8), bidir, X, 972, 1, Z)," & "974 ( BC_2, *, control, 1)," & "975 ( BC_7, nmdq_1(11), bidir, X, 974, 1, Z)," & "976 ( BC_2, *, control, 1)," & "977 ( BC_7, nmdq_1(10), bidir, X, 976, 1, Z)," & "978 ( BC_2, *, control, 1)," & "979 ( BC_7, nmdq_1(12), bidir, X, 978, 1, Z)," & "980 ( BC_2, *, control, 1)," & "981 ( BC_7, nmdq_1(9), bidir, X, 980, 1, Z)," & "982 ( BC_2, *, control, 1)," & "983 ( BC_7, nmdqs_1_1_p, bidir, X, 982, 1, Z)," & "984 ( BC_2, *, control, 1)," & "985 ( BC_7, nmaddr1(0), bidir, X, 984, 1, Z)," & "986 ( BC_2, *, control, 1)," & "987 ( BC_7, nmaddr1(1), bidir, X, 986, 1, Z)," & "988 ( BC_2, *, control, 1)," & "989 ( BC_7, nmdq_1(14), bidir, X, 988, 1, Z)," & "990 ( BC_2, *, control, 1)," & "991 ( BC_7, nmodt1_1, bidir, X, 990, 1, Z)," & "992 ( BC_2, *, control, 1)," & "993 ( BC_7, nmdq_1(13), bidir, X, 992, 1, Z)," & "994 ( BC_2, *, control, 1)," & "995 ( BC_7, nmodt0_1, bidir, X, 994, 1, Z)," & "996 ( BC_2, *, control, 1)," & "997 ( BC_7, nmaddr1(3), bidir, X, 996, 1, Z)," & "998 ( BC_2, *, control, 1)," & "999 ( BC_7, nmaddr1(2), bidir, X, 998, 1, Z)," & "1000 ( BC_2, *, control, 1)," & "1001 ( BC_7, nmaddr1(4), bidir, X, 1000, 1, Z)," & "1002 ( BC_2, *, control, 1)," & "1003 ( BC_7, nmaddr1(5), bidir, X, 1002, 1, Z)," & "1004 ( BC_2, *, control, 1)," & "1005 ( BC_7, nmaddr1(6), bidir, X, 1004, 1, Z)," & "1006 ( BC_2, *, control, 1)," & "1007 ( BC_7, nmaddr1(7), bidir, X, 1006, 1, Z)," & "1008 ( BC_2, *, control, 1)," & "1009 ( BC_7, nmaddr1(11), bidir, X, 1008, 1, Z)," & "1010 ( BC_2, *, control, 1)," & "1011 ( BC_7, nmaddr1(8), bidir, X, 1010, 1, Z)," & "1012 ( BC_2, *, control, 1)," & "1013 ( BC_7, nmaddr1(9), bidir, X, 1012, 1, Z)," & "1014 ( BC_2, *, control, 1)," & "1015 ( BC_7, nmaddr1(10), bidir, X, 1014, 1, Z)," & "1016 ( BC_2, *, control, 1)," & "1017 ( BC_7, nmaddr1(12), bidir, X, 1016, 1, Z)," & "1018 ( BC_2, *, control, 1)," & "1019 ( BC_7, nmba1(0), bidir, X, 1018, 1, Z)," & "1020 ( BC_2, *, control, 1)," & "1021 ( BC_7, nmba1(1), bidir, X, 1020, 1, Z)," & "1022 ( BC_2, *, control, 1)," & "1023 ( BC_7, nmcas_1, bidir, X, 1022, 1, Z)," & "1024 ( BC_2, *, control, 1)," & "1025 ( BC_7, nmaddr1(13), bidir, X, 1024, 1, Z)," & "1026 ( BC_2, *, control, 1)," & "1027 ( BC_7, nmwe_1, bidir, X, 1026, 1, Z)," & "1028 ( BC_2, *, control, 1)," & "1029 ( BC_7, nmck_1_p, bidir, X, 1028, 1, Z)," & "1030 ( BC_2, *, control, 1)," & "1031 ( BC_7, nmcs0_1, bidir, X, 1030, 1, Z)," & "1032 ( BC_2, *, control, 1)," & "1033 ( BC_7, nmcs1_1, bidir, X, 1032, 1, Z)," & "1034 ( BC_2, *, control, 1)," & "1035 ( BC_7, nmdqs_1_0_p, bidir, X, 1034, 1, Z)," & "1036 ( BC_2, *, control, 1)," & "1037 ( BC_7, nmba1(2), bidir, X, 1036, 1, Z)," & "1038 ( BC_2, *, control, 1)," & "1039 ( BC_7, nmecc_1(0), bidir, X, 1038, 1, Z)," & "1040 ( BC_2, *, control, 1)," & "1041 ( BC_7, nmdq_1(6), bidir, X, 1040, 1, Z)," & "1042 ( BC_2, *, control, 1)," & "1043 ( BC_7, nmdq_1(7), bidir, X, 1042, 1, Z)," & "1044 ( BC_2, *, control, 1)," & "1045 ( BC_7, nmdq_1(3), bidir, X, 1044, 1, Z)," & "1046 ( BC_2, *, control, 1)," & "1047 ( BC_7, nmdq_1(2), bidir, X, 1046, 1, Z)," & "1048 ( BC_2, *, control, 1)," & "1049 ( BC_7, nmdq_1(4), bidir, X, 1048, 1, Z)," & "1050 ( BC_2, *, control, 1)," & "1051 ( BC_7, nmdq_1(0), bidir, X, 1050, 1, Z)," & "1052 ( BC_2, *, control, 1)," & "1053 ( BC_7, nmdq_1(5), bidir, X, 1052, 1, Z)," & "1054 ( BC_2, *, control, 1)," & "1055 ( BC_7, nmdq_1(1), bidir, X, 1054, 1, Z)," & "1056 ( BC_2, *, control, 1)," & "1057 ( BC_7, smdq(11), bidir, X, 1056, 1, Z)," & "1058 ( BC_2, *, control, 1)," & "1059 ( BC_7, smdq(12), bidir, X, 1058, 1, Z)," & "1060 ( BC_2, *, control, 1)," & "1061 ( BC_7, nmras_1, bidir, X, 1060, 1, Z)," & "1062 ( BC_2, *, control, 1)," & "1063 ( BC_7, nmcke_1, bidir, X, 1062, 1, Z)," & "1064 ( BC_2, *, control, 1)," & "1065 ( BC_7, smdq(8), bidir, X, 1064, 1, Z)," & "1066 ( BC_2, *, control, 1)," & "1067 ( BC_7, smdq(10), bidir, X, 1066, 1, Z)," & "1068 ( BC_2, *, control, 1)," & "1069 ( BC_7, smdq(9), bidir, X, 1068, 1, Z)," & "1070 ( BC_2, *, control, 1)," & "1071 ( BC_7, smdq(13), bidir, X, 1070, 1, Z)," & "1072 ( BC_2, *, control, 1)," & "1073 ( BC_7, smdqs_1_p, bidir, X, 1072, 1, Z)," & "1074 ( BC_2, *, control, 1)," & "1075 ( BC_7, smdq(15), bidir, X, 1074, 1, Z)," & "1076 ( BC_2, *, control, 1)," & "1077 ( BC_7, smecc(1), bidir, X, 1076, 1, Z)," & "1078 ( BC_2, *, control, 1)," & "1079 ( BC_7, smdq(0), bidir, X, 1078, 1, Z)," & "1080 ( BC_2, *, control, 1)," & "1081 ( BC_7, smdq(4), bidir, X, 1080, 1, Z)," & "1082 ( BC_2, *, control, 1)," & "1083 ( BC_7, smdq(1), bidir, X, 1082, 1, Z)," & "1084 ( BC_2, *, control, 1)," & "1085 ( BC_7, smdq(5), bidir, X, 1084, 1, Z)," & "1086 ( BC_2, *, control, 1)," & "1087 ( BC_7, smdq(14), bidir, X, 1086, 1, Z)," & "1088 ( BC_2, *, control, 1)," & "1089 ( BC_7, smecc(0), bidir, X, 1088, 1, Z)," & "1090 ( BC_2, *, control, 1)," & "1091 ( BC_7, smdq(3), bidir, X, 1090, 1, Z)," & "1092 ( BC_2, *, control, 1)," & "1093 ( BC_7, smdq(2), bidir, X, 1092, 1, Z)," & "1094 ( BC_2, *, control, 1)," & "1095 ( BC_7, smcke, bidir, X, 1094, 1, Z)," & "1096 ( BC_2, *, control, 1)," & "1097 ( BC_7, smdq(6), bidir, X, 1096, 1, Z)," & "1098 ( BC_2, *, control, 1)," & "1099 ( BC_7, smras, bidir, X, 1098, 1, Z)," & "1100 ( BC_2, *, control, 1)," & "1101 ( BC_7, smdq(7), bidir, X, 1100, 1, Z)," & "1102 ( BC_2, *, control, 1)," & "1103 ( BC_7, smdq(20), bidir, X, 1102, 1, Z)," & "1104 ( BC_2, *, control, 1)," & "1105 ( BC_7, smdq(21), bidir, X, 1104, 1, Z)," & "1106 ( BC_2, *, control, 1)," & "1107 ( BC_7, smdq(16), bidir, X, 1106, 1, Z)," & "1108 ( BC_2, *, control, 1)," & "1109 ( BC_7, smdq(17), bidir, X, 1108, 1, Z)," & "1110 ( BC_2, *, control, 1)," & "1111 ( BC_7, smdqs_0_p, bidir, X, 1110, 1, Z)," & "1112 ( BC_2, *, control, 1)," & "1113 ( BC_7, smdq(19), bidir, X, 1112, 1, Z)," & "1114 ( BC_2, *, control, 1)," & "1115 ( BC_7, smdq(22), bidir, X, 1114, 1, Z)," & "1116 ( BC_2, *, control, 1)," & "1117 ( BC_7, smdqs_2_p, bidir, X, 1116, 1, Z)," & "1118 ( BC_2, *, control, 1)," & "1119 ( BC_7, smdq(23), bidir, X, 1118, 1, Z)," & "1120 ( BC_2, *, control, 1)," & "1121 ( BC_7, smecc(2), bidir, X, 1120, 1, Z)," & "1122 ( BC_2, *, control, 1)," & "1123 ( BC_7, smdq(30), bidir, X, 1122, 1, Z)," & "1124 ( BC_2, *, control, 1)," & "1125 ( BC_7, smdq(18), bidir, X, 1124, 1, Z)," & "1126 ( BC_2, *, control, 1)," & "1127 ( BC_7, smdq(29), bidir, X, 1126, 1, Z)," & "1128 ( BC_2, *, control, 1)," & "1129 ( BC_7, smdq(24), bidir, X, 1128, 1, Z)," & "1130 ( BC_2, *, control, 1)," & "1131 ( BC_7, smdqs_3_p, bidir, X, 1130, 1, Z)," & "1132 ( BC_2, *, control, 1)," & "1133 ( BC_7, smdq(26), bidir, X, 1132, 1, Z)," & "1134 ( BC_2, *, control, 1)," & "1135 ( BC_7, smdq(25), bidir, X, 1134, 1, Z)," & "1136 ( BC_2, *, control, 1)," & "1137 ( BC_7, smdq(31), bidir, X, 1136, 1, Z)," & "1138 ( BC_2, *, control, 1)," & "1139 ( BC_7, smdq(27), bidir, X, 1138, 1, Z)," & "1140 ( BC_2, *, control, 1)," & "1141 ( BC_7, smecc(3), bidir, X, 1140, 1, Z)," & "1142 ( BC_2, *, control, 1)," & "1143 ( BC_7, smdq(28), bidir, X, 1142, 1, Z)," & "1144 ( BC_2, *, control, 1)," & "1145 ( BC_7, smaddr(0), bidir, X, 1144, 1, Z)," & "1146 ( BC_2, *, control, 1)," & "1147 ( BC_7, smaddr(1), bidir, X, 1146, 1, Z)," & "1148 ( BC_2, *, control, 1)," & "1149 ( BC_7, smcs0, bidir, X, 1148, 1, Z)," & "1150 ( BC_2, *, control, 1)," & "1151 ( BC_7, smcs1, bidir, X, 1150, 1, Z)," & "1152 ( BC_2, *, control, 1)," & "1153 ( BC_7, smaddr(2), bidir, X, 1152, 1, Z)," & "1154 ( BC_2, *, control, 1)," & "1155 ( BC_7, smaddr(4), bidir, X, 1154, 1, Z)," & "1156 ( BC_2, *, control, 1)," & "1157 ( BC_7, smaddr(3), bidir, X, 1156, 1, Z)," & "1158 ( BC_2, *, control, 1)," & "1159 ( BC_7, smaddr(5), bidir, X, 1158, 1, Z)," & "1160 ( BC_2, *, control, 1)," & "1161 ( BC_7, smaddr(6), bidir, X, 1160, 1, Z)," & "1162 ( BC_2, *, control, 1)," & "1163 ( BC_7, smaddr(7), bidir, X, 1162, 1, Z)," & "1164 ( BC_2, *, control, 1)," & "1165 ( BC_7, smaddr(8), bidir, X, 1164, 1, Z)," & "1166 ( BC_2, *, control, 1)," & "1167 ( BC_7, smaddr(9), bidir, X, 1166, 1, Z)," & "1168 ( BC_2, *, control, 1)," & "1169 ( BC_7, smck_p, bidir, X, 1168, 1, Z)," & "1170 ( BC_2, *, control, 1)," & "1171 ( BC_7, smaddr(10), bidir, X, 1170, 1, Z)," & "1172 ( BC_2, *, control, 1)," & "1173 ( BC_7, smaddr(11), bidir, X, 1172, 1, Z)," & "1174 ( BC_2, *, control, 1)," & "1175 ( BC_7, smaddr(12), bidir, X, 1174, 1, Z)," & "1176 ( BC_2, *, control, 1)," & "1177 ( BC_7, smaddr(13), bidir, X, 1176, 1, Z)," & "1178 ( BC_2, *, control, 1)," & "1179 ( BC_7, smaddr(14), bidir, X, 1178, 1, Z)," & "1180 ( BC_2, *, control, 1)," & "1181 ( BC_7, smba(0), bidir, X, 1180, 1, Z)," & "1182 ( BC_2, *, control, 1)," & "1183 ( BC_7, smcas, bidir, X, 1182, 1, Z)," & "1184 ( BC_2, *, control, 1)," & "1185 ( BC_7, smba(1), bidir, X, 1184, 1, Z)," & "1186 ( BC_2, *, control, 1)," & "1187 ( BC_7, smwe, bidir, X, 1186, 1, Z)," & "1188 ( BC_2, *, control, 1)," & "1189 ( BC_7, smba(2), bidir, X, 1188, 1, Z)," & "1190 ( BC_2, *, control, 1)," & "1191 ( BC_7, smdq(40), bidir, X, 1190, 1, Z)," & "1192 ( BC_2, *, control, 1)," & "1193 ( BC_7, smdq(41), bidir, X, 1192, 1, Z)," & "1194 ( BC_2, *, control, 1)," & "1195 ( BC_7, smdq(45), bidir, X, 1194, 1, Z)," & "1196 ( BC_2, *, control, 1)," & "1197 ( BC_7, smdq(46), bidir, X, 1196, 1, Z)," & "1198 ( BC_2, *, control, 1)," & "1199 ( BC_7, smdqs_5_p, bidir, X, 1198, 1, Z)," & "1200 ( BC_2, *, control, 1)," & "1201 ( BC_7, smdq(43), bidir, X, 1200, 1, Z)," & "1202 ( BC_2, *, control, 1)," & "1203 ( BC_7, smdq(44), bidir, X, 1202, 1, Z)," & "1204 ( BC_2, *, control, 1)," & "1205 ( BC_7, smdq(33), bidir, X, 1204, 1, Z)," & "1206 ( BC_2, *, control, 1)," & "1207 ( BC_7, smdq(32), bidir, X, 1206, 1, Z)," & "1208 ( BC_2, *, control, 1)," & "1209 ( BC_7, smdq(42), bidir, X, 1208, 1, Z)," & "1210 ( BC_2, *, control, 1)," & "1211 ( BC_7, smdq(35), bidir, X, 1210, 1, Z)," & "1212 ( BC_2, *, control, 1)," & "1213 ( BC_7, smdqs_4_p, bidir, X, 1212, 1, Z)," & "1214 ( BC_2, *, control, 1)," & "1215 ( BC_7, smdq(36), bidir, X, 1214, 1, Z)," & "1216 ( BC_2, *, control, 1)," & "1217 ( BC_7, smdq(34), bidir, X, 1216, 1, Z)," & "1218 ( BC_2, *, control, 1)," & "1219 ( BC_7, smdq(38), bidir, X, 1218, 1, Z)," & "1220 ( BC_2, *, control, 1)," & "1221 ( BC_7, smdq(37), bidir, X, 1220, 1, Z)," & "1222 ( BC_2, *, control, 1)," & "1223 ( BC_7, smdq(47), bidir, X, 1222, 1, Z)," & "1224 ( BC_2, *, control, 1)," & "1225 ( BC_7, smecc(5), bidir, X, 1224, 1, Z)," & "1226 ( BC_2, *, control, 1)," & "1227 ( BC_7, smdq(39), bidir, X, 1226, 1, Z)," & "1228 ( BC_2, *, control, 1)," & "1229 ( BC_7, smecc(4), bidir, X, 1228, 1, Z)," & "1230 ( BC_2, *, control, 1)," & "1231 ( BC_7, smdq(48), bidir, X, 1230, 1, Z)," & "1232 ( BC_2, *, control, 1)," & "1233 ( BC_7, smdq(49), bidir, X, 1232, 1, Z)," & "1234 ( BC_2, *, control, 1)," & "1235 ( BC_7, smecc(6), bidir, X, 1234, 1, Z)," & "1236 ( BC_2, *, control, 1)," & "1237 ( BC_7, smdq(55), bidir, X, 1236, 1, Z)," & "1238 ( BC_2, *, control, 1)," & "1239 ( BC_7, smdq(50), bidir, X, 1238, 1, Z)," & "1240 ( BC_2, *, control, 1)," & "1241 ( BC_7, smdq(51), bidir, X, 1240, 1, Z)," & "1242 ( BC_2, *, control, 1)," & "1243 ( BC_7, smdqs_6_p, bidir, X, 1242, 1, Z)," & "1244 ( BC_2, *, control, 1)," & "1245 ( BC_7, smodt0, bidir, X, 1244, 1, Z)," & "1246 ( BC_2, *, control, 1)," & "1247 ( BC_7, smodt1, bidir, X, 1246, 1, Z)," & "1248 ( BC_2, *, control, 1)," & "1249 ( BC_7, smdqs_7_p, bidir, X, 1248, 1, Z)," & "1250 ( BC_2, *, control, 1)," & "1251 ( BC_7, smdq(54), bidir, X, 1250, 1, Z)," & "1252 ( BC_2, *, control, 1)," & "1253 ( BC_7, smdq(53), bidir, X, 1252, 1, Z)," & "1254 ( BC_2, *, control, 1)," & "1255 ( BC_7, smdq(52), bidir, X, 1254, 1, Z)," & "1256 ( BC_2, *, control, 1)," & "1257 ( BC_7, smdq(57), bidir, X, 1256, 1, Z)," & "1258 ( BC_2, *, control, 1)," & "1259 ( BC_7, smdq(61), bidir, X, 1258, 1, Z)," & "1260 ( BC_2, *, control, 1)," & "1261 ( BC_7, smdq(59), bidir, X, 1260, 1, Z)," & "1262 ( BC_2, *, control, 1)," & "1263 ( BC_7, smecc(7), bidir, X, 1262, 1, Z)," & "1264 ( BC_2, *, control, 1)," & "1265 ( BC_7, smdq(63), bidir, X, 1264, 1, Z)," & "1266 ( BC_2, *, control, 1)," & "1267 ( BC_7, smdq(56), bidir, X, 1266, 1, Z)," & "1268 ( BC_2, *, control, 1)," & "1269 ( BC_7, smdq(58), bidir, X, 1268, 1, Z)," & "1270 ( BC_2, *, control, 1)," & "1271 ( BC_7, smdq(62), bidir, X, 1270, 1, Z)," & "1272 ( BC_2, *, control, 1)," & "1273 ( BC_7, smdq(60), bidir, X, 1272, 1, Z)," & "1274 ( BC_2, *, control, 1)," & "1275 ( BC_7, sram0_data_out(3), bidir, X, 1274, 1, Z)," & "1276 ( BC_2, *, control, 1)," & "1277 ( BC_7, sram0_data_out(5), bidir, X, 1276, 1, Z)," & "1278 ( BC_2, *, control, 1)," & "1279 ( BC_7, sram0_data_out(4), bidir, X, 1278, 1, Z)," & "1280 ( BC_2, *, control, 1)," & "1281 ( BC_7, sram0_data_out(0), bidir, X, 1280, 1, Z)," & "1282 ( BC_2, *, control, 1)," & "1283 ( BC_7, sram0_data_out(6), bidir, X, 1282, 1, Z)," & "1284 ( BC_2, *, control, 1)," & "1285 ( BC_7, sram0_data_out(7), bidir, X, 1284, 1, Z)," & "1286 ( BC_2, *, control, 1)," & "1287 ( BC_7, sram0_data_out(8), bidir, X, 1286, 1, Z)," & "1288 ( BC_2, *, control, 1)," & "1289 ( BC_7, sram0_data_in(4), bidir, X, 1288, 1, Z)," & "1290 ( BC_2, *, control, 1)," & "1291 ( BC_7, sram0_data_in(5), bidir, X, 1290, 1, Z)," & "1292 ( BC_2, *, control, 1)," & "1293 ( BC_7, sram0_data_out(1), bidir, X, 1292, 1, Z)," & "1294 ( BC_2, *, control, 1)," & "1295 ( BC_7, sram0_data_out(2), bidir, X, 1294, 1, Z)," & "1296 ( BC_2, *, control, 1)," & "1297 ( BC_7, sram0_data_in(3), bidir, X, 1296, 1, Z)," & "1298 ( BC_2, *, control, 1)," & "1299 ( BC_7, sram0_data_in(2), bidir, X, 1298, 1, Z)," & "1300 ( BC_2, *, control, 1)," & "1301 ( BC_7, sram0_data_in(1), bidir, X, 1300, 1, Z)," & "1302 ( BC_2, *, control, 1)," & "1303 ( BC_7, sram0_data_in(6), bidir, X, 1302, 1, Z)," & "1304 ( BC_2, *, control, 1)," & "1305 ( BC_7, sram_k_0_p, bidir, X, 1304, 1, Z)," & "1306 ( BC_2, *, control, 1)," & "1307 ( BC_7, sram_cq_n_in(0), bidir, X, 1306, 1, Z)," & "1308 ( BC_2, *, control, 1)," & "1309 ( BC_7, sram_cq_in(0), bidir, X, 1308, 1, Z)," & "1310 ( BC_2, *, control, 1)," & "1311 ( BC_7, sram0_data_in(7), bidir, X, 1310, 1, Z)," & "1312 ( BC_2, *, control, 1)," & "1313 ( BC_7, sram0_data_in(0), bidir, X, 1312, 1, Z)," & "1314 ( BC_2, *, control, 1)," & "1315 ( BC_7, sram0_data_in(8), bidir, X, 1314, 1, Z)," & "1316 ( BC_2, *, control, 1)," & "1317 ( BC_7, sram1_data_out(1), bidir, X, 1316, 1, Z)," & "1318 ( BC_2, *, control, 1)," & "1319 ( BC_7, sram1_data_out(7), bidir, X, 1318, 1, Z)," & "1320 ( BC_2, *, control, 1)," & "1321 ( BC_7, sram1_data_out(0), bidir, X, 1320, 1, Z)," & "1322 ( BC_2, *, control, 1)," & "1323 ( BC_7, sram1_data_out(4), bidir, X, 1322, 1, Z)," & "1324 ( BC_2, *, control, 1)," & "1325 ( BC_7, sram1_data_out(5), bidir, X, 1324, 1, Z)," & "1326 ( BC_2, *, control, 1)," & "1327 ( BC_7, sram1_data_out(6), bidir, X, 1326, 1, Z)," & "1328 ( BC_2, *, control, 1)," & "1329 ( BC_7, sram1_data_out(2), bidir, X, 1328, 1, Z)," & "1330 ( BC_2, *, control, 1)," & "1331 ( BC_7, sram_k_1_p, bidir, X, 1330, 1, Z)," & "1332 ( BC_2, *, control, 1)," & "1333 ( BC_7, sram1_data_out(3), bidir, X, 1332, 1, Z)," & "1334 ( BC_2, *, control, 1)," & "1335 ( BC_7, sram1_data_in(6), bidir, X, 1334, 1, Z)," & "1336 ( BC_2, *, control, 1)," & "1337 ( BC_7, sram1_data_in(7), bidir, X, 1336, 1, Z)," & "1338 ( BC_2, *, control, 1)," & "1339 ( BC_7, sram1_data_out(8), bidir, X, 1338, 1, Z)," & "1340 ( BC_2, *, control, 1)," & "1341 ( BC_7, sram1_data_in(1), bidir, X, 1340, 1, Z)," & "1342 ( BC_2, *, control, 1)," & "1343 ( BC_7, sram1_data_in(0), bidir, X, 1342, 1, Z)," & "1344 ( BC_2, *, control, 1)," & "1345 ( BC_7, sram_rd_wr_addr(18), bidir, X, 1344, 1, Z)," & "1346 ( BC_2, *, control, 1)," & "1347 ( BC_7, sram1_data_in(8), bidir, X, 1346, 1, Z)," & "1348 ( BC_2, *, control, 1)," & "1349 ( BC_7, sram_rd_wr_addr(19), bidir, X, 1348, 1, Z)," & "1350 ( BC_2, *, control, 1)," & "1351 ( BC_7, sram1_data_in(2), bidir, X, 1350, 1, Z)," & "1352 ( BC_2, *, control, 1)," & "1353 ( BC_7, sram1_data_in(3), bidir, X, 1352, 1, Z)," & "1354 ( BC_2, *, control, 1)," & "1355 ( BC_7, sram1_data_in(4), bidir, X, 1354, 1, Z)," & "1356 ( BC_2, *, control, 1)," & "1357 ( BC_7, sram1_data_in(5), bidir, X, 1356, 1, Z)," & "1358 ( BC_2, *, control, 1)," & "1359 ( BC_7, sram_cq_n_in(1), bidir, X, 1358, 1, Z)," & "1360 ( BC_2, *, control, 1)," & "1361 ( BC_7, sram_rd_wr_addr(23), bidir, X, 1360, 1, Z)," & "1362 ( BC_2, *, control, 1)," & "1363 ( BC_7, sram_cq_in(1), bidir, X, 1362, 1, Z)," & "1364 ( BC_2, *, control, 1)," & "1365 ( BC_7, sram_rd_wr_addr(22), bidir, X, 1364, 1, Z)," & "1366 ( BC_2, *, control, 1)," & "1367 ( BC_7, sram_rd_wr_addr(20), bidir, X, 1366, 1, Z)," & "1368 ( BC_2, *, control, 1)," & "1369 ( BC_7, sram_rd_wr_addr(21), bidir, X, 1368, 1, Z)," & "1370 ( BC_2, *, control, 1)," & "1371 ( BC_7, sram_rd_wr_addr(17), bidir, X, 1370, 1, Z)," & "1372 ( BC_2, *, control, 1)," & "1373 ( BC_7, sram_rd_wr_addr(16), bidir, X, 1372, 1, Z)," & "1374 ( BC_2, *, control, 1)," & "1375 ( BC_7, sram_rd_wr_addr(15), bidir, X, 1374, 1, Z)," & "1376 ( BC_2, *, control, 1)," & "1377 ( BC_7, sram_rd_wr_addr(11), bidir, X, 1376, 1, Z)," & "1378 ( BC_2, *, control, 1)," & "1379 ( BC_7, sram_rd_wr_addr(14), bidir, X, 1378, 1, Z)," & "1380 ( BC_2, *, control, 1)," & "1381 ( BC_7, sram_rd_wr_addr(10), bidir, X, 1380, 1, Z)," & "1382 ( BC_2, *, control, 1)," & "1383 ( BC_7, sram_rd_wr_addr(12), bidir, X, 1382, 1, Z)," & "1384 ( BC_2, *, control, 1)," & "1385 ( BC_7, sram_rd_wr_addr(13), bidir, X, 1384, 1, Z)," & "1386 ( BC_2, *, control, 1)," & "1387 ( BC_7, sram_rd_wr_addr(9), bidir, X, 1386, 1, Z)," & "1388 ( BC_2, *, control, 1)," & "1389 ( BC_7, sram_rd_wr_addr(8), bidir, X, 1388, 1, Z)," & "1390 ( BC_2, *, control, 1)," & "1391 ( BC_7, sram_rd_wr_addr(7), bidir, X, 1390, 1, Z)," & "1392 ( BC_2, *, control, 1)," & "1393 ( BC_7, sram_rd_wr_addr(3), bidir, X, 1392, 1, Z)," & "1394 ( BC_2, *, control, 1)," & "1395 ( BC_7, sram_rd_wr_addr(6), bidir, X, 1394, 1, Z)," & "1396 ( BC_2, *, control, 1)," & "1397 ( BC_7, sram_rd_wr_addr(2), bidir, X, 1396, 1, Z)," & "1398 ( BC_2, *, control, 1)," & "1399 ( BC_7, sram_rd_wr_addr(5), bidir, X, 1398, 1, Z)," & "1400 ( BC_2, *, control, 1)," & "1401 ( BC_7, sram_rd_wr_addr(4), bidir, X, 1400, 1, Z)," & "1402 ( BC_2, *, control, 1)," & "1403 ( BC_7, sram_rd_wr_addr(1), bidir, X, 1402, 1, Z)," & "1404 ( BC_2, *, control, 1)," & "1405 ( BC_7, sram_rd_wr_addr(0), bidir, X, 1404, 1, Z)," & "1406 ( BC_2, *, control, 1)," & "1407 ( BC_7, sram_r_n, bidir, X, 1406, 1, Z)," & "1408 ( BC_2, *, control, 1)," & "1409 ( BC_7, sram2_data_out(4), bidir, X, 1408, 1, Z)," & "1410 ( BC_2, *, control, 1)," & "1411 ( BC_7, sram_w_n, bidir, X, 1410, 1, Z)," & "1412 ( BC_2, *, control, 1)," & "1413 ( BC_7, sram2_data_out(5), bidir, X, 1412, 1, Z)," & "1414 ( BC_2, *, control, 1)," & "1415 ( BC_7, sram2_data_out(0), bidir, X, 1414, 1, Z)," & "1416 ( BC_2, *, control, 1)," & "1417 ( BC_7, sram2_data_out(1), bidir, X, 1416, 1, Z)," & "1418 ( BC_2, *, control, 1)," & "1419 ( BC_7, sram2_data_out(2), bidir, X, 1418, 1, Z)," & "1420 ( BC_2, *, control, 1)," & "1421 ( BC_7, sram2_data_out(3), bidir, X, 1420, 1, Z)," & "1422 ( BC_2, *, control, 1)," & "1423 ( BC_7, sram_cq_n_in(2), bidir, X, 1422, 1, Z)," & "1424 ( BC_2, *, control, 1)," & "1425 ( BC_7, sram_k_2_p, bidir, X, 1424, 1, Z)," & "1426 ( BC_2, *, control, 1)," & "1427 ( BC_7, sram_cq_in(2), bidir, X, 1426, 1, Z)," & "1428 ( BC_2, *, control, 1)," & "1429 ( BC_7, sram2_data_in(4), bidir, X, 1428, 1, Z)," & "1430 ( BC_2, *, control, 1)," & "1431 ( BC_7, sram2_data_in(5), bidir, X, 1430, 1, Z)," & "1432 ( BC_2, *, control, 1)," & "1433 ( BC_7, sram2_data_in(0), bidir, X, 1432, 1, Z)," & "1434 ( BC_2, *, control, 1)," & "1435 ( BC_7, sram2_data_in(1), bidir, X, 1434, 1, Z)," & "1436 ( BC_2, *, control, 1)," & "1437 ( BC_7, sram2_data_in(3), bidir, X, 1436, 1, Z)," & "1438 ( BC_2, *, control, 1)," & "1439 ( BC_7, clk_ref_core_p, bidir, X, 1438, 1, Z)," & "1440 ( BC_2, *, control, 1)," & "1441 ( BC_7, sram2_data_in(2), bidir, X, 1440, 1, Z)," & "1442 ( BC_2, *, control, 1)," & "1443 ( BC_7, clk_ref_rgmii_p, bidir, X, 1442, 1, Z)"; attribute TestBench_Port_Alias of np1e_top: entity is "nmaddr0(0):nmaddr0[0]," & "nmaddr0(10):nmaddr0[10]," & "nmaddr0(11):nmaddr0[11]," & "nmaddr0(12):nmaddr0[12]," & "nmaddr0(13):nmaddr0[13]," & "nmaddr0(1):nmaddr0[1]," & "nmaddr0(2):nmaddr0[2]," & "nmaddr0(3):nmaddr0[3]," & "nmaddr0(4):nmaddr0[4]," & "nmaddr0(5):nmaddr0[5]," & "nmaddr0(6):nmaddr0[6]," & "nmaddr0(7):nmaddr0[7]," & "nmaddr0(8):nmaddr0[8]," & "nmaddr0(9):nmaddr0[9]," & "nmaddr1(0):nmaddr1[0]," & "nmaddr1(10):nmaddr1[10]," & "nmaddr1(11):nmaddr1[11]," & "nmaddr1(12):nmaddr1[12]," & "nmaddr1(13):nmaddr1[13]," & "nmaddr1(1):nmaddr1[1]," & "nmaddr1(2):nmaddr1[2]," & "nmaddr1(3):nmaddr1[3]," & "nmaddr1(4):nmaddr1[4]," & "nmaddr1(5):nmaddr1[5]," & "nmaddr1(6):nmaddr1[6]," & "nmaddr1(7):nmaddr1[7]," & "nmaddr1(8):nmaddr1[8]," & "nmaddr1(9):nmaddr1[9]," & "nmba0(0):nmba0[0]," & "nmba0(1):nmba0[1]," & "nmba0(2):nmba0[2]," & "nmba1(0):nmba1[0]," & "nmba1(1):nmba1[1]," & "nmba1(2):nmba1[2]," & "nmdq_0(0):nmdq_0[0]," & "nmdq_0(10):nmdq_0[10]," & "nmdq_0(11):nmdq_0[11]," & "nmdq_0(12):nmdq_0[12]," & "nmdq_0(13):nmdq_0[13]," & "nmdq_0(14):nmdq_0[14]," & "nmdq_0(15):nmdq_0[15]," & "nmdq_0(1):nmdq_0[1]," & "nmdq_0(2):nmdq_0[2]," & "nmdq_0(3):nmdq_0[3]," & "nmdq_0(4):nmdq_0[4]," & "nmdq_0(5):nmdq_0[5]," & "nmdq_0(6):nmdq_0[6]," & "nmdq_0(7):nmdq_0[7]," & "nmdq_0(8):nmdq_0[8]," & "nmdq_0(9):nmdq_0[9]," & "nmdq_1(0):nmdq_1[0]," & "nmdq_1(10):nmdq_1[10]," & "nmdq_1(11):nmdq_1[11]," & "nmdq_1(12):nmdq_1[12]," & "nmdq_1(13):nmdq_1[13]," & "nmdq_1(14):nmdq_1[14]," & "nmdq_1(15):nmdq_1[15]," & "nmdq_1(1):nmdq_1[1]," & "nmdq_1(2):nmdq_1[2]," & "nmdq_1(3):nmdq_1[3]," & "nmdq_1(4):nmdq_1[4]," & "nmdq_1(5):nmdq_1[5]," & "nmdq_1(6):nmdq_1[6]," & "nmdq_1(7):nmdq_1[7]," & "nmdq_1(8):nmdq_1[8]," & "nmdq_1(9):nmdq_1[9]," & "nmecc_0(0):nmecc_0[0]," & "nmecc_0(1):nmecc_0[1]," & "nmecc_1(0):nmecc_1[0]," & "nmecc_1(1):nmecc_1[1]," & "pci_ad(0):pci_ad[0]," & "pci_ad(10):pci_ad[10]," & "pci_ad(11):pci_ad[11]," & "pci_ad(12):pci_ad[12]," & "pci_ad(13):pci_ad[13]," & "pci_ad(14):pci_ad[14]," & "pci_ad(15):pci_ad[15]," & "pci_ad(16):pci_ad[16]," & "pci_ad(17):pci_ad[17]," & "pci_ad(18):pci_ad[18]," & "pci_ad(19):pci_ad[19]," & "pci_ad(1):pci_ad[1]," & "pci_ad(20):pci_ad[20]," & "pci_ad(21):pci_ad[21]," & "pci_ad(22):pci_ad[22]," & "pci_ad(23):pci_ad[23]," & "pci_ad(24):pci_ad[24]," & "pci_ad(25):pci_ad[25]," & "pci_ad(26):pci_ad[26]," & "pci_ad(27):pci_ad[27]," & "pci_ad(28):pci_ad[28]," & "pci_ad(29):pci_ad[29]," & "pci_ad(2):pci_ad[2]," & "pci_ad(30):pci_ad[30]," & "pci_ad(31):pci_ad[31]," & "pci_ad(3):pci_ad[3]," & "pci_ad(4):pci_ad[4]," & "pci_ad(5):pci_ad[5]," & "pci_ad(6):pci_ad[6]," & "pci_ad(7):pci_ad[7]," & "pci_ad(8):pci_ad[8]," & "pci_ad(9):pci_ad[9]," & "pci_c_be_n(0):pci_c_be_n[0]," & "pci_c_be_n(1):pci_c_be_n[1]," & "pci_c_be_n(2):pci_c_be_n[2]," & "pci_c_be_n(3):pci_c_be_n[3]," & "rgmii_0_rd(0):rgmii_0_rd[0]," & "rgmii_0_rd(1):rgmii_0_rd[1]," & "rgmii_0_rd(2):rgmii_0_rd[2]," & "rgmii_0_rd(3):rgmii_0_rd[3]," & "rgmii_0_td(0):rgmii_0_td[0]," & "rgmii_0_td(1):rgmii_0_td[1]," & "rgmii_0_td(2):rgmii_0_td[2]," & "rgmii_0_td(3):rgmii_0_td[3]," & "rgmii_1_rd(0):rgmii_1_rd[0]," & "rgmii_1_rd(1):rgmii_1_rd[1]," & "rgmii_1_rd(2):rgmii_1_rd[2]," & "rgmii_1_rd(3):rgmii_1_rd[3]," & "rgmii_1_td(0):rgmii_1_td[0]," & "rgmii_1_td(1):rgmii_1_td[1]," & "rgmii_1_td(2):rgmii_1_td[2]," & "rgmii_1_td(3):rgmii_1_td[3]," & "rgmii_2_rd(0):rgmii_2_rd[0]," & "rgmii_2_rd(1):rgmii_2_rd[1]," & "rgmii_2_rd(2):rgmii_2_rd[2]," & "rgmii_2_rd(3):rgmii_2_rd[3]," & "rgmii_2_td(0):rgmii_2_td[0]," & "rgmii_2_td(1):rgmii_2_td[1]," & "rgmii_2_td(2):rgmii_2_td[2]," & "rgmii_2_td(3):rgmii_2_td[3]," & "rgmii_3_rd(0):rgmii_3_rd[0]," & "rgmii_3_rd(1):rgmii_3_rd[1]," & "rgmii_3_rd(2):rgmii_3_rd[2]," & "rgmii_3_rd(3):rgmii_3_rd[3]," & "rgmii_3_td(0):rgmii_3_td[0]," & "rgmii_3_td(1):rgmii_3_td[1]," & "rgmii_3_td(2):rgmii_3_td[2]," & "rgmii_3_td(3):rgmii_3_td[3]," & "rgmii_4_rd(0):rgmii_4_rd[0]," & "rgmii_4_rd(1):rgmii_4_rd[1]," & "rgmii_4_rd(2):rgmii_4_rd[2]," & "rgmii_4_rd(3):rgmii_4_rd[3]," & "rgmii_4_td(0):rgmii_4_td[0]," & "rgmii_4_td(1):rgmii_4_td[1]," & "rgmii_4_td(2):rgmii_4_td[2]," & "rgmii_4_td(3):rgmii_4_td[3]," & "rgmii_5_rd(0):rgmii_5_rd[0]," & "rgmii_5_rd(1):rgmii_5_rd[1]," & "rgmii_5_rd(2):rgmii_5_rd[2]," & "rgmii_5_rd(3):rgmii_5_rd[3]," & "rgmii_5_td(0):rgmii_5_td[0]," & "rgmii_5_td(1):rgmii_5_td[1]," & "rgmii_5_td(2):rgmii_5_td[2]," & "rgmii_5_td(3):rgmii_5_td[3]," & "rgmii_6_rd(0):rgmii_6_rd[0]," & "rgmii_6_rd(1):rgmii_6_rd[1]," & "rgmii_6_rd(2):rgmii_6_rd[2]," & "rgmii_6_rd(3):rgmii_6_rd[3]," & "rgmii_6_td(0):rgmii_6_td[0]," & "rgmii_6_td(1):rgmii_6_td[1]," & "rgmii_6_td(2):rgmii_6_td[2]," & "rgmii_6_td(3):rgmii_6_td[3]," & "rgmii_7_rd(0):rgmii_7_rd[0]," & "rgmii_7_rd(1):rgmii_7_rd[1]," & "rgmii_7_rd(2):rgmii_7_rd[2]," & "rgmii_7_rd(3):rgmii_7_rd[3]," & "rgmii_7_td(0):rgmii_7_td[0]," & "rgmii_7_td(1):rgmii_7_td[1]," & "rgmii_7_td(2):rgmii_7_td[2]," & "rgmii_7_td(3):rgmii_7_td[3]," & "rgmii_8_rd(0):rgmii_8_rd[0]," & "rgmii_8_rd(1):rgmii_8_rd[1]," & "rgmii_8_rd(2):rgmii_8_rd[2]," & "rgmii_8_rd(3):rgmii_8_rd[3]," & "rgmii_8_td(0):rgmii_8_td[0]," & "rgmii_8_td(1):rgmii_8_td[1]," & "rgmii_8_td(2):rgmii_8_td[2]," & "rgmii_8_td(3):rgmii_8_td[3]," & "rgmii_9_rd(0):rgmii_9_rd[0]," & "rgmii_9_rd(1):rgmii_9_rd[1]," & "rgmii_9_rd(2):rgmii_9_rd[2]," & "rgmii_9_rd(3):rgmii_9_rd[3]," & "rgmii_9_td(0):rgmii_9_td[0]," & "rgmii_9_td(1):rgmii_9_td[1]," & "rgmii_9_td(2):rgmii_9_td[2]," & "rgmii_9_td(3):rgmii_9_td[3]," & "smaddr(0):smaddr[0]," & "smaddr(10):smaddr[10]," & "smaddr(11):smaddr[11]," & "smaddr(12):smaddr[12]," & "smaddr(13):smaddr[13]," & "smaddr(14):smaddr[14]," & "smaddr(1):smaddr[1]," & "smaddr(2):smaddr[2]," & "smaddr(3):smaddr[3]," & "smaddr(4):smaddr[4]," & "smaddr(5):smaddr[5]," & "smaddr(6):smaddr[6]," & "smaddr(7):smaddr[7]," & "smaddr(8):smaddr[8]," & "smaddr(9):smaddr[9]," & "smba(0):smba[0]," & "smba(1):smba[1]," & "smba(2):smba[2]," & "smdq(0):smdq[0]," & "smdq(10):smdq[10]," & "smdq(11):smdq[11]," & "smdq(12):smdq[12]," & "smdq(13):smdq[13]," & "smdq(14):smdq[14]," & "smdq(15):smdq[15]," & "smdq(16):smdq[16]," & "smdq(17):smdq[17]," & "smdq(18):smdq[18]," & "smdq(19):smdq[19]," & "smdq(1):smdq[1]," & "smdq(20):smdq[20]," & "smdq(21):smdq[21]," & "smdq(22):smdq[22]," & "smdq(23):smdq[23]," & "smdq(24):smdq[24]," & "smdq(25):smdq[25]," & "smdq(26):smdq[26]," & "smdq(27):smdq[27]," & "smdq(28):smdq[28]," & "smdq(29):smdq[29]," & "smdq(2):smdq[2]," & "smdq(30):smdq[30]," & "smdq(31):smdq[31]," & "smdq(32):smdq[32]," & "smdq(33):smdq[33]," & "smdq(34):smdq[34]," & "smdq(35):smdq[35]," & "smdq(36):smdq[36]," & "smdq(37):smdq[37]," & "smdq(38):smdq[38]," & "smdq(39):smdq[39]," & "smdq(3):smdq[3]," & "smdq(40):smdq[40]," & "smdq(41):smdq[41]," & "smdq(42):smdq[42]," & "smdq(43):smdq[43]," & "smdq(44):smdq[44]," & "smdq(45):smdq[45]," & "smdq(46):smdq[46]," & "smdq(47):smdq[47]," & "smdq(48):smdq[48]," & "smdq(49):smdq[49]," & "smdq(4):smdq[4]," & "smdq(50):smdq[50]," & "smdq(51):smdq[51]," & "smdq(52):smdq[52]," & "smdq(53):smdq[53]," & "smdq(54):smdq[54]," & "smdq(55):smdq[55]," & "smdq(56):smdq[56]," & "smdq(57):smdq[57]," & "smdq(58):smdq[58]," & "smdq(59):smdq[59]," & "smdq(5):smdq[5]," & "smdq(60):smdq[60]," & "smdq(61):smdq[61]," & "smdq(62):smdq[62]," & "smdq(63):smdq[63]," & "smdq(6):smdq[6]," & "smdq(7):smdq[7]," & "smdq(8):smdq[8]," & "smdq(9):smdq[9]," & "smecc(0):smecc[0]," & "smecc(1):smecc[1]," & "smecc(2):smecc[2]," & "smecc(3):smecc[3]," & "smecc(4):smecc[4]," & "smecc(5):smecc[5]," & "smecc(6):smecc[6]," & "smecc(7):smecc[7]," & "spia_rxstat(0):spia_rxstat[0]," & "spia_rxstat(1):spia_rxstat[1]," & "spia_txstat(0):spia_txstat[0]," & "spia_txstat(1):spia_txstat[1]," & "spib_rxstat(0):spib_rxstat[0]," & "spib_rxstat(1):spib_rxstat[1]," & "spib_txstat(0):spib_txstat[0]," & "spib_txstat(1):spib_txstat[1]," & "sram0_data_in(0):sram0_data_in[0]," & "sram0_data_in(1):sram0_data_in[1]," & "sram0_data_in(2):sram0_data_in[2]," & "sram0_data_in(3):sram0_data_in[3]," & "sram0_data_in(4):sram0_data_in[4]," & "sram0_data_in(5):sram0_data_in[5]," & "sram0_data_in(6):sram0_data_in[6]," & "sram0_data_in(7):sram0_data_in[7]," & "sram0_data_in(8):sram0_data_in[8]," & "sram0_data_out(0):sram0_data_out[0]," & "sram0_data_out(1):sram0_data_out[1]," & "sram0_data_out(2):sram0_data_out[2]," & "sram0_data_out(3):sram0_data_out[3]," & "sram0_data_out(4):sram0_data_out[4]," & "sram0_data_out(5):sram0_data_out[5]," & "sram0_data_out(6):sram0_data_out[6]," & "sram0_data_out(7):sram0_data_out[7]," & "sram0_data_out(8):sram0_data_out[8]," & "sram1_data_in(0):sram1_data_in[0]," & "sram1_data_in(1):sram1_data_in[1]," & "sram1_data_in(2):sram1_data_in[2]," & "sram1_data_in(3):sram1_data_in[3]," & "sram1_data_in(4):sram1_data_in[4]," & "sram1_data_in(5):sram1_data_in[5]," & "sram1_data_in(6):sram1_data_in[6]," & "sram1_data_in(7):sram1_data_in[7]," & "sram1_data_in(8):sram1_data_in[8]," & "sram1_data_out(0):sram1_data_out[0]," & "sram1_data_out(1):sram1_data_out[1]," & "sram1_data_out(2):sram1_data_out[2]," & "sram1_data_out(3):sram1_data_out[3]," & "sram1_data_out(4):sram1_data_out[4]," & "sram1_data_out(5):sram1_data_out[5]," & "sram1_data_out(6):sram1_data_out[6]," & "sram1_data_out(7):sram1_data_out[7]," & "sram1_data_out(8):sram1_data_out[8]," & "sram2_data_in(0):sram2_data_in[0]," & "sram2_data_in(1):sram2_data_in[1]," & "sram2_data_in(2):sram2_data_in[2]," & "sram2_data_in(3):sram2_data_in[3]," & "sram2_data_in(4):sram2_data_in[4]," & "sram2_data_in(5):sram2_data_in[5]," & "sram2_data_out(0):sram2_data_out[0]," & "sram2_data_out(1):sram2_data_out[1]," & "sram2_data_out(2):sram2_data_out[2]," & "sram2_data_out(3):sram2_data_out[3]," & "sram2_data_out(4):sram2_data_out[4]," & "sram2_data_out(5):sram2_data_out[5]," & "sram_cq_in(0):sram_cq_in[0]," & "sram_cq_in(1):sram_cq_in[1]," & "sram_cq_in(2):sram_cq_in[2]," & "sram_cq_n_in(0):sram_cq_n_in[0]," & "sram_cq_n_in(1):sram_cq_n_in[1]," & "sram_cq_n_in(2):sram_cq_n_in[2]," & "sram_rd_wr_addr(0):sram_rd_wr_addr[0]," & "sram_rd_wr_addr(10):sram_rd_wr_addr[10]," & "sram_rd_wr_addr(11):sram_rd_wr_addr[11]," & "sram_rd_wr_addr(12):sram_rd_wr_addr[12]," & "sram_rd_wr_addr(13):sram_rd_wr_addr[13]," & "sram_rd_wr_addr(14):sram_rd_wr_addr[14]," & "sram_rd_wr_addr(15):sram_rd_wr_addr[15]," & "sram_rd_wr_addr(16):sram_rd_wr_addr[16]," & "sram_rd_wr_addr(17):sram_rd_wr_addr[17]," & "sram_rd_wr_addr(18):sram_rd_wr_addr[18]," & "sram_rd_wr_addr(19):sram_rd_wr_addr[19]," & "sram_rd_wr_addr(1):sram_rd_wr_addr[1]," & "sram_rd_wr_addr(20):sram_rd_wr_addr[20]," & "sram_rd_wr_addr(21):sram_rd_wr_addr[21]," & "sram_rd_wr_addr(22):sram_rd_wr_addr[22]," & "sram_rd_wr_addr(23):sram_rd_wr_addr[23]," & "sram_rd_wr_addr(2):sram_rd_wr_addr[2]," & "sram_rd_wr_addr(3):sram_rd_wr_addr[3]," & "sram_rd_wr_addr(4):sram_rd_wr_addr[4]," & "sram_rd_wr_addr(5):sram_rd_wr_addr[5]," & "sram_rd_wr_addr(6):sram_rd_wr_addr[6]," & "sram_rd_wr_addr(7):sram_rd_wr_addr[7]," & "sram_rd_wr_addr(8):sram_rd_wr_addr[8]," & "sram_rd_wr_addr(9):sram_rd_wr_addr[9]," & "wmaddr_0(0):wmaddr_0[0]," & "wmaddr_0(10):wmaddr_0[10]," & "wmaddr_0(11):wmaddr_0[11]," & "wmaddr_0(12):wmaddr_0[12]," & "wmaddr_0(13):wmaddr_0[13]," & "wmaddr_0(1):wmaddr_0[1]," & "wmaddr_0(2):wmaddr_0[2]," & "wmaddr_0(3):wmaddr_0[3]," & "wmaddr_0(4):wmaddr_0[4]," & "wmaddr_0(5):wmaddr_0[5]," & "wmaddr_0(6):wmaddr_0[6]," & "wmaddr_0(7):wmaddr_0[7]," & "wmaddr_0(8):wmaddr_0[8]," & "wmaddr_0(9):wmaddr_0[9]," & "wmaddr_1(0):wmaddr_1[0]," & "wmaddr_1(10):wmaddr_1[10]," & "wmaddr_1(11):wmaddr_1[11]," & "wmaddr_1(12):wmaddr_1[12]," & "wmaddr_1(13):wmaddr_1[13]," & "wmaddr_1(1):wmaddr_1[1]," & "wmaddr_1(2):wmaddr_1[2]," & "wmaddr_1(3):wmaddr_1[3]," & "wmaddr_1(4):wmaddr_1[4]," & "wmaddr_1(5):wmaddr_1[5]," & "wmaddr_1(6):wmaddr_1[6]," & "wmaddr_1(7):wmaddr_1[7]," & "wmaddr_1(8):wmaddr_1[8]," & "wmaddr_1(9):wmaddr_1[9]," & "wmba_0(0):wmba_0[0]," & "wmba_0(1):wmba_0[1]," & "wmba_0(2):wmba_0[2]," & "wmba_1(0):wmba_1[0]," & "wmba_1(1):wmba_1[1]," & "wmba_1(2):wmba_1[2]," & "wmdq_0(0):wmdq_0[0]," & "wmdq_0(10):wmdq_0[10]," & "wmdq_0(11):wmdq_0[11]," & "wmdq_0(12):wmdq_0[12]," & "wmdq_0(13):wmdq_0[13]," & "wmdq_0(14):wmdq_0[14]," & "wmdq_0(15):wmdq_0[15]," & "wmdq_0(16):wmdq_0[16]," & "wmdq_0(17):wmdq_0[17]," & "wmdq_0(18):wmdq_0[18]," & "wmdq_0(19):wmdq_0[19]," & "wmdq_0(1):wmdq_0[1]," & "wmdq_0(20):wmdq_0[20]," & "wmdq_0(21):wmdq_0[21]," & "wmdq_0(22):wmdq_0[22]," & "wmdq_0(23):wmdq_0[23]," & "wmdq_0(24):wmdq_0[24]," & "wmdq_0(25):wmdq_0[25]," & "wmdq_0(26):wmdq_0[26]," & "wmdq_0(27):wmdq_0[27]," & "wmdq_0(28):wmdq_0[28]," & "wmdq_0(29):wmdq_0[29]," & "wmdq_0(2):wmdq_0[2]," & "wmdq_0(30):wmdq_0[30]," & "wmdq_0(31):wmdq_0[31]," & "wmdq_0(32):wmdq_0[32]," & "wmdq_0(33):wmdq_0[33]," & "wmdq_0(34):wmdq_0[34]," & "wmdq_0(35):wmdq_0[35]," & "wmdq_0(36):wmdq_0[36]," & "wmdq_0(37):wmdq_0[37]," & "wmdq_0(38):wmdq_0[38]," & "wmdq_0(39):wmdq_0[39]," & "wmdq_0(3):wmdq_0[3]," & "wmdq_0(40):wmdq_0[40]," & "wmdq_0(41):wmdq_0[41]," & "wmdq_0(42):wmdq_0[42]," & "wmdq_0(43):wmdq_0[43]," & "wmdq_0(44):wmdq_0[44]," & "wmdq_0(45):wmdq_0[45]," & "wmdq_0(46):wmdq_0[46]," & "wmdq_0(47):wmdq_0[47]," & "wmdq_0(48):wmdq_0[48]," & "wmdq_0(49):wmdq_0[49]," & "wmdq_0(4):wmdq_0[4]," & "wmdq_0(50):wmdq_0[50]," & "wmdq_0(51):wmdq_0[51]," & "wmdq_0(52):wmdq_0[52]," & "wmdq_0(53):wmdq_0[53]," & "wmdq_0(54):wmdq_0[54]," & "wmdq_0(55):wmdq_0[55]," & "wmdq_0(56):wmdq_0[56]," & "wmdq_0(57):wmdq_0[57]," & "wmdq_0(58):wmdq_0[58]," & "wmdq_0(59):wmdq_0[59]," & "wmdq_0(5):wmdq_0[5]," & "wmdq_0(60):wmdq_0[60]," & "wmdq_0(61):wmdq_0[61]," & "wmdq_0(62):wmdq_0[62]," & "wmdq_0(63):wmdq_0[63]," & "wmdq_0(6):wmdq_0[6]," & "wmdq_0(7):wmdq_0[7]," & "wmdq_0(8):wmdq_0[8]," & "wmdq_0(9):wmdq_0[9]," & "wmdq_1(0):wmdq_1[0]," & "wmdq_1(10):wmdq_1[10]," & "wmdq_1(11):wmdq_1[11]," & "wmdq_1(12):wmdq_1[12]," & "wmdq_1(13):wmdq_1[13]," & "wmdq_1(14):wmdq_1[14]," & "wmdq_1(15):wmdq_1[15]," & "wmdq_1(16):wmdq_1[16]," & "wmdq_1(17):wmdq_1[17]," & "wmdq_1(18):wmdq_1[18]," & "wmdq_1(19):wmdq_1[19]," & "wmdq_1(1):wmdq_1[1]," & "wmdq_1(20):wmdq_1[20]," & "wmdq_1(21):wmdq_1[21]," & "wmdq_1(22):wmdq_1[22]," & "wmdq_1(23):wmdq_1[23]," & "wmdq_1(24):wmdq_1[24]," & "wmdq_1(25):wmdq_1[25]," & "wmdq_1(26):wmdq_1[26]," & "wmdq_1(27):wmdq_1[27]," & "wmdq_1(28):wmdq_1[28]," & "wmdq_1(29):wmdq_1[29]," & "wmdq_1(2):wmdq_1[2]," & "wmdq_1(30):wmdq_1[30]," & "wmdq_1(31):wmdq_1[31]," & "wmdq_1(32):wmdq_1[32]," & "wmdq_1(33):wmdq_1[33]," & "wmdq_1(34):wmdq_1[34]," & "wmdq_1(35):wmdq_1[35]," & "wmdq_1(36):wmdq_1[36]," & "wmdq_1(37):wmdq_1[37]," & "wmdq_1(38):wmdq_1[38]," & "wmdq_1(39):wmdq_1[39]," & "wmdq_1(3):wmdq_1[3]," & "wmdq_1(40):wmdq_1[40]," & "wmdq_1(41):wmdq_1[41]," & "wmdq_1(42):wmdq_1[42]," & "wmdq_1(43):wmdq_1[43]," & "wmdq_1(44):wmdq_1[44]," & "wmdq_1(45):wmdq_1[45]," & "wmdq_1(46):wmdq_1[46]," & "wmdq_1(47):wmdq_1[47]," & "wmdq_1(48):wmdq_1[48]," & "wmdq_1(49):wmdq_1[49]," & "wmdq_1(4):wmdq_1[4]," & "wmdq_1(50):wmdq_1[50]," & "wmdq_1(51):wmdq_1[51]," & "wmdq_1(52):wmdq_1[52]," & "wmdq_1(53):wmdq_1[53]," & "wmdq_1(54):wmdq_1[54]," & "wmdq_1(55):wmdq_1[55]," & "wmdq_1(56):wmdq_1[56]," & "wmdq_1(57):wmdq_1[57]," & "wmdq_1(58):wmdq_1[58]," & "wmdq_1(59):wmdq_1[59]," & "wmdq_1(5):wmdq_1[5]," & "wmdq_1(60):wmdq_1[60]," & "wmdq_1(61):wmdq_1[61]," & "wmdq_1(62):wmdq_1[62]," & "wmdq_1(63):wmdq_1[63]," & "wmdq_1(6):wmdq_1[6]," & "wmdq_1(7):wmdq_1[7]," & "wmdq_1(8):wmdq_1[8]," & "wmdq_1(9):wmdq_1[9]," & "wmecc_0(0):wmecc_0[0]," & "wmecc_0(1):wmecc_0[1]," & "wmecc_0(2):wmecc_0[2]," & "wmecc_0(3):wmecc_0[3]," & "wmecc_0(4):wmecc_0[4]," & "wmecc_0(5):wmecc_0[5]," & "wmecc_0(6):wmecc_0[6]," & "wmecc_0(7):wmecc_0[7]," & "wmecc_1(0):wmecc_1[0]," & "wmecc_1(1):wmecc_1[1]," & "wmecc_1(2):wmecc_1[2]," & "wmecc_1(3):wmecc_1[3]," & "wmecc_1(4):wmecc_1[4]," & "wmecc_1(5):wmecc_1[5]," & "wmecc_1(6):wmecc_1[6]," & "wmecc_1(7):wmecc_1[7]"; end np1e_top;