-- --------------------------------------------------------------------------- -- Copyright Message -- --------------------------------------------------------------------------- -- -- NXP Semiconductors confidential and proprietary. -- COPYRIGHT 2009 by NXP Semiconductors N.V. -- -- All rights are reserved. Reproduction in whole or in part is -- prohibited without the written consent of the copyright owner. -- -- --------------------------------------------------------------------------- -- Design Information -- --------------------------------------------------------------------------- -- -- File : $RCSfile: LPC313XFET180_REVDASH_2009_05_01.BSDL.rca $ -- -- Author : $Author: usb10152 $ -- -- Description : LPC313XFET180_REVDASH_2009_05_01.BSDL -- -- --------------------------------------------------------------------------- -- $Id: LPC313XFET180_REVDASH_2009_05_01.BSDL.rca 1.1 Mon Oct 13 20:24:55 2008 usb10152 Experimental $ -- $Source: /home/usb10152/bsdl/LPC313XFET180_REVDASH_2009_05_01.BSDL.rca $ -- --------------------------------------------------------------------------- -- ------------------------------------------------------------------------------- -- Job Status: Pass -- -- File Name: LPC313XFET180_REVDASH_2009_05_01.BSDL -- Timestamp: Friday, May 01, 2009 11:28 PM -- -- Results: Entity name: LPC313XFET180 -- IEEE Std 1149.1-2001 (Version 2.0) -- Packaging option selected is TFBGA180. -- Inputs = 0 -- Outputs = 1 -- Bidirectionals = 100 -- Instruction Reg Length = 4 -- Boundary Reg Length = 205 -- -- BSDL compilation of 675 lines completed without errors ------------------------------------------------------------------------------- entity LPC313XFET180 is -- -- This section identifies the default device package selected. -- generic (PHYSICAL_PIN_MAP : string := "TFBGA180"); -- -- This section declares all the ports in the design. -- port (RSTIN_N : in bit; ADC10B_VDDA33 : linkage bit; ADC10B_GNDA : linkage bit; ADC10B_GPA0 : linkage bit; ADC10B_GPA1 : linkage bit; ADC10B_GPA2 : linkage bit; USB_VBUS : linkage bit; USB_ID : linkage bit; USB_DP : linkage bit; USB_DM : linkage bit; USB_RREF : linkage bit; USB_VDDA12_PLL : linkage bit; USB_VDDA33 : linkage bit; USB_VDDA33_DRV : linkage bit; USB_VSSA_REF : linkage bit; USB_VSSA_TERM : linkage bit; USB_GNDA : linkage bit; VPP_A : linkage bit; VPP_B : linkage bit; FFAST_OUT : linkage bit; FFAST_IN : linkage bit; SYSCLK_O : inout bit; ADC10B_GPA3 : linkage bit; I2C_SDA0 : inout bit; I2C_SCL0 : inout bit; I2C_SDA1 : inout bit; I2C_SCL1 : inout bit; VDDA12 : linkage bit_vector(1 to 2); VSSA12 : linkage bit; EBI_D_9 : inout bit; EBI_D_10 : inout bit; EBI_D_11 : inout bit; EBI_D_12 : inout bit; EBI_D_13 : inout bit; EBI_D_14 : inout bit; I2SRX_BCK0 : inout bit; mGPIO9 : inout bit; mGPIO6 : inout bit; mLCD_DB_7 : inout bit; mLCD_DB_4 : inout bit; mLCD_DB_2 : inout bit; mNAND_RYBN0 : inout bit; GPIO1 : inout bit; EBI_D_4 : inout bit; I2SRX_DATA0 : inout bit; I2SRX_DATA1 : inout bit; UART_RXD : inout bit; SPI_CS_IN : inout bit; mI2STX_CLK0 : inout bit; mI2STX_BCK0 : inout bit; EBI_A_1_CLE : inout bit; EBI_NCAS_BLOUT_0 : inout bit; NAND_NCS_3 : inout bit; mLCD_DB_0 : inout bit; EBI_DQM_0_NOE : inout bit; I2STX_DATA1 : inout bit; I2STX_BCK1 : inout bit; I2STX_WS1 : inout bit; CLOCK_OUT : buffer bit; UART_TXD : inout bit; CLK_256FS_O : inout bit; SPI_CS_OUT0 : inout bit; NAND_NCS_0 : inout bit; NAND_NCS_1 : inout bit; NAND_NCS_2 : inout bit; mLCD_CSB : inout bit; mLCD_E_RD : inout bit; mLCD_RS : inout bit; mLCD_RW_WR : inout bit; mUART_RTS_N : inout bit; EBI_NRAS_BLOUT_1 : inout bit; EBI_A_0_ALE : inout bit; EBI_NWE : inout bit; ARM_TDO : linkage bit; BUF_TRST_N : linkage bit; BUF_TCK : linkage bit; BUF_TMS : linkage bit; EBI_D_0 : inout bit; EBI_D_1 : inout bit; EBI_D_2 : inout bit; EBI_D_3 : inout bit; EBI_D_5 : inout bit; EBI_D_6 : inout bit; EBI_D_7 : inout bit; EBI_D_8 : inout bit; EBI_D_15 : inout bit; I2SRX_WS0 : inout bit; I2SRX_BCK1 : inout bit; I2SRX_WS1 : inout bit; PWM_DATA : inout bit; GPIO0 : inout bit; GPIO2 : inout bit; GPIO3 : inout bit; GPIO4 : inout bit; GPIO11 : inout bit; GPIO12 : inout bit; GPIO13 : inout bit; GPIO14 : inout bit; GPIO15 : inout bit; GPIO16 : inout bit; GPIO17 : inout bit; GPIO18 : inout bit; GPIO19 : inout bit; GPIO20 : inout bit; SPI_MISO : inout bit; SPI_MOSI : inout bit; SPI_SCK : inout bit; mLCD_DB_1 : inout bit; mLCD_DB_3 : inout bit; mLCD_DB_5 : inout bit; mLCD_DB_6 : inout bit; mLCD_DB_8 : inout bit; mLCD_DB_9 : inout bit; mLCD_DB_10 : inout bit; mLCD_DB_11 : inout bit; mLCD_DB_12 : inout bit; mLCD_DB_13 : inout bit; mLCD_DB_14 : inout bit; mLCD_DB_15 : inout bit; mGPIO5 : inout bit; mGPIO7 : inout bit; mGPIO8 : inout bit; mGPIO10 : inout bit; mNAND_RYBN1 : inout bit; mNAND_RYBN2 : inout bit; mNAND_RYBN3 : inout bit; mUART_CTS_N : inout bit; mI2STX_DATA0 : inout bit; mI2STX_WS0 : inout bit; TRST_N : in bit; TCK : in bit; TDI : in bit; SCAN_TDO : out bit; TMS : in bit; JTAGSEL : in bit; VDDI : linkage bit_vector(1 to 5); VSSI : linkage bit_vector(1 to 6); VDDE_IOA : linkage bit_vector(1 to 5); VDDE_IOB : linkage bit_vector(1 to 4); VDDE_IOC : linkage bit_vector(1 to 6); VDDE_ESD : linkage bit; VSSE_IOA : linkage bit_vector(1 to 6); VSSE_IOB : linkage bit_vector(1 to 4); VSSE_IOC : linkage bit_vector(1 to 7) ); use std_1149_1_2001.all; attribute COMPONENT_CONFORMANCE of LPC313XFET180 : entity is "std_1149_1_2001"; attribute PIN_MAP of LPC313XFET180 : entity is PHYSICAL_PIN_MAP; -- -- This section specifies the pin map for each port. -- constant TFBGA180 : PIN_MAP_STRING := "RSTIN_N : H14," & "ADC10B_VDDA33 : A13," & "ADC10B_GNDA : A12," & "ADC10B_GPA0 : B14," & "ADC10B_GPA1 : A14," & "ADC10B_GPA2 : B13," & "USB_VBUS : L2, " & "USB_ID : M1, " & "USB_DP : P2, " & "USB_DM : N2, " & "USB_RREF : J5, " & "USB_VDDA12_PLL : L1, " & "USB_VDDA33 : P1, " & "USB_VDDA33_DRV : M2, " & "USB_VSSA_REF : K4, " & "USB_VSSA_TERM : L3, " & "USB_GNDA : N1, " & "VPP_A : A9, " & "VPP_B : C9, " & "FFAST_OUT : B10," & "FFAST_IN : A10," & "SYSCLK_O : G13," & "ADC10B_GPA3 : C14," & "I2C_SDA0 : C10," & "I2C_SCL0 : D10," & "I2C_SDA1 : E12," & "I2C_SCL1 : E13," & "VDDA12 : (D11, E10)," & "VSSA12 : E9, " & "EBI_D_9 : A3, " & "EBI_D_10 : A1, " & "EBI_D_11 : C2, " & "EBI_D_12 : G3, " & "EBI_D_13 : D3, " & "EBI_D_14 : E3, " & "I2SRX_BCK0 : N10," & "mGPIO9 : C5, " & "mGPIO6 : A6, " & "mLCD_DB_7 : P5, " & "mLCD_DB_4 : N7, " & "mLCD_DB_2 : N6, " & "mNAND_RYBN0 : E6, " & "GPIO1 : J10," & "EBI_D_4 : E2, " & "I2SRX_DATA0 : M10," & "I2SRX_DATA1 : G14," & "UART_RXD : P12," & "SPI_CS_IN : B8, " & "mI2STX_CLK0 : N14," & "mI2STX_BCK0 : M12," & "EBI_A_1_CLE : A2, " & "EBI_NCAS_BLOUT_0 : G1, " & "NAND_NCS_3 : K2, " & "mLCD_DB_0 : N8, " & "EBI_DQM_0_NOE : H1, " & "I2STX_DATA1 : F12," & "I2STX_BCK1 : E14," & "I2STX_WS1 : G10," & "CLOCK_OUT : J4, " & "UART_TXD : N12," & "CLK_256FS_O : H12," & "SPI_CS_OUT0 : A7, " & "NAND_NCS_0 : J1, " & "NAND_NCS_1 : J3, " & "NAND_NCS_2 : K1, " & "mLCD_CSB : K8, " & "mLCD_E_RD : L8, " & "mLCD_RS : P8, " & "mLCD_RW_WR : N9, " & "mUART_RTS_N : P14," & "EBI_NRAS_BLOUT_1 : H2, " & "EBI_A_0_ALE : B3, " & "EBI_NWE : J2, " & "ARM_TDO : E11," & "BUF_TRST_N : F11," & "BUF_TCK : D13," & "BUF_TMS : D14," & "EBI_D_0 : G2, " & "EBI_D_1 : F2, " & "EBI_D_2 : F1, " & "EBI_D_3 : E1, " & "EBI_D_5 : D1, " & "EBI_D_6 : D2, " & "EBI_D_7 : C1, " & "EBI_D_8 : B1, " & "EBI_D_15 : F3, " & "I2SRX_WS0 : P11," & "I2SRX_BCK1 : F14," & "I2SRX_WS1 : F13," & "PWM_DATA : B9, " & "GPIO0 : K10," & "GPIO2 : L14," & "GPIO3 : B11," & "GPIO4 : C11," & "GPIO11 : H13," & "GPIO12 : H10," & "GPIO13 : J12," & "GPIO14 : J14," & "GPIO15 : J13," & "GPIO16 : J11," & "GPIO17 : K12," & "GPIO18 : K14," & "GPIO19 : H11," & "GPIO20 : K13," & "SPI_MISO : C8, " & "SPI_MOSI : B7, " & "SPI_SCK : A8, " & "mLCD_DB_1 : P9, " & "mLCD_DB_3 : P6, " & "mLCD_DB_5 : P7, " & "mLCD_DB_6 : K6, " & "mLCD_DB_8 : N5, " & "mLCD_DB_9 : L5, " & "mLCD_DB_10 : K7, " & "mLCD_DB_11 : N4, " & "mLCD_DB_12 : K5, " & "mLCD_DB_13 : P4, " & "mLCD_DB_14 : P3, " & "mLCD_DB_15 : N3, " & "mGPIO5 : B6, " & "mGPIO7 : A5, " & "mGPIO8 : B5, " & "mGPIO10 : A4, " & "mNAND_RYBN1 : E7, " & "mNAND_RYBN2 : B4, " & "mNAND_RYBN3 : D4, " & "mUART_CTS_N : N13," & "mI2STX_DATA0 : M13," & "mI2STX_WS0 : M11," & "TRST_N : P13," & "TCK : M14," & "TDI : K9, " & "SCAN_TDO : F10," & "TMS : P10," & "JTAGSEL : N11," & "VDDI : (H3, L7, L12, C12, C6)," & "VSSI : (A11, C7, D12, G4, L6, L11)," & "VDDE_IOA : (B2, E5, F5, G5, H5)," & "VDDE_IOB : (L4, M5, M7, M9)," & "VDDE_IOC : (C13, D5, D7, E8, G12, L10)," & "VDDE_ESD : K11," & "VSSE_IOA : (C3, C4, E4, F4, H4, K3)," & "VSSE_IOB : (M3, M4, M6, M8)," & "VSSE_IOC : (B12, D6, D8, D9, G11, L9, L13)"; -- -- This section specifies the TAP ports. For the TAP TCK port, the parameters in the brackets are: -- First Field : Maximum TCK frequency. -- Second Field : Allowable states TCK may be stopped in. -- attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, both); attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of SCAN_TDO : signal is true; attribute TAP_SCAN_RESET of TRST_N : signal is true; -- -- Specifies the compliance enable patterns for the design. It lists a set of -- design ports and the values that they should be set to, in order to enable -- compliance to IEEE Std 1149.1 -- attribute COMPLIANCE_PATTERNS of LPC313XFET180: entity is "(JTAGSEL, RSTIN_N) (01)"; -- -- Specifies the number of bits in the instruction register. -- attribute INSTRUCTION_LENGTH of LPC313XFET180 : entity is 4; -- -- Specifies the boundary-scan instructions implemented in the design and their -- opcodes. -- attribute INSTRUCTION_OPCODE of LPC313XFET180 : entity is "BYPASS (1111)," & "SAMPLE (0010)," & "IDCODE (0001)," & "EXTEST (0000)," & "PRELOAD (0010)," & "CLAMP (0100)," & "INTEST (0011)"; -- Specifies the bit pattern that is loaded into the instruction register when -- the TAP controller passes through the Capture-IR state. The standard mandates -- that the two LSBs must be "01". The remaining bits are design specific. -- attribute INSTRUCTION_CAPTURE of LPC313XFET180 : entity is "0001"; -- -- Specifies the bit pattern that is loaded into the DEVICE_ID register during -- the IDCODE instruction when the TAP controller passes through the Capture-DR -- state. -- attribute IDCODE_REGISTER of LPC313XFET180 : entity is "0001" & -- version "0101010000011110" & -- part number "00000010101" & -- manufacturer "1"; -- mandatory -- -- This section specifies the test data register placed between TDI and TDO for -- each implemented instruction. -- attribute REGISTER_ACCESS of LPC313XFET180 : entity is "BYPASS (BYPASS)," & "BOUNDARY (SAMPLE)," & "DEVICE_ID (IDCODE)," & "BOUNDARY (EXTEST)," & "BOUNDARY (PRELOAD)," & "BYPASS (CLAMP)," & "BOUNDARY (INTEST)"; -- -- Specifies the length of the boundary scan register. -- attribute BOUNDARY_LENGTH of LPC313XFET180 : entity is 205; -- -- The following list specifies the characteristics of each cell in the boundary -- scan register from TDI to TDO. The following is a description of the label -- fields : -- num : Is the cell number. -- cell : Is the cell type as defined by the standard. -- port : Is the design port name. Control cells do not have a port -- name. -- function : Is the function of the cell as defined by the standard. Is one -- of input, output2, output3, bidir, control or controlr. -- safe : Specifies the value that the BSR cell should be loaded with -- for safe operation when the software might otherwise choose a -- random value. -- ccell : The control cell number. Specifies the control cell that -- drives the output enable for this port. -- disval : Specifies the value that is loaded into the control cell to -- disable the output enable for the corresponding port. -- rslt : Resulting state. Shows the state of the driver when it is -- disabled. -- attribute BOUNDARY_REGISTER of LPC313XFET180 : entity is -- -- num cell port function safe [ccell disval rslt] -- "204 (BC_7, SYSCLK_O, BIDIR, X, 203, 1, Z)," & "203 (BC_2, *, CONTROL, 1)," & "202 (BC_1, I2C_SDA0, INPUT, X)," & "201 (BC_1, I2C_SDA0, OUTPUT2, 1, 201, 1, WEAK1)," & "200 (BC_1, I2C_SCL0, INPUT, X)," & "199 (BC_1, I2C_SCL0, OUTPUT2, 1, 199, 1, WEAK1)," & "198 (BC_7, I2C_SDA1, BIDIR, X, 197, 1, PULL1)," & "197 (BC_2, *, CONTROL, 1)," & "196 (BC_7, I2C_SCL1, BIDIR, X, 195, 1, PULL1)," & "195 (BC_2, *, CONTROL, 1)," & "194 (BC_7, EBI_D_9, BIDIR, X, 193, 1, Z)," & "193 (BC_2, *, CONTROL, 1)," & "192 (BC_7, EBI_D_10, BIDIR, X, 191, 1, Z)," & "191 (BC_2, *, CONTROL, 1)," & "190 (BC_7, EBI_D_11, BIDIR, X, 189, 1, Z)," & "189 (BC_2, *, CONTROL, 1)," & "188 (BC_7, EBI_D_12, BIDIR, X, 187, 1, Z)," & "187 (BC_2, *, CONTROL, 1)," & "186 (BC_7, EBI_D_13, BIDIR, X, 185, 1, Z)," & "185 (BC_2, *, CONTROL, 1)," & "184 (BC_7, EBI_D_14, BIDIR, X, 183, 1, Z)," & "183 (BC_2, *, CONTROL, 1)," & "182 (BC_7, I2SRX_BCK0, BIDIR, X, 181, 1, Z)," & "181 (BC_2, *, CONTROL, 1)," & "180 (BC_7, mGPIO9, BIDIR, X, 179, 1, Z)," & "179 (BC_2, *, CONTROL, 1)," & "178 (BC_7, mGPIO6, BIDIR, X, 177, 1, Z)," & "177 (BC_2, *, CONTROL, 1)," & "176 (BC_7, mLCD_DB_7, BIDIR, X, 175, 1, Z)," & "175 (BC_2, *, CONTROL, 1)," & "174 (BC_7, mLCD_DB_4, BIDIR, X, 173, 1, Z)," & "173 (BC_2, *, CONTROL, 1)," & "172 (BC_7, mLCD_DB_2, BIDIR, X, 171, 1, Z)," & "171 (BC_2, *, CONTROL, 1)," & "170 (BC_7, mNAND_RYBN0, BIDIR, X, 169, 1, Z)," & "169 (BC_2, *, CONTROL, 1)," & "168 (BC_7, GPIO1, BIDIR, X, 167, 1, PULL0)," & "167 (BC_2, *, CONTROL, 1)," & "166 (BC_7, EBI_D_4, BIDIR, X, 165, 1, Z)," & "165 (BC_2, *, CONTROL, 1)," & "164 (BC_7, I2SRX_DATA0, BIDIR, X, 163, 1, Z)," & "163 (BC_2, *, CONTROL, 1)," & "162 (BC_7, I2SRX_DATA1, BIDIR, X, 161, 1, Z)," & "161 (BC_2, *, CONTROL, 1)," & "160 (BC_7, UART_RXD, BIDIR, X, 159, 1, Z)," & "159 (BC_2, *, CONTROL, 1)," & "158 (BC_7, SPI_CS_IN, BIDIR, X, 157, 1, Z)," & "157 (BC_2, *, CONTROL, 1)," & "156 (BC_7, mI2STX_CLK0, BIDIR, X, 155, 1, Z)," & "155 (BC_2, *, CONTROL, 1)," & "154 (BC_7, mI2STX_BCK0, BIDIR, X, 153, 1, Z)," & "153 (BC_2, *, CONTROL, 1)," & "152 (BC_7, EBI_A_1_CLE, BIDIR, X, 151, 1, Z)," & "151 (BC_2, *, CONTROL, 1)," & "150 (BC_7, EBI_NCAS_BLOUT_0, BIDIR, X, 149, 1, Z)," & "149 (BC_2, *, CONTROL, 1)," & "148 (BC_7, NAND_NCS_3, BIDIR, X, 147, 1, Z)," & "147 (BC_2, *, CONTROL, 1)," & "146 (BC_7, mLCD_DB_0, BIDIR, X, 145, 1, Z)," & "145 (BC_2, *, CONTROL, 1)," & "144 (BC_7, EBI_DQM_0_NOE, BIDIR, X, 143, 1, Z)," & "143 (BC_2, *, CONTROL, 1)," & "142 (BC_7, I2STX_DATA1, BIDIR, X, 141, 1, Z)," & "141 (BC_2, *, CONTROL, 1)," & "140 (BC_7, I2STX_BCK1, BIDIR, X, 139, 1, Z)," & "139 (BC_2, *, CONTROL, 1)," & "138 (BC_7, I2STX_WS1, BIDIR, X, 137, 1, Z)," & "137 (BC_2, *, CONTROL, 1)," & "136 (BC_1, CLOCK_OUT, OUTPUT2, X)," & "135 (BC_7, UART_TXD, BIDIR, X, 134, 1, Z)," & "134 (BC_2, *, CONTROL, 1)," & "133 (BC_7, CLK_256FS_O, BIDIR, X, 132, 1, Z)," & "132 (BC_2, *, CONTROL, 1)," & "131 (BC_7, SPI_CS_OUT0, BIDIR, X, 130, 1, Z)," & "130 (BC_2, *, CONTROL, 1)," & "129 (BC_7, NAND_NCS_0, BIDIR, X, 128, 1, Z)," & "128 (BC_2, *, CONTROL, 1)," & "127 (BC_7, NAND_NCS_1, BIDIR, X, 126, 1, Z)," & "126 (BC_2, *, CONTROL, 1)," & "125 (BC_7, NAND_NCS_2, BIDIR, X, 124, 1, Z)," & "124 (BC_2, *, CONTROL, 1)," & "123 (BC_7, mLCD_CSB, BIDIR, X, 122, 1, Z)," & "122 (BC_2, *, CONTROL, 1)," & "121 (BC_7, mLCD_E_RD, BIDIR, X, 120, 1, Z)," & "120 (BC_2, *, CONTROL, 1)," & "119 (BC_7, mLCD_RS, BIDIR, X, 118, 1, Z)," & "118 (BC_2, *, CONTROL, 1)," & "117 (BC_7, mLCD_RW_WR, BIDIR, X, 116, 1, Z)," & "116 (BC_2, *, CONTROL, 1)," & "115 (BC_7, mUART_RTS_N, BIDIR, X, 114, 1, Z)," & "114 (BC_2, *, CONTROL, 1)," & "113 (BC_7, EBI_NRAS_BLOUT_1, BIDIR, X, 112, 1, Z)," & "112 (BC_2, *, CONTROL, 1)," & "111 (BC_7, EBI_A_0_ALE, BIDIR, X, 110, 1, Z)," & "110 (BC_2, *, CONTROL, 1)," & "109 (BC_7, EBI_NWE, BIDIR, X, 108, 1, Z)," & "108 (BC_2, *, CONTROL, 1)," & "107 (BC_1, *, INTERNAL, 1)," & "106 (BC_1, *, INTERNAL, 1)," & "105 (BC_1, *, INTERNAL, 1)," & "104 (BC_1, *, INTERNAL, 1)," & "103 (BC_7, EBI_D_0, BIDIR, X, 102, 1, Z)," & "102 (BC_2, *, CONTROL, 1)," & "101 (BC_7, EBI_D_1, BIDIR, X, 100, 1, Z)," & "100 (BC_2, *, CONTROL, 1)," & "99 (BC_7, EBI_D_2, BIDIR, X, 98, 1, Z)," & "98 (BC_2, *, CONTROL, 1)," & "97 (BC_7, EBI_D_3, BIDIR, X, 96, 1, Z)," & "96 (BC_2, *, CONTROL, 1)," & "95 (BC_7, EBI_D_5, BIDIR, X, 94, 1, Z)," & "94 (BC_2, *, CONTROL, 1)," & "93 (BC_7, EBI_D_6, BIDIR, X, 92, 1, Z)," & "92 (BC_2, *, CONTROL, 1)," & "91 (BC_7, EBI_D_7, BIDIR, X, 90, 1, Z)," & "90 (BC_2, *, CONTROL, 1)," & "89 (BC_7, EBI_D_8, BIDIR, X, 88, 1, Z)," & "88 (BC_2, *, CONTROL, 1)," & "87 (BC_7, EBI_D_15, BIDIR, X, 86, 1, Z)," & "86 (BC_2, *, CONTROL, 1)," & "85 (BC_7, I2SRX_WS0, BIDIR, X, 84, 1, Z)," & "84 (BC_2, *, CONTROL, 1)," & "83 (BC_7, I2SRX_BCK1, BIDIR, X, 82, 1, Z)," & "82 (BC_2, *, CONTROL, 1)," & "81 (BC_7, I2SRX_WS1, BIDIR, X, 80, 1, Z)," & "80 (BC_2, *, CONTROL, 1)," & "79 (BC_7, PWM_DATA, BIDIR, X, 78, 1, Z)," & "78 (BC_2, *, CONTROL, 1)," & "77 (BC_7, GPIO0, BIDIR, X, 76, 1, PULL0)," & "76 (BC_2, *, CONTROL, 1)," & "75 (BC_7, GPIO2, BIDIR, X, 74, 1, Z)," & "74 (BC_2, *, CONTROL, 1)," & "73 (BC_7, GPIO3, BIDIR, X, 72, 1, Z)," & "72 (BC_2, *, CONTROL, 1)," & "71 (BC_7, GPIO4, BIDIR, X, 70, 1, Z)," & "70 (BC_2, *, CONTROL, 1)," & "69 (BC_7, GPIO11, BIDIR, X, 68, 1, Z)," & "68 (BC_2, *, CONTROL, 1)," & "67 (BC_7, GPIO12, BIDIR, X, 66, 1, Z)," & "66 (BC_2, *, CONTROL, 1)," & "65 (BC_7, GPIO13, BIDIR, X, 64, 1, Z)," & "64 (BC_2, *, CONTROL, 1)," & "63 (BC_7, GPIO14, BIDIR, X, 62, 1, Z)," & "62 (BC_2, *, CONTROL, 1)," & "61 (BC_7, GPIO15, BIDIR, X, 60, 1, Z)," & "60 (BC_2, *, CONTROL, 1)," & "59 (BC_7, GPIO16, BIDIR, X, 58, 1, Z)," & "58 (BC_2, *, CONTROL, 1)," & "57 (BC_7, GPIO17, BIDIR, X, 56, 1, Z)," & "56 (BC_2, *, CONTROL, 1)," & "55 (BC_7, GPIO18, BIDIR, X, 54, 1, Z)," & "54 (BC_2, *, CONTROL, 1)," & "53 (BC_7, GPIO19, BIDIR, X, 52, 1, Z)," & "52 (BC_2, *, CONTROL, 1)," & "51 (BC_7, GPIO20, BIDIR, X, 50, 1, Z)," & "50 (BC_2, *, CONTROL, 1)," & "49 (BC_7, SPI_MISO, BIDIR, X, 48, 1, Z)," & "48 (BC_2, *, CONTROL, 1)," & "47 (BC_7, SPI_MOSI, BIDIR, X, 46, 1, Z)," & "46 (BC_2, *, CONTROL, 1)," & "45 (BC_7, SPI_SCK, BIDIR, X, 44, 1, Z)," & "44 (BC_2, *, CONTROL, 1)," & "43 (BC_7, mLCD_DB_1, BIDIR, X, 42, 1, Z)," & "42 (BC_2, *, CONTROL, 1)," & "41 (BC_7, mLCD_DB_3, BIDIR, X, 40, 1, Z)," & "40 (BC_2, *, CONTROL, 1)," & "39 (BC_7, mLCD_DB_5, BIDIR, X, 38, 1, Z)," & "38 (BC_2, *, CONTROL, 1)," & "37 (BC_7, mLCD_DB_6, BIDIR, X, 36, 1, Z)," & "36 (BC_2, *, CONTROL, 1)," & "35 (BC_7, mLCD_DB_8, BIDIR, X, 34, 1, Z)," & "34 (BC_2, *, CONTROL, 1)," & "33 (BC_7, mLCD_DB_9, BIDIR, X, 32, 1, Z)," & "32 (BC_2, *, CONTROL, 1)," & "31 (BC_7, mLCD_DB_10, BIDIR, X, 30, 1, Z)," & "30 (BC_2, *, CONTROL, 1)," & "29 (BC_7, mLCD_DB_11, BIDIR, X, 28, 1, Z)," & "28 (BC_2, *, CONTROL, 1)," & "27 (BC_7, mLCD_DB_12, BIDIR, X, 26, 1, Z)," & "26 (BC_2, *, CONTROL, 1)," & "25 (BC_7, mLCD_DB_13, BIDIR, X, 24, 1, Z)," & "24 (BC_2, *, CONTROL, 1)," & "23 (BC_7, mLCD_DB_14, BIDIR, X, 22, 1, Z)," & "22 (BC_2, *, CONTROL, 1)," & "21 (BC_7, mLCD_DB_15, BIDIR, X, 20, 1, Z)," & "20 (BC_2, *, CONTROL, 1)," & "19 (BC_7, mGPIO5, BIDIR, X, 18, 1, Z)," & "18 (BC_2, *, CONTROL, 1)," & "17 (BC_7, mGPIO7, BIDIR, X, 16, 1, Z)," & "16 (BC_2, *, CONTROL, 1)," & "15 (BC_7, mGPIO8, BIDIR, X, 14, 1, Z)," & "14 (BC_2, *, CONTROL, 1)," & "13 (BC_7, mGPIO10, BIDIR, X, 12, 1, Z)," & "12 (BC_2, *, CONTROL, 1)," & "11 (BC_7, mNAND_RYBN1, BIDIR, X, 10, 1, Z)," & "10 (BC_2, *, CONTROL, 1)," & "9 (BC_7, mNAND_RYBN2, BIDIR, X, 8, 1, Z)," & "8 (BC_2, *, CONTROL, 1)," & "7 (BC_7, mNAND_RYBN3, BIDIR, X, 6, 1, Z)," & "6 (BC_2, *, CONTROL, 1)," & "5 (BC_7, mUART_CTS_N, BIDIR, X, 4, 1, Z)," & "4 (BC_2, *, CONTROL, 1)," & "3 (BC_7, mI2STX_DATA0, BIDIR, X, 2, 1, Z)," & "2 (BC_2, *, CONTROL, 1)," & "1 (BC_7, mI2STX_WS0, BIDIR, X, 0, 1, Z)," & "0 (BC_2, *, CONTROL, 1)"; end LPC313XFET180;