-- *************************************************************************** -- Dual Core Xeon 5100 Processor Core Boundary Scan Descriptor Language -- (BSDL) Model, Version 2.1 -- -- -- -- -- *************************************************************************** -- Information in this document is provided in connection with Intel products. -- No license, express or implied, by estoppel or otherwise, to any -- intellectual property rights is granted by this document. Except as -- provided in Intel's Terms and Conditions of Sale for such products, -- Intel assumes no liability whatsoever, and Intel disclaims any express or -- implied warranty, relating to sale and/or use of Intel products including -- liability or warranties relating to fitness for a particular purpose, -- merchantability, or infringement of any patent, copyright or other -- intellectual property right. Intel products are not intended for use in -- medical, life saving, or life sustaining applications. -- -- Intel may make changes to specifications and product descriptions at any -- time, without notice. -- -- The DualCoreXeon5100 processor may contain design defects or errors -- known as errata which may cause the product to deviate from published -- specifications. Current characterized errata are available on request. -- -- Contact your local Intel sales office or your distributor to obtain the -- latest specifications and before placing your product order. -- -- Copyright (c) Intel Corporation 2006. Third-party brands and names are the -- property of their respective owners. -- *************************************************************************** -- entity DualCoreXeon5100 is generic(PHYSICAL_PIN_MAP : string := "WDC_FCLGA6"); port ( A20MB : in bit; -- Compatibility - address 20 mask AB : inout bit_vector(35 downto 3); -- Address - address bus ADSB : inout bit; -- Request - address strobe ADSTBB : inout bit_vector(1 downto 0); -- Request - address bus strobe APB : inout bit_vector(1 downto 0); -- Address - address bus parity BCLK : in bit_vector(1 downto 0); -- Pwr/Clk - system bus clock BINITB : inout bit; -- Error - bus initialization error BNRB : inout bit; -- Arbitration - block next request BPMB : inout bit_vector(5 downto 0); -- Diagnostic - performance monitoring break points BPRIB : in bit; -- Arbitration - priority agent bus arbitration BRB : inout bit_vector(1 downto 0); -- Arbitration - symmetric agent bus arbitration BSEL : out bit_vector(2 downto 0); -- Pwr/Clk - selects processor input clock frequency DB : inout bit_vector(63 downto 0); -- Data - data bus DBRB : out bit; -- Diagnostic - data bus reset for debug interposer DBSYB : inout bit; -- Data - data bus busy DEFERB : in bit; -- Snoop - defer signal DINVB : inout bit_vector(3 downto 0); -- Data - dynamic data bus inversion DPB : inout bit_vector(3 downto 0); -- Data - data bus parity DRDYB : inout bit; -- Data - data phase data ready DSTBNB : inout bit_vector(3 downto 0); -- Data - data bus differential strobe DSTBPB : inout bit_vector(3 downto 0); -- Data - data bus differential strobe FERRB : out bit; -- Compatibility - floating point error, pending break event FORCEPHB : inout bit; -- Pwr/Clk - force thermal control circuit GTLREF : linkage bit_vector(1 downto 0); -- Analog Pin - signal reference level for input pins HITB : inout bit; -- Snoop - snoop hit HITMB : inout bit; -- Snoop - snoop hit modified IERRB : out bit; -- Error - internal processor error IGNNEB : in bit; -- Compatibility - ignore numuric errors INITB : in bit; -- Exec Control - processor initialization LINT0 : in bit; -- APIC - local APIC interrupt, INTR LINT1 : in bit; -- APIC - local APIC interrupt, NMI LL_ID : inout bit_vector(1 downto 0); -- Pwr/Clk - loadline slope select LOCKB : inout bit; -- Arbitration - locked transactions MCERRB : inout bit; -- Error - machine check error MS_ID : inout bit_vector(1 downto 0); -- Pwr/Clk - market segment PECI : inout bit; -- Pwr/Clk - thermal monitor PROCHOTB : out bit; -- Pwr/Clk - thermal sensor PWRGOOD : in bit; -- Pwr/Clk - system power good REQB : inout bit_vector(4 downto 0); -- Request - request command RESETB : in bit; -- Control - system reset RSB : in bit_vector(2 downto 0); -- Response - response status RSPB : in bit; -- Response - response status parity RSVD : inout bit_vector(44 downto 0); -- Reserved - reserved SKTOCCB : out bit; -- Socket occupied SMIB : in bit; -- Compatibility - system management interrupt STPCLKB : in bit; -- Pwr/Clk - processor stop clock control TCK : in bit; -- Diagnostic - tap clock TDI : in bit; -- Diagnostic - tap data in TDO : out bit; -- Diagnostic - tap data out TESTHI : in bit_vector(11 downto 0); -- Reserved - reserved THERMTRIPB : out bit; -- Pwr/Clk - thermal sensor THRMDA : linkage bit; -- Pwr/Clk - thermal diode anode THRMDC : linkage bit; -- Pwr/Clk - thermal diode cathode TMS : in bit; -- Diagnostic - tap mode select TRDYB : in bit; -- Response - target ready TRSTB : in bit; -- Diagnostic - tap reset VID : out bit_vector(6 downto 1); -- Pwr/Clk - power supply voltage selection VID_SELECT : inout bit -- Power - proper VID table select ); use STD_1149_1_1994.all; use DualCoreXeon5100_cells.all; attribute COMPONENT_CONFORMANCE of DualCoreXeon5100 : entity is "STD_1149_1_1993" ; attribute PIN_MAP of DualCoreXeon5100 : entity is PHYSICAL_PIN_MAP; constant WDC_FCLGA6 : PIN_MAP_STRING := -- Define PinOut "A20MB : K3," & "AB : ( AJ6, AJ5, AH5, AH4, AG5, AG4, AG6, AF4," & -- 35 to 28 " AF5, AB4, AC5, AB5, AA5, AD6, AA4, Y4," & -- 27 to 20 " Y6, W6, AB6, W5, V4, V5, U4, U5," & -- 19 to 12 " T4, U6, T5, R4, M4, L4, L5, P6," & -- 11 to 4 " M5)," & -- 3 to 3 "ADSB : D2," & "ADSTBB : ( AD5, R6)," & -- 1 to 0 "APB : ( U3, U2)," & -- 1 to 0 "BCLK : ( G28, F28)," & -- 1 to 0 "BINITB : AD3," & "BNRB : C2," & "BPMB : ( AG3, AF2, AG2, AD2, AJ1, AJ2)," & -- 5 to 0 "BPRIB : G8," & "BRB : ( H5, F3)," & -- 1 to 0 "BSEL : ( G30, H30, G29)," & -- 2 to 0 "DB : ( B22, A22, A19, B19, B21, C21, B18, A17," & -- 63 to 56 " B16, C18, B15, C14, C15, A14, D17, D20," & -- 55 to 48 " G22, D22, E22, G21, F21, E21, F20, E19," & -- 47 to 40 " E18, F18, F17, G17, G18, E16, E15, G16," & -- 39 to 32 " G15, F15, G14, F14, G13, E13, D13, F12," & -- 31 to 24 " F11, D10, E10, D7, E9, F9, F8, G9," & -- 23 to 16 " D11, C12, B12, D8, C11, B10, A11, A10," & -- 15 to 8 " A7, B7, B6, A5, C6, A4, C5, B4)," & -- 7 to 0 "DBRB : AC2," & "DBSYB : B2," & "DEFERB : G7," & "DINVB : ( C20, D19, G11, A8)," & -- 3 to 0 "DPB : ( J17, H16, H15, J16)," & -- 3 to 0 "DRDYB : C1," & "DSTBNB : ( A16, G20, G12, C8)," & -- 3 to 0 "DSTBPB : ( C17, G19, E12, B9)," & -- 3 to 0 "FERRB : R3," & "FORCEPHB : AK6," & "GTLREF : ( H2, H1)," & -- 1 to 0 "HITB : D4," & "HITMB : E4," & "IERRB : AB2," & "IGNNEB : N2," & "INITB : P3," & "LINT0 : K1," & "LINT1 : L1," & "LL_ID : ( AA2, V2)," & -- 1 to 0 "LOCKB : C3," & "MCERRB : AB3," & "MS_ID : ( V1, W1)," & -- 1 to 0 "PECI : G5," & "PROCHOTB : AL2," & "PWRGOOD : N1," & "REQB : ( J6, K6, M6, J5, K4)," & -- 4 to 0 "RESETB : G23," & "RSB : ( A3, F5, B3)," & -- 2 to 0 "RSPB : H4," & "RSVD : ( A13, A20, A23, AC4, AE3, AE4, AE6, AJ3," & -- 44 to 37 " AK3, AM2, AN5, AN6, B13, B23, C9, C23," & -- 36 to 29 " D1, D14, D16, E1, E23, E24, E5, E6," & -- 28 to 21 " E7, F2, F23, F29, F6, G10, G2, AM6," & -- 20 to 13 " G6, J2, J3, N4, N5, P5, R1, T1," & -- 12 to 5 " T2, W2, Y1, Y3, AH2)," & -- 4 to 0 "SKTOCCB : AE8," & "SMIB : P2," & "STPCLKB : M3," & "TCK : AE1," & "TDI : AD1," & "TDO : AF1," & "TESTHI : ( L2, P1, G4, G3, F24, G24, G26, G27," & -- 11 to 4 " G25, F25, W3, F26)," & -- 3 to 0 "THERMTRIPB : M2," & "THRMDA : AL1," & "THRMDC : AK1," & "TMS : AC1," & "TRDYB : E3," & "TRSTB : AG1," & "VID : ( AM5, AL4, AK4, AL6, AM3, AL5)," & -- 6 to 1 "VID_SELECT : AN7 "; -- -- Scan Port Identification -- attribute Tap_Scan_In of TDI : signal is true; attribute Tap_Scan_Mode of TMS : signal is true; attribute Tap_Scan_Out of TDO : signal is true; attribute Tap_Scan_Reset of TRSTB : signal is true; attribute Tap_Scan_Clock of TCK : signal is (16.0e6, both); attribute Instruction_Length of DualCoreXeon5100: entity is 7; attribute Instruction_Opcode of DualCoreXeon5100: entity is " EXTEST ( 0000000 ), " & " SAMPLE ( 0000001 ), " & " IDCODE ( 0000010 ), " & " CLAMP ( 0000100 ), " & " RUNBIST ( 0000111 ), " & " HIGHZ ( 0001000 ), " & " BYPASS ( 1111111 ), " & " Reserved ( 0000011, 0000101, 0000110, 0001001, 0001010, " & " 0001011, 0001100, 0001101, 0001110, 0001111, " & " 0010000, 0010001, 0010010, 0010011, 0010100, " & " 0010101, 0010110, 0010111, 0011000, 0011001, " & " 0011010, 0011011, 0011100, 0011101, 0011110, " & " 0011111, 0100000, 0100001, 0100010, 0100011, " & " 0100100, 0100101, 0100110, 0100111, 0101000, " & " 0101001, 0101010, 0101011, 0101100, 0101101, " & " 0101110, 0101111, 0110000, 0110001, 0110010, " & " 0110011, 0110100, 0110101, 0110110, 0110111, " & " 0111000, 0111001, 0111010, 0111011, 0111100, " & " 0111101, 0111110, 0111111, 1000000, 1000001, " & " 1000010, 1000011, 1000100, 1000101, 1000110, " & " 1000111, 1001000, 1001001, 1001010, 1001011, " & " 1001100, 1001101, 1001110, 1001111, 1010000, " & " 1010001, 1010010, 1010011, 1010100, 1010101, " & " 1010110, 1010111, 1011000, 1011001, 1011010, " & " 1011011, 1011100, 1011101, 1011110, 1011111, " & " 1100000, 1100001, 1100010, 1100011, 1100100, " & " 1100101, 1100110, 1100111, 1101000, 1101001, " & " 1101010, 1101011, 1101100, 1101101, 1101110, " & " 1101111, 1110000, 1110001, 1110010, 1110011, " & " 1110100, 1110101, 1110110, 1110111, 1111000, " & " 1111001, 1111010, 1111011, 1111100, 1111101, " & " 1111110 )" ; attribute Instruction_Capture of DualCoreXeon5100: entity is "0000001"; attribute Instruction_Private of DualCoreXeon5100: entity is "Reserved"; -- -- DualCoreXeon5100 B-2 IDCODE Register -- attribute Idcode_Register of DualCoreXeon5100: entity is "0100" & --version, B-2 step "0000000001011100" & --part number "00000001001" & --manufacturers identity "1"; --required by the standard -- -- DualCoreXeon5100 Data Register Access -- attribute Register_Access of DualCoreXeon5100: entity is "BOUNDARY (EXTEST, SAMPLE), " & "DEVICE_ID (IDCODE), " & "BYPASS (HIGHZ, BYPASS)"; -- -- DualCoreXeon5100 Boundary Scan cells -- -- -- BC_N : Control or bidir -- -- DualCoreXeon5100 Boundary Register Description -- Cell 0 is closest to TDO -- attribute BOUNDARY_LENGTH of DualCoreXeon5100: entity is 173; attribute BOUNDARY_REGISTER of DualCoreXeon5100: entity is -- num cell port function safe [ccell disval rslt] "0 (BC_N, *, control, 0 ),"& "1 (BC_N, BPMB(0), bidir, X, 0, 0, Z),"& "2 (BC_N, BPMB(2), bidir, X, 0, 0, Z),"& "3 (BC_N, BPMB(1), bidir, X, 0, 0, Z),"& "4 (BC_N, BPMB(4), bidir, X, 0, 0, Z),"& "5 (BC_N, BPMB(5), bidir, X, 0, 0, Z),"& "6 (BC_N, BPMB(3), bidir, X, 0, 0, Z),"& "7 (BC_N, BINITB, bidir, X, 0, 0, Z),"& "8 (BC_N, RSPB, input, 1 ),"& "9 (BC_N, APB(0), bidir, X, 0, 0, Z),"& "10 (BC_N, APB(1), bidir, X, 0, 0, Z),"& "11 (BC_N, AB(35), bidir, X, 0, 0, Z),"& "12 (BC_N, AB(34), bidir, X, 0, 0, Z),"& "13 (BC_N, AB(33), bidir, X, 0, 0, Z),"& "14 (BC_N, AB(32), bidir, X, 0, 0, Z),"& "15 (BC_N, AB(30), bidir, X, 0, 0, Z),"& "16 (BC_N, AB(28), bidir, X, 0, 0, Z),"& "17 (BC_N, AB(31), bidir, X, 0, 0, Z),"& "18 (BC_N, AB(29), bidir, X, 0, 0, Z),"& "19 (BC_N, RSVD(39), bidir, X, 0, 0, Z),"& "20 (BC_N, AB(27), bidir, X, 0, 0, Z),"& "21 (BC_N, AB(26), bidir, X, 0, 0, Z),"& "22 (BC_N, RSVD(41), bidir, X, 0, 0, Z),"& "23 (BC_N, ADSTBB(1), bidir, X, 0, 0, Z),"& "24 (BC_N, AB(21), bidir, X, 0, 0, Z),"& "25 (BC_N, AB(24), bidir, X, 0, 0, Z),"& "26 (BC_N, AB(20), bidir, X, 0, 0, Z),"& "27 (BC_N, AB(25), bidir, X, 0, 0, Z),"& "28 (BC_N, AB(18), bidir, X, 0, 0, Z),"& "29 (BC_N, AB(23), bidir, X, 0, 0, Z),"& "30 (BC_N, AB(19), bidir, X, 0, 0, Z),"& "31 (BC_N, AB(22), bidir, X, 0, 0, Z),"& "32 (BC_N, AB(17), bidir, X, 0, 0, Z),"& "33 (BC_N, AB(15), bidir, X, 0, 0, Z),"& "34 (BC_N, AB(16), bidir, X, 0, 0, Z),"& "35 (BC_N, AB(13), bidir, X, 0, 0, Z),"& "36 (BC_N, AB(11), bidir, X, 0, 0, Z),"& "37 (BC_N, AB(14), bidir, X, 0, 0, Z),"& "38 (BC_N, AB(12), bidir, X, 0, 0, Z),"& "39 (BC_N, AB(9), bidir, X, 0, 0, Z),"& "40 (BC_N, AB(8), bidir, X, 0, 0, Z),"& "41 (BC_N, AB(10), bidir, X, 0, 0, Z),"& "42 (BC_N, RSVD(9), bidir, X, 0, 0, Z),"& "43 (BC_N, RSVD(7), bidir, X, 0, 0, Z),"& "44 (BC_N, AB(7), bidir, X, 0, 0, Z),"& "45 (BC_N, ADSTBB(0), bidir, X, 0, 0, Z),"& "46 (BC_N, AB(4), bidir, X, 0, 0, Z),"& "47 (BC_N, REQB(0), bidir, X, 0, 0, Z),"& "48 (BC_N, AB(6), bidir, X, 0, 0, Z),"& "49 (BC_N, AB(5), bidir, X, 0, 0, Z),"& "50 (BC_N, REQB(2), bidir, X, 0, 0, Z),"& "51 (BC_N, AB(3), bidir, X, 0, 0, Z),"& "52 (BC_N, REQB(1), bidir, X, 0, 0, Z),"& "53 (BC_N, REQB(3), bidir, X, 0, 0, Z),"& "54 (BC_N, REQB(4), bidir, X, 0, 0, Z),"& "55 (BC_N, MCERRB, bidir, X, 0, 0, Z),"& "56 (BC_N, BRB(1), bidir, X, 0, 0, Z),"& "57 (BC_N, TRDYB, input, 1 ),"& "58 (BC_N, BRB(0), bidir, X, 0, 0, Z),"& "59 (BC_N, ADSB, bidir, X, 0, 0, Z),"& "60 (BC_N, DBSYB, bidir, X, 0, 0, Z),"& "61 (BC_N, BNRB, bidir, X, 0, 0, Z),"& "62 (BC_N, HITMB, bidir, X, 0, 0, Z),"& "63 (BC_N, RSB(1), input, 1 ),"& "64 (BC_N, RSB(0), input, 1 ),"& "65 (BC_N, HITB, bidir, X, 0, 0, Z),"& "66 (BC_N, LOCKB, bidir, X, 0, 0, Z),"& "67 (BC_N, DEFERB, input, 1 ),"& "68 (BC_N, BPRIB, input, 1 ),"& "69 (BC_N, RSB(2), input, 1 ),"& "70 (BC_N, RESETB, input, 1 ),"& "71 (BC_N, PECI, bidir, X, 0, 0, Z),"& "72 (BC_N, *, internal, 1 ),"& "73 (BC_N, IGNNEB, input, 1 ),"& "74 (BC_N, STPCLKB, input, 1 ),"& "75 (BC_N, INITB, input, 1 ),"& "76 (BC_N, SMIB, input, 1 ),"& "77 (BC_N, FERRB, output3, X, 0, 0, Z),"& "78 (BC_N, LINT0, input, 1 ),"& "79 (BC_N, TESTHI(11), input, 1 ),"& "80 (BC_N, LINT1, input, 1 ),"& "81 (BC_N, TESTHI(10), input, 1 ),"& "82 (BC_N, A20MB, input, 1 ),"& "83 (BC_N, THERMTRIPB, output3, X, 0, 0, Z),"& "84 (BC_N, BCLK(0), input, 1 ),"& "85 (BC_N, DB(62), bidir, X, 87, 0, Z),"& "86 (BC_N, DB(63), bidir, X, 87, 0, Z),"& "87 (BC_N, *, control, 0 ),"& "88 (BC_N, DB(59), bidir, X, 87, 0, Z),"& "89 (BC_N, DB(60), bidir, X, 87, 0, Z),"& "90 (BC_N, DB(61), bidir, X, 87, 0, Z),"& "91 (BC_N, DB(56), bidir, X, 87, 0, Z),"& "92 (BC_N, DINVB(3), bidir, X, 87, 0, Z),"& "93 (BC_N, DB(58), bidir, X, 87, 0, Z),"& "94 (BC_N, DB(57), bidir, X, 87, 0, Z),"& "95 (BC_N, DSTBNB(3), bidir, X, 87, 0, Z),"& "96 (BC_N, DSTBPB(3), bidir, X, 87, 0, Z),"& "97 (BC_N, DB(54), bidir, X, 87, 0, Z),"& "98 (BC_N, DB(50), bidir, X, 87, 0, Z),"& "99 (BC_N, DB(55), bidir, X, 87, 0, Z),"& "100 (BC_N, DB(53), bidir, X, 87, 0, Z),"& "101 (BC_N, DB(49), bidir, X, 87, 0, Z),"& "102 (BC_N, DB(48), bidir, X, 87, 0, Z),"& "103 (BC_N, DB(51), bidir, X, 87, 0, Z),"& "104 (BC_N, DB(52), bidir, X, 87, 0, Z),"& "105 (BC_N, DB(45), bidir, X, 87, 0, Z),"& "106 (BC_N, DB(47), bidir, X, 87, 0, Z),"& "107 (BC_N, DB(44), bidir, X, 87, 0, Z),"& "108 (BC_N, DB(43), bidir, X, 87, 0, Z),"& "109 (BC_N, DB(46), bidir, X, 87, 0, Z),"& "110 (BC_N, DB(42), bidir, X, 87, 0, Z),"& "111 (BC_N, DINVB(2), bidir, X, 87, 0, Z),"& "112 (BC_N, DB(41), bidir, X, 87, 0, Z),"& "113 (BC_N, DB(40), bidir, X, 87, 0, Z),"& "114 (BC_N, DSTBNB(2), bidir, X, 87, 0, Z),"& "115 (BC_N, DSTBPB(2), bidir, X, 87, 0, Z),"& "116 (BC_N, DB(35), bidir, X, 87, 0, Z),"& "117 (BC_N, DB(39), bidir, X, 87, 0, Z),"& "118 (BC_N, DB(38), bidir, X, 87, 0, Z),"& "119 (BC_N, DB(36), bidir, X, 87, 0, Z),"& "120 (BC_N, DB(34), bidir, X, 87, 0, Z),"& "121 (BC_N, DB(37), bidir, X, 87, 0, Z),"& "122 (BC_N, DB(32), bidir, X, 87, 0, Z),"& "123 (BC_N, DB(33), bidir, X, 87, 0, Z),"& "124 (BC_N, DPB(3), bidir, X, 87, 0, Z),"& "125 (BC_N, DPB(0), bidir, X, 87, 0, Z),"& "126 (BC_N, DPB(2), bidir, X, 87, 0, Z),"& "127 (BC_N, DPB(1), bidir, X, 87, 0, Z),"& "128 (BC_N, DB(31), bidir, X, 87, 0, Z),"& "129 (BC_N, DB(30), bidir, X, 87, 0, Z),"& "130 (BC_N, DB(28), bidir, X, 87, 0, Z),"& "131 (BC_N, DB(25), bidir, X, 87, 0, Z),"& "132 (BC_N, DB(26), bidir, X, 87, 0, Z),"& "133 (BC_N, DB(29), bidir, X, 87, 0, Z),"& "134 (BC_N, DB(22), bidir, X, 87, 0, Z),"& "135 (BC_N, DB(24), bidir, X, 87, 0, Z),"& "136 (BC_N, DB(27), bidir, X, 87, 0, Z),"& "137 (BC_N, DSTBNB(1), bidir, X, 87, 0, Z),"& "138 (BC_N, DSTBPB(1), bidir, X, 87, 0, Z),"& "139 (BC_N, DB(23), bidir, X, 87, 0, Z),"& "140 (BC_N, DB(21), bidir, X, 87, 0, Z),"& "141 (BC_N, DINVB(1), bidir, X, 87, 0, Z),"& "142 (BC_N, DB(19), bidir, X, 87, 0, Z),"& "143 (BC_N, DB(18), bidir, X, 87, 0, Z),"& "144 (BC_N, DB(20), bidir, X, 87, 0, Z),"& "145 (BC_N, DB(17), bidir, X, 87, 0, Z),"& "146 (BC_N, DB(16), bidir, X, 87, 0, Z),"& "147 (BC_N, DB(15), bidir, X, 87, 0, Z),"& "148 (BC_N, DB(12), bidir, X, 87, 0, Z),"& "149 (BC_N, DB(14), bidir, X, 87, 0, Z),"& "150 (BC_N, DB(13), bidir, X, 87, 0, Z),"& "151 (BC_N, DB(11), bidir, X, 87, 0, Z),"& "152 (BC_N, DB(9), bidir, X, 87, 0, Z),"& "153 (BC_N, DB(8), bidir, X, 87, 0, Z),"& "154 (BC_N, DB(10), bidir, X, 87, 0, Z),"& "155 (BC_N, DINVB(0), bidir, X, 87, 0, Z),"& "156 (BC_N, DSTBNB(0), bidir, X, 87, 0, Z),"& "157 (BC_N, DSTBPB(0), bidir, X, 87, 0, Z),"& "158 (BC_N, DB(6), bidir, X, 87, 0, Z),"& "159 (BC_N, DB(5), bidir, X, 87, 0, Z),"& "160 (BC_N, DB(7), bidir, X, 87, 0, Z),"& "161 (BC_N, DB(3), bidir, X, 87, 0, Z),"& "162 (BC_N, DB(2), bidir, X, 87, 0, Z),"& "163 (BC_N, DB(4), bidir, X, 87, 0, Z),"& "164 (BC_N, DB(1), bidir, X, 87, 0, Z),"& "165 (BC_N, *, internal, X ),"& "166 (BC_N, DB(0), bidir, X, 87, 0, Z),"& "167 (BC_N, DRDYB, bidir, X, 87, 0, Z),"& "168 (BC_N, RSVD(22), bidir, X, 87, 0, Z),"& "169 (BC_N, RSVD(10), bidir, X, 87, 0, Z),"& "170 (BC_N, PROCHOTB, output3, X, 87, 0, Z),"& "171 (BC_N, IERRB, output3, X, 87, 0, Z),"& "172 (BC_N, *, internal, X )"; end DualCoreXeon5100;