-- 200DX240.BSD -- Actel Corporation -- Version 1.2 -- Date modified: 07/22/03 -- - Add INSTRUCTION_PRIVATE attribute. -- - Add REGISTER_ACCESS attribute. -- -- Device: A32200DX -- Package: RQFP 240-pin entity A32200DX240 is generic (PHYSICAL_PIN_MAP : string := "RQFP240PIN"); port( TCK, TMS, TDI : in bit; --Scan Port Inputs TDO : out bit; --Scan Port Output VCC : linkage bit_vector(1 to 21); GND : linkage bit_vector(1 to 12); VSV : linkage bit_vector(1 to 2); VPP : linkage bit; VKS : linkage bit; MODE : linkage bit; IO : inout bit_vector(1 to 198)); use STD_1149_1_1990.all; attribute PIN_MAP of A32200DX240 : entity is PHYSICAL_PIN_MAP; constant RQFP240PIN : PIN_MAP_STRING := "TCK : 92, TMS: 179, TDI: 178, TDO : 123,"& "VCC : (239, 227, 219, 210, 206, 192, 181, 172, 151, 150,"& "128, 118, 108, 89, 85, 71, 59, 52, 30, 29,"& " 8),"& "GND : (240, 237, 182, 180, 152, 121, 120, 119, 94, 61,"& " 60, 28),"& "VSV : (209, 88),"& "VPP : 90,"& "VKS : 91,"& "MODE : 238,"& "IO : ( 64, 65, 66, 67, 68, 69, 70, 72, 73, 74,"& " 75, 76, 77, 78, 79, 80, 81, 82, 83, 84,"& " 86, 87, 93, 95, 96, 97, 98, 99, 100, 101,"& "102, 103, 104, 105, 106, 107, 109, 110, 111, 112,"& "113, 114, 115, 116, 117, 122, 124, 125, 126, 127,"& "129, 130, 131, 132, 133, 134, 135, 136, 137, 138,"& "139, 140, 141, 142, 143, 144, 145, 146, 147, 148,"& "149, 153, 154, 155, 156, 157, 158, 159, 160, 161,"& "162, 163, 164, 165, 166, 167, 168, 169, 170, 171,"& "173, 174, 175, 176, 177, 183, 184, 185, 186,"& "187, 188, 189, 190, 191, 193, 194, 195, 196, 197,"& "198, 199, 200, 201, 202, 203, 204, 205, 207, 208,"& "211, 212, 213, 214, 215, 216, 217, 218, 220, 221,"& "222, 223, 224, 225, 226, 228, 229, 230, 231, 232,"& "233, 234, 235, 236, 1, 2, 3, 4, 5, 6,"& " 7, 9, 10, 11, 12, 13, 14, 15, 16, 17,"& " 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,"& " 31, 32, 33, 34, 35, 36, 37, 38, 39, 40,"& " 41, 42, 43, 44, 45, 46, 47, 48, 49, 50,"& " 51, 53, 54, 55, 56, 57, 58, 62, 63)"; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (10.00E6, BOTH); attribute INSTRUCTION_LENGTH of A32200DX240 : entity is 3; attribute INSTRUCTION_OPCODE of A32200DX240 : entity is "EXTEST (000 , 010),"& "SAMPLE (001),"& "BYPASS (111),"& "HIGHZ (101),"& "CLAMP (110),"& "JPROBE (011),"& "USER (100)"; attribute INSTRUCTION_CAPTURE OF A32200DX240 : entity is "001"; attribute INSTRUCTION_PRIVATE of A32200DX240 : entity is "JPROBE, USER"; attribute REGISTER_ACCESS of A32200DX240 : entity is "BYPASS (HIGHZ, CLAMP)"; attribute BOUNDARY_CELLS of A32200DX240 : entity is "BC_1"; attribute BOUNDARY_LENGTH of A32200DX240 : entity is 594; attribute BOUNDARY_REGISTER of A32200DX240 : entity is --num cell port function safe [ccell disval rslt] " 0 (BC_1, *, control, 0), "& " 1 (BC_1, IO(1), output3, X, 0, 0, Z), "& " 2 (BC_1, IO(1), input, X), "& " 3 (BC_1, IO(2), input, X), "& " 4 (BC_1, IO(2), output3, X, 5, 0, Z), "& " 5 (BC_1, *, control, 0), "& " 6 (BC_1, *, control, 0), "& " 7 (BC_1, IO(3), output3, X, 6, 0, Z), "& " 8 (BC_1, IO(3), input, X), "& " 9 (BC_1, IO(4), input, X), "& " 10 (BC_1, IO(4), output3, X, 11, 0, Z), "& " 11 (BC_1, *, control, 0), "& " 12 (BC_1, *, control, 0), "& " 13 (BC_1, IO(5), output3, X, 12, 0, Z), "& " 14 (BC_1, IO(5), input, X), "& " 15 (BC_1, IO(6), input, X), "& " 16 (BC_1, IO(6), output3, X, 17, 0, Z), "& " 17 (BC_1, *, control, 0), "& " 18 (BC_1, *, control, 0), "& " 19 (BC_1, IO(7), output3, X, 18, 0, Z), "& " 20 (BC_1, IO(7), input, X), "& " 21 (BC_1, IO(8), input, X), "& " 22 (BC_1, IO(8), output3, X, 23, 0, Z), "& " 23 (BC_1, *, control, 0), "& " 24 (BC_1, *, control, 0), "& " 25 (BC_1, IO(9), output3, X, 24, 0, Z), "& " 26 (BC_1, IO(9), input, X), "& " 27 (BC_1, IO(10), input, X), "& " 28 (BC_1, IO(10), output3, X, 29, 0, Z), "& " 29 (BC_1, *, control, 0), "& " 30 (BC_1, *, control, 0), "& " 31 (BC_1, IO(11), output3, X, 30, 0, Z), "& " 32 (BC_1, IO(11), input, X), "& " 33 (BC_1, IO(12), input, X), "& " 34 (BC_1, IO(12), output3, X, 35, 0, Z), "& " 35 (BC_1, *, control, 0), "& " 36 (BC_1, *, control, 0), "& " 37 (BC_1, IO(13), output3, X, 36, 0, Z), "& " 38 (BC_1, IO(13), input, X), "& " 39 (BC_1, IO(14), input, X), "& " 40 (BC_1, IO(14), output3, X, 41, 0, Z), "& " 41 (BC_1, *, control, 0), "& " 42 (BC_1, *, control, 0), "& " 43 (BC_1, IO(15), output3, X, 42, 0, Z), "& " 44 (BC_1, IO(15), input, X), "& " 45 (BC_1, IO(16), input, X), "& " 46 (BC_1, IO(16), output3, X, 47, 0, Z), "& " 47 (BC_1, *, control, 0), "& " 48 (BC_1, *, control, 0), "& " 49 (BC_1, IO(17), output3, X, 48, 0, Z), "& " 50 (BC_1, IO(17), input, X), "& " 51 (BC_1, IO(18), input, X), "& " 52 (BC_1, IO(18), output3, X, 53, 0, Z), "& " 53 (BC_1, *, control, 0), "& " 54 (BC_1, *, control, 0), "& " 55 (BC_1, IO(19), output3, X, 54, 0, Z), "& " 56 (BC_1, IO(19), input, X), "& " 57 (BC_1, IO(20), input, X), "& " 58 (BC_1, IO(20), output3, X, 59, 0, Z), "& " 59 (BC_1, *, control, 0), "& " 60 (BC_1, *, control, 0), "& " 61 (BC_1, IO(21), output3, X, 60, 0, Z), "& " 62 (BC_1, IO(21), input, X), "& " 63 (BC_1, IO(22), input, X), "& " 64 (BC_1, IO(22), output3, X, 65, 0, Z), "& " 65 (BC_1, *, control, 0), "& " 66 (BC_1, IO(23), input, X), "& " 67 (BC_1, IO(23), output3, X, 68, 0, Z), "& " 68 (BC_1, *, control, 0), "& " 69 (BC_1, *, control, 0), "& " 70 (BC_1, IO(24), output3, X, 69, 0, Z), "& " 71 (BC_1, IO(24), input, X), "& " 72 (BC_1, IO(25), input, X), "& " 73 (BC_1, IO(25), output3, X, 74, 0, Z), "& " 74 (BC_1, *, control, 0), "& " 75 (BC_1, *, control, 0), "& " 76 (BC_1, IO(26), output3, X, 75, 0, Z), "& " 77 (BC_1, IO(26), input, X), "& " 78 (BC_1, IO(27), input, X), "& " 79 (BC_1, IO(27), output3, X, 80, 0, Z), "& " 80 (BC_1, *, control, 0), "& " 81 (BC_1, *, control, 0), "& " 82 (BC_1, IO(28), output3, X, 81, 0, Z), "& " 83 (BC_1, IO(28), input, X), "& " 84 (BC_1, IO(29), input, X), "& " 85 (BC_1, IO(29), output3, X, 86, 0, Z), "& " 86 (BC_1, *, control, 0), "& " 87 (BC_1, *, control, 0), "& " 88 (BC_1, IO(30), output3, X, 87, 0, Z), "& " 89 (BC_1, IO(30), input, X), "& " 90 (BC_1, IO(31), input, X), "& " 91 (BC_1, IO(31), output3, X, 92, 0, Z), "& " 92 (BC_1, *, control, 0), "& " 93 (BC_1, *, control, 0), "& " 94 (BC_1, IO(32), output3, X, 93, 0, Z), "& " 95 (BC_1, IO(32), input, X), "& " 96 (BC_1, IO(33), input, X), "& " 97 (BC_1, IO(33), output3, X, 98, 0, Z), "& " 98 (BC_1, *, control, 0), "& " 99 (BC_1, *, control, 0), "& " 100 (BC_1, IO(34), output3, X, 99, 0, Z), "& " 101 (BC_1, IO(34), input, X), "& " 102 (BC_1, IO(35), input, X), "& " 103 (BC_1, IO(35), output3, X, 104, 0, Z), "& " 104 (BC_1, *, control, 0), "& " 105 (BC_1, *, control, 0), "& " 106 (BC_1, IO(36), output3, X, 105, 0, Z), "& " 107 (BC_1, IO(36), input, X), "& " 108 (BC_1, IO(37), input, X), "& " 109 (BC_1, IO(37), output3, X, 110, 0, Z), "& " 110 (BC_1, *, control, 0), "& " 111 (BC_1, *, control, 0), "& " 112 (BC_1, IO(38), output3, X, 111, 0, Z), "& " 113 (BC_1, IO(38), input, X), "& " 114 (BC_1, IO(39), input, X), "& " 115 (BC_1, IO(39), output3, X, 116, 0, Z), "& " 116 (BC_1, *, control, 0), "& " 117 (BC_1, *, control, 0), "& " 118 (BC_1, IO(40), output3, X, 117, 0, Z), "& " 119 (BC_1, IO(40), input, X), "& " 120 (BC_1, IO(41), input, X), "& " 121 (BC_1, IO(41), output3, X, 122, 0, Z), "& " 122 (BC_1, *, control, 0), "& " 123 (BC_1, *, control, 0), "& " 124 (BC_1, IO(42), output3, X, 123, 0, Z), "& " 125 (BC_1, IO(42), input, X), "& " 126 (BC_1, IO(43), input, X), "& " 127 (BC_1, IO(43), output3, X, 128, 0, Z), "& " 128 (BC_1, *, control, 0), "& " 129 (BC_1, *, control, 0), "& " 130 (BC_1, IO(44), output3, X, 129, 0, Z), "& " 131 (BC_1, IO(44), input, X), "& " 132 (BC_1, IO(45), input, X), "& " 133 (BC_1, IO(45), output3, X, 134, 0, Z), "& " 134 (BC_1, *, control, 0), "& " 135 (BC_1, *, control, 0), "& " 136 (BC_1, IO(46), output3, X, 135, 0, Z), "& " 137 (BC_1, IO(46), input, X), "& " 138 (BC_1, *, control, 0), "& " 139 (BC_1, IO(47), output3, X, 138, 0, Z), "& " 140 (BC_1, IO(47), input, X), "& " 141 (BC_1, IO(48), input, X), "& " 142 (BC_1, IO(48), output3, X, 143, 0, Z), "& " 143 (BC_1, *, control, 0), "& " 144 (BC_1, *, control, 0), "& " 145 (BC_1, IO(49), output3, X, 144, 0, Z), "& " 146 (BC_1, IO(49), input, X), "& " 147 (BC_1, IO(50), input, X), "& " 148 (BC_1, IO(50), output3, X, 149, 0, Z), "& " 149 (BC_1, *, control, 0), "& " 150 (BC_1, *, control, 0), "& " 151 (BC_1, IO(51), output3, X, 150, 0, Z), "& " 152 (BC_1, IO(51), input, X), "& " 153 (BC_1, IO(52), input, X), "& " 154 (BC_1, IO(52), output3, X, 155, 0, Z), "& " 155 (BC_1, *, control, 0), "& " 156 (BC_1, *, control, 0), "& " 157 (BC_1, IO(53), output3, X, 156, 0, Z), "& " 158 (BC_1, IO(53), input, X), "& " 159 (BC_1, IO(54), input, X), "& " 160 (BC_1, IO(54), output3, X, 161, 0, Z), "& " 161 (BC_1, *, control, 0), "& " 162 (BC_1, *, control, 0), "& " 163 (BC_1, IO(55), output3, X, 162, 0, Z), "& " 164 (BC_1, IO(55), input, X), "& " 165 (BC_1, IO(56), input, X), "& " 166 (BC_1, IO(56), output3, X, 167, 0, Z), "& " 167 (BC_1, *, control, 0), "& " 168 (BC_1, *, control, 0), "& " 169 (BC_1, IO(57), output3, X, 168, 0, Z), "& " 170 (BC_1, IO(57), input, X), "& " 171 (BC_1, IO(58), input, X), "& " 172 (BC_1, IO(58), output3, X, 173, 0, Z), "& " 173 (BC_1, *, control, 0), "& " 174 (BC_1, *, control, 0), "& " 175 (BC_1, IO(59), output3, X, 174, 0, Z), "& " 176 (BC_1, IO(59), input, X), "& " 177 (BC_1, IO(60), input, X), "& " 178 (BC_1, IO(60), output3, X, 179, 0, Z), "& " 179 (BC_1, *, control, 0), "& " 180 (BC_1, *, control, 0), "& " 181 (BC_1, IO(61), output3, X, 180, 0, Z), "& " 182 (BC_1, IO(61), input, X), "& " 183 (BC_1, IO(62), input, X), "& " 184 (BC_1, IO(62), output3, X, 185, 0, Z), "& " 185 (BC_1, *, control, 0), "& " 186 (BC_1, *, control, 0), "& " 187 (BC_1, IO(63), output3, X, 186, 0, Z), "& " 188 (BC_1, IO(63), input, X), "& " 189 (BC_1, IO(64), input, X), "& " 190 (BC_1, IO(64), output3, X, 191, 0, Z), "& " 191 (BC_1, *, control, 0), "& " 192 (BC_1, *, control, 0), "& " 193 (BC_1, IO(65), output3, X, 192, 0, Z), "& " 194 (BC_1, IO(65), input, X), "& " 195 (BC_1, IO(66), input, X), "& " 196 (BC_1, IO(66), output3, X, 197, 0, Z), "& " 197 (BC_1, *, control, 0), "& " 198 (BC_1, *, control, 0), "& " 199 (BC_1, IO(67), output3, X, 198, 0, Z), "& " 200 (BC_1, IO(67), input, X), "& " 201 (BC_1, IO(68), input, X), "& " 202 (BC_1, IO(68), output3, X, 203, 0, Z), "& " 203 (BC_1, *, control, 0), "& " 204 (BC_1, *, control, 0), "& " 205 (BC_1, IO(69), output3, X, 204, 0, Z), "& " 206 (BC_1, IO(69), input, X), "& " 207 (BC_1, IO(70), input, X), "& " 208 (BC_1, IO(70), output3, X, 209, 0, Z), "& " 209 (BC_1, *, control, 0), "& " 210 (BC_1, *, control, 0), "& " 211 (BC_1, IO(71), output3, X, 210, 0, Z), "& " 212 (BC_1, IO(71), input, X), "& " 213 (BC_1, IO(72), input, X), "& " 214 (BC_1, IO(72), output3, X, 215, 0, Z), "& " 215 (BC_1, *, control, 0), "& " 216 (BC_1, *, control, 0), "& " 217 (BC_1, IO(73), output3, X, 216, 0, Z), "& " 218 (BC_1, IO(73), input, X), "& " 219 (BC_1, IO(74), input, X), "& " 220 (BC_1, IO(74), output3, X, 221, 0, Z), "& " 221 (BC_1, *, control, 0), "& " 222 (BC_1, *, control, 0), "& " 223 (BC_1, IO(75), output3, X, 222, 0, Z), "& " 224 (BC_1, IO(75), input, X), "& " 225 (BC_1, IO(76), input, X), "& " 226 (BC_1, IO(76), output3, X, 227, 0, Z), "& " 227 (BC_1, *, control, 0), "& " 228 (BC_1, *, control, 0), "& " 229 (BC_1, IO(77), output3, X, 228, 0, Z), "& " 230 (BC_1, IO(77), input, X), "& " 231 (BC_1, IO(78), input, X), "& " 232 (BC_1, IO(78), output3, X, 233, 0, Z), "& " 233 (BC_1, *, control, 0), "& " 234 (BC_1, *, control, 0), "& " 235 (BC_1, IO(79), output3, X, 234, 0, Z), "& " 236 (BC_1, IO(79), input, X), "& " 237 (BC_1, IO(80), input, X), "& " 238 (BC_1, IO(80), output3, X, 239, 0, Z), "& " 239 (BC_1, *, control, 0), "& " 240 (BC_1, *, control, 0), "& " 241 (BC_1, IO(81), output3, X, 240, 0, Z), "& " 242 (BC_1, IO(81), input, X), "& " 243 (BC_1, IO(82), input, X), "& " 244 (BC_1, IO(82), output3, X, 245, 0, Z), "& " 245 (BC_1, *, control, 0), "& " 246 (BC_1, *, control, 0), "& " 247 (BC_1, IO(83), output3, X, 246, 0, Z), "& " 248 (BC_1, IO(83), input, X), "& " 249 (BC_1, IO(84), input, X), "& " 250 (BC_1, IO(84), output3, X, 251, 0, Z), "& " 251 (BC_1, *, control, 0), "& " 252 (BC_1, *, control, 0), "& " 253 (BC_1, IO(85), output3, X, 252, 0, Z), "& " 254 (BC_1, IO(85), input, X), "& " 255 (BC_1, IO(86), input, X), "& " 256 (BC_1, IO(86), output3, X, 257, 0, Z), "& " 257 (BC_1, *, control, 0), "& " 258 (BC_1, *, control, 0), "& " 259 (BC_1, IO(87), output3, X, 258, 0, Z), "& " 260 (BC_1, IO(87), input, X), "& " 261 (BC_1, IO(88), input, X), "& " 262 (BC_1, IO(88), output3, X, 263, 0, Z), "& " 263 (BC_1, *, control, 0), "& " 264 (BC_1, *, control, 0), "& " 265 (BC_1, IO(89), output3, X, 264, 0, Z), "& " 266 (BC_1, IO(89), input, X), "& " 267 (BC_1, IO(90), input, X), "& " 268 (BC_1, IO(90), output3, X, 269, 0, Z), "& " 269 (BC_1, *, control, 0), "& " 270 (BC_1, *, control, 0), "& " 271 (BC_1, IO(91), output3, X, 270, 0, Z), "& " 272 (BC_1, IO(91), input, X), "& " 273 (BC_1, IO(92), input, X), "& " 274 (BC_1, IO(92), output3, X, 275, 0, Z), "& " 275 (BC_1, *, control, 0), "& " 276 (BC_1, *, control, 0), "& " 277 (BC_1, IO(93), output3, X, 276, 0, Z), "& " 278 (BC_1, IO(93), input, X), "& " 279 (BC_1, IO(94), input, X), "& " 280 (BC_1, IO(94), output3, X, 281, 0, Z), "& " 281 (BC_1, *, control, 0), "& " 282 (BC_1, *, control, 0), "& " 283 (BC_1, IO(95), output3, X, 282, 0, Z), "& " 284 (BC_1, IO(95), input, X), "& " 285 (BC_1, IO(96), input, X), "& " 286 (BC_1, IO(96), output3, X, 287, 0, Z), "& " 287 (BC_1, *, control, 0), "& " 288 (BC_1, *, control, 0), "& " 289 (BC_1, IO(97), output3, X, 288, 0, Z), "& " 290 (BC_1, IO(97), input, X), "& " 291 (BC_1, *, control, 0), "& " 292 (BC_1, IO(98), output3, X, 291, 0, Z), "& " 293 (BC_1, IO(98), input, X), "& " 294 (BC_1, IO(99), input, X), "& " 295 (BC_1, IO(99), output3, X, 296, 0, Z), "& " 296 (BC_1, *, control, 0), "& " 297 (BC_1, *, control, 0), "& " 298 (BC_1, IO(100), output3, X, 297, 0, Z), "& " 299 (BC_1, IO(100), input, X), "& " 300 (BC_1, IO(101), input, X), "& " 301 (BC_1, IO(101), output3, X, 302, 0, Z), "& " 302 (BC_1, *, control, 0), "& " 303 (BC_1, *, control, 0), "& " 304 (BC_1, IO(102), output3, X, 303, 0, Z), "& " 305 (BC_1, IO(102), input, X), "& " 306 (BC_1, IO(103), input, X), "& " 307 (BC_1, IO(103), output3, X, 308, 0, Z), "& " 308 (BC_1, *, control, 0), "& " 309 (BC_1, *, control, 0), "& " 310 (BC_1, IO(104), output3, X, 309, 0, Z), "& " 311 (BC_1, IO(104), input, X), "& " 312 (BC_1, IO(105), input, X), "& " 313 (BC_1, IO(105), output3, X, 314, 0, Z), "& " 314 (BC_1, *, control, 0), "& " 315 (BC_1, *, control, 0), "& " 316 (BC_1, IO(106), output3, X, 315, 0, Z), "& " 317 (BC_1, IO(106), input, X), "& " 318 (BC_1, IO(107), input, X), "& " 319 (BC_1, IO(107), output3, X, 320, 0, Z), "& " 320 (BC_1, *, control, 0), "& " 321 (BC_1, *, control, 0), "& " 322 (BC_1, IO(108), output3, X, 321, 0, Z), "& " 323 (BC_1, IO(108), input, X), "& " 324 (BC_1, IO(109), input, X), "& " 325 (BC_1, IO(109), output3, X, 326, 0, Z), "& " 326 (BC_1, *, control, 0), "& " 327 (BC_1, *, control, 0), "& " 328 (BC_1, IO(110), output3, X, 327, 0, Z), "& " 329 (BC_1, IO(110), input, X), "& " 330 (BC_1, IO(111), input, X), "& " 331 (BC_1, IO(111), output3, X, 332, 0, Z), "& " 332 (BC_1, *, control, 0), "& " 333 (BC_1, *, control, 0), "& " 334 (BC_1, IO(112), output3, X, 333, 0, Z), "& " 335 (BC_1, IO(112), input, X), "& " 336 (BC_1, IO(113), input, X), "& " 337 (BC_1, IO(113), output3, X, 338, 0, Z), "& " 338 (BC_1, *, control, 0), "& " 339 (BC_1, *, control, 0), "& " 340 (BC_1, IO(114), output3, X, 339, 0, Z), "& " 341 (BC_1, IO(114), input, X), "& " 342 (BC_1, IO(115), input, X), "& " 343 (BC_1, IO(115), output3, X, 344, 0, Z), "& " 344 (BC_1, *, control, 0), "& " 345 (BC_1, *, control, 0), "& " 346 (BC_1, IO(116), output3, X, 345, 0, Z), "& " 347 (BC_1, IO(116), input, X), "& " 348 (BC_1, IO(117), input, X), "& " 349 (BC_1, IO(117), output3, X, 350, 0, Z), "& " 350 (BC_1, *, control, 0), "& " 351 (BC_1, *, control, 0), "& " 352 (BC_1, IO(118), output3, X, 351, 0, Z), "& " 353 (BC_1, IO(118), input, X), "& " 354 (BC_1, IO(119), input, X), "& " 355 (BC_1, IO(119), output3, X, 356, 0, Z), "& " 356 (BC_1, *, control, 0), "& " 357 (BC_1, *, control, 0), "& " 358 (BC_1, IO(120), output3, X, 357, 0, Z), "& " 359 (BC_1, IO(120), input, X), "& " 360 (BC_1, IO(121), input, X), "& " 361 (BC_1, IO(121), output3, X, 362, 0, Z), "& " 362 (BC_1, *, control, 0), "& " 363 (BC_1, *, control, 0), "& " 364 (BC_1, IO(122), output3, X, 363, 0, Z), "& " 365 (BC_1, IO(122), input, X), "& " 366 (BC_1, IO(123), input, X), "& " 367 (BC_1, IO(123), output3, X, 368, 0, Z), "& " 368 (BC_1, *, control, 0), "& " 369 (BC_1, *, control, 0), "& " 370 (BC_1, IO(124), output3, X, 369, 0, Z), "& " 371 (BC_1, IO(124), input, X), "& " 372 (BC_1, IO(125), input, X), "& " 373 (BC_1, IO(125), output3, X, 374, 0, Z), "& " 374 (BC_1, *, control, 0), "& " 375 (BC_1, *, control, 0), "& " 376 (BC_1, IO(126), output3, X, 375, 0, Z), "& " 377 (BC_1, IO(126), input, X), "& " 378 (BC_1, IO(127), input, X), "& " 379 (BC_1, IO(127), output3, X, 380, 0, Z), "& " 380 (BC_1, *, control, 0), "& " 381 (BC_1, *, control, 0), "& " 382 (BC_1, IO(128), output3, X, 381, 0, Z), "& " 383 (BC_1, IO(128), input, X), "& " 384 (BC_1, IO(129), input, X), "& " 385 (BC_1, IO(129), output3, X, 386, 0, Z), "& " 386 (BC_1, *, control, 0), "& " 387 (BC_1, *, control, 0), "& " 388 (BC_1, IO(130), output3, X, 387, 0, Z), "& " 389 (BC_1, IO(130), input, X), "& " 390 (BC_1, IO(131), input, X), "& " 391 (BC_1, IO(131), output3, X, 392, 0, Z), "& " 392 (BC_1, *, control, 0), "& " 393 (BC_1, *, control, 0), "& " 394 (BC_1, IO(132), output3, X, 393, 0, Z), "& " 395 (BC_1, IO(132), input, X), "& " 396 (BC_1, IO(133), input, X), "& " 397 (BC_1, IO(133), output3, X, 398, 0, Z), "& " 398 (BC_1, *, control, 0), "& " 399 (BC_1, *, control, 0), "& " 400 (BC_1, IO(134), output3, X, 399, 0, Z), "& " 401 (BC_1, IO(134), input, X), "& " 402 (BC_1, IO(135), input, X), "& " 403 (BC_1, IO(135), output3, X, 404, 0, Z), "& " 404 (BC_1, *, control, 0), "& " 405 (BC_1, *, control, 0), "& " 406 (BC_1, IO(136), output3, X, 405, 0, Z), "& " 407 (BC_1, IO(136), input, X), "& " 408 (BC_1, IO(137), input, X), "& " 409 (BC_1, IO(137), output3, X, 410, 0, Z), "& " 410 (BC_1, *, control, 0), "& " 411 (BC_1, *, control, 0), "& " 412 (BC_1, IO(138), output3, X, 411, 0, Z), "& " 413 (BC_1, IO(138), input, X), "& " 414 (BC_1, IO(139), input, X), "& " 415 (BC_1, IO(139), output3, X, 416, 0, Z), "& " 416 (BC_1, *, control, 0), "& " 417 (BC_1, *, control, 0), "& " 418 (BC_1, IO(140), output3, X, 417, 0, Z), "& " 419 (BC_1, IO(140), input, X), "& " 420 (BC_1, IO(141), input, X), "& " 421 (BC_1, IO(141), output3, X, 422, 0, Z), "& " 422 (BC_1, *, control, 0), "& " 423 (BC_1, *, control, 0), "& " 424 (BC_1, IO(142), output3, X, 423, 0, Z), "& " 425 (BC_1, IO(142), input, X), "& " 426 (BC_1, IO(143), input, X), "& " 427 (BC_1, IO(143), output3, X, 428, 0, Z), "& " 428 (BC_1, *, control, 0), "& " 429 (BC_1, *, control, 0), "& " 430 (BC_1, IO(144), output3, X, 429, 0, Z), "& " 431 (BC_1, IO(144), input, X), "& " 432 (BC_1, IO(145), input, X), "& " 433 (BC_1, IO(145), output3, X, 434, 0, Z), "& " 434 (BC_1, *, control, 0), "& " 435 (BC_1, *, control, 0), "& " 436 (BC_1, IO(146), output3, X, 435, 0, Z), "& " 437 (BC_1, IO(146), input, X), "& " 438 (BC_1, IO(147), input, X), "& " 439 (BC_1, IO(147), output3, X, 440, 0, Z), "& " 440 (BC_1, *, control, 0), "& " 441 (BC_1, *, control, 0), "& " 442 (BC_1, IO(148), output3, X, 441, 0, Z), "& " 443 (BC_1, IO(148), input, X), "& " 444 (BC_1, IO(149), input, X), "& " 445 (BC_1, IO(149), output3, X, 446, 0, Z), "& " 446 (BC_1, *, control, 0), "& " 447 (BC_1, *, control, 0), "& " 448 (BC_1, IO(150), output3, X, 447, 0, Z), "& " 449 (BC_1, IO(150), input, X), "& " 450 (BC_1, IO(151), input, X), "& " 451 (BC_1, IO(151), output3, X, 452, 0, Z), "& " 452 (BC_1, *, control, 0), "& " 453 (BC_1, *, control, 0), "& " 454 (BC_1, IO(152), output3, X, 453, 0, Z), "& " 455 (BC_1, IO(152), input, X), "& " 456 (BC_1, IO(153), input, X), "& " 457 (BC_1, IO(153), output3, X, 458, 0, Z), "& " 458 (BC_1, *, control, 0), "& " 459 (BC_1, *, control, 0), "& " 460 (BC_1, IO(154), output3, X, 459, 0, Z), "& " 461 (BC_1, IO(154), input, X), "& " 462 (BC_1, IO(155), input, X), "& " 463 (BC_1, IO(155), output3, X, 464, 0, Z), "& " 464 (BC_1, *, control, 0), "& " 465 (BC_1, *, control, 0), "& " 466 (BC_1, IO(156), output3, X, 465, 0, Z), "& " 467 (BC_1, IO(156), input, X), "& " 468 (BC_1, IO(157), input, X), "& " 469 (BC_1, IO(157), output3, X, 470, 0, Z), "& " 470 (BC_1, *, control, 0), "& " 471 (BC_1, *, control, 0), "& " 472 (BC_1, IO(158), output3, X, 471, 0, Z), "& " 473 (BC_1, IO(158), input, X), "& " 474 (BC_1, IO(159), input, X), "& " 475 (BC_1, IO(159), output3, X, 476, 0, Z), "& " 476 (BC_1, *, control, 0), "& " 477 (BC_1, *, control, 0), "& " 478 (BC_1, IO(160), output3, X, 477, 0, Z), "& " 479 (BC_1, IO(160), input, X), "& " 480 (BC_1, IO(161), input, X), "& " 481 (BC_1, IO(161), output3, X, 482, 0, Z), "& " 482 (BC_1, *, control, 0), "& " 483 (BC_1, *, control, 0), "& " 484 (BC_1, IO(162), output3, X, 483, 0, Z), "& " 485 (BC_1, IO(162), input, X), "& " 486 (BC_1, IO(163), input, X), "& " 487 (BC_1, IO(163), output3, X, 488, 0, Z), "& " 488 (BC_1, *, control, 0), "& " 489 (BC_1, *, control, 0), "& " 490 (BC_1, IO(164), output3, X, 489, 0, Z), "& " 491 (BC_1, IO(164), input, X), "& " 492 (BC_1, IO(165), input, X), "& " 493 (BC_1, IO(165), output3, X, 494, 0, Z), "& " 494 (BC_1, *, control, 0), "& " 495 (BC_1, *, control, 0), "& " 496 (BC_1, IO(166), output3, X, 495, 0, Z), "& " 497 (BC_1, IO(166), input, X), "& " 498 (BC_1, IO(167), input, X), "& " 499 (BC_1, IO(167), output3, X, 500, 0, Z), "& " 500 (BC_1, *, control, 0), "& " 501 (BC_1, *, control, 0), "& " 502 (BC_1, IO(168), output3, X, 501, 0, Z), "& " 503 (BC_1, IO(168), input, X), "& " 504 (BC_1, IO(169), input, X), "& " 505 (BC_1, IO(169), output3, X, 506, 0, Z), "& " 506 (BC_1, *, control, 0), "& " 507 (BC_1, IO(170), input, X), "& " 508 (BC_1, IO(170), output3, X, 509, 0, Z), "& " 509 (BC_1, *, control, 0), "& " 510 (BC_1, *, control, 0), "& " 511 (BC_1, IO(171), output3, X, 510, 0, Z), "& " 512 (BC_1, IO(171), input, X), "& " 513 (BC_1, IO(172), input, X), "& " 514 (BC_1, IO(172), output3, X, 515, 0, Z), "& " 515 (BC_1, *, control, 0), "& " 516 (BC_1, *, control, 0), "& " 517 (BC_1, IO(173), output3, X, 516, 0, Z), "& " 518 (BC_1, IO(173), input, X), "& " 519 (BC_1, IO(174), input, X), "& " 520 (BC_1, IO(174), output3, X, 521, 0, Z), "& " 521 (BC_1, *, control, 0), "& " 522 (BC_1, *, control, 0), "& " 523 (BC_1, IO(175), output3, X, 522, 0, Z), "& " 524 (BC_1, IO(175), input, X), "& " 525 (BC_1, IO(176), input, X), "& " 526 (BC_1, IO(176), output3, X, 527, 0, Z), "& " 527 (BC_1, *, control, 0), "& " 528 (BC_1, *, control, 0), "& " 529 (BC_1, IO(177), output3, X, 528, 0, Z), "& " 530 (BC_1, IO(177), input, X), "& " 531 (BC_1, IO(178), input, X), "& " 532 (BC_1, IO(178), output3, X, 533, 0, Z), "& " 533 (BC_1, *, control, 0), "& " 534 (BC_1, *, control, 0), "& " 535 (BC_1, IO(179), output3, X, 534, 0, Z), "& " 536 (BC_1, IO(179), input, X), "& " 537 (BC_1, IO(180), input, X), "& " 538 (BC_1, IO(180), output3, X, 539, 0, Z), "& " 539 (BC_1, *, control, 0), "& " 540 (BC_1, *, control, 0), "& " 541 (BC_1, IO(181), output3, X, 540, 0, Z), "& " 542 (BC_1, IO(181), input, X), "& " 543 (BC_1, IO(182), input, X), "& " 544 (BC_1, IO(182), output3, X, 545, 0, Z), "& " 545 (BC_1, *, control, 0), "& " 546 (BC_1, *, control, 0), "& " 547 (BC_1, IO(183), output3, X, 546, 0, Z), "& " 548 (BC_1, IO(183), input, X), "& " 549 (BC_1, IO(184), input, X), "& " 550 (BC_1, IO(184), output3, X, 551, 0, Z), "& " 551 (BC_1, *, control, 0), "& " 552 (BC_1, *, control, 0), "& " 553 (BC_1, IO(185), output3, X, 552, 0, Z), "& " 554 (BC_1, IO(185), input, X), "& " 555 (BC_1, IO(186), input, X), "& " 556 (BC_1, IO(186), output3, X, 557, 0, Z), "& " 557 (BC_1, *, control, 0), "& " 558 (BC_1, *, control, 0), "& " 559 (BC_1, IO(187), output3, X, 558, 0, Z), "& " 560 (BC_1, IO(187), input, X), "& " 561 (BC_1, IO(188), input, X), "& " 562 (BC_1, IO(188), output3, X, 563, 0, Z), "& " 563 (BC_1, *, control, 0), "& " 564 (BC_1, *, control, 0), "& " 565 (BC_1, IO(189), output3, X, 564, 0, Z), "& " 566 (BC_1, IO(189), input, X), "& " 567 (BC_1, IO(190), input, X), "& " 568 (BC_1, IO(190), output3, X, 569, 0, Z), "& " 569 (BC_1, *, control, 0), "& " 570 (BC_1, *, control, 0), "& " 571 (BC_1, IO(191), output3, X, 570, 0, Z), "& " 572 (BC_1, IO(191), input, X), "& " 573 (BC_1, IO(192), input, X), "& " 574 (BC_1, IO(192), output3, X, 575, 0, Z), "& " 575 (BC_1, *, control, 0), "& " 576 (BC_1, *, control, 0), "& " 577 (BC_1, IO(193), output3, X, 576, 0, Z), "& " 578 (BC_1, IO(193), input, X), "& " 579 (BC_1, IO(194), input, X), "& " 580 (BC_1, IO(194), output3, X, 581, 0, Z), "& " 581 (BC_1, *, control, 0), "& " 582 (BC_1, *, control, 0), "& " 583 (BC_1, IO(195), output3, X, 582, 0, Z), "& " 584 (BC_1, IO(195), input, X), "& " 585 (BC_1, IO(196), input, X), "& " 586 (BC_1, IO(196), output3, X, 587, 0, Z), "& " 587 (BC_1, *, control, 0), "& " 588 (BC_1, *, control, 0), "& " 589 (BC_1, IO(197), output3, X, 588, 0, Z), "& " 590 (BC_1, IO(197), input, X), "& " 591 (BC_1, IO(198), input, X), "& " 592 (BC_1, IO(198), output3, X, 593, 0, Z), "& " 593 (BC_1, *, control, 0)"; end A32200DX240;