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--  PMC_Sierra_Cells   VHDL Package and Package Body
--  for PMC - Sierra
--
--  revision     :  1.0
--
--  created by : James Lamond (Hewlett Packard Canada Ltd)
--
--  date         :  20 December 1995

package PMC_Sierra_Cells is

   use STD_1149_1_1990.all;

   constant cele0 : CELL_INFO;

end PMC_Sierra_Cells;


package body PMC_Sierra_Cells is

constant cele0 : CELL_INFO :=
 ((BIDIR_IN, EXTEST,  PI),  (BIDIR_OUT, EXTEST,  PO),
  (BIDIR_IN, SAMPLE,  PI),  (BIDIR_OUT, SAMPLE,  PI),
  (BIDIR_IN, RUNBIST, PI),  (BIDIR_OUT, RUNBIST, PO) );

end PMC_Sierra_Cells;  -- End of PMC_Sierra_Cells Package Body

-------------------------------------------------------------------------------
--
-- PMC Sierra PM7344 S/UNI-MPH BSDL description
--
-- SATURN QUAD T1/E1 MULTI-PHY USER NETWORK INTERFACE
--
--
-- Written by: James Lamond
-- Verified electrically against PM7344-RI-P CB609692A T9536
-- Using HP3070 Boundary Scan S/W revision B.01.56
-- Date: Dec 22, 1995
-- Hewlett Packard (Canada) Ltd
--
-------------------------------------------------------------------------------

entity PM7344 is
   generic(PHYSICAL_PIN_MAP : string := "PQFP_128");

   port (RDP_RDD           : in    bit_vector(1 to 4);
         RDN_RLCV_ROH      : in    bit_vector(1 to 4);
         RCLKI             : in    bit_vector(1 to 4);
         RCLKO             : out   bit;
         RDLSIG_RDLINT     : out   bit_vector(1 to 4);
         RDLCLK_RDLEOM     : out   bit_vector(1 to 4);
         TDLSIG_TDLINT     : inout bit_vector(1 to 4);
         TDLCLK_TDLUDR     : out   bit_vector(1 to 4);
         TCLKO             : out   bit_vector(1 to 4);
         TDP_TDD           : out   bit_vector(1 to 4);
         TDN_TOHO          : out   bit_vector(1 to 4);
         TCLKI             : in    bit;
         TFPI_TOHI         : in    bit;
         XCLK_VCLK         : in    bit;
         MPHEN             : in    bit;
         RFCLK             : in    bit;
         RRDMPHB_RRDENB1   : in    bit;
         RRA0_RRDENB2      : in    bit;
         RRA1_RRDENB3      : in    bit;
         RCAMPH_RRDENB4    : inout bit;
         RDAT              : out   bit_vector(0 to 7);
         RXPRTY            : out   bit;
         RSOC              : out   bit;
         RCA               : out   bit_vector(1 to 4);
         TFCLK             : in    bit;
         TDAT              : in    bit_vector(0 to 7);
         TXPRTY            : in    bit;
         TWRMPHB_TWRENB1   : in    bit;
         TWA0_TWRENB2      : in    bit;
         TWA1_TWRENB3      : in    bit;
         TCAMPH_TWRENB4    : inout bit;
         TSOC              : in    bit;
         TCA               : out   bit_vector(1 to 4);
         INTB              : out   bit;
         CSB               : in    bit;
         D                 : inout bit_vector(0 to 7);
         RDB               : in    bit;
         WRB               : in    bit;
         ALE               : in    bit;
         RSTB              : in    bit;
         A                 : in    bit_vector(0 to 10);
         TCK               : in    bit;
         TMS               : in    bit;
         TDI               : in    bit;
         TDO               : out   bit;
         TRSTB             : in    bit;
         VDD_AC            : linkage bit_vector(0 to 2);
         VDD_DC            : linkage bit_vector(0 to 3);
         VSS_AC            : linkage bit_vector(0 to 2);
         VSS_DC            : linkage bit_vector(0 to 3);
         NC                : linkage bit);       -- No Connects

   use STD_1149_1_1990.all;
   use PMC_Sierra_Cells.all;

   attribute PIN_MAP of PM7344 : entity is PHYSICAL_PIN_MAP;

   constant PQFP_128 : PIN_MAP_STRING :=        -- Define Pin Out of PQFP_128
        "RDP_RDD     : (1, 4, 7, 33)," &
        "RDN_RLCV_ROH: (2, 5, 8, 34)," &
        "RCLKI       : (3, 6, 9, 35)," &
        "RCLKO       : 49, "  &
        "RDLSIG_RDLINT : (97,98,99,100)," &
        "RDLCLK_RDLEOM : (75,76,77,78)," &
        "TDLSIG_TDLINT : (39,40,41,42)," &
        "TDLCLK_TDLUDR : (28,29,30,31)," &
        "TCLKO       : (22,25,45,48)," &
        "TDP_TDD     : (23,26,43,46)," &
        "TDN_TOHO    : (24,27,44,47)," &
        "TCLKI       : 107," &
        "TFPI_TOHI   : 106," &
        "XCLK_VCLK   : 108," &
        "MPHEN       : 109," &
        "RFCLK       : 74," &
        "RRDMPHB_RRDENB1 : 79," &
        "RRA0_RRDENB2 : 80," &
        "RRA1_RRDENB3 : 81," &
        "RCAMPH_RRDENB4 : 82," &
        "RDAT        : (89,90,91,92,93,94,95,96)," &
        "RXPRTY      : 84," &
        "RSOC        : 83," &
        "RCA         : (58,59,60,61)," &
        "TFCLK       : 38," &
        "TDAT        : (66,67,68,69,70,71,72,73)," &
        "TXPRTY      : 37," &
        "TWRMPHB_TWRENB1 : 65," &
        "TWA0_TWRENB2      : 64," &
        "TWA1_TWRENB3      : 63," &
        "TCAMPH_TWRENB4    : 62," &
        "TSOC        : 36," &
        "TCA         : (54,55,56,57)," &
        "INTB        : 32," &
        "CSB         : 113," &
        "D           : (10,11,12,13,14,15,16,17)," &
        "RDB         : 112," &
        "WRB         : 111," &
        "ALE         : 114," &
        "RSTB        : 110," &
        "A           : (117,118,119,120,121,122,123,124,125,126,127)," &
        "TCK         : 103," &
        "TMS         : 104," &
        "TDI         : 102," &
        "TDO         : 101," &
        "TRSTB       : 105," &
        "VDD_AC      : (18,50,88)," &
        "VDD_DC      : (20,52,86,116)," &
        "VSS_AC      : (19,51,87)," &
        "VSS_DC      : (21,53,85,115)," &
        "NC          : 128 ";

   attribute Tap_Scan_In of    TDI      : signal is true;
   attribute Tap_Scan_Mode of  TMS      : signal is true;
   attribute Tap_Scan_Out of   TDO      : signal is true;
   attribute Tap_Scan_Reset of TRSTB    : signal is true;
   attribute Tap_Scan_Clock of TCK      : signal is (1.0e6, BOTH);

   attribute Instruction_Length of PM7344: entity is 3;

   attribute Instruction_Opcode of PM7344: entity is
      "EXTEST  (000),"    &
      "SAMPLE  (010),"    &
      "IDCODE  (001),"    &
      "BYPASS  (011),"    &
      "BYPASS  (100),"    &
      "BYPASS  (110),"    &
      "BYPASS  (111),"    &
      "STCTEST (101)";

   attribute Instruction_Capture of PM7344: entity is "001";
   -- there is no Instruction_Disable attribute for PM7344

   attribute Idcode_Register of PM7344: entity is
      "0000"                  &  -- 4-bit version = 0H
      "0111001101000100"      &  -- 16-bit part number = 7344H
      "00001100110"           &  -- 11-bit manufacturer's identification code
      "1";                       -- mandatory LSB by the standard

   attribute Register_Access of PM7344: entity is
      "Boundary (STCTEST)";

-----------------------------------------------------------------------
-- The first cell is closest to TDO
-----------------------------------------------------------------------

   attribute Boundary_Length of PM7344: entity is 127;
   attribute Boundary_Cells of PM7344: entity is "BC_4,BC_1,cele0";

   attribute Boundary_Register of PM7344: entity is
   -- num  cell    port            function  safe[ccell disval rslt]
      "0   (BC_1,   *,      control, 1), " &
      "1   (BC_1,   *,      control, 1), " &
      "2   (BC_1,   *,      control, 1), " &
      "3   (BC_1,   *,      control, 1), " &
      "4   (BC_1,   *,      control, 1), " &
      "5   (BC_1,   RDLSIG_RDLINT(4), output3, X,  1,  1,  Z),"  &
      "6   (BC_1,   RDLSIG_RDLINT(3), output3, X,  1,  1,  Z),"  &
      "7   (BC_1,   RDLSIG_RDLINT(2), output3, X,  1,  1,  Z),"  &
      "8   (BC_1,   RDLSIG_RDLINT(1), output3, X,  1,  1,  Z),"  &
      "9   (BC_1,   RDAT(7),          output3, X,  0,  1,  Z),"  &
      "10  (BC_1,   RDAT(6),          output3, X,  0,  1,  Z),"  &
      "11  (BC_1,   RDAT(5),          output3, X,  0,  1,  Z),"  &
      "12  (BC_1,   RDAT(4),          output3, X,  0,  1,  Z),"  &
      "13  (BC_1,   RDAT(3),          output3, X,  0,  1,  Z),"  &
      "14  (BC_1,   RDAT(2),          output3, X,  0,  1,  Z),"  &
      "15  (BC_1,   RDAT(1),          output3, X,  0,  1,  Z),"  &
      "16  (BC_1,   RDAT(0),          output3, X,  0,  1,  Z),"  &
      "17  (BC_1,   RXPRTY,           output3, X,  0,  1,  Z),"  &
      "18  (BC_1,   RSOC,             output3, X,  0,  1,  Z),"  &
      "19  (BC_1,   *,         control, 1)," &    -- RCAMPH_OEN for RRDENB4
      "20  (cele0,  RCAMPH_RRDENB4,   bidir,  X,  19,  1,  Z),"   &
      "21  (BC_4,   RRA1_RRDENB3,     input, X),"   &
      "22  (BC_4,   RRA0_RRDENB2,     input, X),"   &
      "23  (BC_4,   RRDMPHB_RRDENB1,  input, X),"   &
      "24  (BC_1,   RDLCLK_RDLEOM(4), output3, X,  3,  1,  Z),"  &
      "25  (BC_1,   RDLCLK_RDLEOM(3), output3, X,  3,  1,  Z),"  &
      "26  (BC_1,   RDLCLK_RDLEOM(2), output3, X,  3,  1,  Z),"  &
      "27  (BC_1,   RDLCLK_RDLEOM(1), output3, X,  3,  1,  Z),"  &
      "28  (BC_4,   RFCLK,            input, X),"   &
      "29  (BC_4,   TDAT(7),          input, X),"   &
      "30  (BC_4,   TDAT(6),          input, X),"   &
      "31  (BC_4,   TDAT(5),          input, X),"   &
      "32  (BC_4,   TDAT(4),          input, X),"   &
      "33  (BC_4,   TDAT(3),          input, X),"   &
      "34  (BC_4,   TDAT(2),          input, X),"   &
      "35  (BC_4,   TDAT(1),          input, X),"   &
      "36  (BC_4,   TDAT(0),          input, X),"   &
      "37  (BC_4,   TWRMPHB_TWRENB1,  input, X),"   &
      "38  (BC_4,   TWA0_TWRENB2,     input, X),"   &
      "39  (BC_4,   TWA1_TWRENB3,     input, X),"   &
      "40  (BC_1,   *,      control, 1)," &       -- TCAMPH_OEN for TWRENB4
      "41  (cele0,  TCAMPH_TWRENB4,   bidir,  X,  40,  1,  Z),"   &
      "42  (BC_1,   RCA(4),           output3, X,  3,  1,  Z),"  &
      "43  (BC_1,   RCA(3),           output3, X,  3,  1,  Z),"  &
      "44  (BC_1,   RCA(2),           output3, X,  3,  1,  Z),"  &
      "45  (BC_1,   RCA(1),           output3, X,  3,  1,  Z),"  &
      "46  (BC_1,   TCA(4),           output3, X,  3,  1,  Z),"  &
      "47  (BC_1,   TCA(3),           output3, X,  3,  1,  Z),"  &
      "48  (BC_1,   TCA(2),           output3, X,  3,  1,  Z),"  &
      "49  (BC_1,   TCA(1),           output3, X,  3,  1,  Z),"  &
      "50  (BC_1,   RCLKO,            output3, X,  3,  1,  Z),"  &
      "51  (BC_1,   TCLKO(4),         output3, X,  2,  1,  Z),"  &
      "52  (BC_1,   TDN_TOHO(4),      output3, X,  2,  1,  Z),"  &
      "53  (BC_1,   TDP_TDD(4),       output3, X,  2,  1,  Z),"  &
      "54  (BC_1,   TCLKO(3),         output3, X,  2,  1,  Z),"  &
      "55  (BC_1,   TDN_TOHO(3),      output3, X,  2,  1,  Z),"  &
      "56  (BC_1,   TDP_TDD(3),       output3, X,  2,  1,  Z),"  &
      "57  (BC_1,   *,      control, 1)," &       -- TDLSIG4_OEN for TDLSIG4
      "58  (cele0,  TDLSIG_TDLINT(4), bidir,  X,  57,  1,  Z),"   &
      "59  (BC_1,   *,      control, 1)," &       -- TDLSIG3_OEN for TDLSIG3
      "60  (cele0,  TDLSIG_TDLINT(3), bidir,  X,  59,  1,  Z),"   &
      "61  (BC_1,   *,      control, 1)," &       -- TDLSIG2_OEN for TDLSIG2
      "62  (cele0,  TDLSIG_TDLINT(2), bidir,  X,  61,  1,  Z),"   &
      "63  (BC_1,   *,      control, 1)," &       -- TDLSIG1_OEN for TDLSIG1
      "64  (cele0,  TDLSIG_TDLINT(1), bidir,  X,  63,  1,  Z),"   &
      "65  (BC_4,   TFCLK,            input, X),"   &
      "66  (BC_4,   TXPRTY,           input, X),"   &
      "67  (BC_4,   TSOC,             input, X),"   &
      "68  (BC_1,   INTB,             output3, X,  0,  1,  Z),"  &
      "69  (BC_1,   TDLCLK_TDLUDR(4), output3, X,  2,  1,  Z),"  &
      "70  (BC_1,   TDLCLK_TDLUDR(3), output3, X,  2,  1,  Z),"  &
      "71  (BC_1,   TDLCLK_TDLUDR(2), output3, X,  2,  1,  Z),"  &
      "72  (BC_1,   TDLCLK_TDLUDR(1), output3, X,  2,  1,  Z),"  &
      "73  (BC_1,   TDN_TOHO(2),      output3, X,  2,  1,  Z),"  &
      "74  (BC_1,   TDP_TDD(2),       output3, X,  2,  1,  Z),"  &
      "75  (BC_1,   TCLKO(2),         output3, X,  2,  1,  Z),"  &
      "76  (BC_1,   TDN_TOHO(1),      output3, X,  2,  1,  Z),"  &
      "77  (BC_1,   TDP_TDD(1),       output3, X,  2,  1,  Z),"  &
      "78  (BC_1,   TCLKO(1),         output3, X,  2,  1,  Z),"  &
      "79  (BC_1,   *,      control, 1)," &       -- D(7)_OEN for D(7)
      "80  (cele0,  D(7),             bidir,  X,  79,  1,  Z),"   &
      "81  (BC_1,   *,      control, 1)," &       -- D(6)_OEN for D(6)
      "82  (cele0,  D(6),             bidir,  X,  81,  1,  Z),"   &
      "83  (BC_1,   *,      control, 1)," &       -- D(5)_OEN for D(5)
      "84  (cele0,  D(5),             bidir,  X,  83,  1,  Z),"   &
      "85  (BC_1,   *,      control, 1)," &       -- D(4)_OEN for D(4)
      "86  (cele0,  D(4),             bidir,  X,  85,  1,  Z),"   &
      "87  (BC_1,   *,      control, 1)," &       -- D(3)_OEN for D(3)
      "88  (cele0,  D(3),             bidir,  X,  87,  1,  Z),"   &
      "89  (BC_1,   *,      control, 1)," &       -- D(2)_OEN for D(2)
      "90  (cele0,  D(2),             bidir,  X,  89,  1,  Z),"   &
      "91  (BC_1,   *,      control, 1)," &       -- D(1)_OEN for D(1)
      "92  (cele0,  D(1),             bidir,  X,  91,  1,  Z),"   &
      "93  (BC_1,   *,      control, 1)," &       -- D(0)_OEN for D(0)
      "94  (cele0,  D(0),             bidir,  X,  93,  1,  Z),"   &
      "95  (BC_4,   RCLKI(4),         input, X),"   &
      "96  (BC_4,   RDN_RLCV_ROH(4),  input, X),"   &
      "97  (BC_4,   RDP_RDD(4),       input, X),"   &
      "98  (BC_4,   RCLKI(3),         input, X),"   &
      "99  (BC_4,   RDN_RLCV_ROH(3),  input, X),"   &
      "100 (BC_4,   RDP_RDD(3),       input, X),"   &
      "101 (BC_4,   RCLKI(2),         input, X),"   &
      "102 (BC_4,   RDN_RLCV_ROH(2),  input, X),"   &
      "103 (BC_4,   RDP_RDD(2),       input, X),"   &
      "104 (BC_4,   RCLKI(1),         input, X),"   &
      "105 (BC_4,   RDN_RLCV_ROH(1),  input, X),"   &
      "106 (BC_4,   RDP_RDD(1),       input, X),"   &
      "107 (BC_4,   A(10),            input, X),"   &
      "108 (BC_4,   A(9),             input, X),"   &
      "109 (BC_4,   A(8),             input, X),"   &
      "110 (BC_4,   A(7),             input, X),"   &
      "111 (BC_4,   A(6),             input, X),"   &
      "112 (BC_4,   A(5),             input, X),"   &
      "113 (BC_4,   A(4),             input, X),"   &
      "114 (BC_4,   A(3),             input, X),"   &
      "115 (BC_4,   A(2),             input, X),"   &
      "116 (BC_4,   A(1),             input, X),"   &
      "117 (BC_4,   A(0),             input, X),"   &
      "118 (BC_4,   ALE,              input, X),"   &
      "119 (BC_4,   CSB,              input, X),"   &
      "120 (BC_4,   RDB,              input, X),"   &
      "121 (BC_4,   WRB,              input, X),"   &
      "122 (BC_4,   RSTB,             input, X),"   &
      "123 (BC_4,   MPHEN,            input, X),"   &
      "124 (BC_4,   XCLK_VCLK,        input, X),"   &
      "125 (BC_4,   TCLKI,            input, X),"   &
      "126 (BC_4,   TFPI_TOHI,        input, X)";

end PM7344;

This library contains 8972 BSDL files (for 7016 distinct entities) from 68 vendors
Last BSDL model (sam4s16b) was added on Dec 7, 2017 14:26
info@bsdl.info