BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: XA3S100E_VQ100

-- $ XILINX$RCSfile: xa3s100e_vq100.bsd,v $
-- $ XILINX$Revision: 1.2 $
--
-- BSDL file for device XA3S100E_VQ100
-- Xilinx, Inc. $State: PRELIMINARY $ $Date: 2008-05-29 16:01:47-07 $
-- Generated by BSDLnet bsdlnet Version 1.40

------------------------------------------------------------------------
-- Modification History
-- | Generated on 05/28/08
-- | CR # 471899
-- | Details -  Initial Release using BSDLnet.
-- |		Added 'attribute COMPLIANCE_PATTERNS' & changed boundary
-- |		register attribute to internal for PROG_B & PUDC_B.
------------------------------------------------------------------------
--
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-- This BSDL file reflects the pre-configuration JTAG behavior.
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----------------------------------

-- BSDL File for P1149.1 Standard.

----------------------------------

entity XA3S100E_VQ100 is

-- Generic Parameter

generic (PHYSICAL_PIN_MAP : string := "VQ100" );

-- Logical Port Description

port (
	DONE: inout bit;
	GND: linkage bit_vector (1 to 12);
	IPAD12: in bit;
	IPAD13: in bit;
	IPAD36: in bit;
	IPAD66: in bit;
	IPAD67: in bit;
	IPAD73: in bit;
	IPAD95: in bit;
	P10: inout bit; --  PAD98
	P11: inout bit; --  PAD97
	P12: inout bit; --  PAD96
	P15: inout bit; --  PAD94
	P16: inout bit; --  PAD93
	P17: inout bit; --  PAD92
	P18: inout bit; --  PAD91
	P2: inout bit; --  PAD108
	P22: inout bit; --  PAD83
	P23: inout bit; --  PAD82
	P24: inout bit; --  PAD79
	P25: inout bit; --  PAD78
	P26: inout bit; --  PAD76
	P27: inout bit; --  PAD75
	P3: inout bit; --  PAD107
	P32: inout bit; --  PAD72
	P33: inout bit; --  PAD71
	P34: inout bit; --  PAD70
	P35: inout bit; --  PAD69
	P36: inout bit; --  PAD68
	P4: inout bit; --  PAD106
	P40: inout bit; --  PAD65
	P41: inout bit; --  PAD64
	P42: inout bit; --  PAD63
	P43: inout bit; --  PAD62
	P44: inout bit; --  PAD61
	P47: inout bit; --  PAD59
	P48: inout bit; --  PAD58
	P49: inout bit; --  PAD56
	P5: inout bit; --  PAD105
	P50: inout bit; --  PAD55
	P53: inout bit; --  PAD54
	P54: inout bit; --  PAD53
	P57: inout bit; --  PAD49
	P58: inout bit; --  PAD48
	P60: inout bit; --  PAD45
	P61: inout bit; --  PAD44
	P62: inout bit; --  PAD43
	P63: inout bit; --  PAD42
	P65: inout bit; --  PAD40
	P66: inout bit; --  PAD39
	P67: inout bit; --  PAD38
	P68: inout bit; --  PAD37
	P70: inout bit; --  PAD35
	P71: inout bit; --  PAD34
	P78: inout bit; --  PAD25
	P79: inout bit; --  PAD24
	P83: inout bit; --  PAD18
	P84: inout bit; --  PAD17
	P85: inout bit; --  PAD15
	P86: inout bit; --  PAD14
	P9: inout bit; --  PAD99
	P90: inout bit; --  PAD11
	P91: inout bit; --  PAD10
	P92: inout bit; --  PAD9
	P94: inout bit; --  PAD8
	P95: inout bit; --  PAD7
	P98: inout bit; --  PAD2
	PROG_B: in bit;
	PUDC_B: in bit; --  PAD1
	TCK: in bit;
	TDI: in bit;
	TDO: out bit;
	TMS: in bit;
	VCCAUX: linkage bit_vector (1 to 4);
	VCCINT: linkage bit_vector (1 to 4);
	VCCO_0: linkage bit_vector (1 to 2);
	VCCO_1: linkage bit_vector (1 to 2);
	VCCO_2: linkage bit_vector (1 to 2);
	VCCO_3: linkage bit_vector (1 to 2)
); --end port list

-- Use Statements

use STD_1149_1_2001.all;

-- Component Conformance Statement(s)

attribute COMPONENT_CONFORMANCE of XA3S100E_VQ100 : entity is 
	"STD_1149_1_2001";

-- Device Package Pin Mappings

attribute PIN_MAP of XA3S100E_VQ100 : entity is PHYSICAL_PIN_MAP;

constant VQ100: PIN_MAP_STRING:=
	"DONE:P51," &
	"GND:(P7,P14,P19,P29,P37,P52,P59,P64,P72,P81," &
		"P87,P93)," &
	"IPAD12:P89," &
	"IPAD13:P88," &
	"IPAD36:P69," &
	"IPAD66:P39," &
	"IPAD67:P38," &
	"IPAD73:P30," &
	"IPAD95:P13," &
	"P10:P10," &
	"P11:P11," &
	"P12:P12," &
	"P15:P15," &
	"P16:P16," &
	"P17:P17," &
	"P18:P18," &
	"P2:P2," &
	"P22:P22," &
	"P23:P23," &
	"P24:P24," &
	"P25:P25," &
	"P26:P26," &
	"P27:P27," &
	"P3:P3," &
	"P32:P32," &
	"P33:P33," &
	"P34:P34," &
	"P35:P35," &
	"P36:P36," &
	"P4:P4," &
	"P40:P40," &
	"P41:P41," &
	"P42:P42," &
	"P43:P43," &
	"P44:P44," &
	"P47:P47," &
	"P48:P48," &
	"P49:P49," &
	"P5:P5," &
	"P50:P50," &
	"P53:P53," &
	"P54:P54," &
	"P57:P57," &
	"P58:P58," &
	"P60:P60," &
	"P61:P61," &
	"P62:P62," &
	"P63:P63," &
	"P65:P65," &
	"P66:P66," &
	"P67:P67," &
	"P68:P68," &
	"P70:P70," &
	"P71:P71," &
	"P78:P78," &
	"P79:P79," &
	"P83:P83," &
	"P84:P84," &
	"P85:P85," &
	"P86:P86," &
	"P9:P9," &
	"P90:P90," &
	"P91:P91," &
	"P92:P92," &
	"P94:P94," &
	"P95:P95," &
	"P98:P98," &
	"PROG_B:P1," &
	"PUDC_B:P99," &
	"TCK:P77," &
	"TDI:P100," &
	"TDO:P76," &
	"TMS:P75," &
	"VCCAUX:(P21,P46,P74,P96)," &
	"VCCINT:(P6,P28,P56,P80)," &
	"VCCO_0:(P82,P97)," &
	"VCCO_1:(P55,P73)," &
	"VCCO_2:(P31,P45)," &
	"VCCO_3:(P8,P20)";


-- Scan Port Identification

attribute TAP_SCAN_OUT   of TDO : signal is true;
attribute TAP_SCAN_IN    of TDI : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, both);
attribute TAP_SCAN_MODE  of TMS : signal is true;

-- Compliance-Enable Description

attribute COMPLIANCE_PATTERNS of XA3S100E_VQ100 : entity is
        "(PROG_B, PUDC_B) (10)";

-- Instruction Register Description

attribute INSTRUCTION_LENGTH of XA3S100E_VQ100 : entity is 6;

attribute INSTRUCTION_OPCODE of XA3S100E_VQ100 : entity is

   "EXTEST      (001111)," &
   "SAMPLE      (000001)," &
   "PRELOAD     (000001)," & -- Same as SAMPLE
   "USER1       (000010)," & -- Not available until after configuration
   "USER2       (000011)," & -- Not available until after configuration
   "CFG_OUT     (000100)," & -- Not available during configuration with another mode.
   "CFG_IN      (000101)," & -- Not available during configuration with another mode.
   "INTEST      (000111)," &
   "USERCODE    (001000)," &
   "IDCODE      (001001)," &
   "HIGHZ       (001010)," &
   "JPROGRAM    (001011)," & -- Not available during configuration with another mode.
   "JSTART      (001100)," & -- Not available during configuration with another mode.
   "JSHUTDOWN   (001101)," & -- Not available during configuration with another mode.
   "BYPASS      (111111)," &
   "ISC_ENABLE  (010000)," &
   "ISC_PROGRAM (010001)," &
   "ISC_NOOP    (010100)," &
   "ISC_READ    (010101)," &
   "ISC_DISABLE (010110)";

attribute INSTRUCTION_CAPTURE of XA3S100E_VQ100 : entity is
-- Bit 5 is 1 when DONE is released (part of startup sequence)
-- Bit 4 is 1 if house-cleaning is complete
-- Bit 3 is ISC_Enabled
-- Bit 2 is ISC_Done
  "XXXX01" ;

attribute INSTRUCTION_PRIVATE of XA3S100E_VQ100 : entity is
   "USER1," &
   "USER2," &
   "CFG_OUT," &
   "CFG_IN," &
   "JPROGRAM," &
   "JSTART," &
   "JSHUTDOWN," &
   "ISC_ENABLE," &
   "ISC_PROGRAM," &
   "ISC_NOOP," &
   "ISC_READ," &
   "ISC_DISABLE";

-- Optional Register Description

attribute IDCODE_REGISTER of XA3S100E_VQ100 : entity is 	"XXXX" &	-- version
	"0001110" &	-- family
	"000010000" &	-- array size
	"00001001001" &	-- manufacturer
	"1";		-- required by 1149.1


attribute USERCODE_REGISTER of XA3S100E_VQ100 : entity is "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";

-- Register Access Description

attribute REGISTER_ACCESS of XA3S100E_VQ100 : entity is
"BYPASS		 (HIGHZ, BYPASS)," &
"DEVICE_ID		(USERCODE, IDCODE)," &
"BOUNDARY 	(EXTEST, SAMPLE, PRELOAD, INTEST)";

-- Boundary-Scan Register Description

attribute BOUNDARY_LENGTH of XA3S100E_VQ100 : entity is 272;

attribute BOUNDARY_REGISTER of XA3S100E_VQ100 : entity is
-- cellnum (type, port, function, safe[, ccell, disval, disrslt])
	" 271 (BC_2, *, internal, X)," & --  IPAD27
	" 270 (BC_2, *, internal, X)," & --  PAD28.I
	" 269 (BC_2, *, internal, X)," & --  PAD28.O
	" 268 (BC_2, *, internal, 1)," & --  PAD28.T
	" 267 (BC_2, *, internal, X)," & --  PAD29.I
	" 266 (BC_2, *, internal, X)," & --  PAD29.O
	" 265 (BC_2, *, internal, 1)," & --  PAD29.T
	" 264 (BC_2, *, internal, X)," & --  PAD30.I
	" 263 (BC_2, *, internal, X)," & --  PAD30.O
	" 262 (BC_2, *, internal, 1)," & --  PAD30.T
	" 261 (BC_2, *, internal, X)," & --  PAD31.I
	" 260 (BC_2, *, internal, X)," & --  PAD31.O
	" 259 (BC_2, *, internal, 1)," & --  PAD31.T
	" 258 (BC_2, *, internal, X)," & --  IPAD32
	" 257 (BC_2, *, internal, X)," & --  PAD33.I
	" 256 (BC_2, *, internal, X)," & --  PAD33.O
	" 255 (BC_2, *, internal, 1)," & --  PAD33.T
	" 254 (BC_2, P71, input, X)," & --  PAD34
	" 253 (BC_2, P71, output3, X, 252, 1, PULL1)," & --  PAD34
	" 252 (BC_2, *, controlr, 1)," &
	" 251 (BC_2, P70, input, X)," & --  PAD35
	" 250 (BC_2, P70, output3, X, 249, 1, PULL1)," & --  PAD35
	" 249 (BC_2, *, controlr, 1)," &
	" 248 (BC_2, IPAD36, input, X)," &
	" 247 (BC_2, P68, input, X)," & --  PAD37
	" 246 (BC_2, P68, output3, X, 245, 1, PULL1)," & --  PAD37
	" 245 (BC_2, *, controlr, 1)," &
	" 244 (BC_2, P67, input, X)," & --  PAD38
	" 243 (BC_2, P67, output3, X, 242, 1, PULL1)," & --  PAD38
	" 242 (BC_2, *, controlr, 1)," &
	" 241 (BC_2, P66, input, X)," & --  PAD39
	" 240 (BC_2, P66, output3, X, 239, 1, PULL1)," & --  PAD39
	" 239 (BC_2, *, controlr, 1)," &
	" 238 (BC_2, P65, input, X)," & --  PAD40
	" 237 (BC_2, P65, output3, X, 236, 1, PULL1)," & --  PAD40
	" 236 (BC_2, *, controlr, 1)," &
	" 235 (BC_2, *, internal, X)," & --  IPAD41
	" 234 (BC_2, P63, input, X)," & --  PAD42
	" 233 (BC_2, P63, output3, X, 232, 1, PULL1)," & --  PAD42
	" 232 (BC_2, *, controlr, 1)," &
	" 231 (BC_2, P62, input, X)," & --  PAD43
	" 230 (BC_2, P62, output3, X, 229, 1, PULL1)," & --  PAD43
	" 229 (BC_2, *, controlr, 1)," &
	" 228 (BC_2, P61, input, X)," & --  PAD44
	" 227 (BC_2, P61, output3, X, 226, 1, PULL1)," & --  PAD44
	" 226 (BC_2, *, controlr, 1)," &
	" 225 (BC_2, P60, input, X)," & --  PAD45
	" 224 (BC_2, P60, output3, X, 223, 1, PULL1)," & --  PAD45
	" 223 (BC_2, *, controlr, 1)," &
	" 222 (BC_2, *, internal, X)," & --  IPAD46
	" 221 (BC_2, *, internal, X)," & --  PAD47.I
	" 220 (BC_2, *, internal, X)," & --  PAD47.O
	" 219 (BC_2, *, internal, 1)," & --  PAD47.T
	" 218 (BC_2, P58, input, X)," & --  PAD48
	" 217 (BC_2, P58, output3, X, 216, 1, PULL1)," & --  PAD48
	" 216 (BC_2, *, controlr, 1)," &
	" 215 (BC_2, P57, input, X)," & --  PAD49
	" 214 (BC_2, P57, output3, X, 213, 1, PULL1)," & --  PAD49
	" 213 (BC_2, *, controlr, 1)," &
	" 212 (BC_2, *, internal, X)," & --  IPAD50
	" 211 (BC_2, *, internal, X)," & --  PAD51.I
	" 210 (BC_2, *, internal, X)," & --  PAD51.O
	" 209 (BC_2, *, internal, 1)," & --  PAD51.T
	" 208 (BC_2, *, internal, X)," & --  PAD52.I
	" 207 (BC_2, *, internal, X)," & --  PAD52.O
	" 206 (BC_2, *, internal, 1)," & --  PAD52.T
	" 205 (BC_2, P54, input, X)," & --  PAD53
	" 204 (BC_2, P54, output3, X, 203, 1, PULL1)," & --  PAD53
	" 203 (BC_2, *, controlr, 1)," &
	" 202 (BC_2, P53, input, X)," & --  PAD54
	" 201 (BC_2, P53, output3, X, 200, 1, PULL1)," & --  PAD54
	" 200 (BC_2, *, controlr, 1)," &
	" 199 (BC_2, DONE, input, X)," &
	" 198 (BC_2, DONE, output3, X, 197, 1, PULL1)," &
	" 197 (BC_2, *, controlr, 1)," &
	" 196 (BC_2, P50, input, X)," & --  PAD55
	" 195 (BC_2, P50, output3, X, 194, 1, PULL1)," & --  PAD55
	" 194 (BC_2, *, controlr, 1)," &
	" 193 (BC_2, P49, input, X)," & --  PAD56
	" 192 (BC_2, P49, output3, X, 191, 1, PULL1)," & --  PAD56
	" 191 (BC_2, *, controlr, 1)," &
	" 190 (BC_2, *, internal, X)," & --  IPAD57
	" 189 (BC_2, P48, input, X)," & --  PAD58
	" 188 (BC_2, P48, output3, X, 187, 1, PULL1)," & --  PAD58
	" 187 (BC_2, *, controlr, 1)," &
	" 186 (BC_2, P47, input, X)," & --  PAD59
	" 185 (BC_2, P47, output3, X, 184, 1, PULL1)," & --  PAD59
	" 184 (BC_2, *, controlr, 1)," &
	" 183 (BC_2, *, internal, X)," & --  IPAD60
	" 182 (BC_2, P44, input, X)," & --  PAD61
	" 181 (BC_2, P44, output3, X, 180, 1, PULL1)," & --  PAD61
	" 180 (BC_2, *, controlr, 1)," &
	" 179 (BC_2, P43, input, X)," & --  PAD62
	" 178 (BC_2, P43, output3, X, 177, 1, PULL1)," & --  PAD62
	" 177 (BC_2, *, controlr, 1)," &
	" 176 (BC_2, P42, input, X)," & --  PAD63
	" 175 (BC_2, P42, output3, X, 174, 1, PULL1)," & --  PAD63
	" 174 (BC_2, *, controlr, 1)," &
	" 173 (BC_2, P41, input, X)," & --  PAD64
	" 172 (BC_2, P41, output3, X, 171, 1, PULL1)," & --  PAD64
	" 171 (BC_2, *, controlr, 1)," &
	" 170 (BC_2, P40, input, X)," & --  PAD65
	" 169 (BC_2, P40, output3, X, 168, 1, PULL1)," & --  PAD65
	" 168 (BC_2, *, controlr, 1)," &
	" 167 (BC_2, IPAD66, input, X)," &
	" 166 (BC_2, IPAD67, input, X)," &
	" 165 (BC_2, P36, input, X)," & --  PAD68
	" 164 (BC_2, P36, output3, X, 163, 1, PULL1)," & --  PAD68
	" 163 (BC_2, *, controlr, 1)," &
	" 162 (BC_2, P35, input, X)," & --  PAD69
	" 161 (BC_2, P35, output3, X, 160, 1, PULL1)," & --  PAD69
	" 160 (BC_2, *, controlr, 1)," &
	" 159 (BC_2, P34, input, X)," & --  PAD70
	" 158 (BC_2, P34, output3, X, 157, 1, PULL1)," & --  PAD70
	" 157 (BC_2, *, controlr, 1)," &
	" 156 (BC_2, P33, input, X)," & --  PAD71
	" 155 (BC_2, P33, output3, X, 154, 1, PULL1)," & --  PAD71
	" 154 (BC_2, *, controlr, 1)," &
	" 153 (BC_2, P32, input, X)," & --  PAD72
	" 152 (BC_2, P32, output3, X, 151, 1, PULL1)," & --  PAD72
	" 151 (BC_2, *, controlr, 1)," &
	" 150 (BC_2, IPAD73, input, X)," &
	" 149 (BC_2, *, internal, X)," & --  IPAD74
	" 148 (BC_2, P27, input, X)," & --  PAD75
	" 147 (BC_2, P27, output3, X, 146, 1, PULL1)," & --  PAD75
	" 146 (BC_2, *, controlr, 1)," &
	" 145 (BC_2, P26, input, X)," & --  PAD76
	" 144 (BC_2, P26, output3, X, 143, 1, PULL1)," & --  PAD76
	" 143 (BC_2, *, controlr, 1)," &
	" 142 (BC_2, *, internal, X)," & --  IPAD77
	" 141 (BC_2, P25, input, X)," & --  PAD78
	" 140 (BC_2, P25, output3, X, 139, 1, PULL1)," & --  PAD78
	" 139 (BC_2, *, controlr, 1)," &
	" 138 (BC_2, P24, input, X)," & --  PAD79
	" 137 (BC_2, P24, output3, X, 136, 1, PULL1)," & --  PAD79
	" 136 (BC_2, *, controlr, 1)," &
	" 135 (BC_2, *, internal, X)," & --  IPAD80
	" 134 (BC_2, *, internal, X)," & --  IPAD81
	" 133 (BC_2, P23, input, X)," & --  PAD82
	" 132 (BC_2, P23, output3, X, 131, 1, PULL1)," & --  PAD82
	" 131 (BC_2, *, controlr, 1)," &
	" 130 (BC_2, P22, input, X)," & --  PAD83
	" 129 (BC_2, P22, output3, X, 128, 1, PULL1)," & --  PAD83
	" 128 (BC_2, *, controlr, 1)," &
	" 127 (BC_2, *, internal, X)," & --  PAD84.I
	" 126 (BC_2, *, internal, X)," & --  PAD84.O
	" 125 (BC_2, *, internal, 1)," & --  PAD84.T
	" 124 (BC_2, *, internal, X)," & --  PAD85.I
	" 123 (BC_2, *, internal, X)," & --  PAD85.O
	" 122 (BC_2, *, internal, 1)," & --  PAD85.T
	" 121 (BC_2, *, internal, X)," & --  IPAD86
	" 120 (BC_2, *, internal, X)," & --  PAD87.I
	" 119 (BC_2, *, internal, X)," & --  PAD87.O
	" 118 (BC_2, *, internal, 1)," & --  PAD87.T
	" 117 (BC_2, *, internal, X)," & --  PAD88.I
	" 116 (BC_2, *, internal, X)," & --  PAD88.O
	" 115 (BC_2, *, internal, 1)," & --  PAD88.T
	" 114 (BC_2, *, internal, X)," & --  PAD89.I
	" 113 (BC_2, *, internal, X)," & --  PAD89.O
	" 112 (BC_2, *, internal, 1)," & --  PAD89.T
	" 111 (BC_2, *, internal, X)," & --  IPAD90
	" 110 (BC_2, P18, input, X)," & --  PAD91
	" 109 (BC_2, P18, output3, X, 108, 1, PULL1)," & --  PAD91
	" 108 (BC_2, *, controlr, 1)," &
	" 107 (BC_2, P17, input, X)," & --  PAD92
	" 106 (BC_2, P17, output3, X, 105, 1, PULL1)," & --  PAD92
	" 105 (BC_2, *, controlr, 1)," &
	" 104 (BC_2, P16, input, X)," & --  PAD93
	" 103 (BC_2, P16, output3, X, 102, 1, PULL1)," & --  PAD93
	" 102 (BC_2, *, controlr, 1)," &
	" 101 (BC_2, P15, input, X)," & --  PAD94
	" 100 (BC_2, P15, output3, X, 99, 1, PULL1)," & --  PAD94
	"  99 (BC_2, *, controlr, 1)," &
	"  98 (BC_2, IPAD95, input, X)," &
	"  97 (BC_2, P12, input, X)," & --  PAD96
	"  96 (BC_2, P12, output3, X, 95, 1, PULL1)," & --  PAD96
	"  95 (BC_2, *, controlr, 1)," &
	"  94 (BC_2, P11, input, X)," & --  PAD97
	"  93 (BC_2, P11, output3, X, 92, 1, PULL1)," & --  PAD97
	"  92 (BC_2, *, controlr, 1)," &
	"  91 (BC_2, P10, input, X)," & --  PAD98
	"  90 (BC_2, P10, output3, X, 89, 1, PULL1)," & --  PAD98
	"  89 (BC_2, *, controlr, 1)," &
	"  88 (BC_2, P9, input, X)," & --  PAD99
	"  87 (BC_2, P9, output3, X, 86, 1, PULL1)," & --  PAD99
	"  86 (BC_2, *, controlr, 1)," &
	"  85 (BC_2, *, internal, X)," & --  IPAD100
	"  84 (BC_2, *, internal, X)," & --  PAD101.I
	"  83 (BC_2, *, internal, X)," & --  PAD101.O
	"  82 (BC_2, *, internal, 1)," & --  PAD101.T
	"  81 (BC_2, *, internal, X)," & --  PAD102.I
	"  80 (BC_2, *, internal, X)," & --  PAD102.O
	"  79 (BC_2, *, internal, 1)," & --  PAD102.T
	"  78 (BC_2, *, internal, X)," & --  PAD103.I
	"  77 (BC_2, *, internal, X)," & --  PAD103.O
	"  76 (BC_2, *, internal, 1)," & --  PAD103.T
	"  75 (BC_2, *, internal, X)," & --  IPAD104
	"  74 (BC_2, P5, input, X)," & --  PAD105
	"  73 (BC_2, P5, output3, X, 72, 1, PULL1)," & --  PAD105
	"  72 (BC_2, *, controlr, 1)," &
	"  71 (BC_2, P4, input, X)," & --  PAD106
	"  70 (BC_2, P4, output3, X, 69, 1, PULL1)," & --  PAD106
	"  69 (BC_2, *, controlr, 1)," &
	"  68 (BC_2, P3, input, X)," & --  PAD107
	"  67 (BC_2, P3, output3, X, 66, 1, PULL1)," & --  PAD107
	"  66 (BC_2, *, controlr, 1)," &
	"  65 (BC_2, P2, input, X)," & --  PAD108
	"  64 (BC_2, P2, output3, X, 63, 1, PULL1)," & --  PAD108
	"  63 (BC_2, *, controlr, 1)," &
	"  62 (BC_2, *, internal, 1)," & --  PROG_B
	"  61 (BC_2, *, internal, 1)," & --  PUDC_B
	"  60 (BC_2, *, internal, 1)," & --  PUDC_B
	"  59 (BC_2, *, internal, 1)," & --  PUDC_B
	"  58 (BC_2, P98, input, X)," & --  PAD2
	"  57 (BC_2, P98, output3, X, 56, 1, PULL1)," & --  PAD2
	"  56 (BC_2, *, controlr, 1)," &
	"  55 (BC_2, *, internal, X)," & --  IPAD3
	"  54 (BC_2, *, internal, X)," & --  PAD4.I
	"  53 (BC_2, *, internal, X)," & --  PAD4.O
	"  52 (BC_2, *, internal, 1)," & --  PAD4.T
	"  51 (BC_2, *, internal, X)," & --  PAD5.I
	"  50 (BC_2, *, internal, X)," & --  PAD5.O
	"  49 (BC_2, *, internal, 1)," & --  PAD5.T
	"  48 (BC_2, *, internal, X)," & --  IPAD6
	"  47 (BC_2, P95, input, X)," & --  PAD7
	"  46 (BC_2, P95, output3, X, 45, 1, PULL1)," & --  PAD7
	"  45 (BC_2, *, controlr, 1)," &
	"  44 (BC_2, P94, input, X)," & --  PAD8
	"  43 (BC_2, P94, output3, X, 42, 1, PULL1)," & --  PAD8
	"  42 (BC_2, *, controlr, 1)," &
	"  41 (BC_2, P92, input, X)," & --  PAD9
	"  40 (BC_2, P92, output3, X, 39, 1, PULL1)," & --  PAD9
	"  39 (BC_2, *, controlr, 1)," &
	"  38 (BC_2, P91, input, X)," & --  PAD10
	"  37 (BC_2, P91, output3, X, 36, 1, PULL1)," & --  PAD10
	"  36 (BC_2, *, controlr, 1)," &
	"  35 (BC_2, P90, input, X)," & --  PAD11
	"  34 (BC_2, P90, output3, X, 33, 1, PULL1)," & --  PAD11
	"  33 (BC_2, *, controlr, 1)," &
	"  32 (BC_2, IPAD12, input, X)," &
	"  31 (BC_2, IPAD13, input, X)," &
	"  30 (BC_2, P86, input, X)," & --  PAD14
	"  29 (BC_2, P86, output3, X, 28, 1, PULL1)," & --  PAD14
	"  28 (BC_2, *, controlr, 1)," &
	"  27 (BC_2, P85, input, X)," & --  PAD15
	"  26 (BC_2, P85, output3, X, 25, 1, PULL1)," & --  PAD15
	"  25 (BC_2, *, controlr, 1)," &
	"  24 (BC_2, *, internal, X)," & --  PAD16.I
	"  23 (BC_2, *, internal, X)," & --  PAD16.O
	"  22 (BC_2, *, internal, 1)," & --  PAD16.T
	"  21 (BC_2, P84, input, X)," & --  PAD17
	"  20 (BC_2, P84, output3, X, 19, 1, PULL1)," & --  PAD17
	"  19 (BC_2, *, controlr, 1)," &
	"  18 (BC_2, P83, input, X)," & --  PAD18
	"  17 (BC_2, P83, output3, X, 16, 1, PULL1)," & --  PAD18
	"  16 (BC_2, *, controlr, 1)," &
	"  15 (BC_2, *, internal, X)," & --  IPAD19
	"  14 (BC_2, *, internal, X)," & --  IPAD20
	"  13 (BC_2, *, internal, X)," & --  PAD21.I
	"  12 (BC_2, *, internal, X)," & --  PAD21.O
	"  11 (BC_2, *, internal, 1)," & --  PAD21.T
	"  10 (BC_2, *, internal, X)," & --  PAD22.I
	"   9 (BC_2, *, internal, X)," & --  PAD22.O
	"   8 (BC_2, *, internal, 1)," & --  PAD22.T
	"   7 (BC_2, *, internal, X)," & --  IPAD23
	"   6 (BC_2, P79, input, X)," & --  PAD24
	"   5 (BC_2, P79, output3, X, 4, 1, PULL1)," & --  PAD24
	"   4 (BC_2, *, controlr, 1)," &
	"   3 (BC_2, P78, input, X)," & --  PAD25
	"   2 (BC_2, P78, output3, X, 1, 1, PULL1)," & --  PAD25
	"   1 (BC_2, *, controlr, 1)," &
	"   0 (BC_2, *, internal, X)"; --  IPAD26


-- Design Warning Section

attribute DESIGN_WARNING of XA3S100E_VQ100 : entity is
	"This is a preliminary BSDL file which has not been verified." &
	"This BSDL file must be modified by the FPGA designer in order to" &
		"reflect post-configuration behavior (if any)." &
	"To avoid losing the current configuration, the PROG_B should be" &
		"kept high.  If the PROG_B pin goes low by any means," &
		"the configuration will be cleared." &
	"PROG_B can only be captured, not updated." &
		"The value at the pin is always used by the device." &
	"PUDC_B can be captured and updated." &
		"The value at the pin is always used by the device" &
		"before configuration is done." &
	"During pre-configuration, the disable result of a 3-stated" &
		"I/O in this file corresponds to PUDC_B being low" &
		"or during EXTEST instruction." &
	"When PUDC_B is high AND during SAMPLE instruction, change" &
		"all PULL1s to PULL0s." &
	"After configuration, the disable result only depends on" &
		"the individual IO configuration setting." &
	"In EXTEST, output and tristate values are not captured in the" &
		"Capture-DR state - those register cells are unchanged." &
	"In INTEST, the pin input values are not captured in the" &
		"Capture-DR state - those register cells are unchanged." &
	"The output and tristate capture values are not valid until after" &
		"the device is configured." &
	"The tristate control value is not captured properly when" &
		"GTS is activated.";

end XA3S100E_VQ100;