-- BSDL file for design wl_top
-- Created by jig version 0.6a
-- Creation Date: Thu May 24 10:18:43 2001
entity wl_top is
generic (PHYSICAL_PIN_MAP: string:= "P324PBGA");
port (
RESET_B: in bit;
SCAN_EN: linkage bit;
COREGND10: linkage bit;
COREVDD10: linkage bit;
TBIE: in bit;
BSYNC: in bit;
BIST_MODE_SEL: in bit;
TST_0: in bit;
TST_1: in bit;
COREGND9: linkage bit;
COREVDD9: linkage bit;
XMIT_A_IDLE_B: in bit;
DROP_SYNC: in bit;
XMIT_A_K: in bit;
XMIT_A_7: in bit;
XMIT_A_6: in bit;
COREGND8: linkage bit;
COREVDD8: linkage bit;
XMIT_A_5: in bit;
XMIT_A_CLK: in bit;
XMIT_A_4: in bit;
XMIT_A_3: in bit;
XMIT_A_2: in bit;
COREGND7: linkage bit;
COREVDD7: linkage bit;
XMIT_A_1: in bit;
XMIT_A_0: in bit;
XMIT_B_0: in bit;
XMIT_B_1: in bit;
XMIT_B_2: in bit;
COREGND6: linkage bit;
COREVDD6: linkage bit;
XMIT_B_3: in bit;
XMIT_B_CLK: in bit;
XMIT_B_4: in bit;
XMIT_B_5: in bit;
XMIT_B_6: in bit;
COREGND5: linkage bit;
COREVDD5: linkage bit;
XMIT_B_7: in bit;
XMIT_B_K: in bit;
XMIT_B_IDLE_B: in bit;
RECV_A_ERR: out bit;
RECV_A_IDLE: out bit;
RECV_A_CLK: out bit;
RECV_A_9: out bit;
PADGND9: linkage bit;
PADVDD9: linkage bit;
RECV_A_K: out bit;
RECV_A_7: out bit;
RECV_A_6: out bit;
RECV_A_5: out bit;
RECV_A_4: out bit;
RECV_A_3: out bit;
PADGND8: linkage bit;
PADVDD8: linkage bit;
COREGND4: linkage bit;
COREVDD4: linkage bit;
RECV_A_2: out bit;
RECV_A_1: out bit;
RECV_A_0: out bit;
RECV_B_0: out bit;
RECV_B_1: out bit;
RECV_B_2: out bit;
PADGND7: linkage bit;
PADVDD7: linkage bit;
RECV_B_3: out bit;
RECV_B_4: out bit;
RECV_B_5: out bit;
RECV_B_6: out bit;
COREGND3: linkage bit;
COREVDD3: linkage bit;
RECV_B_7: out bit;
RECV_B_K: out bit;
PADGND6: linkage bit;
PADVDD6: linkage bit;
HSTL_VREF: linkage bit;
RECV_B_9: out bit;
RECV_B_CLK: out bit;
RECV_B_IDLE: out bit;
RECV_B_ERR: out bit;
RECV_C_ERR: out bit;
PADGND5: linkage bit;
PADVDD5: linkage bit;
RECV_C_IDLE: out bit;
RECV_C_CLK: out bit;
COREGND2: linkage bit;
COREVDD2: linkage bit;
RECV_C_9: out bit;
RECV_C_K: out bit;
RECV_C_7: out bit;
RECV_C_6: out bit;
PADGND4: linkage bit;
PADVDD4: linkage bit;
RECV_C_5: out bit;
RECV_C_4: out bit;
RECV_C_3: out bit;
RECV_C_2: out bit;
RECV_C_1: out bit;
RECV_C_0: out bit;
COREGND1: linkage bit;
COREVDD1: linkage bit;
PADGND3: linkage bit;
PADVDD3: linkage bit;
RECV_D_0: out bit;
RECV_D_1: out bit;
RECV_D_2: out bit;
RECV_D_3: out bit;
RECV_D_4: out bit;
RECV_D_5: out bit;
PADGND2: linkage bit;
PADVDD2: linkage bit;
RECV_D_6: out bit;
RECV_D_7: out bit;
RECV_D_K: out bit;
RECV_D_9: out bit;
RECV_D_CLK: out bit;
RECV_D_IDLE: out bit;
PADGND1: linkage bit;
PADVDD1: linkage bit;
RECV_D_ERR: out bit;
COREGND20: linkage bit;
COREVDD20: linkage bit;
WSO: out bit;
WSI: in bit;
XMIT_C_IDLE_B: in bit;
XMIT_C_K: in bit;
XMIT_C_7: in bit;
XMIT_C_6: in bit;
COREGND19: linkage bit;
COREVDD19: linkage bit;
XMIT_C_5: in bit;
XMIT_C_4: in bit;
XMIT_C_CLK: in bit;
XMIT_C_3: in bit;
XMIT_C_2: in bit;
COREGND18: linkage bit;
COREVDD18: linkage bit;
XMIT_C_1: in bit;
XMIT_C_0: in bit;
XMIT_D_0: in bit;
XMIT_D_1: in bit;
XMIT_D_2: in bit;
COREGND17: linkage bit;
COREVDD17: linkage bit;
XMIT_D_3: in bit;
XMIT_D_4: in bit;
XMIT_D_5: in bit;
XMIT_D_6: in bit;
XMIT_D_7: in bit;
COREGND16: linkage bit;
COREVDD16: linkage bit;
XMIT_D_K: in bit;
XMIT_D_IDLE_B: in bit;
XMIT_D_CLK: in bit;
WSE: in bit;
ADIE: in bit;
COREGND15: linkage bit;
COREVDD15: linkage bit;
RCCE: in bit;
REPE: in bit;
LBOE: in bit;
LBE: in bit;
XMIT_EN_ALL: in bit;
COREGND14: linkage bit;
COREVDD14: linkage bit;
LME: in bit;
REF_CLK_N: in bit;
REF_CLK_P: in bit;
HSE: in bit;
DDRE: in bit;
COREGND13: linkage bit;
COREVDD13: linkage bit;
XCVR_D_DISABLE: in bit;
XCVR_C_DISABLE: in bit;
XCVR_B_DISABLE: in bit;
XCVR_A_DISABLE: in bit;
VSHIELD8: linkage bit;
RLINK_D1_N: linkage bit;
RLINK_D1_P: linkage bit;
VSHIELD7: linkage bit;
XCOREGND7: linkage bit;
XCOREVDD7: linkage bit;
GNDSHIELD8: linkage bit;
RLINK_D0_N: linkage bit;
RLINK_D0_P: linkage bit;
GNDSHIELD7: linkage bit;
XPADVDD9: linkage bit;
XPADGND9: linkage bit;
XLINK_D1_N: linkage bit;
XLINK_D1_P: linkage bit;
XPADVDD8: linkage bit;
XPADGND8: linkage bit;
XLINK_D0_N: linkage bit;
XLINK_D0_P: linkage bit;
XPADGND7: linkage bit;
XLINK_C1_N: linkage bit;
XLINK_C1_P: linkage bit;
XPADVDD7: linkage bit;
XPADGND6: linkage bit;
XPADVDD6: linkage bit;
XLINK_C0_N: linkage bit;
XLINK_C0_P: linkage bit;
XCOREVDD6: linkage bit;
XCOREGND6: linkage bit;
VSHIELD6: linkage bit;
RLINK_C1_N: linkage bit;
RLINK_C1_P: linkage bit;
VSHIELD5: linkage bit;
XCOREGND5: linkage bit;
XCOREVDD5: linkage bit;
GNDSHIELD6: linkage bit;
RLINK_C0_N: linkage bit;
RLINK_C0_P: linkage bit;
GNDSHIELD5: linkage bit;
Z_CALIB: linkage bit;
XPADVDD5: linkage bit;
TX_PLLGND2: linkage bit;
TX_PLLGND1: linkage bit;
TX_PLL_TPA: linkage bit;
TX_PLLVDD2: linkage bit;
TX_PLLVDD1: linkage bit;
XPADGND5: linkage bit;
GNDSHIELD4: linkage bit;
RLINK_B0_P: linkage bit;
RLINK_B0_N: linkage bit;
GNDSHIELD3: linkage bit;
XCOREVDD4: linkage bit;
XCOREGND4: linkage bit;
VSHIELD4: linkage bit;
RLINK_B1_P: linkage bit;
RLINK_B1_N: linkage bit;
VSHIELD3: linkage bit;
XCOREGND3: linkage bit;
XCOREVDD3: linkage bit;
XPADVDD4: linkage bit;
XPADGND4: linkage bit;
XLINK_B0_P: linkage bit;
XLINK_B0_N: linkage bit;
XPADGND3: linkage bit;
XPADVDD3: linkage bit;
XLINK_B1_P: linkage bit;
XLINK_B1_N: linkage bit;
XPADVDD2: linkage bit;
XPADGND2: linkage bit;
XLINK_A0_P: linkage bit;
XLINK_A0_N: linkage bit;
XCOREGND2: linkage bit;
XCOREVDD2: linkage bit;
XPADGND1: linkage bit;
XPADVDD1: linkage bit;
XLINK_A1_P: linkage bit;
XLINK_A1_N: linkage bit;
GNDSHIELD2: linkage bit;
RLINK_A0_P: linkage bit;
RLINK_A0_N: linkage bit;
GNDSHIELD1: linkage bit;
XCOREVDD1: linkage bit;
XCOREGND1: linkage bit;
VSHIELD2: linkage bit;
RLINK_A1_P: linkage bit;
RLINK_A1_N: linkage bit;
VSHIELD1: linkage bit;
RECV_EQ_EN: in bit;
XMIT_EQ_EN: in bit;
XCVR_D_RSEL: in bit;
XCVR_C_RSEL: in bit;
XCVR_B_RSEL: in bit;
COREGND12: linkage bit;
COREVDD12: linkage bit;
XCVR_A_RSEL: in bit;
RECV_REF_A: in bit;
XMIT_REF_A: in bit;
TCK: in bit;
TRST_B: in bit;
COREGND11: linkage bit;
COREVDD11: linkage bit;
TDI: in bit;
TMS: in bit;
TDO: out bit;
GND_79: linkage bit;
GND_78: linkage bit;
GND_77: linkage bit;
GND_76: linkage bit;
GND_75: linkage bit;
GND_74: linkage bit;
GND_73: linkage bit;
GND_72: linkage bit;
GND_71: linkage bit;
GND_70: linkage bit;
GND_69: linkage bit;
GND_68: linkage bit;
GND_67: linkage bit;
GND_66: linkage bit;
GND_65: linkage bit;
GND_64: linkage bit;
GND_63: linkage bit;
GND_62: linkage bit;
GND_61: linkage bit;
GND_60: linkage bit;
GND_59: linkage bit;
GND_58: linkage bit;
GND_57: linkage bit;
GND_56: linkage bit;
GND_55: linkage bit;
GND_54: linkage bit;
GND_53: linkage bit;
GND_52: linkage bit;
GND_51: linkage bit;
GND_50: linkage bit;
GND_49: linkage bit;
GND_48: linkage bit;
GND_47: linkage bit;
GND_46: linkage bit;
GND_45: linkage bit;
GND_44: linkage bit;
GND_43: linkage bit;
GND_42: linkage bit;
GND_41: linkage bit;
GND_40: linkage bit;
GND_39: linkage bit;
GND_38: linkage bit;
GND_37: linkage bit;
GND_36: linkage bit;
GND_35: linkage bit;
GND_34: linkage bit;
GND_33: linkage bit;
GND_32: linkage bit;
GND_31: linkage bit;
GND_30: linkage bit;
GND_29: linkage bit;
GND_28: linkage bit;
GND_27: linkage bit;
GND_26: linkage bit;
GND_25: linkage bit;
GND_24: linkage bit;
GND_23: linkage bit;
GND_22: linkage bit;
GND_21: linkage bit;
GND_20: linkage bit;
GND_19: linkage bit;
GND_18: linkage bit;
GND_17: linkage bit;
GND_16: linkage bit;
GND_15: linkage bit;
GND_14: linkage bit;
GND_13: linkage bit;
GND_12: linkage bit;
GND_11: linkage bit;
GND_10: linkage bit;
GND_09: linkage bit;
GND_08: linkage bit;
GND_07: linkage bit;
GND_06: linkage bit;
GND_05: linkage bit;
GND_04: linkage bit;
GND_03: linkage bit;
GND_02: linkage bit;
GND_01: linkage bit;
GND_00: linkage bit;
VDD_37: linkage bit;
VDD_36: linkage bit;
VDD_35: linkage bit;
VDD_34: linkage bit;
VDD_33: linkage bit;
VDD_32: linkage bit;
VDD_31: linkage bit;
VDD_30: linkage bit;
VDD_29: linkage bit;
VDD_28: linkage bit;
VDD_27: linkage bit;
VDD_26: linkage bit;
VDD_25: linkage bit;
VDD_24: linkage bit;
VDD_23: linkage bit;
VDD_22: linkage bit;
VDD_21: linkage bit;
VDD_20: linkage bit;
VDD_19: linkage bit;
VDD_18: linkage bit;
VDD_17: linkage bit;
VDD_16: linkage bit;
VDD_15: linkage bit;
VDD_14: linkage bit;
VDD_13: linkage bit;
VDD_12: linkage bit;
VDD_11: linkage bit;
VDD_10: linkage bit;
VDD_09: linkage bit;
VDD_08: linkage bit;
VDD_07: linkage bit;
VDD_06: linkage bit;
VDD_05: linkage bit;
VDD_04: linkage bit;
VDD_03: linkage bit;
VDD_02: linkage bit;
VDD_01: linkage bit;
VDD_00: linkage bit );
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of wl_top: entity is "STD_1149_1_1993";
attribute PIN_MAP of wl_top: entity is PHYSICAL_PIN_MAP;
constant P324PBGA: PIN_MAP_STRING :=
"RESET_B: T10, " &
"SCAN_EN: U10, " &
"COREGND10: GNDRING, " &
"COREVDD10: PWRRING, " &
"TBIE: V10, " &
"BSYNC: R10, " &
"BIST_MODE_SEL: R9, " &
"TST_0: T9, " &
"TST_1: U9, " &
"COREGND9: GNDRING, " &
"COREVDD9: PWRRING, " &
"XMIT_A_IDLE_B: V9, " &
"DROP_SYNC: V8, " &
"XMIT_A_K: U8, " &
"XMIT_A_7: T8, " &
"XMIT_A_6: P9, " &
"COREGND8: GNDRING, " &
"COREVDD8: PWRRING, " &
"XMIT_A_5: R8, " &
"XMIT_A_CLK: U7, " &
"XMIT_A_4: T7, " &
"XMIT_A_3: P8, " &
"XMIT_A_2: R7, " &
"COREGND7: GNDRING, " &
"COREVDD7: PWRRING, " &
"XMIT_A_1: U6, " &
"XMIT_A_0: T6, " &
"XMIT_B_0: R6, " &
"XMIT_B_1: V5, " &
"XMIT_B_2: U5, " &
"COREGND6: GNDRING, " &
"COREVDD6: PWRRING, " &
"XMIT_B_3: T5, " &
"XMIT_B_CLK: V4, " &
"XMIT_B_4: U4, " &
"XMIT_B_5: R5, " &
"XMIT_B_6: T4, " &
"COREGND5: GNDRING, " &
"COREVDD5: PWRRING, " &
"XMIT_B_7: R4, " &
"XMIT_B_K: V3, " &
"XMIT_B_IDLE_B: U3, " &
"RECV_A_ERR: V2, " &
"RECV_A_IDLE: U2, " &
"RECV_A_CLK: P5, " &
"RECV_A_9: P4, " &
"PADGND9: GNDRING, " &
"PADVDD9: V1, " &
"RECV_A_K: T3, " &
"RECV_A_7: T2, " &
"RECV_A_6: T1, " &
"RECV_A_5: N4, " &
"RECV_A_4: M4, " &
"RECV_A_3: R3, " &
"PADGND8: GNDRING, " &
"PADVDD8: R2, " &
"COREGND4: GNDRING, " &
"COREVDD4: PWRRING, " &
"RECV_A_2: R1, " &
"RECV_A_1: P3, " &
"RECV_A_0: P2, " &
"RECV_B_0: P1, " &
"RECV_B_1: L4, " &
"RECV_B_2: N3, " &
"PADGND7: GNDRING, " &
"PADVDD7: N2, " &
"RECV_B_3: N1, " &
"RECV_B_4: M3, " &
"RECV_B_5: M2, " &
"RECV_B_6: M1, " &
"COREGND3: GNDRING, " &
"COREVDD3: PWRRING, " &
"RECV_B_7: L3, " &
"RECV_B_K: L2, " &
"PADGND6: GNDRING, " &
"PADVDD6: L1, " &
"HSTL_VREF: K5, " &
"RECV_B_9: K2, " &
"RECV_B_CLK: K3, " &
"RECV_B_IDLE: K4, " &
"RECV_B_ERR: J1, " &
"RECV_C_ERR: J2, " &
"PADGND5: GNDRING, " &
"PADVDD5: J3, " &
"RECV_C_IDLE: H1, " &
"RECV_C_CLK: H2, " &
"COREGND2: GNDRING, " &
"COREVDD2: PWRRING, " &
"RECV_C_9: H3, " &
"RECV_C_K: J4, " &
"RECV_C_7: G1, " &
"RECV_C_6: G2, " &
"PADGND4: GNDRING, " &
"PADVDD4: G3, " &
"RECV_C_5: H4, " &
"RECV_C_4: F1, " &
"RECV_C_3: F2, " &
"RECV_C_2: F3, " &
"RECV_C_1: G4, " &
"RECV_C_0: E1, " &
"COREGND1: GNDRING, " &
"COREVDD1: PWRRING, " &
"PADGND3: GNDRING, " &
"PADVDD3: G5, " &
"RECV_D_0: E2, " &
"RECV_D_1: E3, " &
"RECV_D_2: D1, " &
"RECV_D_3: D2, " &
"RECV_D_4: D3, " &
"RECV_D_5: C2, " &
"PADGND2: GNDRING, " &
"PADVDD2: C1, " &
"RECV_D_6: B2, " &
"RECV_D_7: A1, " &
"RECV_D_K: D5, " &
"RECV_D_9: C3, " &
"RECV_D_CLK: D4, " &
"RECV_D_IDLE: A2, " &
"PADGND1: GNDRING, " &
"PADVDD1: B3, " &
"RECV_D_ERR: A3, " &
"COREGND20: GNDRING, " &
"COREVDD20: PWRRING, " &
"WSO: C4, " &
"WSI: B4, " &
"XMIT_C_IDLE_B: C6, " &
"XMIT_C_K: D6, " &
"XMIT_C_7: C5, " &
"XMIT_C_6: A4, " &
"COREGND19: GNDRING, " &
"COREVDD19: PWRRING, " &
"XMIT_C_5: B5, " &
"XMIT_C_4: D7, " &
"XMIT_C_CLK: D8, " &
"XMIT_C_3: C7, " &
"XMIT_C_2: B6, " &
"COREGND18: GNDRING, " &
"COREVDD18: PWRRING, " &
"XMIT_C_1: E8, " &
"XMIT_C_0: D9, " &
"XMIT_D_0: B7, " &
"XMIT_D_1: C8, " &
"XMIT_D_2: A7, " &
"COREGND17: GNDRING, " &
"COREVDD17: PWRRING, " &
"XMIT_D_3: B8, " &
"XMIT_D_4: C9, " &
"XMIT_D_5: E9, " &
"XMIT_D_6: A8, " &
"XMIT_D_7: B9, " &
"COREGND16: GNDRING, " &
"COREVDD16: PWRRING, " &
"XMIT_D_K: A9, " &
"XMIT_D_IDLE_B: C10, " &
"XMIT_D_CLK: B10, " &
"WSE: D10, " &
"ADIE: E10, " &
"COREGND15: GNDRING, " &
"COREVDD15: PWRRING, " &
"RCCE: D11, " &
"REPE: C11, " &
"LBOE: B11, " &
"LBE: B12, " &
"XMIT_EN_ALL: C12, " &
"COREGND14: GNDRING, " &
"COREVDD14: PWRRING, " &
"LME: D12, " &
"REF_CLK_N: A12, " &
"REF_CLK_P: A13, " &
"HSE: C13, " &
"DDRE: B13, " &
"COREGND13: GNDRING, " &
"COREVDD13: PWRRING, " &
"XCVR_D_DISABLE: A14, " &
"XCVR_C_DISABLE: B14, " &
"XCVR_B_DISABLE: C14, " &
"XCVR_A_DISABLE: D13, " &
"VSHIELD8: XPWRRING, " &
"RLINK_D1_N: A16, " &
"RLINK_D1_P: B16, " &
"VSHIELD7: XPWRRING, " &
"XCOREGND7: XGNDRING, " &
"XCOREVDD7: XPWRRING, " &
"GNDSHIELD8: XGNDRING, " &
"RLINK_D0_N: A18, " &
"RLINK_D0_P: B18, " &
"GNDSHIELD7: XGNDRING, " &
"XPADVDD9: C18, " &
"XPADGND9: B17, " &
"XLINK_D1_N: C15, " &
"XLINK_D1_P: D15, " &
"XPADVDD8: C16, " &
"XPADGND8: D16, " &
"XLINK_D0_N: C17, " &
"XLINK_D0_P: D17, " &
"XPADGND7: E17, " &
"XLINK_C1_N: E16, " &
"XLINK_C1_P: F16, " &
"XPADVDD7: F17, " &
"XPADGND6: E15, " &
"XPADVDD6: F15, " &
"XLINK_C0_N: E18, " &
"XLINK_C0_P: F18, " &
"XCOREVDD6: XPWRRING, " &
"XCOREGND6: XGNDRING, " &
"VSHIELD6: XPWRRING, " &
"RLINK_C1_N: G15, " &
"RLINK_C1_P: H15, " &
"VSHIELD5: XPWRRING, " &
"XCOREGND5: XGNDRING, " &
"XCOREVDD5: XPWRRING, " &
"GNDSHIELD6: XGNDRING, " &
"RLINK_C0_N: G17, " &
"RLINK_C0_P: H17, " &
"GNDSHIELD5: XGNDRING, " &
"Z_CALIB: H18, " &
"XPADVDD5: J16, " &
"TX_PLLGND2: J18, " &
"TX_PLLGND1: J18, " &
"TX_PLL_TPA: K15, " &
"TX_PLLVDD2: K18, " &
"TX_PLLVDD1: K18, " &
"XPADGND5: K16, " &
"GNDSHIELD4: XGNDRING, " &
"RLINK_B0_P: L17, " &
"RLINK_B0_N: M17, " &
"GNDSHIELD3: XGNDRING, " &
"XCOREVDD4: XPWRRING, " &
"XCOREGND4: XGNDRING, " &
"VSHIELD4: XPWRRING, " &
"RLINK_B1_P: L15, " &
"RLINK_B1_N: M15, " &
"VSHIELD3: XPWRRING, " &
"XCOREGND3: XGNDRING, " &
"XCOREVDD3: XPWRRING, " &
"XPADVDD4: N17, " &
"XPADGND4: P17, " &
"XLINK_B0_P: N18, " &
"XLINK_B0_N: P18, " &
"XPADGND3: N15, " &
"XPADVDD3: P15, " &
"XLINK_B1_P: N16, " &
"XLINK_B1_N: P16, " &
"XPADVDD2: R18, " &
"XPADGND2: T18, " &
"XLINK_A0_P: R17, " &
"XLINK_A0_N: T17, " &
"XCOREGND2: XGNDRING, " &
"XCOREVDD2: XPWRRING, " &
"XPADGND1: R16, " &
"XPADVDD1: T16, " &
"XLINK_A1_P: R15, " &
"XLINK_A1_N: T15, " &
"GNDSHIELD2: XGNDRING, " &
"RLINK_A0_P: U18, " &
"RLINK_A0_N: V18, " &
"GNDSHIELD1: XGNDRING, " &
"XCOREVDD1: XPWRRING, " &
"XCOREGND1: XGNDRING, " &
"VSHIELD2: XPWRRING, " &
"RLINK_A1_P: U16, " &
"RLINK_A1_N: V16, " &
"VSHIELD1: XPWRRING, " &
"RECV_EQ_EN: R12, " &
"XMIT_EQ_EN: U14, " &
"XCVR_D_RSEL: P12, " &
"XCVR_C_RSEL: T13, " &
"XCVR_B_RSEL: U13, " &
"COREGND12: GNDRING, " &
"COREVDD12: PWRRING, " &
"XCVR_A_RSEL: P11, " &
"RECV_REF_A: T12, " &
"XMIT_REF_A: U12, " &
"TCK: V12, " &
"TRST_B: T11, " &
"COREGND11: GNDRING, " &
"COREVDD11: PWRRING, " &
"TDI: U11, " &
"TMS: V11, " &
"TDO: R11, " &
"GND_79: U17, " &
"GND_78: U15, " &
"GND_77: N13, " &
"GND_76: M13, " &
"GND_75: L18, " &
"GND_74: L16, " &
"GND_73: L13, " &
"GND_72: K17, " &
"GND_71: K13, " &
"GND_70: J15, " &
"GND_69: J13, " &
"GND_68: H13, " &
"GND_67: G16, " &
"GND_66: G13, " &
"GND_65: F13, " &
"GND_64: A17, " &
"GND_63: A15, " &
"GND_62: V14, " &
"GND_61: V7, " &
"GND_60: U1, " &
"GND_59: N12, " &
"GND_58: N11, " &
"GND_57: N10, " &
"GND_56: N9, " &
"GND_55: N8, " &
"GND_54: N7, " &
"GND_53: N6, " &
"GND_52: M12, " &
"GND_51: M11, " &
"GND_50: M10, " &
"GND_49: M9, " &
"GND_48: M8, " &
"GND_47: M7, " &
"GND_46: M6, " &
"GND_45: L12, " &
"GND_44: L11, " &
"GND_43: L10, " &
"GND_42: L9, " &
"GND_41: L8, " &
"GND_40: L7, " &
"GND_39: L6, " &
"GND_38: K12, " &
"GND_37: K11, " &
"GND_36: K10, " &
"GND_35: K9, " &
"GND_34: K8, " &
"GND_33: K7, " &
"GND_32: K6, " &
"GND_31: K1, " &
"GND_30: J12, " &
"GND_29: J11, " &
"GND_28: J10, " &
"GND_27: J9, " &
"GND_26: J8, " &
"GND_25: J7, " &
"GND_24: J6, " &
"GND_23: H12, " &
"GND_22: H11, " &
"GND_21: H10, " &
"GND_20: H9, " &
"GND_19: H8, " &
"GND_18: H7, " &
"GND_17: H6, " &
"GND_16: G12, " &
"GND_15: G11, " &
"GND_14: G10, " &
"GND_13: G9, " &
"GND_12: G8, " &
"GND_11: G7, " &
"GND_10: G6, " &
"GND_09: F12, " &
"GND_08: F11, " &
"GND_07: F10, " &
"GND_06: F9, " &
"GND_05: F8, " &
"GND_04: F7, " &
"GND_03: F6, " &
"GND_02: B1, " &
"GND_01: A11, " &
"GND_00: A6, " &
"VDD_37: V17, " &
"VDD_36: V15, " &
"VDD_35: P14, " &
"VDD_34: P13, " &
"VDD_33: N14, " &
"VDD_32: M18, " &
"VDD_31: M16, " &
"VDD_30: M14, " &
"VDD_29: L14, " &
"VDD_28: K14, " &
"VDD_27: J17, " &
"VDD_26: J14, " &
"VDD_25: H16, " &
"VDD_24: H14, " &
"VDD_23: G18, " &
"VDD_22: G14, " &
"VDD_21: F14, " &
"VDD_20: E14, " &
"VDD_19: E13, " &
"VDD_18: D18, " &
"VDD_17: B15, " &
"VDD_16: V13, " &
"VDD_15: V6, " &
"VDD_14: P10, " &
"VDD_13: P7, " &
"VDD_12: P6, " &
"VDD_11: N5, " &
"VDD_10: M5, " &
"VDD_09: L5, " &
"VDD_08: J5, " &
"VDD_07: H5, " &
"VDD_06: F5, " &
"VDD_05: E12, " &
"VDD_04: E11, " &
"VDD_03: E6, " &
"VDD_02: E5, " &
"VDD_01: A10, " &
"VDD_00: A5 " ;
attribute PORT_GROUPING of wl_top : entity is
"Differential_Voltage ( ( REF_CLK_P, REF_CLK_N) ) ";
attribute TAP_SCAN_CLOCK of TCK : signal is (1.00e+07, BOTH);
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of TRST_B : signal is true;
attribute INSTRUCTION_LENGTH of wl_top : entity is 5;
attribute INSTRUCTION_OPCODE of wl_top : entity is
"PRIVATE_15 (11000)," &
"PRIVATE_14 (11101)," &
"PRIVATE_13 (11100)," &
"PRIVATE_12 (11110)," &
"PRIVATE_11 (10111)," &
"PRIVATE_10 (10110)," &
"PRIVATE_9 (10101)," &
"PRIVATE_8 (10000)," &
"PRIVATE_7 (10001)," &
"PRIVATE_6 (10010)," &
"PRIVATE_5 (10011)," &
"PRIVATE_4 (10100)," &
"PRIVATE_3 (11010)," &
"PRIVATE_2 (11001)," &
"PRIVATE_1 (11011)," &
"EXTEST (00000)," &
"IDCODE (00001)," &
"SAMPLE (00010)," &
"HIGHZ (01001)," &
"BYPASS (11111)," &
"CLAMP (01100)" ;
attribute INSTRUCTION_CAPTURE of wl_top : entity is "00001";
attribute INSTRUCTION_PRIVATE of wl_top : entity is
"PRIVATE_15," &
"PRIVATE_14," &
"PRIVATE_13," &
"PRIVATE_12," &
"PRIVATE_11," &
"PRIVATE_10," &
"PRIVATE_9 ," &
"PRIVATE_8 ," &
"PRIVATE_7 ," &
"PRIVATE_6 ," &
"PRIVATE_5 ," &
"PRIVATE_4 ," &
"PRIVATE_3 ," &
"PRIVATE_2 ," &
"PRIVATE_1 " ;
attribute IDCODE_REGISTER of wl_top : entity is
"0000" & -- version number
"00101000" & -- part number, part 1
"00001110" & -- part number, part 2
"00000001110" & -- manufacturer
"1"; -- required by standard
attribute BOUNDARY_LENGTH of wl_top : entity is 132;
attribute BOUNDARY_REGISTER of wl_top : entity is
-- num cell port function safe [cccel disval rslt]
" 131 (BC_4,RESET_B , OBSERVE_ONLY, X)," &
" 130 (BC_4,TBIE , OBSERVE_ONLY, X)," &
" 129 (BC_4,BSYNC , OBSERVE_ONLY, X)," &
" 128 (BC_4,BIST_MODE_SEL , OBSERVE_ONLY, X)," &
" 127 (BC_4,TST_0 , OBSERVE_ONLY, X)," &
" 126 (BC_4,TST_1 , OBSERVE_ONLY, X)," &
" 125 (BC_4,XMIT_A_IDLE_B , OBSERVE_ONLY, X)," &
" 124 (BC_4,DROP_SYNC , OBSERVE_ONLY, X)," &
" 123 (BC_4,XMIT_A_K , OBSERVE_ONLY, X)," &
" 122 (BC_4,XMIT_A_7 , OBSERVE_ONLY, X)," &
" 121 (BC_4,XMIT_A_6 , OBSERVE_ONLY, X)," &
" 120 (BC_4,XMIT_A_5 , OBSERVE_ONLY, X)," &
" 119 (BC_4,XMIT_A_CLK , CLOCK , X)," &
" 118 (BC_4,XMIT_A_4 , OBSERVE_ONLY, X)," &
" 117 (BC_4,XMIT_A_3 , OBSERVE_ONLY, X)," &
" 116 (BC_4,XMIT_A_2 , OBSERVE_ONLY, X)," &
" 115 (BC_4,XMIT_A_1 , OBSERVE_ONLY, X)," &
" 114 (BC_4,XMIT_A_0 , OBSERVE_ONLY, X)," &
" 113 (BC_4,XMIT_B_0 , OBSERVE_ONLY, X)," &
" 112 (BC_4,XMIT_B_1 , OBSERVE_ONLY, X)," &
" 111 (BC_4,XMIT_B_2 , OBSERVE_ONLY, X)," &
" 110 (BC_4,XMIT_B_3 , OBSERVE_ONLY, X)," &
" 109 (BC_4,XMIT_B_CLK , CLOCK , X)," &
" 108 (BC_4,XMIT_B_4 , OBSERVE_ONLY, X)," &
" 107 (BC_4,XMIT_B_5 , OBSERVE_ONLY, X)," &
" 106 (BC_4,XMIT_B_6 , OBSERVE_ONLY, X)," &
" 105 (BC_4,XMIT_B_7 , OBSERVE_ONLY, X)," &
" 104 (BC_4,XMIT_B_K , OBSERVE_ONLY, X)," &
" 103 (BC_4,XMIT_B_IDLE_B , OBSERVE_ONLY, X)," &
" 102 (BC_1,* , CONTROL , 1)," &
" 101 (BC_1,RECV_A_ERR , OUTPUT3 , 1, 102, 1, Z)," &
" 100 (BC_1,RECV_A_IDLE , OUTPUT3 , 1, 102, 1, Z)," &
" 99 (BC_1,RECV_A_CLK , OUTPUT3 , 1, 102, 1, Z)," &
" 98 (BC_1,RECV_A_9 , OUTPUT3 , 1, 102, 1, Z)," &
" 97 (BC_1,RECV_A_K , OUTPUT3 , 1, 102, 1, Z)," &
" 96 (BC_1,RECV_A_7 , OUTPUT3 , 1, 102, 1, Z)," &
" 95 (BC_1,RECV_A_6 , OUTPUT3 , 1, 102, 1, Z)," &
" 94 (BC_1,RECV_A_5 , OUTPUT3 , 1, 102, 1, Z)," &
" 93 (BC_1,RECV_A_4 , OUTPUT3 , 1, 102, 1, Z)," &
" 92 (BC_1,RECV_A_3 , OUTPUT3 , 1, 102, 1, Z)," &
" 91 (BC_1,RECV_A_2 , OUTPUT3 , 1, 102, 1, Z)," &
" 90 (BC_1,RECV_A_1 , OUTPUT3 , 1, 102, 1, Z)," &
" 89 (BC_1,RECV_A_0 , OUTPUT3 , 1, 102, 1, Z)," &
" 88 (BC_1,* , CONTROL , 1)," &
" 87 (BC_1,RECV_B_0 , OUTPUT3 , 1, 88, 1, Z)," &
" 86 (BC_1,RECV_B_1 , OUTPUT3 , 1, 88, 1, Z)," &
" 85 (BC_1,RECV_B_2 , OUTPUT3 , 1, 88, 1, Z)," &
" 84 (BC_1,RECV_B_3 , OUTPUT3 , 1, 88, 1, Z)," &
" 83 (BC_1,RECV_B_4 , OUTPUT3 , 1, 88, 1, Z)," &
" 82 (BC_1,RECV_B_5 , OUTPUT3 , 1, 88, 1, Z)," &
" 81 (BC_1,RECV_B_6 , OUTPUT3 , 1, 88, 1, Z)," &
" 80 (BC_1,RECV_B_7 , OUTPUT3 , 1, 88, 1, Z)," &
" 79 (BC_1,RECV_B_K , OUTPUT3 , 1, 88, 1, Z)," &
" 78 (BC_1,RECV_B_9 , OUTPUT3 , 1, 88, 1, Z)," &
" 77 (BC_1,RECV_B_CLK , OUTPUT3 , 1, 88, 1, Z)," &
" 76 (BC_1,RECV_B_IDLE , OUTPUT3 , 1, 88, 1, Z)," &
" 75 (BC_1,RECV_B_ERR , OUTPUT3 , 1, 88, 1, Z)," &
" 74 (BC_1,* , CONTROL , 1)," &
" 73 (BC_1,RECV_C_ERR , OUTPUT3 , 1, 74, 1, Z)," &
" 72 (BC_1,RECV_C_IDLE , OUTPUT3 , 1, 74, 1, Z)," &
" 71 (BC_1,RECV_C_CLK , OUTPUT3 , 1, 74, 1, Z)," &
" 70 (BC_1,RECV_C_9 , OUTPUT3 , 1, 74, 1, Z)," &
" 69 (BC_1,RECV_C_K , OUTPUT3 , 1, 74, 1, Z)," &
" 68 (BC_1,RECV_C_7 , OUTPUT3 , 1, 74, 1, Z)," &
" 67 (BC_1,RECV_C_6 , OUTPUT3 , 1, 74, 1, Z)," &
" 66 (BC_1,RECV_C_5 , OUTPUT3 , 1, 74, 1, Z)," &
" 65 (BC_1,RECV_C_4 , OUTPUT3 , 1, 74, 1, Z)," &
" 64 (BC_1,RECV_C_3 , OUTPUT3 , 1, 74, 1, Z)," &
" 63 (BC_1,RECV_C_2 , OUTPUT3 , 1, 74, 1, Z)," &
" 62 (BC_1,RECV_C_1 , OUTPUT3 , 1, 74, 1, Z)," &
" 61 (BC_1,RECV_C_0 , OUTPUT3 , 1, 74, 1, Z)," &
" 60 (BC_1,* , CONTROL , 1)," &
" 59 (BC_1,RECV_D_0 , OUTPUT3 , 1, 60, 1, Z)," &
" 58 (BC_1,RECV_D_1 , OUTPUT3 , 1, 60, 1, Z)," &
" 57 (BC_1,RECV_D_2 , OUTPUT3 , 1, 60, 1, Z)," &
" 56 (BC_1,RECV_D_3 , OUTPUT3 , 1, 60, 1, Z)," &
" 55 (BC_1,RECV_D_4 , OUTPUT3 , 1, 60, 1, Z)," &
" 54 (BC_1,RECV_D_5 , OUTPUT3 , 1, 60, 1, Z)," &
" 53 (BC_1,RECV_D_6 , OUTPUT3 , 1, 60, 1, Z)," &
" 52 (BC_1,RECV_D_7 , OUTPUT3 , 1, 60, 1, Z)," &
" 51 (BC_1,RECV_D_K , OUTPUT3 , 1, 60, 1, Z)," &
" 50 (BC_1,RECV_D_9 , OUTPUT3 , 1, 60, 1, Z)," &
" 49 (BC_1,RECV_D_CLK , OUTPUT3 , 1, 60, 1, Z)," &
" 48 (BC_1,RECV_D_IDLE , OUTPUT3 , 1, 60, 1, Z)," &
" 47 (BC_1,RECV_D_ERR , OUTPUT3 , 1, 60, 1, Z)," &
" 46 (BC_1,WSO , OUTPUT3 , 1, 60, 1, Z)," &
" 45 (BC_4,WSI , OBSERVE_ONLY, X)," &
" 44 (BC_4,XMIT_C_IDLE_B , OBSERVE_ONLY, X)," &
" 43 (BC_4,XMIT_C_K , OBSERVE_ONLY, X)," &
" 42 (BC_4,XMIT_C_7 , OBSERVE_ONLY, X)," &
" 41 (BC_4,XMIT_C_6 , OBSERVE_ONLY, X)," &
" 40 (BC_4,XMIT_C_5 , OBSERVE_ONLY, X)," &
" 39 (BC_4,XMIT_C_4 , OBSERVE_ONLY, X)," &
" 38 (BC_4,XMIT_C_CLK , CLOCK , X)," &
" 37 (BC_4,XMIT_C_3 , OBSERVE_ONLY, X)," &
" 36 (BC_4,XMIT_C_2 , OBSERVE_ONLY, X)," &
" 35 (BC_4,XMIT_C_1 , OBSERVE_ONLY, X)," &
" 34 (BC_4,XMIT_C_0 , OBSERVE_ONLY, X)," &
" 33 (BC_4,XMIT_D_0 , OBSERVE_ONLY, X)," &
" 32 (BC_4,XMIT_D_1 , OBSERVE_ONLY, X)," &
" 31 (BC_4,XMIT_D_2 , OBSERVE_ONLY, X)," &
" 30 (BC_4,XMIT_D_3 , OBSERVE_ONLY, X)," &
" 29 (BC_4,XMIT_D_4 , OBSERVE_ONLY, X)," &
" 28 (BC_4,XMIT_D_5 , OBSERVE_ONLY, X)," &
" 27 (BC_4,XMIT_D_6 , OBSERVE_ONLY, X)," &
" 26 (BC_4,XMIT_D_7 , OBSERVE_ONLY, X)," &
" 25 (BC_4,XMIT_D_K , OBSERVE_ONLY, X)," &
" 24 (BC_4,XMIT_D_IDLE_B , OBSERVE_ONLY, X)," &
" 23 (BC_4,XMIT_D_CLK , CLOCK , X)," &
" 22 (BC_4,WSE , OBSERVE_ONLY, X)," &
" 21 (BC_4,ADIE , OBSERVE_ONLY, X)," &
" 20 (BC_4,RCCE , OBSERVE_ONLY, X)," &
" 19 (BC_4,REPE , OBSERVE_ONLY, X)," &
" 18 (BC_4,LBOE , OBSERVE_ONLY, X)," &
" 17 (BC_4,LBE , OBSERVE_ONLY, X)," &
" 16 (BC_4,XMIT_EN_ALL , OBSERVE_ONLY, X)," &
" 15 (BC_4,LME , OBSERVE_ONLY, X)," &
" 14 (BC_4,REF_CLK_P , CLOCK , X)," &
" 13 (BC_4,HSE , OBSERVE_ONLY, X)," &
" 12 (BC_4,DDRE , OBSERVE_ONLY, X)," &
" 11 (BC_4,XCVR_D_DISABLE , OBSERVE_ONLY, X)," &
" 10 (BC_4,XCVR_C_DISABLE , OBSERVE_ONLY, X)," &
" 9 (BC_4,XCVR_B_DISABLE , OBSERVE_ONLY, X)," &
" 8 (BC_4,XCVR_A_DISABLE , OBSERVE_ONLY, X)," &
" 7 (BC_4,RECV_EQ_EN , OBSERVE_ONLY, X)," &
" 6 (BC_4,XMIT_EQ_EN , OBSERVE_ONLY, X)," &
" 5 (BC_4,XCVR_D_RSEL , OBSERVE_ONLY, X)," &
" 4 (BC_4,XCVR_C_RSEL , OBSERVE_ONLY, X)," &
" 3 (BC_4,XCVR_B_RSEL , OBSERVE_ONLY, X)," &
" 2 (BC_4,XCVR_A_RSEL , OBSERVE_ONLY, X)," &
" 1 (BC_4,RECV_REF_A , OBSERVE_ONLY, X)," &
" 0 (BC_4,XMIT_REF_A , OBSERVE_ONLY, X)";
attribute DESIGN_WARNING of wl_top : entity is
"The HSTL_VREF pin must be properly connected to " &
"ensure correct operation of the HSTL input pins.";
end wl_top;