BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: CYV15G0204TRB

--*************************************************************************************
--**  Copyright (c) 2004 Cypress Semiconductor
--**  All rights reserved.
--**                            
--**  File Name:     cyv15g0204trb.bsdl
--**  Description:   Boundary Scan Description Language file for JTAG arch.
--**
--**  Part #:        CYV15G0204TRB
--**  Part Function: Independent Clock HOTLink-II Dual Serializer and Dual 
--**                 Reclocking Deserializer  
--**
--**  Release:       1.1
--**  Last Updated:  July 11, 2004
--**  Author:        Lucy Jin (wjn@cypress.com).
--**  Tool:          Synopsys BSD Compiler
--**
--**  Notes:    RXCLK- pins do not have a BSR cell but are always the inverse of
--**            RXCLK+ pins.
--**            The REFCLK+/- differential port has a single BSR cell after the 
--**            clock buffer output single ended CMOS.
--**
--**  Queries to Author or Cypress Datacom Applications http://www.cypress.com/support 
--**
--*************************************************************************************


 entity cyv15g0204trb is
   
-- This section identifies the default device package selected.
   
   generic (PHYSICAL_PIN_MAP: string:= "BL256");
   
-- This section declares all the ports in the design.
   
   port ( 
          WREN          : in           bit;
          INSELC        : in           bit;
          INSELD        : in           bit;
          LDTDEN        : in           bit;    
          REFCLKAp      : in           bit;
          REFCLKBp      : in           bit;
	  RESERVED_1	: linkage      bit;
	  RESERVED_2	: linkage      bit;
	  RESERVED_3	: linkage      bit;
	  RESERVED_4	: linkage      bit;
	  RESERVED_5	: in           bit;  
	  RESERVED_6	: in           bit;  
	  RESERVED_7	: in           bit;  
	  RESERVED_8	: in           bit;  
	  RESERVED_9	: buffer       bit;
	  RESERVED_10	: buffer       bit;
	  RESERVED_11	: in	       bit;   
	  RESERVED_12	: buffer       bit;
	  RESERVED_13	: buffer       bit;
	  RESERVED_14	: buffer       bit;
	  RESERVED_15	: buffer       bit;
	  RESERVED_16	: buffer       bit;
	  RESERVED_17	: buffer       bit;
	  RESERVED_18	: buffer       bit;
	  RESERVED_19	: buffer       bit;
	  RESERVED_20	: buffer       bit;
	  RESERVED_21	: buffer       bit;
	  RESERVED_22	: buffer       bit;
	  RESERVED_23	: linkage      bit;
	  RESERVED_24	: buffer       bit;
	  RESERVED_25	: buffer       bit;
	  RESERVED_26	: buffer       bit;
	  RESERVED_27	: buffer       bit;
	  RESERVED_28	: buffer       bit;
	  RESERVED_29	: buffer       bit;
	  RESERVED_30	: buffer       bit;
	  RESERVED_31	: buffer       bit;
	  RESERVED_32	: buffer       bit;
	  RESERVED_33	: buffer       bit;
	  RESERVED_34	: buffer       bit;
	  RESERVED_35	: linkage      bit;
	  RESERVED_36	: buffer       bit;
	  RESERVED_37	: buffer       bit;
          RESETn        : in           bit; 
          SCANEN        : in           bit;
          SPDSELA       : in           bit;
          SPDSELB       : in           bit; 
 	  SPDSELC       : in           bit;
          SPDSELD       : in           bit; 
	  TRGCLKCp      : in           bit; 
          TRGCLKDp      : in           bit; 
          TCLK          : in           bit;
          TDI           : in           bit;
          TMEN          : in           bit; 
          TMS           : in           bit;
          TRSTn         : in           bit;
          TXCLKA        : in           bit;
          TXCLKB        : in           bit;
          ULCCn         : in           bit; 
          ULCDn         : in           bit; 
          ADDR          : in           bit_vector (0 to 3);
          DATA          : in           bit_vector (0 to 6);
          TXDA          : in           bit_vector (0 to 9);
          TXDB          : in           bit_vector (0 to 9);
          TDO           : out          bit;
	  BISTSTC	: buffer       bit; 
	  BISTSTD       : buffer       bit; 
          LFICn         : buffer       bit;
          LFIDn         : buffer       bit;
          RECLKOC       : buffer       bit;
          RECLKOD       : buffer       bit; 
	  REPDOC	: buffer       bit; 
	  REPDOD	: buffer       bit; 
  	  RXCLKCp       : buffer       bit; 
          RXCLKDp       : buffer       bit; 
          TXCLKOA       : buffer       bit;
          TXCLKOB       : buffer       bit;
          TXERRA        : buffer       bit;
          TXERRB        : buffer       bit;
          RXDC          : buffer       bit_vector (0 to 9); 
          RXDD          : buffer       bit_vector (0 to 9); 
          NC            : linkage      bit;
          TOUTA1n       : linkage      bit;
          TOUTA1p       : linkage      bit;
          TOUTA2n       : linkage      bit;
          TOUTA2p       : linkage      bit;
          TOUTB1n       : linkage      bit;
          TOUTB1p       : linkage      bit;
          TOUTB2n       : linkage      bit;
          TOUTB2p       : linkage      bit;
 	  ROUTC1n       : linkage      bit;
          ROUTC1p       : linkage      bit;
          ROUTC2n       : linkage      bit;
          ROUTC2p       : linkage      bit;
          ROUTD1n       : linkage      bit;
          ROUTD1p       : linkage      bit;
          ROUTD2n       : linkage      bit;
          ROUTD2p       : linkage      bit;
 	  INC1n         : linkage      bit;
          INC1p         : linkage      bit;
          INC2n         : linkage      bit;
          INC2p         : linkage      bit;
          IND1n         : linkage      bit;
          IND1p         : linkage      bit;
          IND2n         : linkage      bit;
          IND2p         : linkage      bit;
	  REFCLKAn	: linkage      bit;
	  REFCLKBn	: linkage      bit;	
          TRGCLKCn      : linkage      bit; 
          TRGCLKDn      : linkage      bit; 
          RXCLKCn       : linkage      bit; 
          RXCLKDn       : linkage      bit; 
          VCC           : linkage      bit_vector(0 to 51);
          GND           : linkage      bit_vector(0 to 46)
   );
   
   use STD_1149_1_1994.all;
   
   attribute COMPONENT_CONFORMANCE of cyv15g0204trb: entity is 
     "STD_1149_1_1993";
   
   attribute PIN_MAP of cyv15g0204trb: entity is PHYSICAL_PIN_MAP;
   
-- This section specifies the pin map for each port. This information is 
-- extracted from the port-to-pin map file that was read in using the 
-- "read_pin_map" command.
   
     constant BL256: PIN_MAP_STRING := 
        "WREN           : G2," &
        "INSELC         : C3," &
        "INSELD         : D3," &
        "LDTDEN         : C17," &
	"REFCLKAp       : W18," &
	"REFCLKBp       : M17," &
        "RESERVED_1     : B11," &
        "RESERVED_2     : B14," &
        "RESERVED_3     : B17," &
        "RESERVED_4     : B19," &
        "RESERVED_5     : C14," &
        "RESERVED_6     : D15," &
        "RESERVED_7     : D17," &
        "RESERVED_8     : F17," &
        "RESERVED_9     : F18," &
        "RESERVED_10    : F20," &
        "RESERVED_11    : G18," &
        "RESERVED_12    : G20," &
        "RESERVED_13    : J17," &
        "RESERVED_14    : J18," &
        "RESERVED_15    : J19," &
        "RESERVED_16    : J20," &
        "RESERVED_17    : K17," &
        "RESERVED_18    : K18," &
        "RESERVED_19    : K19," &
        "RESERVED_20    : K20," &        
	"RESERVED_21    : L17," &
        "RESERVED_22    : L18," &
        "RESERVED_23    : L19," &
        "RESERVED_24    : U17," &
        "RESERVED_25    : U19," &
        "RESERVED_26    : U20," &
        "RESERVED_27    : V17," &
        "RESERVED_28    : V18," &
        "RESERVED_29    : V19," &
        "RESERVED_30    : V20," &
        "RESERVED_31    : W11," &
        "RESERVED_32    : W17," &
        "RESERVED_33    : W19," &
        "RESERVED_34    : W20," &
        "RESERVED_35    : Y12," &
        "RESERVED_36    : Y19," &
        "RESERVED_37    : Y20," &
        "RESETn         : D2," &
        "SCANEN         : D19," &
        "SPDSELA        : G19," &
        "SPDSELB        : G17," &
	"SPDSELC        : D7," &
        "SPDSELD        : C15," &
	"TRGCLKCp       : L2," &
	"TRGCLKDp       : V11," &
        "TCLK           : D1," &
        "TDI            : C1," &
        "TMEN           : D20," &
        "TMS            : C2," &
        "TRSTn          : C18," &
	"TXCLKA	        : Y11," &
	"TXCLKB         : M20," &
        "ULCCn          : C7," &
        "ULCDn          : C6," &
        "ADDR           : (U10, W10, V10, W9)," &
        "DATA           : (C12, D11, C11, D10, C10, D9, C9)," &
        "TXDA	        : (Y14, U12, W14, V14, U14, Y15, W15, V15, U15, U9)," &
	"TXDB           : (R18, R17, P20, P19, P18, P17, L20, R20, U18, R19)," &
	"TDO            : C20," &
        "BISTSTC        : R1," &
	"BISTSTD        : V9," &
	"LFICn          : L3," &
        "LFIDn          : W3," &
        "RECLKOC        : R2," &
	"RECLKOD        : Y9," &
	"REPDOC         : M4," &
	"REPDOD         : Y17," &
	"RXCLKCp        : R3," &
        "RXCLKDp        : Y4," &
	"TXCLKOA        : V12," &
	"TXCLKOB        : F19," &
	"TXERRA         : W12," &
	"TXERRB         : M19," &
        "RXDC           : (P4, P3, P2, P1, K1, L1, M1, M2, F1, F2)," &
        "RXDD           : (W7, V7, Y7, U7, U6, V6, W6, Y6, V4, Y3)," &
        "NC             : Y10," &
 	"TOUTA1n        : A12," &
        "TOUTA1p        : B12," &
        "TOUTA2n        : A15," &
        "TOUTA2p        : B15," &
        "TOUTB1n        : A18," &
        "TOUTB1p        : B18," &
        "TOUTB2n        : A20," &
        "TOUTB2p        : B20," &
        "ROUTC1n        : A2," &
        "ROUTC1p        : B2," &
        "ROUTC2n        : A4," &
        "ROUTC2p        : B4," &
        "ROUTD1n        : A7," &
        "ROUTD1p        : B7," &
        "ROUTD2n        : A10," &
        "ROUTD2p        : B10," &
 	"INC1n          : A1," &
        "INC1p          : B1," &
        "INC2n          : A3," &
        "INC2p          : B3," &
        "IND1n          : A6," &
        "IND1p          : B6," &
        "IND2n          : A9," &
        "IND2p          : B9," &
	"REFCLKAn       : Y18," &
        "REFCLKBn       : M18," &
        "RXCLKCn        : R4," &
        "RXCLKDn        : W4," &
 	"TRGCLKCn       : K2," &
        "TRGCLKDn       : U11," &
        "VCC            : (A19, A17, A16, A5, B16, B5, C16, C5, C4, D18, D16, D6, D5, D4, " &
                         " E20, E19, E18, E17, E4, E3, E2, E1, F4, F3, M3, " & 
                         " T20, T19, T18, T17, T4, T3, T2, T1, " &
                         " U16, U5, U4, U3, U2, U1, V16, V5, V3, V2, V1, " &
			 " W16, W5, W2, W1, Y16, Y5, Y2, Y1)," &
        "GND            : (A14, A13, A11, A8, B13, B8, C19, C13, C8, D14, D13, D12, D8, G4, G3, G1, " &
                         " H20, H19, H18, H17, H4, H3, H2, H1, J4, J3, J2, J1, K4, K3, " &
                         " L4, N20, N19, N18, N17, N4, N3, N2, N1, " &
                         " U13, U8, V13, V8, W13, W8, Y13, Y8)" ;
   
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in 
-- the brackets are:
--        First Field : Maximum  TCK frequency.
--        Second Field: Allowable states TCK may be stopped in.
   
   attribute TAP_SCAN_CLOCK of TCLK : signal is (10.0e6, BOTH);
   attribute TAP_SCAN_IN    of TDI  : signal is true;
   attribute TAP_SCAN_MODE  of TMS  : signal is true;
   attribute TAP_SCAN_OUT   of TDO  : signal is true;
   attribute TAP_SCAN_RESET of TRSTn: signal is true;
   
   
-- Specifies the number of bits in the instruction register.
   
   attribute INSTRUCTION_LENGTH of cyv15g0204trb: entity is 3;
   
-- Specifies the boundary-scan instructions implemented in the design and their 
-- opcodes.
   
   attribute INSTRUCTION_OPCODE of cyv15g0204trb: entity is 
     "BYPASS (111)," &
     "EXTEST (000)," &
     "SAMPLE (001)," &
     "IDCODE (010)," &
     "USER1  (011)";
   
-- Specifies the bit pattern that is loaded into the instruction register when 
-- the TAP controller passes through the Capture-IR state. The standard mandates 
-- that the two LSBs must be "01". The remaining bits are design specific.
   
   attribute INSTRUCTION_CAPTURE of cyv15g0204trb: entity is "001";
   
-- Specifies the bit pattern that is loaded into the DEVICE_ID register during 
-- the IDCODE instruction when the TAP controller passes through the Capture-DR 
-- state.
   
   attribute IDCODE_REGISTER of cyv15g0204trb: entity is 
     "0000" &                  
 -- 4-bit version number
     "1100100000010001" &      
 -- 16-bit part number
     "00000110100" &           
 -- 11-bit identity of the manufacturer
     "1";                      
 -- Required by IEEE Std 1149.1
   
-- This section specifies the test data register placed between TDI and TDO for 
-- each implemented instruction.
   
   attribute REGISTER_ACCESS of cyv15g0204trb: entity is 
        "BYPASS    (BYPASS)," &
        "BOUNDARY  (EXTEST, SAMPLE)," &
        "DEVICE_ID (IDCODE)," &
        "UTDR1[24] (USER1)";
   
-- Specifies the length of the boundary scan register.
   
   attribute BOUNDARY_LENGTH of cyv15g0204trb: entity is 150;
   
-- The following list specifies the characteristics of each cell in the boundary 
-- scan register from TDI to TDO. The following is a description of the label 
-- fields:
--      num     : Is the cell number.
--      cell    : Is the cell type as defined by the standard.
--      port    : Is the design port name. Control cells do not have a port 
--                name.
--      function: Is the function of the cell as defined by the standard. Is one 
--                of input, output2, output3, bidir, control or controlr.
--      safe    : Specifies the value that the BSR cell should be loaded with 
--                for safe operation when the software might otherwise choose a 
--                random value.
--      ccell   : The control cell number. Specifies the control cell that 
--                drives the output enable for this port.
--      disval  : Specifies the value that is loaded into the control cell to 
--                disable the output enable for the corresponding port.
--      rslt    : Resulting state. Shows the state of the driver when it is 
--                disabled.
   
   attribute BOUNDARY_REGISTER of cyv15g0204trb: entity is 
--     
--    num   cell   port           function      safe  [ccell  disval  rslt]
--     
     "149  (BC_4,  DATA(4),       observe_only, X),                        " &
     "148  (BC_4,  DATA(3),       observe_only, X),                        " &
     "147  (BC_4,  DATA(6),       observe_only, X),                        " &
     "146  (BC_4,  DATA(5),       observe_only, X),                        " &
     "145  (BC_4,  ULCCn,         observe_only, X),                        " &
     "144  (BC_4,  SPDSELC,       observe_only, X),                        " &
     "143  (BC_4,  SPDSELC,       observe_only, X),                        " &
     "142  (BC_4,  ULCDn,         observe_only, X),                        " &
     "141  (BC_4,  *,         	  internal,	X),                        " &
     "140  (BC_4,  *,        	  internal, 	X),                        " &
     "139  (BC_4,  *,        	  internal, 	X),                        " &
     "138  (BC_4,  INSELC,        observe_only, X),                        " &
     "137  (BC_4,  INSELD,        observe_only, X),                        " &
     "136  (BC_4,  RESETn,        observe_only, X),                        " &
     "135  (BC_1,  RXDC(8),       output2,      X),                        " &
     "134  (BC_1,  RXDC(9),       output2,      X),                        " &
     "133  (BC_4,  *,       	  internal, 	X),                        " &
     "132  (BC_4,  *,     	  internal, 	X),                        " &
     "131  (BC_4,  *,       	  internal, 	X),                        " &
     "130  (BC_4,  *,       	  internal, 	X),                        " &
     "129  (BC_4,  *,       	  internal, 	X),                        " &
     "128  (BC_4,  WREN,          observe_only, X),                        " &
     "127  (BC_4,  *,       	  internal, 	X),                        " &
     "126  (BC_4,  *,             internal, 	X),                        " &
     "125  (BC_4,  *,       	  internal, 	X),                        " &
     "124  (BC_4,  *,       	  internal, 	X),                        " &
     "123  (BC_4,  *,        	  internal,     X),                        " &
     "122  (BC_4,  *,      	  internal, 	X),                        " &
     "121  (BC_4,  *,      	  internal, 	X),                        " &
     "120  (BC_1,  LFICn,         output2,      X),                        " &
     "119  (BC_4,  TRGCLKCp,      observe_only, X),                        " &
     "118  (BC_4,  *,      	  internal, 	X),                        " &
     "117  (BC_1,  REPDOC,        output2,      X),                        " &
     "116  (BC_1,  RXDC(7),       output2,      X),                        " &
     "115  (BC_1,  RXDC(6),       output2,      X),                        " &
     "114  (BC_1,  RXDC(5),       output2,      X),                        " &
     "113  (BC_1,  RXDC(4),       output2,      X),                        " &
     "112  (BC_1,  RXDC(3),       output2,      X),                        " &
     "111  (BC_1,  RXDC(2),       output2,      X),                        " &
     "110  (BC_1,  RXDC(1),       output2,      X),                        " &
     "109  (BC_1,  RXDC(0),       output2,      X),                        " &
     "108  (BC_1,  BISTSTC,       output2,      X),                        " &
     "107  (BC_1,  RECLKOC,       output2,      X),                        " &
     "106  (BC_1,  RXCLKCp,       output2,      X),                        " &
     "105  (BC_4,  *,       	  internal, 	X),                        " &
     "104  (BC_4,  *,       	  internal, 	X),                        " &
     "103  (BC_4,  *,       	  internal, 	X),                        " &
     "102  (BC_4,  *,       	  internal, 	X),                        " &
     "101  (BC_4,  *,       	  internal, 	X),                        " &
     "100  (BC_4,  *,       	  internal, 	X),                        " &
     "99   (BC_4,  *,       	  internal, 	X),                        " &
     "98   (BC_4,  *,       	  internal, 	X),                        " &
     "97   (BC_4,  *,      	  internal, 	X),                        " &
     "96   (BC_4,  *,      	  internal, 	X),                        " &
     "95   (BC_4,  *,        	  internal, 	X),                        " &
     "94   (BC_1,  LFIDn,         output2,      X),                        " &
     "93   (BC_1,  RXDD(9),       output2,      X),                        " &
     "92   (BC_1,  RXDD(8),       output2,      X),                        " &
     "91   (BC_1,  RXCLKDp,       output2,      X),                        " &
     "90   (BC_1,  RXDD(7),       output2,      X),                        " &
     "89   (BC_1,  RXDD(6),       output2,      X),                        " &
     "88   (BC_1,  RXDD(5),       output2,      X),                        " &
     "87   (BC_1,  RXDD(4),       output2,      X),                        " &
     "86   (BC_1,  RXDD(3),       output2,      X),                        " &
     "85   (BC_1,  RXDD(2),       output2,      X),                        " &
     "84   (BC_1,  RXDD(1),       output2,      X),                        " &
     "83   (BC_1,  RXDD(0),       output2,      X),                        " &
     "82   (BC_1,  BISTSTD,       output2,      X),                        " &
     "81   (BC_4,  TXDA(9),       observe_only, X),                        " &
     "80   (BC_4,  ADDR(3),       observe_only, X),                        " &
     "79   (BC_1,  RECLKOD,       output2,      X),                        " &
     "78   (BC_4,  ADDR(2),       observe_only, X),                        " &
     "77   (BC_4,  ADDR(1),       observe_only, X),                        " &
     "76   (BC_4,  TRGCLKDp,      observe_only, X),                        " &
     "75   (BC_1,  TXERRA,        output2,      X),                        " &
     "74   (BC_4,  ADDR(0),       observe_only, X),                        " &
     "73   (BC_1,  TXCLKOA,       output2,      X),                        " &
     "72   (BC_1,  RESERVED_31,   output2,      X),                        " &
     "71   (BC_4,  TXCLKA,        observe_only, X),                        " &
     "70   (BC_4,  TXDA(0),       observe_only, X),                        " &
     "69   (BC_4,  TXDA(1),       observe_only, X),                        " &
     "68   (BC_4,  TXDA(2),       observe_only, X),                        " &
     "67   (BC_4,  TXDA(3),       observe_only, X),                        " &
     "66   (BC_4,  TXDA(4),       observe_only, X),                        " &
     "65   (BC_4,  TXDA(5),       observe_only, X),                        " &
     "64   (BC_4,  TXDA(6),       observe_only, X),                        " &
     "63   (BC_4,  TXDA(7),       observe_only, X),                        " &
     "62   (BC_4,  TXDA(8),       observe_only, X),                        " &
     "61   (BC_1,  REPDOD,        output2,      X),                        " &
     "60   (BC_4,  REFCLKAp,      observe_only, X),                        " &
     "59   (BC_1,  RESERVED_32,   output2,  	X),                        " &
     "58   (BC_1,  RESERVED_27,   output2,      X),                        " &
     "57   (BC_1,  RESERVED_36,   output2,      X),                        " &
     "56   (BC_1,  RESERVED_37,   output2,      X),                        " &
     "55   (BC_1,  RESERVED_33,   output2,      X),                        " &
     "54   (BC_1,  RESERVED_28,   output2,      X),                        " &
     "53   (BC_1,  RESERVED_24,   output2,      X),                        " &
     "52   (BC_1,  RESERVED_34,   output2,      X),                        " &
     "51   (BC_1,  RESERVED_29,   output2,      X),                        " &
     "50   (BC_4,  TXDB(8),       observe_only, X),                        " &
     "49   (BC_1,  RESERVED_30,   output2,      X),                        " &
     "48   (BC_1,  RESERVED_26,   output2,      X),                        " &
     "47   (BC_1,  RESERVED_25,   output2,      X),                        " &
     "46   (BC_4,  TXDB(7),       observe_only, X),                        " &
     "45   (BC_4,  TXDB(9),       observe_only, X),                        " &
     "44   (BC_4,  TXCLKB,        observe_only, X),                        " &
     "43   (BC_4,  TXDB(0),       observe_only, X),                        " &
     "42   (BC_4,  TXDB(1),       observe_only, X),                        " &
     "41   (BC_4,  TXDB(2),       observe_only, X),                        " &
     "40   (BC_4,  TXDB(3),       observe_only, X),                        " &
     "39   (BC_4,  TXDB(4),       observe_only, X),                        " &
     "38   (BC_4,  TXDB(5),       observe_only, X),                        " &
     "37   (BC_4,  TXDB(6),       observe_only, X),                        " &
     "36   (BC_1,  TXERRB,        output2,      X),                        " &
     "35   (BC_4,  REFCLKBp,      observe_only, X),                        " &
     "34   (BC_1,  RESERVED_22,   output2,      X),                        " &
     "33   (BC_1,  RESERVED_20,   output2,      X),                        " &
     "32   (BC_1,  RESERVED_19,   output2,      X),                        " &
     "31   (BC_1,  RESERVED_21,   output2,      X),                        " &
     "30   (BC_1,  RESERVED_15,   output2,      X),                        " &
     "29   (BC_1,  RESERVED_18,   output2,      X),                        " &
     "28   (BC_1,  RESERVED_17,   output2,      X),                        " &
     "27   (BC_1,  RESERVED_16,   output2,      X),                        " &
     "26   (BC_1,  RESERVED_12,   output2,      X),                        " &
     "25   (BC_1,  RESERVED_14,   output2,      X),                        " &
     "24   (BC_1,  RESERVED_10,   output2,      X),                        " &
     "23   (BC_1,  RESERVED_9,    output2,      X),                        " &
     "22   (BC_1,  RESERVED_13,   output2,      X),                        " &
     "21   (BC_1,  TXCLKOB,       output2,      X),                        " &
     "20   (BC_4,  RESERVED_11,   observe_only, X),                        " &
     "19   (BC_4,  SPDSELB,       observe_only, X),                        " &
     "18   (BC_4,  SPDSELB,       observe_only, X),                        " &
     "17   (BC_4,  RESERVED_8,    observe_only, X),                        " &
     "16   (BC_4,  SPDSELA,       observe_only, X),                        " &
     "15   (BC_4,  SPDSELA,       observe_only, X),                        " &
     "14   (BC_4,  DATA(2),       observe_only, X),                        " &
     "13   (BC_4,  DATA(1),       observe_only, X),                        " &
     "12   (BC_4,  DATA(0),       observe_only, X),                        " &
     "11   (BC_4,  *,       	  internal, 	X),                        " &
     "10   (BC_4,  RESERVED_5,    observe_only, X),                        " &
     "9    (BC_4,  *,         	  internal, 	X),                        " &
     "8    (BC_4,  SPDSELD,       observe_only, X),                        " &
     "7    (BC_4,  SPDSELD,       observe_only, X),                        " &
     "6    (BC_4,  RESERVED_6,    observe_only, X),                        " &
     "5    (BC_4,  LDTDEN,        observe_only, X),                        " &
     "4    (BC_4,  RESERVED_7,    observe_only, X),                        " &
     "3    (BC_4,  *,             internal, 	X),                        " &
     "2    (BC_4,  *,             internal, 	X),                        " &
     "1    (BC_4,  SCANEN,        observe_only, X),                        " &
     "0    (BC_4,  TMEN,          observe_only, X)                         ";
 
 end cyv15g0204trb;