BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: D032P44J

-- BSDL file for the Ultra37032 in the 44-pin PLCC package
-- Initial release 1.0 5/6/99

entity D032P44J is

generic (PHYSICAL_PIN_MAP:string:= "UNDEFINED");

  port (
	JTAGen:in bit;
	TDI	:in bit;
	TCK	:in bit;
	TMS	:in bit;
	TDO	:out bit;

	IO_31	:inout bit;
	IO_30	:inout bit;
	IO_29	:inout bit;
	IO_28	:inout bit;
	IO_26	:inout bit;
	IO_25	:inout bit;
	IO_24	:inout bit;
	IO_23	:inout bit;
	IO_22	:inout bit;
	IO_21	:inout bit;
	IO_20 :inout bit;
	IO_18	:inout bit;
	IO_17	:inout bit;
	IO_16	:inout bit;
	IO_15	:inout bit;
	IO_14	:inout bit;
	IO_12	:inout bit;
	IO_11	:inout bit;
	IO_10	:inout bit;
	IO_9	:inout bit;
	IO_8	:inout bit;
	IO_7	:inout bit;
	IO_6	:inout bit;
	IO_4	:inout bit;
	IO_3	:inout bit;
	IO_2	:inout bit;
	IO_1	:inout bit;
	IO_0	:inout bit;
	INP_4 :in bit;
	INP_3 :in bit;
	INP_2 :in bit;
	INP_1 :in bit;
	INP_0 :in bit;
	GND     :linkage   bit_vector(1 to 4);
	VCCEXT  :linkage   bit;
	VCCINT  :linkage   bit
       );

use STD_1149_1_1994.all;-- needed for attribute compliance patterns
attribute COMPONENT_CONFORMANCE of D032P44J : entity is
            "STD_1149_1_1993";
attribute PIN_MAP of D032P44J:entity is PHYSICAL_PIN_MAP;

constant p84J_package:PIN_MAP_STRING:= 
	"JTAGen	:11	," &
	"TDI		:39	," &
      "TCK 		:7	," &
      "TMS 		:19	," &
      "TDO 		:27	," &
	"IO_31	:43	," &
	"IO_30	:42	," &
	"IO_29	:41	," &
	"IO_28	:40	," &
	"IO_26	:38	," &
	"IO_25	:37	," &
	"IO_24	:36	," &
	"IO_23	:31	," &
	"IO_22	:30	," &
	"IO_21	:29	," &
	"IO_20	:28	," &
	"IO_18	:26	," &
	"IO_17	:25	," &
	"IO_16	:24	," &
	"IO_15	:21	," &
	"IO_14	:20	," &
	"IO_12	:18	," &
	"IO_11	:17	," &
	"IO_10	:16	," &
	"IO_9		:15	," &
	"IO_8		:14	," &
	"IO_7		:9	," &
	"IO_6		:8	," &
	"IO_4		:6	," &
	"IO_3		:5	," &
	"IO_2		:4	," &
	"IO_1		:3	," &
	"IO_0		:2	," &
	"inp_4	:35	," &
	"inp_3	:33	," &
	"inp_2	:32	," &
	"inp_1	:13	," &
	"inp_0	:10	," &
	"GND   	:(12,23,34,1)," &
      "VCCEXT	:44	," &
      "VCCINT	:22	";

attribute TAP_SCAN_IN    of TDI : signal is true;
attribute TAP_SCAN_OUT   of TDO : signal is true;
attribute TAP_SCAN_MODE  of TMS : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (2.0e6, BOTH);

--The compliance_pattern attribute is needed to choose
--the JTAG function from the dual function pins.
attribute compliance_patterns of D032P44J : entity is
	"(JTAGen) (1)";

attribute INSTRUCTION_LENGTH of D032P44J : entity is 6;

attribute INSTRUCTION_OPCODE of D032P44J : entity is
	"BYPASS ( 111111)," &
	"SAMPLE( 000010)," &
	"EXTEST ( 000000)," &
	"IDCODE   ( 000100)," &
	"USERCODEX ( 000111)";

attribute INSTRUCTION_CAPTURE of D032P44J : entity is "000001";

attribute IDCODE_REGISTER of D032P44J : entity is
	"XX00" &			-- version
	"1000000010000010" &	-- part number
	"00000110100" &		-- manufacturer's id
	"1";				-- required by standard

attribute REGISTER_ACCESS of D032P44J : entity is
        "USER_CODE[16] (USERCODEX CAPTURES XXXXXXXXXXXXXXXX)" ;

attribute BOUNDARY_LENGTH of D032P44J : entity is 89;

attribute BOUNDARY_REGISTER of D032P44J : entity is
" 88(BC_4, IO_31, input, X), " &
" 87(BC_1, IO_31, output3,  X,  86, 0, Z), " &
" 86(BC_1, *, control , 0), " &
" 85(BC_4, IO_30, input, X), " &
" 84(BC_1, IO_30, output3,  X,  83, 0, Z), " &
" 83(BC_1, *, control , 0), " &
" 82(BC_4, IO_29, input, X), " &
" 81(BC_1, IO_29, output3,  X,  80, 0, Z), " &
" 80(BC_1, *, control , 0), " &
" 79(BC_4, IO_28, input, X), " &
" 78(BC_1, IO_28, output3,  X,  77, 0, Z), " &
" 77(BC_1, *, control , 0), " &
" 76(BC_4, IO_26, input, X), " &
" 75(BC_1, IO_26, output3,  X,  74, 0, Z), " &
" 74(BC_1, *, control , 0), " &
" 73(BC_4, IO_25, input, X), " &
" 72(BC_1, IO_25, output3,  X,  71, 0, Z), " &
" 71(BC_1, *, control , 0), " &
" 70(BC_4, IO_24, input, X), " &
" 69(BC_1, IO_24, output3,  X,  68, 0, Z), " &
" 68(BC_1, *, control , 0), " &
" 67(BC_4, IO_23, input, X), " &
" 66(BC_1, IO_23, output3,  X,  65, 0, Z), " &
" 65(BC_1, *, control , 0), " &
" 64(BC_4, IO_22, input, X), " &
" 63(BC_1, IO_22, output3,  X,  62, 0, Z), " &
" 62(BC_1, *, control , 0), " &
" 61(BC_4, IO_21, input, X), " &
" 60(BC_1, IO_21, output3,  X,  59, 0, Z), " &
" 59(BC_1, *, control , 0), " &
" 58(BC_4, IO_20, input, X), " &
" 57(BC_1, IO_20, output3,  X,  56, 0, Z), " &
" 56(BC_1, *, control , 0), " &
" 55(BC_4, IO_18, input, X), " &
" 54(BC_1, IO_18, output3,  X,  53, 0, Z), " &
" 53(BC_1, *, control , 0), " &
" 52(BC_4, IO_17, input, X), " &
" 51(BC_1, IO_17, output3,  X,  50, 0, Z), " &
" 50(BC_1, *, control , 0), " &
" 49(BC_4, IO_16, input, X), " &
" 48(BC_1, IO_16, output3,  X,  47, 0, Z), " &
" 47(BC_1, *, control , 0), " &
" 46(BC_4, inp_3, input, X), " &
" 45(BC_4, inp_2, clock, X), " &
" 44(BC_4, inp_1, clock, X), " &
" 43(BC_4, inp_4, clock, X), " &
" 42(BC_4, inp_0, clock, X), " &
" 41(BC_4, IO_15, input, X), " &
" 40(BC_1, IO_15, output3,  X,  39, 0, Z), " &
" 39(BC_1, *, control , 0), " &
" 38(BC_4, IO_14, input, X), " &
" 37(BC_1, IO_14, output3,  X,  36, 0, Z), " &
" 36(BC_1, *, control , 0), " &
" 35(BC_4, IO_12, input, X), " &
" 34(BC_1, IO_12, output3,  X,  33, 0, Z), " &
" 33(BC_1, *, control , 0), " &
" 32(BC_4, IO_11, input, X), " &
" 31(BC_1, IO_11, output3,  X,  30, 0, Z), " &
" 30(BC_1, *, control , 0), " &
" 29(BC_4, IO_10, input, X), " &
" 28(BC_1, IO_10, output3,  X,  27, 0, Z), " &
" 27(BC_1, *, control , 0), " &
" 26(BC_4, IO_9, input, X), " &
" 25(BC_1, IO_9, output3,  X,  24, 0, Z), " &
" 24(BC_1, *, control , 0), " &
" 23(BC_4, IO_8, input, X), " &
" 22(BC_1, IO_8, output3,  X,  21, 0, Z), " &
" 21(BC_1, *, control , 0), " &
" 20(BC_4, IO_7, input, X), " &
" 19(BC_1, IO_7, output3,  X,  18, 0, Z), " &
" 18(BC_1, *, control , 0), " &
" 17(BC_4, IO_6, input, X), " &
" 16(BC_1, IO_6, output3,  X,  15, 0, Z), " &
" 15(BC_1, *, control , 0), " &
" 14(BC_4, IO_4, input, X), " &
" 13(BC_1, IO_4, output3,  X,  12, 0, Z), " &
" 12(BC_1, *, control , 0), " &
" 11(BC_4, IO_3, input, X), " &
" 10(BC_1, IO_3, output3,  X,   9, 0, Z), " &
"  9(BC_1, *, control , 0), " &
"  8(BC_4, IO_2, input, X), " &
"  7(BC_1, IO_2, output3,  X,   6, 0, Z), " &
"  6(BC_1, *, control , 0), " &
"  5(BC_4, IO_1, input, X), " &
"  4(BC_1, IO_1, output3,  X,   3, 0, Z), " &
"  3(BC_1, *, control , 0), " &
"  2(BC_4, IO_0, input, X), " &
"  1(BC_1, IO_0, output3,  X,   0, 0, Z), " &
"  0(BC_1, *, control , 0)";

attribute DESIGN_WARNING of D032P44J: entity is
" The SAMPLE instruction is only to be used in" &
" conjunction with the EXTEST operation." &
" The SAMPLE instruction is non-1149.1 compliant" &
" wrt a logic analyzer(INTEST) capability for" &
" capturing macrocell output and associated output" & 
" enable data on I/O pins. The captured macrocell" &
" data is potentially inverted from the data present" &
" on the I/O pin and the captured output enable data" &
" is always inverted from the output enable signal " &
" controlling the I/O pin. ";

end D032P44J;