BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: M2_5096048P100

-- Advanced Micro Devices MACH221 100 Pin PQFP BSDL description
--
-- Version 1.1, 4/27/1998: Remove HIGHZ JTAG instruction. jkb
--
-- Written By: PLD Apps
-- Date      : January 08, 1997
-- Version   : 1.0
-- 10/08/1998: (Jan Buxton) Moved some instructions from private to public.
-- 03/31/2000 (jkb): updated Copyright comments.

-- ****************************************************************
-- *  Copyright 1999, 2000 Lattice/Vantis Corporation             * 
-- *  995 Stewart Dr. Sunnyvale, Ca 94088                         *
-- *  All rights reserved.  No part of this program or publication*
-- *  may be reproduced, transmitted, transcribed, stored in a    *
-- *  retrieval system, or translated into any language or        *
-- *  computer language, in any form or by any means without this *
-- *  notice appearing within.                                    *
-- ****************************************************************
-- *  Lattice/Vantis makes no warranty for the use of this        *
-- *  product and assumes no responsibility for any errors which  *
-- *  may appear within.  Neither does it make a commitment to    *
-- *  update this information.                                    *
-- ****************************************************************
-- *  This is the template BSDL file to be used for the purpose   *
-- *  of verifying the part's compliance with the IEEE standard   *
-- *  1149.1-1990.                                                *
-- ****************************************************************
--
--  This file has been verified by:
--     Teradyne VICTORY v 2.20
--         - Syntax Check using BSA
--         - Test vector generation using BSA
--
--  This file has NOT been verified by:
--     Hewlett-Packard Boundary-Scan Software
--         - Syntax Check
--
--     Genrad Boundary-Scan Software
--         - Syntax Check
--         - Physical Verification
--
-- ****************************************************************
--  Entity format: Mabcdddeeefggg
--  a = family (1, 2, 4, 5)
--  b = A for "A" type parts
--  c = Vcc level: 5, 3, 2, or 1 for 5.0, 3.3, 2.5, or 1.8 VDC
--  ddd = number of macrocells, such as 064
--  eee = number of I/O pins, such as 032
--  f = package: L, P, T, or B for PLCC, PQFP, TQFP, or BGA
--  ggg = number of pins, such as 044

entity M2_5096048P100 is

	generic(PHYSICAL_PIN_MAP : string := "PQFP_100pin");

	port (
	      DED_IN       : in    bit_vector(0 to  7); --  Clocks/Inputs
	      IO           : inout bit_vector(0 to 47); --  I/O pins

	      TCK, TMS, TDI: in  bit;                   --  JTAG inputs
	      TDO          : out bit;                   --  JTAG outputs

	      NC           : linkage bit_vector(0 to 15);
	      VCC          : linkage bit_vector(0 to  7);
	      GND          : linkage bit_vector(0 to 15)
	     );

	use STD_1149_1_1990.all;  -- get JTAG definitions and attributes

	attribute PIN_MAP of M2_5096048P100 : entity is PHYSICAL_PIN_MAP;

	constant PQFP_100pin :  PIN_MAP_STRING :=
		"DED_IN:(4,13,18,26,54,63,68,76),     " &  --  Clk/Inp Pins
		"IO:( 93, 94, 95, 96, 97, 99,         " &  --  I/O A
		"       6, 8,  9, 10, 11, 12,         " &  --  I/O B
		"     19, 20, 21, 22, 23, 25,         " &  --  I/O C
		"     32, 34, 35, 36, 37, 38,         " &  --  I/O D
		"     43, 44, 45, 46, 47, 49,         " &  --  I/O E
		"     56, 58, 59, 60, 61, 62,         " &  --  I/O F
		"     69, 70, 71, 72, 73, 75,         " &  --  I/O G
		"     82, 84, 85, 86, 87, 88),        " &  --  I/O H
		" TDI:3, TMS:53, TCK:28, TDO:78,      " &  --  JTAG

		"NC :( 5, 7,24,27,31,33,48,50,        " &
		"     55,57,74,77,81,83,98,100),      " &  --  No Connects
		"VCC:(14,15,39,42,64,65,89,92),       " &  --  POWER
		"GND:( 1, 2,16,17,29,30,40,41,        " &
		"     51,52,66,67,79,80,90,91)        ";   --  GROUND PINS

		-- END OF PIN DEFINITION

	attribute TAP_SCAN_IN    of  TDI : signal is true;
	attribute TAP_SCAN_MODE  of  TMS : signal is true;
	attribute TAP_SCAN_OUT   of  TDO : signal is true;
	attribute TAP_SCAN_CLOCK of  TCK : signal is (20.0e6, BOTH);

--  Instruction register definitions

	attribute INSTRUCTION_LENGTH of M2_5096048P100 : entity is 6;
	attribute INSTRUCTION_OPCODE of M2_5096048P100 : entity is
		"BYPASS    (111111)," &
		"EXTEST    (000000)," &
		"SAMPLE    (000010)," &
		"IDCODE    (000001)," &
		"HIGHZ     (010001)," &
		"PRIV003   (000011)," &
		"PRIV004   (000100)," &
		"PRIV005   (000101)," &
		"PRIV006   (000110)," &
		"PRIV007   (000111)," &
		"PRIV008   (001000)," &
		"PRIV00F   (001111)," &
		"PRIVATE (001110,001101,110000,100101," &
			 "100110,100111,101110,110011,110010)";

	attribute INSTRUCTION_CAPTURE of M2_5096048P100 : entity is "000001";
	attribute INSTRUCTION_PRIVATE of M2_5096048P100 : entity is "PRIVATE";

	attribute IDCODE_REGISTER of M2_5096048P100 : entity is
		"0000" &                            -- version number
		"0111000010101000" &                -- part identification
		"00000000001" &                     -- company code
		"1";                                -- mandatory 1

	attribute REGISTER_ACCESS of M2_5096048P100 : entity is
		"BYPASS (BYPASS, HIGHZ, PRIV005, PRIV006, PRIV008)," &
		"BOUNDARY (EXTEST,SAMPLE)," &
		"ROWREG[62](PRIV003)," &
		"COLREG[432](PRIV004, PRIV007)," &
		"PRIVR00F[5](PRIV00F)";

-- **************************************************************
-- *    BOUNDARY SCAN CELL REGISTER DESCRIPTION                 *
-- *    MACH2xx-ISP parts do not have boundary scan cells.      *
-- **************************************************************
	
	attribute BOUNDARY_CELLS of M2_5096048P100  : entity is "BC_3";
	attribute BOUNDARY_LENGTH of M2_5096048P100 : entity is 1;

	attribute BOUNDARY_REGISTER of M2_5096048P100: entity is

		"0 (BC_3,  *, INTERNAL, X)";

end M2_5096048P100;