-- ********************************************************************
-- * CLK5316S_TQFP64 BSDL Model *
-- * File Version: 1.0 *
-- * File Date: 3/22/2007 *
-- * *
-- * Standard Test Access Port and Boundary-Scan Architecture *
-- * VHDL Description File *
-- * *
-- * This BSDL file is created by genBSDL V 2.0 according to: *
-- * - IEEE Standard 1149.1-1994 *
-- * *
-- * This BSDL file has been syntax checked with: *
-- * - Lattice BSDL Syntax Checker *
-- * - Goepel BSDL Syntax Checker *
-- * - Agilent BSDL Syntax Checker *
-- * *
-- * Copyright 2000 - 2004 Lattice Semiconductor Corporation *
-- * 5555 NE Moore Ct., Hillsboro, OR 97124 *
-- * *
-- * All rights reserved. No part of this program or publication *
-- * may be reproduced, transmitted, transcribed, stored in a *
-- * retrieval system, or translated into any language or *
-- * computer language, in any form or by any means without this *
-- * notice appearing within. *
-- ********************************************************************
-- * *
-- * IMPORTANT *
-- * *
-- * The following is a BSDL file that tests all of the I/O pins *
-- * as bi-directional pins. The functionality of the BSCAN register *
-- * for this device is dependent of the pattern programmed into the *
-- * device. If the device is configured to use LVDS pairs or VREF *
-- * signals, an application specific BSDL file is required. *
-- * *
-- * For Further assistance, please contact Tech Support at *
-- * 1-800-LATTICE or techsupport@latticesemi.com *
-- ********************************************************************
-- * *
-- * REVISION HISTORY *
-- * Rev 1.00: *
-- * - Initial version *
-- * *
-- ********************************************************************
entity CLK5316S_TQFP64 is
generic (PHYSICAL_PIN_MAP : string := "tqfp64");
port (
NC : linkage bit_vector(1 to 6);
BANK_0A : out bit;
BANK_0B : out bit;
VCCO_1 : linkage bit;
BANK_1A : out bit;
BANK_1B : out bit;
GNDO_1 : linkage bit;
VCCO_2 : linkage bit;
BANK_2A : out bit;
BANK_2B : out bit;
GNDO_2 : linkage bit;
VCCO_3 : linkage bit;
BANK_3A : out bit;
BANK_3B : out bit;
GNDO_3 : linkage bit;
BANK_4A : out bit;
BANK_4B : out bit;
VCCO_4 : linkage bit;
GNDO_4 : linkage bit;
VTT_REFA : linkage bit;
REFA_REFP : in bit;
REFB_REFN : in bit;
VTT_REFB : linkage bit;
FBK : in bit;
VTT_FBK : linkage bit;
REFSEL : in bit;
RESETB : in bit;
GNDO_5 : linkage bit;
VCCO_5 : linkage bit;
BANK_5B : out bit;
BANK_5A : out bit;
GNDO_6 : linkage bit;
BANK_6B : out bit;
BANK_6A : out bit;
VCCO_6 : linkage bit;
GNDO_7 : linkage bit;
BANK_7B : out bit;
BANK_7A : out bit;
VCCO_7 : linkage bit;
TDO : out bit;
TMS : in bit;
TCK : in bit;
TDI : in bit;
VCCJ : linkage bit;
OEYB : in bit;
OEXB : in bit;
PLL_BYPASS : in bit;
LOCK : out bit;
VCCA : linkage bit;
GNDA : linkage bit;
VCCO_0 : linkage bit;
GNDO_0 : linkage bit;
GNDD : linkage bit_vector (1 to 5);
VCCD : linkage bit_vector (1 to 2));
-- Version Control
use STD_1149_1_2001.all; -- 1149.1-2001 attributes
-- Component Conformance Statement
attribute COMPONENT_CONFORMANCE of CLK5316S_TQFP64 : entity is "STD_1149_1_2001";
-- Device Package Pin Mapping
attribute PIN_MAP of CLK5316S_TQFP64 : entity is PHYSICAL_PIN_MAP;
constant tqfp64 : PIN_MAP_STRING :=
" BANK_0A: 1, " &
" BANK_0B: 2, " &
" VCCO_1: 3, " &
" BANK_1A: 4, " &
" BANK_1B: 5, " &
" GNDO_1: 6, " &
" VCCO_2: 7, " &
" BANK_2A: 8, " &
" BANK_2B: 9, " &
" GNDO_2: 10, " &
" VCCO_3: 11, " &
" BANK_3A: 12, " &
" BANK_3B: 13, " &
" GNDO_3: 14, " &
" VTT_REFA: 19, " &
" REFA_REFP: 20, " &
" REFB_REFN: 21, " &
" VTT_REFB: 22, " &
" FBK: 23, " &
" VTT_FBK: 24, " &
" REFSEL: 25, " &
" RESETB: 26, " &
" GNDO_4: 35, " &
" BANK_4B: 36, " &
" BANK_4A: 37, " &
" VCCO_4: 38, " &
" GNDO_5: 39, " &
" BANK_5B: 40, " &
" BANK_5A: 41, " &
" VCCO_5: 42, " &
" GNDO_6: 43, " &
" BANK_6B: 44, " &
" BANK_6A: 45, " &
" VCCO_6: 46, " &
" BANK_7B: 47, " &
" BANK_7A: 48, " &
" GNDO_7: 49, " &
" VCCO_7: 50, " &
" TDO: 51, " &
" TMS: 52, " &
" TCK: 53, " &
" TDI: 54, " &
" VCCJ: 55, " &
" OEYB: 56, " &
" OEXB: 57, " &
" PLL_BYPASS: 58, " &
" LOCK: 59, " &
" VCCA: 60, " &
" GNDA: 61, " &
" VCCO_0: 63, " &
" GNDO_0: 64, " &
" GNDD: ( 18, " &
" 29, " &
" 30, " &
" 31, " &
" 62), " &
" VCCD: ( 27, " &
" 28)," &
" NC: ( 15, " &
" 16, " &
" 17, " &
" 32, " &
" 33, " &
" 34) ";
-- End of pin mapping
-- Grouped port mapping and definition
-- attribute PORT_GROUPING of CLK5316S_TQFP64 : entity is
-- "DIFFERENTIAL_CURRENT ( " &
-- End of grouped port mapping
-- TAP definition and characteristics
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (25.0e6, BOTH);
-- Instruction register description
attribute INSTRUCTION_LENGTH of CLK5316S_TQFP64 : entity is 8;
attribute INSTRUCTION_OPCODE of CLK5316S_TQFP64 : entity is
"LSC_PROGRAM_USERCODE (00011010)," &
" ISC_ADDRESS_SHIFT (00000001)," &
" ISC_NOOP (00110000)," &
" IDCODE (00010110)," &
" ISC_PROGRAM (00000111)," &
"ISC_PROGRAM_SECURITY (00001001)," &
" PRELOAD (00011100)," &
" ISC_ENABLE (00010101)," &
" SAMPLE (00011100)," &
" ISC_READ (00101010)," &
" INTEST (00101100)," &
" ISC_PROGRAM_DONE (00101111)," &
" HIGHZ (00011000)," &
" BYPASS (11111111)," &
" ISC_DATA_SHIFT (00000010)," &
" ISC_DISCHARGE (00010100)," &
" ISC_DISABLE (00011110)," &
" ISC_ADDRESS_INIT (00100001)," &
"LSC_USER_LOGIC_RESET (00100010)," &
" USERCODE (00010111)," &
" ISC_ERASE (00000011)," &
" ISC_ERASE_DONE (00100100)," &
" CLAMP (00100000)," &
" EXTEST (00000000)";
attribute INSTRUCTION_CAPTURE of CLK5316S_TQFP64 : entity is
"00011X01";
--IDCODE and USERCODE register definition
attribute IDCODE_REGISTER of CLK5316S_TQFP64 : entity is
"0000" & --Version number
"0000000101110110" & --Device specific number
"000001000011"; --Company code
attribute USERCODE_REGISTER of CLK5316S_TQFP64 : entity is
"11111111111111111111111111111111";
attribute REGISTER_ACCESS of CLK5316S_TQFP64 : entity is
"BYPASS (BYPASS, " &
" HIGHZ, " &
" CLAMP), " &
"ISC_DEFAULT[1] (ISC_ENABLE, " &
" ISC_DISABLE, " &
" ISC_NOOP, " &
" ISC_ADDRESS_INIT, " &
" ISC_ERASE, " &
" ISC_DISCHARGE, " &
" ISC_PROGRAM_SECURITY, " &
" ISC_PROGRAM_DONE, " &
" ISC_ERASE_DONE, " &
" LSC_USER_LOGIC_RESET), " &
"ISC_ADDRESS[10] (ISC_ADDRESS_SHIFT), " &
"ISC_DATA[61] (ISC_DATA_SHIFT), " &
"BOUNDARY (SAMPLE, " &
" PRELOAD, " &
" EXTEST, " &
" INTEST), " &
"DEVICE_ID (IDCODE, " &
" USERCODE, " &
" LSC_PROGRAM_USERCODE), " &
"ISC_PDATA[61] (ISC_PROGRAM, " &
" ISC_READ)";
-- *****************************************************************
-- Boundary Scan Register Description, Cell 0 is the closest to TDO
-- *****************************************************************
attribute BOUNDARY_LENGTH of CLK5316S_TQFP64 : entity is 50;
attribute BOUNDARY_REGISTER of CLK5316S_TQFP64 : entity is
"49 (BC_1, BANK_7A, output3, X, 48, 0, Z), " &
"48 (BC_1, *, control, 0), " &
"47 (BC_1, BANK_7B, output3, X, 46, 0, Z), " &
"46 (BC_1, *, control, 0), " &
"45 (BC_1, BANK_6A, output3, X, 44, 0, Z), " &
"44 (BC_1, *, control, 0), " &
"43 (BC_1, BANK_6B, output3, X, 42, 0, Z), " &
"42 (BC_1, *, control, 0), " &
"41 (BC_1, BANK_5A, output3, X, 40, 0, Z), " &
"40 (BC_1, *, control, 0), " &
"39 (BC_1, BANK_5B, output3, X, 38, 0, Z), " &
"38 (BC_1, *, control, 0), " &
"37 (BC_1, BANK_4A, output3, X, 36, 0, Z), " &
"36 (BC_1, *, control, 0), " &
"35 (BC_1, BANK_4B, output3, X, 34, 0, Z), " &
"34 (BC_1, *, control, 0), " &
"33 (BC_1, *, internal, 0), " &
"32 (BC_1, *, internal, 0), " &
"31 (BC_1, *, internal, 0), " &
"30 (BC_1, *, internal, 0), " &
"29 (BC_2, RESETB, input, X), " &
"28 (BC_2, REFSEL, input, X), " &
"27 (BC_2, FBK, input, X), " &
"26 (BC_2, REFB_REFN, input, X), " &
"25 (BC_2, REFA_REFP, input, X), " &
"24 (BC_1, *, internal, 0), " &
"23 (BC_1, *, internal, 0), " &
"22 (BC_1, *, internal, 0), " &
"21 (BC_1, *, internal, 0), " &
"20 (BC_1, BANK_3B, output3, X, 19, 0, Z), " &
"19 (BC_1, *, control, 0), " &
"18 (BC_1, BANK_3A, output3, X, 17, 0, Z), " &
"17 (BC_1, *, control, 0), " &
"16 (BC_1, BANK_2B, output3, X, 15, 0, Z), " &
"15 (BC_1, *, control, 0), " &
"14 (BC_1, BANK_2A, output3, X, 13, 0, Z), " &
"13 (BC_1, *, control, 0), " &
"12 (BC_1, BANK_1B, output3, X, 11, 0, Z), " &
"11 (BC_1, *, control, 0), " &
"10 (BC_1, BANK_1A, output3, X, 9, 0, Z), " &
"9 (BC_1, *, control, 0), " &
"8 (BC_1, BANK_0B, output3, X, 7, 0, Z), " &
"7 (BC_1, *, control, 0), " &
"6 (BC_1, BANK_0A, output3, X, 5, 0, Z), " &
"5 (BC_1, *, control, 0), " &
"4 (BC_1, LOCK, output3, X, 3, 0, Z), " &
"3 (BC_1, *, control, 0), " &
"2 (BC_2, PLL_BYPASS, input, X), " &
"1 (BC_2, OEXB, input, X), " &
"0 (BC_2, OEYB, input, X)";
end CLK5316S_TQFP64;