-- *****************************************************************************
-- BSDL file for design SAMA5D3
-- Created by Synopsys Version E-2010.12-SP1 (Jan 17, 2011)
-- Designer:
-- Company:
-- Date: Tue Dec 13 10:41:34 2011
-- *****************************************************************************
entity SAMA5D3 is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "R_LFBGA324_A_262X239");
-- This section declares all the ports in the design.
port (
JTAGSEL : in bit;
TST : in bit;
BMS : in bit;
NANDRDY : in bit;
NTRST : in bit;
TCK : in bit;
TDI : in bit;
TMS : in bit;
WKUP : in bit;
NCS3 : inout bit;
NRD : inout bit;
NRST : inout bit;
NWE_NWR0 : inout bit;
D : inout bit_vector (0 to 15);
DDR_D : inout bit_vector (0 to 31);
DDR_DQS : inout bit_vector (0 to 3);
DDR_DQSN : inout bit_vector (0 to 3);
PA : inout bit_vector (0 to 31);
PB : inout bit_vector (0 to 31);
PC : inout bit_vector (0 to 31);
PD : inout bit_vector (0 to 31);
PE : inout bit_vector (0 to 31);
DDR_CLK : out bit;
DDR_CLKN : out bit;
TDO : out bit;
DDR_A : out bit_vector (0 to 13);
DDR_CAS : buffer bit;
DDR_CKE : buffer bit;
DDR_CS : buffer bit;
DDR_RAS : buffer bit;
DDR_WE : buffer bit;
SHDN : buffer bit;
DDR_BA : buffer bit_vector (0 to 2);
DDR_DQM : buffer bit_vector (0 to 3);
ADVREFP : linkage bit;
DDR_CALN : linkage bit;
DDR_CALP : linkage bit;
DDR_VREF : linkage bit;
DIBN : linkage bit;
DIBP : linkage bit;
GNDANA : linkage bit;
GNDBU : linkage bit;
GNDFUSE : linkage bit;
GNDOSC : linkage bit;
GNDPLL : linkage bit;
GNDUTMI : linkage bit;
HHSDMA : linkage bit;
HHSDMB : linkage bit;
HHSDMC : linkage bit;
HHSDPA : linkage bit;
HHSDPB : linkage bit;
HHSDPC : linkage bit;
VBG : linkage bit;
VDDANA : linkage bit;
VDDBU : linkage bit;
VDDFUSE : linkage bit;
VDDOSC : linkage bit;
VDDPLLA : linkage bit;
VDDUTMIC : linkage bit;
VDDUTMII : linkage bit;
XIN : linkage bit;
XIN32 : linkage bit;
XOUT : linkage bit;
XOUT32 : linkage bit;
VDDIOP0 : linkage bit_vector (1 to 2);
GNDCORE : linkage bit_vector (1 to 6);
GNDIODDR : linkage bit_vector (1 to 5);
GNDIOM : linkage bit_vector (1 to 2);
GNDIOP : linkage bit_vector (1 to 4);
VDDCORE : linkage bit_vector (1 to 7);
VDDIODDR : linkage bit_vector (1 to 5);
VDDIOM : linkage bit_vector (1 to 2);
VDDIOP1 : linkage bit_vector (1 to 2)
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of SAMA5D3: entity is "STD_1149_1_1993";
attribute PIN_MAP of SAMA5D3: entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information is
-- extracted from the port-to-pin map file that was read in using the
-- "read_pin_map" command.
constant R_LFBGA324_A_262X239: PIN_MAP_STRING :=
"BMS : U9," &
"NANDRDY : L18," &
"NTRST : P11," &
"TCK : P9," &
"TDI : R8," &
"TMS : N10," &
"WKUP : T10," &
"DDR_CLK : B12," &
"NCS3 : L12," &
"NRD : L17," &
"NRST : V9," &
"NWE_NWR0 : K11," &
"D : (K12, K15, K14, K16, K13, K17, J12, K18, J14, " &
"J16, J13, J17, J15, J18, H16, H18)," &
"DDR_D : (H12, H17, H13, G17, G16, H15, F17, G15, F16, " &
"E17, G14, E16, D17, C18, D16, C17, B16, B18, C15, A18, C16, C14, " &
"D15, B14, A15, A14, E12, A11, B11, F12, A10, E11)," &
"DDR_DQS : (E18, G18, B17, B13)," &
"DDR_DQSN : (D18, F18, A17, A13)," &
"PA : (E3, F5, D2, F4, D1, J10, G4, J9, F3, J8, E2, K8" &
", F2, G6, E1, H5, H3, H6, H4, H7, H2, J6, G2, J5, F1, J4, G3, J3, " &
"G1, K4, H1, K3)," &
"PB : (T2, N7, T3, N6, P5, T4, R4, U1, R5, P3, R6, V3" &
", P6, V1, R7, U3, P7, V2, V5, T6, N8, U4, M7, U5, M8, T5, N9, V4, " &
"M9, P8, M10, R9)," &
"PC : (D8, A4, E8, A3, A2, F8, B3, G8, B4, F7, A1, D7" &
", C6, E7, B2, F6, B1, E6, C3, D6, C4, D5, C2, G9, C1, H10, H9, D4, " &
"H8, G5, D3, E4)," &
"PD : (K5, P1, K6, R1, L7, P2, L8, R2, K7, U2, K9, M5" &
", K10, N4, L9, N3, L10, N5, M6, T1, N2, M3, M2, L3, M1, N1, L1, L2" &
", K1, K2, J1, J2)," &
"PE : (P13, R14, R13, V18, P14, U18, T18, R15, P17, " &
"P15, P18, R16, N16, R17, N17, R18, N18, P16, M18, N15, M15, N14, " &
"M17, M13, M16, N12, M14, M12, L13, L15, L14, L16)," &
"DDR_CLKN : A12," &
"SHDN : T12," &
"TDO : M11," &
"DDR_A : (B10, C11, A9, D11, B9, E10, D10, A8, C10, B8, " &
"F11, A7, D9, A6)," &
"DDR_CAS : A5," &
"DDR_CKE : B7," &
"DDR_CS : C8," &
"DDR_RAS : G11," &
"DDR_WE : B5," &
"DDR_BA : (E9, B6, F9)," &
"DDR_DQM : (G12, E15, B15, D12)," &
"ADVREFP : L5," &
"DDR_CALN : C12," &
"DDR_CALP : E13," &
"DDR_VREF : C13," &
"DIBN : U6," &
"DIBP : V6," &
"GNDANA : L4," &
"GNDBU : T13," &
"GNDFUSE : P4," &
"GNDOSC : T11," &
"GNDPLL : P10," &
"GNDUTMI : R12," &
"HHSDMA : V10," &
"HHSDMB : V12," &
"HHSDMC : V14," &
"HHSDPA : U10," &
"HHSDPB : U12," &
"HHSDPC : U14," &
"JTAGSEL : T9," &
"TST : U15," &
"VBG : R11," &
"VDDANA : L6," &
"VDDBU : V15," &
"VDDFUSE : R3," &
"VDDIOP0 : (V11, G7)," &
"VDDOSC : U11," &
"VDDPLLA : R10," &
"VDDUTMIC : V13," &
"VDDUTMII : U13," &
"XIN : U8," &
"XIN32 : U16," &
"XOUT : V8," &
"XOUT32 : V16," &
"GNDCORE : (A16, C9, N13, T8, T14, V17)," &
"GNDIODDR : (E14, F10, F13, F15, H14)," &
"GNDIOM : (J11, T17)," &
"GNDIOP : (E5, J7, N11, U7)," &
"VDDCORE : (C5, C7, D14, T7, T15, U17, V7)," &
"VDDIODDR : (D13, F14, G10, G13, H11)," &
"VDDIOM : (P12, T16)," &
"VDDIOP1 : (L11, M4)" ;
-- This section specifies the differential IO port groupings.
attribute PORT_GROUPING of SAMA5D3: entity is
"Differential_Voltage ( " &
"(DDR_CLK,DDR_CLKN)," &
"(DDR_DQS(0),DDR_DQSN(0))," &
"(DDR_DQS(1),DDR_DQSN(1))," &
"(DDR_DQS(2),DDR_DQSN(2))," &
"(DDR_DQS(3),DDR_DQSN(3)))";
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in
-- the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be sSAMA5D3ped in.
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of NTRST: signal is true;
-- Specifies the compliance enable patterns for the design. It lists a set of
-- design ports and the values that they should be set to, in order to enable
-- compliance to IEEE Std 1149.1
attribute COMPLIANCE_PATTERNS of SAMA5D3: entity is
"(JTAGSEL, TST) (10)";
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of SAMA5D3: entity is 4;
-- Specifies the boundary-scan instructions implemented in the design and their
-- opcodes.
attribute INSTRUCTION_OPCODE of SAMA5D3: entity is
"BYPASS (1111, 0100, 1100, 0101, 1101, 0110, 1110, 0111, 1000, 1001, " &
"1011)," &
"EXTEST (0000)," &
"SAMPLE (0011)," &
"INTEST (0001)," &
"IDCODE (0010)," &
"RUNBIST (1010)";
-- Specifies the bit pattern that is loaded into the instruction register when
-- the TAP controller passes through the Capture-IR state. The standard mandates
-- that the two LSBs must be "01". The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of SAMA5D3: entity is "0001";
-- Specifies the bit pattern that is loaded into the DEVICE_ID register during
-- the IDCODE instruction when the TAP controller passes through the Capture-DR
-- state.
attribute IDCODE_REGISTER of SAMA5D3: entity is
"0000" &
-- 4-bit version number
"0101101100110001" &
-- 16-bit part number
"00000011111" &
-- 11-bit identity of the manufacturer
"1";
-- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI and TDO for
-- each implemented instruction.
attribute REGISTER_ACCESS of SAMA5D3: entity is
"BYPASS (BYPASS)," &
"BOUNDARY (EXTEST, SAMPLE, INTEST)," &
"DEVICE_ID (IDCODE)," &
"UTDR1[28] (RUNBIST)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of SAMA5D3: entity is 482;
-- The following list specifies the characteristics of each cell in the boundary
-- scan register from TDI to TDO. The following is a description of the label
-- fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not have a port
-- name.
-- function: Is the function of the cell as defined by the standard. Is one
-- of input, output2, output3, bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be loaded with
-- for safe operation when the software might otherwise choose a
-- random value.
-- ccell : The control cell number. Specifies the control cell that
-- drives the output enable for this port.
-- disval : Specifies the value that is loaded into the control cell to
-- disable the output enable for the corresponding port.
-- rslt : Resulting state. Shows the state of the driver when it is
-- disabled.
attribute BOUNDARY_REGISTER of SAMA5D3: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"481 (BC_1, *, control, 1), " &
"480 (BC_7, PA(14), bidir, X, 481, 1, Z), " &
"479 (BC_1, *, control, 1), " &
"478 (BC_7, PA(15), bidir, X, 479, 1, Z), " &
"477 (BC_1, *, control, 1), " &
"476 (BC_7, PA(16), bidir, X, 477, 1, Z), " &
"475 (BC_1, *, control, 1), " &
"474 (BC_7, PA(17), bidir, X, 475, 1, Z), " &
"473 (BC_1, *, control, 1), " &
"472 (BC_7, PA(18), bidir, X, 473, 1, Z), " &
"471 (BC_1, *, control, 1), " &
"470 (BC_7, PA(19), bidir, X, 471, 1, Z), " &
"469 (BC_1, *, control, 1), " &
"468 (BC_7, PA(20), bidir, X, 469, 1, Z), " &
"467 (BC_1, *, control, 1), " &
"466 (BC_7, PA(21), bidir, X, 467, 1, Z), " &
"465 (BC_1, *, control, 1), " &
"464 (BC_7, PA(22), bidir, X, 465, 1, Z), " &
"463 (BC_1, *, control, 1), " &
"462 (BC_7, PA(23), bidir, X, 463, 1, Z), " &
"461 (BC_1, *, control, 1), " &
"460 (BC_7, PA(24), bidir, X, 461, 1, Z), " &
"459 (BC_1, *, control, 1), " &
"458 (BC_7, PA(25), bidir, X, 459, 1, Z), " &
"457 (BC_1, *, control, 1), " &
"456 (BC_7, PA(26), bidir, X, 457, 1, Z), " &
"455 (BC_1, *, control, 1), " &
"454 (BC_7, PA(27), bidir, X, 455, 1, Z), " &
"453 (BC_1, *, control, 1), " &
"452 (BC_7, PA(28), bidir, X, 453, 1, Z), " &
"451 (BC_1, *, control, 1), " &
"450 (BC_7, PA(29), bidir, X, 451, 1, Z), " &
"449 (BC_1, *, control, 1), " &
"448 (BC_7, PA(30), bidir, X, 449, 1, Z), " &
"447 (BC_1, *, control, 1), " &
"446 (BC_7, PA(31), bidir, X, 447, 1, Z), " &
"445 (BC_1, *, control, 1), " &
"444 (BC_7, PC(0), bidir, X, 445, 1, Z), " &
"443 (BC_1, *, control, 1), " &
"442 (BC_7, PC(1), bidir, X, 443, 1, Z), " &
"441 (BC_1, *, control, 1), " &
"440 (BC_7, PC(2), bidir, X, 441, 1, Z), " &
"439 (BC_1, *, control, 1), " &
"438 (BC_7, PC(3), bidir, X, 439, 1, Z), " &
"437 (BC_1, *, control, 1), " &
"436 (BC_7, PC(4), bidir, X, 437, 1, Z), " &
"435 (BC_1, *, control, 1), " &
"434 (BC_7, PC(5), bidir, X, 435, 1, Z), " &
"433 (BC_1, *, control, 1), " &
"432 (BC_7, PC(6), bidir, X, 433, 1, Z), " &
"431 (BC_1, *, control, 1), " &
"430 (BC_7, PC(7), bidir, X, 431, 1, Z), " &
"429 (BC_1, *, control, 1), " &
"428 (BC_7, PC(8), bidir, X, 429, 1, Z), " &
"427 (BC_1, *, control, 1), " &
"426 (BC_7, PC(9), bidir, X, 427, 1, Z), " &
"425 (BC_1, *, control, 1), " &
"424 (BC_7, PC(10), bidir, X, 425, 1, Z), " &
"423 (BC_1, *, control, 1), " &
"422 (BC_7, PC(11), bidir, X, 423, 1, Z), " &
"421 (BC_1, *, control, 1), " &
"420 (BC_7, PC(12), bidir, X, 421, 1, Z), " &
"419 (BC_1, *, control, 1), " &
"418 (BC_7, PC(13), bidir, X, 419, 1, Z), " &
"417 (BC_1, *, control, 1), " &
"416 (BC_7, PC(14), bidir, X, 417, 1, Z), " &
"415 (BC_1, *, control, 1), " &
"414 (BC_7, PC(15), bidir, X, 415, 1, Z), " &
"413 (BC_1, *, control, 1), " &
"412 (BC_7, PC(16), bidir, X, 413, 1, Z), " &
"411 (BC_1, *, control, 1), " &
"410 (BC_7, PC(17), bidir, X, 411, 1, Z), " &
"409 (BC_1, *, control, 1), " &
"408 (BC_7, PC(18), bidir, X, 409, 1, Z), " &
"407 (BC_1, *, control, 1), " &
"406 (BC_7, PC(19), bidir, X, 407, 1, Z), " &
"405 (BC_1, *, control, 1), " &
"404 (BC_7, PC(20), bidir, X, 405, 1, Z), " &
"403 (BC_1, *, control, 1), " &
"402 (BC_7, PC(21), bidir, X, 403, 1, Z), " &
"401 (BC_1, *, control, 1), " &
"400 (BC_7, PC(22), bidir, X, 401, 1, Z), " &
"399 (BC_1, *, control, 1), " &
"398 (BC_7, PC(23), bidir, X, 399, 1, Z), " &
"397 (BC_1, *, control, 1), " &
"396 (BC_7, PC(24), bidir, X, 397, 1, Z), " &
"395 (BC_1, *, control, 1), " &
"394 (BC_7, PC(25), bidir, X, 395, 1, Z), " &
"393 (BC_1, *, control, 1), " &
"392 (BC_7, PC(26), bidir, X, 393, 1, Z), " &
"391 (BC_1, *, control, 1), " &
"390 (BC_7, PC(27), bidir, X, 391, 1, Z), " &
"389 (BC_1, *, control, 1), " &
"388 (BC_7, PC(28), bidir, X, 389, 1, Z), " &
"387 (BC_1, *, control, 1), " &
"386 (BC_7, PC(29), bidir, X, 387, 1, Z), " &
"385 (BC_1, *, control, 1), " &
"384 (BC_7, PC(30), bidir, X, 385, 1, Z), " &
"383 (BC_1, *, control, 1), " &
"382 (BC_7, PC(31), bidir, X, 383, 1, Z), " &
"381 (BC_2, BMS, input, X), " &
"380 (BC_1, *, control, 1), " &
"379 (BC_7, NRST, bidir, X, 380, 1, Z), " &
"378 (BC_2, *, internal, X), " &
"377 (BC_2, *, internal, X), " &
"376 (BC_2, *, internal, X), " &
"375 (BC_2, *, internal, X), " &
"374 (BC_2, WKUP, input, X), " &
"373 (BC_1, SHDN, output2, X), " &
"372 (BC_1, DDR_BA(0), output2, X), " &
"371 (BC_1, DDR_BA(1), output2, X), " &
"370 (BC_1, DDR_BA(2), output2, X), " &
"369 (BC_1, *, control, 1), " &
"368 (BC_7, DDR_D(16), bidir, X, 369, 1, Z), " &
"367 (BC_1, *, control, 1), " &
"366 (BC_7, DDR_D(17), bidir, X, 367, 1, Z), " &
"365 (BC_1, *, control, 1), " &
"364 (BC_7, DDR_D(18), bidir, X, 365, 1, Z), " &
"363 (BC_1, *, control, 1), " &
"362 (BC_7, DDR_D(19), bidir, X, 363, 1, Z), " &
"361 (BC_1, DDR_DQM(2), output2, X), " &
"360 (BC_1, *, control, 1), " &
"359 (BC_7, DDR_D(20), bidir, X, 360, 1, Z), " &
"358 (BC_1, *, control, 1), " &
"357 (BC_7, DDR_D(21), bidir, X, 358, 1, Z), " &
"356 (BC_1, *, control, 1), " &
"355 (BC_7, DDR_D(22), bidir, X, 356, 1, Z), " &
"354 (BC_1, *, control, 1), " &
"353 (BC_7, DDR_D(23), bidir, X, 354, 1, Z), " &
"352 (BC_1, *, control, 1), " &
"351 (BC_7, DDR_D(24), bidir, X, 352, 1, Z), " &
"350 (BC_1, *, control, 1), " &
"349 (BC_7, DDR_D(25), bidir, X, 350, 1, Z), " &
"348 (BC_1, *, control, 1), " &
"347 (BC_7, DDR_D(26), bidir, X, 348, 1, Z), " &
"346 (BC_1, *, control, 1), " &
"345 (BC_7, DDR_D(27), bidir, X, 346, 1, Z), " &
"344 (BC_1, DDR_DQM(3), output2, X), " &
"343 (BC_1, *, control, 1), " &
"342 (BC_7, DDR_D(28), bidir, X, 343, 1, Z), " &
"341 (BC_1, *, control, 1), " &
"340 (BC_7, DDR_D(29), bidir, X, 341, 1, Z), " &
"339 (BC_1, *, control, 1), " &
"338 (BC_7, DDR_D(30), bidir, X, 339, 1, Z), " &
"337 (BC_1, *, control, 1), " &
"336 (BC_7, DDR_D(31), bidir, X, 337, 1, Z), " &
"335 (BC_1, DDR_CKE, output2, X), " &
"334 (BC_1, DDR_CS, output2, X), " &
"333 (BC_1, DDR_WE, output2, X), " &
"332 (BC_1, DDR_RAS, output2, X), " &
"331 (BC_1, DDR_CAS, output2, X), " &
"330 (BC_1, *, control, 1), " &
"329 (BC_7, DDR_DQS(2), bidir, X, 330, 1, Z), " &
"328 (BC_1, *, control, 1), " &
"327 (BC_7, DDR_DQS(3), bidir, X, 328, 1, Z), " &
"326 (BC_1, *, control, 1), " &
"325 (BC_1, DDR_CLK, output3, X, 326, 1, Z), " &
"324 (BC_1, *, control, 1), " &
"323 (BC_7, DDR_DQS(0), bidir, X, 324, 1, Z), " &
"322 (BC_1, *, control, 1), " &
"321 (BC_7, DDR_DQS(1), bidir, X, 322, 1, Z), " &
"320 (BC_1, *, control, 1), " &
"319 (BC_7, DDR_D(0), bidir, X, 320, 1, Z), " &
"318 (BC_1, *, control, 1), " &
"317 (BC_7, DDR_D(1), bidir, X, 318, 1, Z), " &
"316 (BC_1, *, control, 1), " &
"315 (BC_7, DDR_D(2), bidir, X, 316, 1, Z), " &
"314 (BC_1, *, control, 1), " &
"313 (BC_7, DDR_D(3), bidir, X, 314, 1, Z), " &
"312 (BC_1, DDR_DQM(0), output2, X), " &
"311 (BC_1, *, control, 1), " &
"310 (BC_7, DDR_D(4), bidir, X, 311, 1, Z), " &
"309 (BC_1, *, control, 1), " &
"308 (BC_7, DDR_D(5), bidir, X, 309, 1, Z), " &
"307 (BC_1, *, control, 1), " &
"306 (BC_7, DDR_D(6), bidir, X, 307, 1, Z), " &
"305 (BC_1, *, control, 1), " &
"304 (BC_7, DDR_D(7), bidir, X, 305, 1, Z), " &
"303 (BC_1, *, control, 1), " &
"302 (BC_7, DDR_D(8), bidir, X, 303, 1, Z), " &
"301 (BC_1, *, control, 1), " &
"300 (BC_7, DDR_D(9), bidir, X, 301, 1, Z), " &
"299 (BC_1, *, control, 1), " &
"298 (BC_7, DDR_D(10), bidir, X, 299, 1, Z), " &
"297 (BC_1, *, control, 1), " &
"296 (BC_7, DDR_D(11), bidir, X, 297, 1, Z), " &
"295 (BC_1, DDR_DQM(1), output2, X), " &
"294 (BC_1, *, control, 1), " &
"293 (BC_7, DDR_D(12), bidir, X, 294, 1, Z), " &
"292 (BC_1, *, control, 1), " &
"291 (BC_7, DDR_D(13), bidir, X, 292, 1, Z), " &
"290 (BC_1, *, control, 1), " &
"289 (BC_7, DDR_D(14), bidir, X, 290, 1, Z), " &
"288 (BC_1, *, control, 1), " &
"287 (BC_7, DDR_D(15), bidir, X, 288, 1, Z), " &
"286 (BC_1, *, control, 1), " &
"285 (BC_1, DDR_A(0), output3, X, 286, 1, Z), " &
"284 (BC_1, *, control, 1), " &
"283 (BC_1, DDR_A(1), output3, X, 284, 1, Z), " &
"282 (BC_1, *, control, 1), " &
"281 (BC_1, DDR_A(2), output3, X, 282, 1, Z), " &
"280 (BC_1, *, control, 1), " &
"279 (BC_1, DDR_A(3), output3, X, 280, 1, Z), " &
"278 (BC_1, *, control, 1), " &
"277 (BC_1, DDR_A(4), output3, X, 278, 1, Z), " &
"276 (BC_1, *, control, 1), " &
"275 (BC_1, DDR_A(5), output3, X, 276, 1, Z), " &
"274 (BC_1, *, control, 1), " &
"273 (BC_1, DDR_A(6), output3, X, 274, 1, Z), " &
"272 (BC_1, *, control, 1), " &
"271 (BC_1, DDR_A(7), output3, X, 272, 1, Z), " &
"270 (BC_1, *, control, 1), " &
"269 (BC_1, DDR_A(8), output3, X, 270, 1, Z), " &
"268 (BC_1, *, control, 1), " &
"267 (BC_1, DDR_A(9), output3, X, 268, 1, Z), " &
"266 (BC_1, *, control, 1), " &
"265 (BC_1, DDR_A(10), output3, X, 266, 1, Z), " &
"264 (BC_1, *, control, 1), " &
"263 (BC_1, DDR_A(11), output3, X, 264, 1, Z), " &
"262 (BC_1, *, control, 1), " &
"261 (BC_1, DDR_A(12), output3, X, 262, 1, Z), " &
"260 (BC_1, *, control, 1), " &
"259 (BC_1, DDR_A(13), output3, X, 260, 1, Z), " &
"258 (BC_1, *, control, 1), " &
"257 (BC_7, PE(0), bidir, X, 258, 1, Z), " &
"256 (BC_1, *, control, 1), " &
"255 (BC_7, PE(1), bidir, X, 256, 1, Z), " &
"254 (BC_1, *, control, 1), " &
"253 (BC_7, PE(2), bidir, X, 254, 1, Z), " &
"252 (BC_1, *, control, 1), " &
"251 (BC_7, PE(3), bidir, X, 252, 1, Z), " &
"250 (BC_1, *, control, 1), " &
"249 (BC_7, PE(4), bidir, X, 250, 1, Z), " &
"248 (BC_1, *, control, 1), " &
"247 (BC_7, PE(5), bidir, X, 248, 1, Z), " &
"246 (BC_1, *, control, 1), " &
"245 (BC_7, PE(6), bidir, X, 246, 1, Z), " &
"244 (BC_1, *, control, 1), " &
"243 (BC_7, PE(7), bidir, X, 244, 1, Z), " &
"242 (BC_1, *, control, 1), " &
"241 (BC_7, PE(8), bidir, X, 242, 1, Z), " &
"240 (BC_1, *, control, 1), " &
"239 (BC_7, PE(9), bidir, X, 240, 1, Z), " &
"238 (BC_1, *, control, 1), " &
"237 (BC_7, PE(10), bidir, X, 238, 1, Z), " &
"236 (BC_1, *, control, 1), " &
"235 (BC_7, PE(11), bidir, X, 236, 1, Z), " &
"234 (BC_1, *, control, 1), " &
"233 (BC_7, PE(12), bidir, X, 234, 1, Z), " &
"232 (BC_1, *, control, 1), " &
"231 (BC_7, PE(13), bidir, X, 232, 1, Z), " &
"230 (BC_1, *, control, 1), " &
"229 (BC_7, PE(14), bidir, X, 230, 1, Z), " &
"228 (BC_1, *, control, 1), " &
"227 (BC_7, PE(15), bidir, X, 228, 1, Z), " &
"226 (BC_1, *, control, 1), " &
"225 (BC_7, PE(16), bidir, X, 226, 1, Z), " &
"224 (BC_1, *, control, 1), " &
"223 (BC_7, PE(17), bidir, X, 224, 1, Z), " &
"222 (BC_1, *, control, 1), " &
"221 (BC_7, PE(18), bidir, X, 222, 1, Z), " &
"220 (BC_1, *, control, 1), " &
"219 (BC_7, PE(19), bidir, X, 220, 1, Z), " &
"218 (BC_1, *, control, 1), " &
"217 (BC_7, PE(20), bidir, X, 218, 1, Z), " &
"216 (BC_1, *, control, 1), " &
"215 (BC_7, PE(21), bidir, X, 216, 1, Z), " &
"214 (BC_1, *, control, 1), " &
"213 (BC_7, PE(22), bidir, X, 214, 1, Z), " &
"212 (BC_1, *, control, 1), " &
"211 (BC_7, PE(23), bidir, X, 212, 1, Z), " &
"210 (BC_1, *, control, 1), " &
"209 (BC_7, PE(24), bidir, X, 210, 1, Z), " &
"208 (BC_1, *, control, 1), " &
"207 (BC_7, PE(25), bidir, X, 208, 1, Z), " &
"206 (BC_1, *, control, 1), " &
"205 (BC_7, PE(26), bidir, X, 206, 1, Z), " &
"204 (BC_1, *, control, 1), " &
"203 (BC_7, PE(27), bidir, X, 204, 1, Z), " &
"202 (BC_1, *, control, 1), " &
"201 (BC_7, PE(28), bidir, X, 202, 1, Z), " &
"200 (BC_1, *, control, 1), " &
"199 (BC_7, PE(29), bidir, X, 200, 1, Z), " &
"198 (BC_1, *, control, 1), " &
"197 (BC_7, PE(30), bidir, X, 198, 1, Z), " &
"196 (BC_1, *, control, 1), " &
"195 (BC_7, PE(31), bidir, X, 196, 1, Z), " &
"194 (BC_1, *, control, 1), " &
"193 (BC_7, NCS3, bidir, X, 194, 1, Z), " &
"192 (BC_1, *, control, 1), " &
"191 (BC_7, NRD, bidir, X, 192, 1, Z), " &
"190 (BC_1, *, control, 1), " &
"189 (BC_7, NWE_NWR0, bidir, X, 190, 1, Z), " &
"188 (BC_2, NANDRDY, input, X), " &
"187 (BC_1, *, control, 1), " &
"186 (BC_7, D(0), bidir, X, 187, 1, Z), " &
"185 (BC_1, *, control, 1), " &
"184 (BC_7, D(1), bidir, X, 185, 1, Z), " &
"183 (BC_1, *, control, 1), " &
"182 (BC_7, D(2), bidir, X, 183, 1, Z), " &
"181 (BC_1, *, control, 1), " &
"180 (BC_7, D(3), bidir, X, 181, 1, Z), " &
"179 (BC_1, *, control, 1), " &
"178 (BC_7, D(4), bidir, X, 179, 1, Z), " &
"177 (BC_1, *, control, 1), " &
"176 (BC_7, D(5), bidir, X, 177, 1, Z), " &
"175 (BC_1, *, control, 1), " &
"174 (BC_7, D(6), bidir, X, 175, 1, Z), " &
"173 (BC_1, *, control, 1), " &
"172 (BC_7, D(7), bidir, X, 173, 1, Z), " &
"171 (BC_1, *, control, 1), " &
"170 (BC_7, D(8), bidir, X, 171, 1, Z), " &
"169 (BC_1, *, control, 1), " &
"168 (BC_7, D(9), bidir, X, 169, 1, Z), " &
"167 (BC_1, *, control, 1), " &
"166 (BC_7, D(10), bidir, X, 167, 1, Z), " &
"165 (BC_1, *, control, 1), " &
"164 (BC_7, D(11), bidir, X, 165, 1, Z), " &
"163 (BC_1, *, control, 1), " &
"162 (BC_7, D(12), bidir, X, 163, 1, Z), " &
"161 (BC_1, *, control, 1), " &
"160 (BC_7, D(13), bidir, X, 161, 1, Z), " &
"159 (BC_1, *, control, 1), " &
"158 (BC_7, D(14), bidir, X, 159, 1, Z), " &
"157 (BC_1, *, control, 1), " &
"156 (BC_7, D(15), bidir, X, 157, 1, Z), " &
"155 (BC_1, *, control, 1), " &
"154 (BC_7, PB(0), bidir, X, 155, 1, Z), " &
"153 (BC_1, *, control, 1), " &
"152 (BC_7, PB(1), bidir, X, 153, 1, Z), " &
"151 (BC_1, *, control, 1), " &
"150 (BC_7, PB(2), bidir, X, 151, 1, Z), " &
"149 (BC_1, *, control, 1), " &
"148 (BC_7, PB(3), bidir, X, 149, 1, Z), " &
"147 (BC_1, *, control, 1), " &
"146 (BC_7, PB(4), bidir, X, 147, 1, Z), " &
"145 (BC_1, *, control, 1), " &
"144 (BC_7, PB(5), bidir, X, 145, 1, Z), " &
"143 (BC_1, *, control, 1), " &
"142 (BC_7, PB(6), bidir, X, 143, 1, Z), " &
"141 (BC_1, *, control, 1), " &
"140 (BC_7, PB(7), bidir, X, 141, 1, Z), " &
"139 (BC_1, *, control, 1), " &
"138 (BC_7, PB(8), bidir, X, 139, 1, Z), " &
"137 (BC_1, *, control, 1), " &
"136 (BC_7, PB(9), bidir, X, 137, 1, Z), " &
"135 (BC_1, *, control, 1), " &
"134 (BC_7, PB(10), bidir, X, 135, 1, Z), " &
"133 (BC_1, *, control, 1), " &
"132 (BC_7, PB(11), bidir, X, 133, 1, Z), " &
"131 (BC_1, *, control, 1), " &
"130 (BC_7, PB(12), bidir, X, 131, 1, Z), " &
"129 (BC_1, *, control, 1), " &
"128 (BC_7, PB(13), bidir, X, 129, 1, Z), " &
"127 (BC_1, *, control, 1), " &
"126 (BC_7, PB(14), bidir, X, 127, 1, Z), " &
"125 (BC_1, *, control, 1), " &
"124 (BC_7, PB(15), bidir, X, 125, 1, Z), " &
"123 (BC_1, *, control, 1), " &
"122 (BC_7, PB(16), bidir, X, 123, 1, Z), " &
"121 (BC_1, *, control, 1), " &
"120 (BC_7, PB(17), bidir, X, 121, 1, Z), " &
"119 (BC_1, *, control, 1), " &
"118 (BC_7, PB(18), bidir, X, 119, 1, Z), " &
"117 (BC_1, *, control, 1), " &
"116 (BC_7, PB(19), bidir, X, 117, 1, Z), " &
"115 (BC_1, *, control, 1), " &
"114 (BC_7, PB(20), bidir, X, 115, 1, Z), " &
"113 (BC_1, *, control, 1), " &
"112 (BC_7, PB(21), bidir, X, 113, 1, Z), " &
"111 (BC_1, *, control, 1), " &
"110 (BC_7, PB(22), bidir, X, 111, 1, Z), " &
"109 (BC_1, *, control, 1), " &
"108 (BC_7, PB(23), bidir, X, 109, 1, Z), " &
"107 (BC_1, *, control, 1), " &
"106 (BC_7, PB(24), bidir, X, 107, 1, Z), " &
"105 (BC_1, *, control, 1), " &
"104 (BC_7, PB(25), bidir, X, 105, 1, Z), " &
"103 (BC_1, *, control, 1), " &
"102 (BC_7, PB(26), bidir, X, 103, 1, Z), " &
"101 (BC_1, *, control, 1), " &
"100 (BC_7, PB(27), bidir, X, 101, 1, Z), " &
"99 (BC_1, *, control, 1), " &
"98 (BC_7, PB(28), bidir, X, 99, 1, Z), " &
"97 (BC_1, *, control, 1), " &
"96 (BC_7, PB(29), bidir, X, 97, 1, Z), " &
"95 (BC_1, *, control, 1), " &
"94 (BC_7, PB(30), bidir, X, 95, 1, Z), " &
"93 (BC_1, *, control, 1), " &
"92 (BC_7, PB(31), bidir, X, 93, 1, Z), " &
"91 (BC_1, *, control, 1), " &
"90 (BC_7, PD(0), bidir, X, 91, 1, Z), " &
"89 (BC_1, *, control, 1), " &
"88 (BC_7, PD(1), bidir, X, 89, 1, Z), " &
"87 (BC_1, *, control, 1), " &
"86 (BC_7, PD(2), bidir, X, 87, 1, Z), " &
"85 (BC_1, *, control, 1), " &
"84 (BC_7, PD(3), bidir, X, 85, 1, Z), " &
"83 (BC_1, *, control, 1), " &
"82 (BC_7, PD(4), bidir, X, 83, 1, Z), " &
"81 (BC_1, *, control, 1), " &
"80 (BC_7, PD(5), bidir, X, 81, 1, Z), " &
"79 (BC_1, *, control, 1), " &
"78 (BC_7, PD(6), bidir, X, 79, 1, Z), " &
"77 (BC_1, *, control, 1), " &
"76 (BC_7, PD(7), bidir, X, 77, 1, Z), " &
"75 (BC_1, *, control, 1), " &
"74 (BC_7, PD(8), bidir, X, 75, 1, Z), " &
"73 (BC_1, *, control, 1), " &
"72 (BC_7, PD(9), bidir, X, 73, 1, Z), " &
"71 (BC_1, *, control, 1), " &
"70 (BC_7, PD(10), bidir, X, 71, 1, Z), " &
"69 (BC_1, *, control, 1), " &
"68 (BC_7, PD(11), bidir, X, 69, 1, Z), " &
"67 (BC_1, *, control, 1), " &
"66 (BC_7, PD(12), bidir, X, 67, 1, Z), " &
"65 (BC_1, *, control, 1), " &
"64 (BC_7, PD(13), bidir, X, 65, 1, Z), " &
"63 (BC_1, *, control, 1), " &
"62 (BC_7, PD(14), bidir, X, 63, 1, Z), " &
"61 (BC_1, *, control, 1), " &
"60 (BC_7, PD(15), bidir, X, 61, 1, Z), " &
"59 (BC_1, *, control, 1), " &
"58 (BC_7, PD(16), bidir, X, 59, 1, Z), " &
"57 (BC_1, *, control, 1), " &
"56 (BC_7, PD(17), bidir, X, 57, 1, Z), " &
"55 (BC_1, *, control, 1), " &
"54 (BC_7, PD(18), bidir, X, 55, 1, Z), " &
"53 (BC_1, *, control, 1), " &
"52 (BC_7, PD(19), bidir, X, 53, 1, Z), " &
"51 (BC_1, *, control, 1), " &
"50 (BC_7, PD(20), bidir, X, 51, 1, Z), " &
"49 (BC_1, *, control, 1), " &
"48 (BC_7, PD(21), bidir, X, 49, 1, Z), " &
"47 (BC_1, *, control, 1), " &
"46 (BC_7, PD(22), bidir, X, 47, 1, Z), " &
"45 (BC_1, *, control, 1), " &
"44 (BC_7, PD(23), bidir, X, 45, 1, Z), " &
"43 (BC_1, *, control, 1), " &
"42 (BC_7, PD(24), bidir, X, 43, 1, Z), " &
"41 (BC_1, *, control, 1), " &
"40 (BC_7, PD(25), bidir, X, 41, 1, Z), " &
"39 (BC_1, *, control, 1), " &
"38 (BC_7, PD(26), bidir, X, 39, 1, Z), " &
"37 (BC_1, *, control, 1), " &
"36 (BC_7, PD(27), bidir, X, 37, 1, Z), " &
"35 (BC_1, *, control, 1), " &
"34 (BC_7, PD(28), bidir, X, 35, 1, Z), " &
"33 (BC_1, *, control, 1), " &
"32 (BC_7, PD(29), bidir, X, 33, 1, Z), " &
"31 (BC_1, *, control, 1), " &
"30 (BC_7, PD(30), bidir, X, 31, 1, Z), " &
"29 (BC_1, *, control, 1), " &
"28 (BC_7, PD(31), bidir, X, 29, 1, Z), " &
"27 (BC_1, *, control, 1), " &
"26 (BC_7, PA(0), bidir, X, 27, 1, Z), " &
"25 (BC_1, *, control, 1), " &
"24 (BC_7, PA(1), bidir, X, 25, 1, Z), " &
"23 (BC_1, *, control, 1), " &
"22 (BC_7, PA(2), bidir, X, 23, 1, Z), " &
"21 (BC_1, *, control, 1), " &
"20 (BC_7, PA(3), bidir, X, 21, 1, Z), " &
"19 (BC_1, *, control, 1), " &
"18 (BC_7, PA(4), bidir, X, 19, 1, Z), " &
"17 (BC_1, *, control, 1), " &
"16 (BC_7, PA(5), bidir, X, 17, 1, Z), " &
"15 (BC_1, *, control, 1), " &
"14 (BC_7, PA(6), bidir, X, 15, 1, Z), " &
"13 (BC_1, *, control, 1), " &
"12 (BC_7, PA(7), bidir, X, 13, 1, Z), " &
"11 (BC_1, *, control, 1), " &
"10 (BC_7, PA(8), bidir, X, 11, 1, Z), " &
"9 (BC_1, *, control, 1), " &
"8 (BC_7, PA(9), bidir, X, 9, 1, Z), " &
"7 (BC_1, *, control, 1), " &
"6 (BC_7, PA(10), bidir, X, 7, 1, Z), " &
"5 (BC_1, *, control, 1), " &
"4 (BC_7, PA(11), bidir, X, 5, 1, Z), " &
"3 (BC_1, *, control, 1), " &
"2 (BC_7, PA(12), bidir, X, 3, 1, Z), " &
"1 (BC_1, *, control, 1), " &
"0 (BC_7, PA(13), bidir, X, 1, 1, Z) ";
-- Specifies the INSTRUCTION_OUTPUT_CONDITIONING.
attribute INSTRUCTION_OUTPUT_CONDITIONING : bsdl_extension;
attribute INSTRUCTION_OUTPUT_CONDITIONING of SAMA5D3: entity is
"BOUNDARY (INTEST, RUNBIST)";
end SAMA5D3;