BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: ispPAC_POWR607_XXN32

-- ********************************************************************
-- * ispPAC-POWR607 BSDL Model                                        *
-- * File Version:      1.00                                          *
-- * File Date:         01/31/07                                      *
-- *                                                                  *
-- * Standard Test Access Port and Boundary-Scan Architecture         *
-- * VHDL Description File                                            *
-- *                                                                  *
-- * This BSDL file is created by ispBDF v3.1 according to:           *
-- * - IEEE 1149.1 1994 spec.                                         *
-- *                                                                  *
-- * This BSDL has been validated for syntax and semantics            *
-- * compliance to IEEE 1149.1 using:                                 *
-- * - Lattice BSDL Syntax Checker                                    *
-- * - Goepel BSDL Syntax Checker V3.0.1                              *
-- * - ASSET/Agilent BSDL Validation Service                          *
-- * - JTAG Technologies BSDL Syntax Checker                          *
-- *                                                                  *
-- *  Copyright 2000 - 2007                                           *
-- *  Lattice Semiconductor Corporation                               *
-- *  5555 NE Moore Ct.                                               *
-- *  Hillsboro, OR 97124                                             *
-- *                                                                  *
-- *  All rights reserved.  No part of this program or publication    *
-- *  may be reproduced, transmitted, transcribed, stored in a        *
-- *  retrieval system, or translated into any language or            *
-- *  computer language, in any form or by any means without this     *
-- *  notice appearing within.                                        *
-- ********************************************************************
-- *                                                                  *
-- *                           IMPORTANT                              *
-- *                                                                  *
-- * This device does not include a BSCAN register and does not       *
-- * directly support pin continuity testing.  The BSDL file is       *
-- * is provided to define the devices in a scan chain where the      *
-- * Instruction Register and Bypass instruction must be known.       *
-- *                                                                  *
-- * The Die-Pad for this device does not need to be grounded.        *
-- *                                                                  *
-- * For Further assistance, please contact Tech Support at           *
-- *       1-800-LATTICE or techsupport@latticesemi.com               *
-- ********************************************************************
-- *                                                                  *
-- *                          REVISION HISTORY                        *
-- *                                                                  *
-- * Rev 1.00: 01/31/07                                               *
-- *  - Initial version                                               *
-- *                                                                  *
-- ********************************************************************

-- The Overall Structure of the Entity Description
entity ispPAC_POWR607_XXN32 is

-- Generic Parameter Statement
generic (PHYSICAL_PIN_MAP : string := "QFN_32");
-- Logical Port Description Statement
port (
      NC: linkage bit_vector(0 to 7);              --No Connect Pins
      VCC: linkage bit_vector(0 to 1);
      IN1_PWRDN: linkage bit;
      IN2: linkage bit;
      IN_OUT3: linkage bit;
      IN_OUT4: linkage bit;
      IN_OUT5: linkage bit;
      IN_OUT6: linkage bit;
      IN_OUT7: linkage bit;
      HVOUT1: linkage bit;
      HVOUT2: linkage bit;
      VCCJ: linkage bit;
      TCK: in bit;
      GND: linkage bit_vector(0 to 1);
      TDO: out bit;
      TDI: in bit;
      TMS: in bit;
      VMON1: linkage bit;
      VMON2: linkage bit;
      VMON3: linkage bit;
      VMON4: linkage bit;
      VMON5: linkage bit;
      VMON6: linkage bit
);

-- Version Control
use STD_1149_1_1994.all;              -- 1149.1-1994 attributes

-- Component Conformance Statement
attribute COMPONENT_CONFORMANCE of ispPAC_POWR607_XXN32 : entity is
"STD_1149_1_1993";

-- Device Package Pin Mapping
attribute PIN_MAP of ispPAC_POWR607_XXN32 : entity is PHYSICAL_PIN_MAP;

constant QFN_32 : PIN_MAP_STRING :=

      "NC: (1, 8, 9, 16, 17, "&          --No Connect
      "      24, 25, 32 ), "&            --No Connect
      "VCC: (4, 21),"&                      
      "IN1_PWRDN: 29,"&                      
      "IN2: 28,"&                      
      "IN_OUT3: 27,"&                      
      "IN_OUT4: 26,"&                      
      "IN_OUT5: 23,"&                      
      "IN_OUT6: 22,"&                      
      "IN_OUT7: 20,"&                      
      "HVOUT1: 30,"&                      
      "HVOUT2: 31,"&                      
      "VCCJ: 13,"&                      
      "TCK: 15,"&                         
      "GND: (11, 12),"&                      
      "TDO: 14,"&                      
      "TDI: 18,"&                      
      "TMS: 19,"&                      
      "VMON1: 2,"&                      
      "VMON2: 3,"&                      
      "VMON3: 5,"&                      
      "VMON4: 6,"&                      
      "VMON5: 7,"&                      
      "VMON6: 10";                      

-- Scan Port Identification

      attribute TAP_SCAN_CLOCK of TCK : Signal is (1.0e6, BOTH);
      attribute TAP_SCAN_IN of TDI : Signal is True;
      attribute TAP_SCAN_OUT of TDO : Signal is True;
      attribute TAP_SCAN_MODE of TMS : Signal is True;

-- Instruction Register Description

   attribute INSTRUCTION_LENGTH of ispPAC_POWR607_XXN32 : entity is 8;
   attribute INSTRUCTION_OPCODE of ispPAC_POWR607_XXN32 : entity is

-- 1149.1 instructions
      "BYPASS              (11111111),"&
      "SAMPLE              (00011100),"&
      "EXTEST              (00000000),"&
      "IDCODE              (00010110),"&
      "HIGHZ               (00011000)";

    attribute INSTRUCTION_CAPTURE of ispPAC_POWR607_XXN32 : entity is
     "00011101";

-- IDCODE Definition
      attribute IDCODE_REGISTER of ispPAC_POWR607_XXN32 : entity is
      "0000"&          -- version number
      "0000000101000111"&          -- part identification
      "00000100001"&          -- company code
      "1";          -- mandatory

-- Register Access Description
      attribute REGISTER_ACCESS of ispPAC_POWR607_XXN32 : entity is
      "BYPASS           (BYPASS, "&
      "                 HIGHZ),"&
      "BOUNDARY         (SAMPLE, "&
      "                 EXTEST),"&
      "DEVICE_ID        (IDCODE)";

-- *****************************************************************
-- Boundary Scan Register Description, Cell 0 is the closest to TDO
-- *****************************************************************
      attribute BOUNDARY_LENGTH of ispPAC_POWR607_XXN32 : entity is 1;
      attribute BOUNDARY_REGISTER of ispPAC_POWR607_XXN32 : entity is

      --num cell  port  function  safe  [ccell  disval  rslt]
      "0 (BC_1,   *, INTERNAL, 0           )";

end ispPAC_POWR607_XXN32;