--------------------------------------------------------------------------------
-- Freescale Boundary Scan Description Language --
--------------------------------------------------------------------------------
-- Boundary Scan Description Language (IEEE 1149.1b) --
-- --
-- Device : MPC8315 Revision 1.2 --
-- File Version : A --
-- File Name : MPC8315.R1A --
-- File created : july 2, 2008 --
-- Package type : TEPBGA-II 620 pins --
-- Voltage Level : 1V --
--------------------------------------------------------------------------------
-- Revision History: --
-- A - Original version --
-- --
-- NOTE: The IEEE 1149.1 standard optional instructions HIGHZ, --
-- IDCODE, and CLAMP are supported. --
-- --
-- NOTE: RXA/RXB pins are non-complaint with IEEE 1149.1 Standard --
-- --
-- Description --
-- ------------ --
-- RXA/RXA_B and RXB/RXB_B differential pin pairs cannot reliably sample--
-- correct values on the pins as per IEEE 1149.1 standard. To prevent --
-- false fail, these pins have been marked as linkage pins in the BSDL --
-- and the assciated BSR marked as internal. --
-- --
-- NOTE: For assistance with this file, contact your sales office. --
-- --
-- --
--------------------------------------------------------------------------------
-- --
--------------------------------------------------------------------------------
-- --
--============================================================================--
-- IMPORTANT NOTICE --
-- This information is provided on an AS IS basis and without warranty. --
-- IN NO EVENT SHALL FREESCALE BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL --
-- DAMAGES ARISING FROM USE OF THIS INFORMATION. THIS DISCLAIMER OF --
-- WARRANTY EXTENDS TO THE USER OF THE INFORMATION, AND TO THEIR CUSTOMERS --
-- OR USERS OF PRODUCTS AND IS IN LIEU OF ALL WARRANTIES WHETHER EXPRESS, --
-- IMPLIED, OR STATUTORY, INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY --
-- OR FITNESS FOR PARTICULAR PURPOSE. --
-- --
-- FREESCALE does not represent or warrant that the information furnished --
-- hereunder is free of infringement of any third party patents, --
-- copyrights, trade secrets, or other intellectual property rights. --
-- --
-- FREESCALE does not represent or warrant that the information is free of --
-- defect, or that it meets any particular standard, requirements or need --
-- of the user of the infomation or their customers. --
-- --
-- FREESCALE reserves the right to change the information in this file --
-- without notice. The BSDL files are also available at: --
-- --
-- http://www.freescale.com --
-- --
--============================================================================--
entity MPC8315 is
generic (PHYSICAL_PIN_MAP : string := "PBGA");
-- PORT DESCRIPTION TERMS
-- in = input only
-- out = three-state output (0, Z, 1)
-- buffer = two-state output (0, 1)
-- inout = bidirectional
-- linkage = OTHER (vdd, vss, analog)
--
-- bit = single pin
-- bit_vector = group of pins with suffix 0 to n
port (
CFG_CLKIN_DIV_B: inout bit;
DMA_DACK_B0: inout bit;
DMA_DONE0: inout bit;
DMA_DREQ_B0: inout bit;
EXT_PWR_CTRL: buffer bit;
GPIO_0: inout bit;
GPIO_1: inout bit;
GPIO_2: inout bit;
GPIO_3: inout bit;
GPIO_4: inout bit;
GPIO_5: inout bit;
GPIO_6: inout bit;
GPIO_7: inout bit;
GPIO_8: inout bit;
GPIO_9: inout bit;
GPIO_10: inout bit;
GPIO_11: inout bit;
HRESET_B: inout bit;
IIC_SCL: inout bit;
IIC_SDA: inout bit;
IRQ_B0_MCP_IN_B: inout bit;
IRQ_B1: inout bit;
IRQ_B2: inout bit;
IRQ_B3: inout bit;
IRQ_B4: inout bit;
IRQ_B5: inout bit;
IRQ_B6: inout bit;
IRQ_B7: inout bit;
LA16: buffer bit;
LA17: buffer bit;
LA18: buffer bit;
LA19: buffer bit;
LA20: buffer bit;
LA21: buffer bit;
LA22: buffer bit;
LA23: buffer bit;
LA24: buffer bit;
LA25: buffer bit;
LAD0: inout bit;
LAD1: inout bit;
LAD2: inout bit;
LAD3: inout bit;
LAD4: inout bit;
LAD5: inout bit;
LAD6: inout bit;
LAD7: inout bit;
LAD8: inout bit;
LAD9: inout bit;
LAD10: inout bit;
LAD11: inout bit;
LAD12: inout bit;
LAD13: inout bit;
LAD14: inout bit;
LAD15: inout bit;
LALE: buffer bit;
LBCTL: buffer bit;
LCLK0: buffer bit;
LCLK1: buffer bit;
LCS_B0: buffer bit;
LCS_B1: buffer bit;
LCS_B2: buffer bit;
LCS_B3: buffer bit;
LGPL0: buffer bit;
LGPL1: buffer bit;
LGPL2: buffer bit;
LGPL3: buffer bit;
LGPL4: inout bit;
LGPL5: buffer bit;
LWE_B0: buffer bit;
LWE_B1: buffer bit;
M66EN: inout bit;
MCP_OUT_B: out bit;
MEMC_MA0: out bit;
MEMC_MA1: out bit;
MEMC_MA2: out bit;
MEMC_MA3: out bit;
MEMC_MA4: out bit;
MEMC_MA5: out bit;
MEMC_MA6: out bit;
MEMC_MA7: out bit;
MEMC_MA8: out bit;
MEMC_MA9: out bit;
MEMC_MA10: out bit;
MEMC_MA11: out bit;
MEMC_MA12: out bit;
MEMC_MA13: out bit;
MEMC_MA14: out bit;
MEMC_MBA0: out bit;
MEMC_MBA1: out bit;
MEMC_MBA2: out bit;
MEMC_MCAS_B: out bit;
MEMC_MCK0: buffer bit;
MEMC_MCK1: buffer bit;
MEMC_MCKE: buffer bit;
MEMC_MCK_B0: buffer bit;
MEMC_MCK_B1: buffer bit;
MEMC_MCS_B0: out bit;
MEMC_MCS_B1: out bit;
MEMC_MDM0: out bit;
MEMC_MDM1: out bit;
MEMC_MDM2: out bit;
MEMC_MDM3: out bit;
MEMC_MDQ0: inout bit;
MEMC_MDQ1: inout bit;
MEMC_MDQ2: inout bit;
MEMC_MDQ3: inout bit;
MEMC_MDQ4: inout bit;
MEMC_MDQ5: inout bit;
MEMC_MDQ6: inout bit;
MEMC_MDQ7: inout bit;
MEMC_MDQ8: inout bit;
MEMC_MDQ9: inout bit;
MEMC_MDQ10: inout bit;
MEMC_MDQ11: inout bit;
MEMC_MDQ12: inout bit;
MEMC_MDQ13: inout bit;
MEMC_MDQ14: inout bit;
MEMC_MDQ15: inout bit;
MEMC_MDQ16: inout bit;
MEMC_MDQ17: inout bit;
MEMC_MDQ18: inout bit;
MEMC_MDQ19: inout bit;
MEMC_MDQ20: inout bit;
MEMC_MDQ21: inout bit;
MEMC_MDQ22: inout bit;
MEMC_MDQ23: inout bit;
MEMC_MDQ24: inout bit;
MEMC_MDQ25: inout bit;
MEMC_MDQ26: inout bit;
MEMC_MDQ27: inout bit;
MEMC_MDQ28: inout bit;
MEMC_MDQ29: inout bit;
MEMC_MDQ30: inout bit;
MEMC_MDQ31: inout bit;
MEMC_MDQS0: inout bit;
MEMC_MDQS1: inout bit;
MEMC_MDQS2: inout bit;
MEMC_MDQS3: inout bit;
MEMC_MODT0: buffer bit;
MEMC_MODT1: buffer bit;
MEMC_MRAS_B: out bit;
MEMC_MWE_B: out bit;
PCI_AD0: inout bit;
PCI_AD1: inout bit;
PCI_AD2: inout bit;
PCI_AD3: inout bit;
PCI_AD4: inout bit;
PCI_AD5: inout bit;
PCI_AD6: inout bit;
PCI_AD7: inout bit;
PCI_AD8: inout bit;
PCI_AD9: inout bit;
PCI_AD10: inout bit;
PCI_AD11: inout bit;
PCI_AD12: inout bit;
PCI_AD13: inout bit;
PCI_AD14: inout bit;
PCI_AD15: inout bit;
PCI_AD16: inout bit;
PCI_AD17: inout bit;
PCI_AD18: inout bit;
PCI_AD19: inout bit;
PCI_AD20: inout bit;
PCI_AD21: inout bit;
PCI_AD22: inout bit;
PCI_AD23: inout bit;
PCI_AD24: inout bit;
PCI_AD25: inout bit;
PCI_AD26: inout bit;
PCI_AD27: inout bit;
PCI_AD28: inout bit;
PCI_AD29: inout bit;
PCI_AD30: inout bit;
PCI_AD31: inout bit;
PCI_CLK0: out bit;
PCI_CLK1: out bit;
PCI_CLK2: out bit;
PCI_C_BE_B0: inout bit;
PCI_C_BE_B1: inout bit;
PCI_C_BE_B2: inout bit;
PCI_C_BE_B3: inout bit;
PCI_DEVSEL_B: inout bit;
PCI_FRAME_B: inout bit;
PCI_GNT_B0: inout bit;
PCI_GNT_B1: out bit;
PCI_GNT_B2: out bit;
PCI_IDSEL: inout bit;
PCI_INTA: inout bit;
PCI_IRDY_B: inout bit;
PCI_PAR: inout bit;
PCI_PERR_B: inout bit;
PCI_PME_B: inout bit;
PCI_REQ_B0: inout bit;
PCI_REQ_B1: inout bit;
PCI_REQ_B2: inout bit;
PCI_RESET_OUT_B: inout bit;
PCI_SERR_B: inout bit;
PCI_STOP_B: inout bit;
PCI_SYNC_IN: in bit;
PCI_SYNC_OUT: buffer bit;
PCI_TRDY_B: inout bit;
PMC_PWR_OK: inout bit;
PORESET_B: in bit;
QUIESCE_B: buffer bit;
RTC_PIT_CLOCK: in bit;
SATA_CLK_IN: in bit;
SPICLK: inout bit;
SPIMISO: inout bit;
SPIMOSI: inout bit;
SPISEL: inout bit;
SYS_CLK_IN: in bit;
SYS_XTAL_IN: in bit;
TCK: in bit;
TDI: in bit;
TDM_RCK: inout bit;
TDM_RD: inout bit;
TDM_RFS: inout bit;
TDM_TCK: inout bit;
TDM_TD: inout bit;
TDM_TFS: inout bit;
TDO: out bit;
TEST_MODE: in bit;
TMS: in bit;
TRST_B: in bit;
TSEC1_COL: inout bit;
TSEC1_CRS: inout bit;
TSEC1_GTX_CLK: inout bit;
TSEC1_GTX_CLK125: inout bit;
TSEC1_MDC: buffer bit;
TSEC1_MDIO: inout bit;
TSEC1_RXD0: inout bit;
TSEC1_RXD1: inout bit;
TSEC1_RXD2: inout bit;
TSEC1_RXD3: inout bit;
TSEC1_RX_CLK: inout bit;
TSEC1_RX_DV: inout bit;
TSEC1_RX_ER: inout bit;
TSEC1_TXD0: buffer bit;
TSEC1_TXD1: inout bit;
TSEC1_TXD2: inout bit;
TSEC1_TXD3: inout bit;
TSEC1_TX_CLK: inout bit;
TSEC1_TX_EN: inout bit;
TSEC1_TX_ER: buffer bit;
TSEC2_COL: inout bit;
TSEC2_CRS: inout bit;
TSEC2_GTX_CLK: buffer bit;
TSEC2_RXD0: inout bit;
TSEC2_RXD1: inout bit;
TSEC2_RXD2: inout bit;
TSEC2_RXD3: inout bit;
TSEC2_RX_CLK: inout bit;
TSEC2_RX_DV: inout bit;
TSEC2_RX_ER: inout bit;
TSEC2_TXD0: inout bit;
TSEC2_TXD1: inout bit;
TSEC2_TXD2: inout bit;
TSEC2_TXD3: inout bit;
TSEC2_TX_CLK: inout bit;
TSEC2_TX_EN: buffer bit;
TSEC2_TX_ER: buffer bit;
UART_CTS_B1: inout bit;
UART_CTS_B2: inout bit;
UART_RTS_B1: inout bit;
UART_RTS_B2: inout bit;
UART_SIN1: inout bit;
UART_SIN2: inout bit;
UART_SOUT1: inout bit;
UART_SOUT2: inout bit;
USB_CLK_IN: in bit;
USB_XTAL_IN: in bit;
SD_REF_CLK_B: in bit;
TXA_B: out bit;
TXB_B: out bit;
SD_REF_CLK: in bit;
TXA: out bit;
TXB: out bit;
AVDD1: linkage bit;
AVDD2: linkage bit;
GVDD: linkage bit_vector(0 to 23);
LVDD1_OFF: linkage bit_vector(0 to 4);
LVDD2_ON: linkage bit_vector(0 to 4);
MEMC_MVREF: linkage bit;
NVDD1_OFF: linkage bit_vector(0 to 6);
NVDD1_ON: linkage bit_vector(0 to 8);
NVDD2_OFF: linkage bit_vector(0 to 13);
NVDD2_ON: linkage bit_vector(0 to 1);
NVDD3_OFF: linkage bit_vector(0 to 14);
NVDD4_OFF: linkage bit_vector(0 to 3);
SATA_ANAVIZ: linkage bit;
SATA_VDD: linkage bit_vector(0 to 1);
SATA_VSS: linkage bit_vector(0 to 1);
SYS_XTAL_OUT: linkage bit;
THERM0: linkage bit;
USB_DM: linkage bit;
USB_DP: linkage bit;
USB_PLL_GND: linkage bit;
USB_PLL_PWR1: linkage bit;
USB_PLL_PWR3: linkage bit;
USB_RBIAS: linkage bit;
USB_TPA: linkage bit;
USB_VBUS: linkage bit;
USB_VDDA: linkage bit;
USB_VDDA_BIAS: linkage bit;
USB_VSSA: linkage bit;
USB_VSSA_BIAS: linkage bit;
USB_XTAL_OUT: linkage bit;
VDD: linkage bit_vector(0 to 17);
VDDC: linkage bit_vector(0 to 5);
VSS: linkage bit_vector(0 to 148);
SD_PLL_TPA_ANA: linkage bit;
XPADVDD: linkage bit_vector(0 to 2);
SD_IMP_CAL_RX: linkage bit;
SD_IMP_CAL_TX: linkage bit;
RXA_B: linkage bit;
RXB_B: linkage bit;
RXA: linkage bit;
RXB: linkage bit;
SD_PLL_TPD: linkage bit;
SDAVDD: linkage bit;
XCOREVDD: linkage bit_vector(0 to 3);
XPADVSS: linkage bit_vector(0 to 2);
SDAVSS: linkage bit;
XCOREVSS: linkage bit_vector(0 to 3));
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of MPC8315: entity is "STD_1149_1_2001";
attribute PIN_MAP of MPC8315 : entity is PHYSICAL_PIN_MAP;
constant PBGA : PIN_MAP_STRING :=
"AVDD1: AC15," &
"AVDD2: M23," &
"CFG_CLKIN_DIV_B: A5," &
"DMA_DACK_B0: AC4," &
"DMA_DONE0: AD2," &
"DMA_DREQ_B0: AD1," &
"EXT_PWR_CTRL: D3," &
"GPIO_0: C5," &
"GPIO_1: A4," &
"GPIO_2: K3," &
"GPIO_3: K1," &
"GPIO_4: K2," &
"GPIO_5: L5," &
"GPIO_6: L3," &
"GPIO_7: L1," &
"GPIO_8: M1," &
"GPIO_9: M2," &
"GPIO_10: M5," &
"GPIO_11: M4," &
"GVDD: (AC8, AC11, AC14, AC17, AD6, AD9," &
"AD17, AE8, AE13, AE19, AF10, AF15," &
"AF21, AG2, AG3, AG8, AG13, AG19," &
"AH2, Y11, Y12, Y14, Y15, Y17)," &
"HRESET_B: B6," &
"IIC_SCL: N2," &
"IIC_SDA: N1," &
"IRQ_B0_MCP_IN_B: Y3," &
"IRQ_B1: E1," &
"IRQ_B2: A7," &
"IRQ_B3: AA1," &
"IRQ_B4: Y5," &
"IRQ_B5: AA2," &
"IRQ_B6: AA4," &
"IRQ_B7: AA5," &
"LA16: V24," &
"LA17: V25," &
"LA18: W26," &
"LA19: W28," &
"LA20: U24," &
"LA21: W24," &
"LA22: Y28," &
"LA23: AH23," &
"LA24: AH24," &
"LA25: AG23," &
"LAD0: AB28," &
"LAD1: AB27," &
"LAD2: AC28," &
"LAD3: AA24," &
"LAD4: AC27," &
"LAD5: AD28," &
"LAD6: AB25," &
"LAD7: AC26," &
"LAD8: AD27," &
"LAD9: AB24," &
"LAD10: AE28," &
"LAD11: AE27," &
"LAD12: AE26," &
"LAD13: AF28," &
"LAD14: AC24," &
"LAD15: AD25," &
"LALE: AF26," &
"LBCTL: AH26," &
"LCLK0: AH25," &
"LCLK1: AD24," &
"LCS_B0: AD22," &
"LCS_B1: AF25," &
"LCS_B2: AG24," &
"LCS_B3: AF24," &
"LGPL0: Y27," &
"LGPL1: AA28," &
"LGPL2: Y25," &
"LGPL3: Y24," &
"LGPL4: AA26," &
"LGPL5: AF22," &
"LVDD1_OFF: (H6, J3, L6, L9, M9)," &
"LVDD2_ON: (C11, D9, E10, F11, J12)," &
"LWE_B0: AE23," &
"LWE_B1: AG26," &
"M66EN: L24," &
"MCP_OUT_B: W1," &
"MEMC_MA0: AD15," &
"MEMC_MA1: AE15," &
"MEMC_MA2: AH14," &
"MEMC_MA3: AG14," &
"MEMC_MA4: AF14," &
"MEMC_MA5: AE14," &
"MEMC_MA6: AH13," &
"MEMC_MA7: AH12," &
"MEMC_MA8: AF13," &
"MEMC_MA9: AD13," &
"MEMC_MA10: AG12," &
"MEMC_MA11: AH11," &
"MEMC_MA12: AH10," &
"MEMC_MA13: AE12," &
"MEMC_MA14: AF11," &
"MEMC_MBA0: AH16," &
"MEMC_MBA1: AH15," &
"MEMC_MBA2: AG15," &
"MEMC_MCAS_B: AG4," &
"MEMC_MCK0: AF4," &
"MEMC_MCK1: AF1," &
"MEMC_MCKE: AE4," &
"MEMC_MCK_B0: AF3," &
"MEMC_MCK_B1: AE1," &
"MEMC_MCS_B0: AH3," &
"MEMC_MCS_B1: AD5," &
"MEMC_MDM0: AE18," &
"MEMC_MDM1: AE20," &
"MEMC_MDM2: AE10," &
"MEMC_MDM3: AF6," &
"MEMC_MDQ0: AF16," &
"MEMC_MDQ1: AE17," &
"MEMC_MDQ2: AH17," &
"MEMC_MDQ3: AG17," &
"MEMC_MDQ4: AG18," &
"MEMC_MDQ5: AH18," &
"MEMC_MDQ6: AD18," &
"MEMC_MDQ7: AF19," &
"MEMC_MDQ8: AH19," &
"MEMC_MDQ9: AD19," &
"MEMC_MDQ10: AG20," &
"MEMC_MDQ11: AH20," &
"MEMC_MDQ12: AH21," &
"MEMC_MDQ13: AE21," &
"MEMC_MDQ14: AH22," &
"MEMC_MDQ15: AD21," &
"MEMC_MDQ16: AG10," &
"MEMC_MDQ17: AH9," &
"MEMC_MDQ18: AH8," &
"MEMC_MDQ19: AD11," &
"MEMC_MDQ20: AH7," &
"MEMC_MDQ21: AG7," &
"MEMC_MDQ22: AF8," &
"MEMC_MDQ23: AD10," &
"MEMC_MDQ24: AE9," &
"MEMC_MDQ25: AH6," &
"MEMC_MDQ26: AH5," &
"MEMC_MDQ27: AG6," &
"MEMC_MDQ28: AH4," &
"MEMC_MDQ29: AE6," &
"MEMC_MDQ30: AD8," &
"MEMC_MDQ31: AF5," &
"MEMC_MDQS0: AF17," &
"MEMC_MDQS1: AG21," &
"MEMC_MDQS2: AG9," &
"MEMC_MDQS3: AF7," &
"MEMC_MODT0: AE3," &
"MEMC_MODT1: AD4," &
"MEMC_MRAS_B: AD7," &
"MEMC_MVREF: AD12," &
"MEMC_MWE_B: AE5," &
"NVDD1_OFF: (AA3, AB4, U9, V9, W10, Y4, Y6)," &
"NVDD1_ON: (B1, B2, C1, D5, E7, F5, F9, J11," &
"K10)," &
"NVDD2_OFF: (B22, B27, C19, E16, F15, F18, F21," &
"F25, H25, J17, J18, J23, L20, M20)," &
"NVDD2_ON: (L26, N19)," &
"NVDD3_OFF: (AA23, AA25, AC20, AC25, AD23, AE25," &
"AG25, AG27, U20, V20, V23, V26," &
"W19, Y18, Y26)," &
"NVDD4_OFF: (K4, L2, M6, N10)," &
"PCI_AD0: J25," &
"PCI_AD1: J24," &
"PCI_AD2: K24," &
"PCI_AD3: H27," &
"PCI_AD4: H28," &
"PCI_AD5: H26," &
"PCI_AD6: G27," &
"PCI_AD7: G28," &
"PCI_AD8: F26," &
"PCI_AD9: F28," &
"PCI_AD10: G25," &
"PCI_AD11: F27," &
"PCI_AD12: E27," &
"PCI_AD13: E28," &
"PCI_AD14: D28," &
"PCI_AD15: D27," &
"PCI_AD16: B25," &
"PCI_AD17: D24," &
"PCI_AD18: B26," &
"PCI_AD19: C24," &
"PCI_AD20: A26," &
"PCI_AD21: E20," &
"PCI_AD22: A23," &
"PCI_AD23: C22," &
"PCI_AD24: E19," &
"PCI_AD25: A22," &
"PCI_AD26: C20," &
"PCI_AD27: B21," &
"PCI_AD28: D19," &
"PCI_AD29: A19," &
"PCI_AD30: A21," &
"PCI_AD31: B19," &
"PCI_CLK0: E23," &
"PCI_CLK1: F24," &
"PCI_CLK2: E25," &
"PCI_C_BE_B0: H24," &
"PCI_C_BE_B1: C27," &
"PCI_C_BE_B2: A25," &
"PCI_C_BE_B3: E21," &
"PCI_DEVSEL_B: E22," &
"PCI_FRAME_B: C28," &
"PCI_GNT_B0: B20," &
"PCI_GNT_B1: D17," &
"PCI_GNT_B2: E15," &
"PCI_IDSEL: D26," &
"PCI_INTA: B18," &
"PCI_IRDY_B: D25," &
"PCI_PAR: G24," &
"PCI_PERR_B: D21," &
"PCI_PME_B: B23," &
"PCI_REQ_B0: E18," &
"PCI_REQ_B1: C18," &
"PCI_REQ_B2: E17," &
"PCI_RESET_OUT_B: A20," &
"PCI_SERR_B: C25," &
"PCI_STOP_B: D23," &
"PCI_SYNC_IN: K27," &
"PCI_SYNC_OUT: J27," &
"PCI_TRDY_B: A24," &
"PMC_PWR_OK: D4," &
"PORESET_B: A6," &
"QUIESCE_B: B5," &
"RTC_PIT_CLOCK: K26," &
"SATA_ANAVIZ: U26," &
"SATA_CLK_IN: V27," &
"SATA_VDD: (N27, U23)," &
"SATA_VSS: (M27, V28)," &
"SPICLK: Y1," &
"SPIMISO: W4," &
"SPIMOSI: W3," &
"SPISEL: W2," &
"SYS_CLK_IN: K28," &
"SYS_XTAL_IN: L27," &
"SYS_XTAL_OUT: J28," &
"TCK: E5," &
"TDI: B4," &
"TDM_RCK: AB1," &
"TDM_RD: AC1," &
"TDM_RFS: AB3," &
"TDM_TCK: AB5," &
"TDM_TD: AC3," &
"TDM_TFS: AC2," &
"TDO: C4," &
"TEST_MODE: D6," &
"THERM0: L25," &
"TMS: C3," &
"TRST_B: C2," &
"TSEC1_COL: J1," &
"TSEC1_CRS: H1," &
"TSEC1_GTX_CLK: K5," &
"TSEC1_GTX_CLK125: D1," &
"TSEC1_MDC: E3," &
"TSEC1_MDIO: E2," &
"TSEC1_RXD0: H2," &
"TSEC1_RXD1: J5," &
"TSEC1_RXD2: H3," &
"TSEC1_RXD3: G1," &
"TSEC1_RX_CLK: J4," &
"TSEC1_RX_DV: J2," &
"TSEC1_RX_ER: H5," &
"TSEC1_TXD0: G4," &
"TSEC1_TXD1: F1," &
"TSEC1_TXD2: F2," &
"TSEC1_TXD3: F3," &
"TSEC1_TX_CLK: G2," &
"TSEC1_TX_EN: F4," &
"TSEC1_TX_ER: G5," &
"TSEC2_COL: A8," &
"TSEC2_CRS: E9," &
"TSEC2_GTX_CLK: B10," &
"TSEC2_RXD0: B9," &
"TSEC2_RXD1: A9," &
"TSEC2_RXD2: D10," &
"TSEC2_RXD3: C10," &
"TSEC2_RX_CLK: B8," &
"TSEC2_RX_DV: C9," &
"TSEC2_RX_ER: A10," &
"TSEC2_TXD0: B7," &
"TSEC2_TXD1: E8," &
"TSEC2_TXD2: C7," &
"TSEC2_TXD3: D11," &
"TSEC2_TX_CLK: D8," &
"TSEC2_TX_EN: D12," &
"TSEC2_TX_ER: B11," &
"UART_CTS_B1: D16," &
"UART_CTS_B2: A17," &
"UART_RTS_B1: B17," &
"UART_RTS_B2: A18," &
"UART_SIN1: B16," &
"UART_SIN2: C16," &
"UART_SOUT1: C15," &
"UART_SOUT2: A16," &
"USB_CLK_IN: B15," &
"USB_DM: A12," &
"USB_DP: A11," &
"USB_PLL_GND: D13," &
"USB_PLL_PWR1: B13," &
"USB_PLL_PWR3: A13," &
"USB_RBIAS: D14," &
"USB_TPA: A14," &
"USB_VBUS: C12," &
"USB_VDDA: E12," &
"USB_VDDA_BIAS: C14," &
"USB_VSSA: E13," &
"USB_VSSA_BIAS: E14," &
"USB_XTAL_IN: A15," &
"USB_XTAL_OUT: B14," &
"VDD: (J15, K15, K16, K17, K18, K19, L10," &
"L19, M10, T10, U10, U19, V10, V19," &
"W11, W12, W13, W14)," &
"VDDC: (J14, K11, K12, K13, K14, M19)," &
"VSS: (A3, A27, AA6, AA27, AB2, AB26, AC5," &
"AC9, AC12, AC18, AC21, AD3, AD14," &
"AD16, AD20, AD26, AE2, AE7, AE11," &
"AE16, AE22, AE24, AF2, AF9, AF12," &
"AF18, AF20, AF23, AF27, AG1, AG5," &
"AG11, AG16, AG22, AG28, AH27, B3," &
"B12, B24, B28, C6, C8, C13, C17," &
"C21, C23, C26, D2, D7, D15, D18," &
"D20, D22, E4, E6, E11, E24, E26," &
"F8, F12, F14, F17, F20, G3, G26," &
"H4, H23, J6, J26, K25, L4, L11," &
"L12, L13, L14, L15, L16, L17, L18," &
"L23, L28, M3, M11, M12, M13, M14," &
"M15, M16, M17, M18, N5, N11, N12," &
"N13, N14, N15, N16, N17, N18, P6," &
"P11, P12, P13, P14, P15, P16, P17," &
"P18, R6, R11, R12, R13, R14, R15," &
"R16, R17, R18, T11, T12, T13, T14," &
"T15, T16, T17, T18, U5, U6, U11," &
"U12, U13, U14, U15, U16, U17, U18," &
"V6, V11, V12, V13, V14, V15, V16," &
"V17, V18, W5, W25, W27, Y2, Y23)," &
"XPADVDD: (P3, R9, U3), " &
"XPADVSS: (P5, P9, V3),"&
"XCOREVDD: (P2, P10, R2, T1)," &
"XCOREVSS: (R3, R10, U2, V2)," &
"SD_PLL_TPA_ANA: T4, " &
"SD_IMP_CAL_RX: N3, " &
"RXA_B: P1, " &
"RXB_B: V1, " &
"SD_REF_CLK_B: R4, " &
"SD_IMP_CAL_TX: V5, " &
"SDAVDD: T3, " &
"TXA_B: N4, " &
"TXB_B: V4, " &
"RXA: R1, " &
"SD_REF_CLK: R5, " &
"SDAVSS: T5, " &
"RXB: U1, " &
"TXA: P4, " &
"SD_PLL_TPD: T2, " &
"TXB: U4 ";
attribute PORT_GROUPING of MPC8315 : entity is
"Differential_Voltage ((TXA, TXA_B),"&
"(TXB, TXB_B),"&
"(SD_REF_CLK, SD_REF_CLK_B))";
attribute TAP_SCAN_OUT of TDO: signal is true;
attribute TAP_SCAN_CLOCK of TCK: signal is (50.0e6, BOTH);
attribute TAP_SCAN_RESET of TRST_B: signal is true;
attribute TAP_SCAN_MODE of TMS: signal is true;
attribute TAP_SCAN_IN of TDI: signal is true;
attribute COMPLIANCE_PATTERNS of MPC8315: entity is
"(TEST_MODE) (0)";
attribute INSTRUCTION_LENGTH of MPC8315: entity is 8;
attribute INSTRUCTION_OPCODE of MPC8315: entity is
"SAMPLE (11110000)," &
"BYPASS (11111111)," &
"CLAMP (11110001)," &
"EXTEST (00000000)," &
"HIGHZ (11110010)," &
"IDCODE (11110011)," &
"PRELOAD (11110000)," &
"PRIVATE001 (11111110)," &
"PRIVATE002 (00000101)," &
"PRIVATE003 (10010000)," &
"PRIVATE004 (10010001)," &
"PRIVATE005 (10010010)," &
"PRIVATE006 (10010011)," &
"PRIVATE007 (00001001)," &
"PRIVATE008 (00000011)," &
"PRIVATE009 (11111010)," &
"PRIVATE010 (00000100)," &
"PRIVATE011 (00001010)," &
"PRIVATE012 (00110001)," &
"PRIVATE013 (00110011)," &
"PRIVATE014 (00110100)," &
"PRIVATE015 (00110101)," &
"PRIVATE016 (00110110)," &
"PRIVATE017 (01000100)," &
"PRIVATE018 (01000101)," &
"PRIVATE019 (01000110)," &
"PRIVATE020 (01000111)," &
"PRIVATE021 (01001000)," &
"PRIVATE022 (01001001)," &
"PRIVATE023 (01001010)," &
"PRIVATE024 (01001011)," &
"PRIVATE025 (01001100)," &
"PRIVATE026 (01001101)," &
"PRIVATE027 (01001110)," &
"PRIVATE028 (01001111)," &
"PRIVATE029 (01100000)," &
"PRIVATE030 (01100001)," &
"PRIVATE031 (01100010)," &
"PRIVATE032 (01100011)," &
"PRIVATE033 (01100100)," &
"PRIVATE034 (01100101)," &
"PRIVATE035 (01100110)," &
"PRIVATE036 (01100111)," &
"PRIVATE037 (01101000)," &
"PRIVATE038 (01101001)," &
"PRIVATE039 (01101010)," &
"PRIVATE040 (01101011)," &
"PRIVATE041 (00010000)," &
"PRIVATE042 (00010001)," &
"PRIVATE043 (00010010)," &
"PRIVATE044 (00010011)," &
"PRIVATE045 (00010100)," &
"PRIVATE046 (01110000)," &
"PRIVATE047 (01110001)," &
"PRIVATE048 (01110010)," &
"PRIVATE049 (01110011)," &
"PRIVATE050 (01110100)," &
"PRIVATE051 (01110101)," &
"PRIVATE052 (01110110)," &
"PRIVATE053 (01110111)," &
"PRIVATE054 (01111000)," &
"PRIVATE055 (01111001)," &
"PRIVATE056 (01111010)," &
"PRIVATE057 (10000000)," &
"PRIVATE058 (10000001)," &
"PRIVATE059 (10000010)," &
"PRIVATE060 (10000011)," &
"PRIVATE061 (00110000)," &
"PRIVATE062 (11110100)";
attribute INSTRUCTION_CAPTURE of MPC8315 : entity is
"xxxxxx01 ";
attribute INSTRUCTION_PRIVATE of MPC8315 : entity is
"PRIVATE001 ," &
"PRIVATE002 ," &
"PRIVATE003 ," &
"PRIVATE004 ," &
"PRIVATE005 ," &
"PRIVATE006 ," &
"PRIVATE007 ," &
"PRIVATE008 ," &
"PRIVATE009 ," &
"PRIVATE010 ," &
"PRIVATE011 ," &
"PRIVATE012 ," &
"PRIVATE013 ," &
"PRIVATE014 ," &
"PRIVATE015 ," &
"PRIVATE016 ," &
"PRIVATE017 ," &
"PRIVATE018 ," &
"PRIVATE019 ," &
"PRIVATE020 ," &
"PRIVATE021 ," &
"PRIVATE022 ," &
"PRIVATE023 ," &
"PRIVATE024 ," &
"PRIVATE025 ," &
"PRIVATE026 ," &
"PRIVATE027 ," &
"PRIVATE028 ," &
"PRIVATE029 ," &
"PRIVATE030 ," &
"PRIVATE031 ," &
"PRIVATE032 ," &
"PRIVATE033 ," &
"PRIVATE034 ," &
"PRIVATE035 ," &
"PRIVATE036 ," &
"PRIVATE037 ," &
"PRIVATE038 ," &
"PRIVATE039 ," &
"PRIVATE040 ," &
"PRIVATE041 ," &
"PRIVATE042 ," &
"PRIVATE043 ," &
"PRIVATE044 ," &
"PRIVATE045 ," &
"PRIVATE046 ," &
"PRIVATE047 ," &
"PRIVATE048 ," &
"PRIVATE049 ," &
"PRIVATE050 ," &
"PRIVATE051 ," &
"PRIVATE052 ," &
"PRIVATE053 ," &
"PRIVATE054 ," &
"PRIVATE055 ," &
"PRIVATE056 ," &
"PRIVATE057 ," &
"PRIVATE058 ," &
"PRIVATE059 ," &
"PRIVATE060 ," &
"PRIVATE061 ," &
"PRIVATE062 ";
attribute IDCODE_REGISTER of MPC8315 : entity is
"0010" & -- Version
"0110100010110101" & -- Part Number
"00000001110" & -- Manufacturer Identity
"1"; -- IEEE 1149.1 Requirement
attribute REGISTER_ACCESS of MPC8315 : entity is
"BYPASS(BYPASS),"&
"BOUNDARY (SAMPLE)";
attribute BOUNDARY_LENGTH of MPC8315 : entity is 539;
attribute BOUNDARY_REGISTER of MPC8315 : entity is
-- num cell port function safe [ccell disval rslt]
"0 (BC_2, *, control, 0)," &
"1 (BC_7, SPISEL, bidir, X, 0, 0, Z)," &
"2 (BC_2, *, control, 0)," &
"3 (BC_7, SPIMOSI, bidir, X, 2, 0, Z)," &
"4 (BC_2, *, control, 0)," &
"5 (BC_7, SPIMISO, bidir, X, 4, 0, Z)," &
"6 (BC_2, *, control, 0)," &
"7 (BC_7, SPICLK, bidir, X, 6, 0, Z)," &
"8 (BC_2, *, control, 0)," &
"9 (BC_7, IRQ_B0_MCP_IN_B, bidir, X, 8, 0, Z)," &
"10 (BC_2, *, control, 0)," &
"11 (BC_7, IRQ_B4, bidir, X, 10, 0, Z)," &
"12 (BC_2, *, control, 0)," &
"13 (BC_7, IRQ_B3, bidir, X, 12, 0, Z)," &
"14 (BC_2, *, control, 0)," &
"15 (BC_7, IRQ_B5, bidir, X, 14, 0, Z)," &
"16 (BC_2, *, control, 0)," &
"17 (BC_7, IRQ_B6, bidir, X, 16, 0, Z)," &
"18 (BC_2, *, control, 0)," &
"19 (BC_7, IRQ_B7, bidir, X, 18, 0, Z)," &
"20 (BC_2, *, control, 0)," &
"21 (BC_7, TDM_RCK, bidir, X, 20, 0, Z)," &
"22 (BC_2, *, control, 0)," &
"23 (BC_7, TDM_RFS, bidir, X, 22, 0, Z)," &
"24 (BC_2, *, control, 0)," &
"25 (BC_7, TDM_RD, bidir, X, 24, 0, Z)," &
"26 (BC_2, *, control, 0)," &
"27 (BC_7, TDM_TCK, bidir, X, 26, 0, Z)," &
"28 (BC_2, *, control, 0)," &
"29 (BC_7, TDM_TFS, bidir, X, 28, 0, Z)," &
"30 (BC_2, *, control, 0)," &
"31 (BC_7, TDM_TD, bidir, X, 30, 0, Z)," &
"32 (BC_2, *, control, 0)," &
"33 (BC_7, DMA_DREQ_B0, bidir, X, 32, 0, Z)," &
"34 (BC_2, *, control, 0)," &
"35 (BC_7, DMA_DACK_B0, bidir, X, 34, 0, Z)," &
"36 (BC_2, *, control, 0)," &
"37 (BC_7, DMA_DONE0, bidir, X, 36, 0, Z)," &
"38 (BC_2, *, internal, X)," &
"39 (BC_1, MEMC_MODT1, output2, X)," &
"40 (BC_2, *, internal, X)," &
"41 (BC_1, MEMC_MODT0, output2, X)," &
"42 (BC_2, *, internal, X)," &
"43 (BC_1, MEMC_MCK_B1, output2, X)," &
"44 (BC_2, *, internal, X)," &
"45 (BC_1, MEMC_MCK1, output2, X)," &
"46 (BC_2, *, internal, X)," &
"47 (BC_1, MEMC_MCK_B0, output2, X)," &
"48 (BC_2, *, internal, X)," &
"49 (BC_1, MEMC_MCK0, output2, X)," &
"50 (BC_2, *, internal, X)," &
"51 (BC_1, MEMC_MCKE, output2, X)," &
"52 (BC_2, *, control, 0)," &
"53 (BC_1, MEMC_MCS_B1, output3, X, 52, 0, Z)," &
"54 (BC_2, *, control, 0)," &
"55 (BC_1, MEMC_MCS_B0, output3, X, 54, 0, Z)," &
"56 (BC_2, *, control, 0)," &
"57 (BC_1, MEMC_MCAS_B, output3, X, 56, 0, Z)," &
"58 (BC_2, *, control, 0)," &
"59 (BC_1, MEMC_MRAS_B, output3, X, 58, 0, Z)," &
"60 (BC_2, *, control, 0)," &
"61 (BC_1, MEMC_MWE_B, output3, X, 60, 0, Z)," &
"62 (BC_2, *, control, 0)," &
"63 (BC_7, MEMC_MDQ31, bidir, X, 62, 0, Z)," &
"64 (BC_2, *, control, 0)," &
"65 (BC_7, MEMC_MDQ30, bidir, X, 64, 0, Z)," &
"66 (BC_2, *, control, 0)," &
"67 (BC_7, MEMC_MDQ29, bidir, X, 66, 0, Z)," &
"68 (BC_2, *, control, 0)," &
"69 (BC_7, MEMC_MDQ28, bidir, X, 68, 0, Z)," &
"70 (BC_2, *, control, 0)," &
"71 (BC_1, MEMC_MDM3, output3, X, 70, 0, Z)," &
"72 (BC_2, *, control, 0)," &
"73 (BC_7, MEMC_MDQS3, bidir, X, 72, 0, Z)," &
"74 (BC_2, *, control, 0)," &
"75 (BC_7, MEMC_MDQ27, bidir, X, 74, 0, Z)," &
"76 (BC_2, *, control, 0)," &
"77 (BC_7, MEMC_MDQ26, bidir, X, 76, 0, Z)," &
"78 (BC_2, *, control, 0)," &
"79 (BC_7, MEMC_MDQ25, bidir, X, 78, 0, Z)," &
"80 (BC_2, *, control, 0)," &
"81 (BC_7, MEMC_MDQ24, bidir, X, 80, 0, Z)," &
"82 (BC_2, *, control, 0)," &
"83 (BC_7, MEMC_MDQ23, bidir, X, 82, 0, Z)," &
"84 (BC_2, *, control, 0)," &
"85 (BC_7, MEMC_MDQ22, bidir, X, 84, 0, Z)," &
"86 (BC_2, *, control, 0)," &
"87 (BC_7, MEMC_MDQ21, bidir, X, 86, 0, Z)," &
"88 (BC_2, *, control, 0)," &
"89 (BC_7, MEMC_MDQ20, bidir, X, 88, 0, Z)," &
"90 (BC_2, *, control, 0)," &
"91 (BC_1, MEMC_MDM2, output3, X, 90, 0, Z)," &
"92 (BC_2, *, control, 0)," &
"93 (BC_7, MEMC_MDQS2, bidir, X, 92, 0, Z)," &
"94 (BC_2, *, control, 0)," &
"95 (BC_7, MEMC_MDQ19, bidir, X, 94, 0, Z)," &
"96 (BC_2, *, control, 0)," &
"97 (BC_7, MEMC_MDQ18, bidir, X, 96, 0, Z)," &
"98 (BC_2, *, control, 0)," &
"99 (BC_7, MEMC_MDQ17, bidir, X, 98, 0, Z)," &
"100 (BC_2, *, control, 0)," &
"101 (BC_7, MEMC_MDQ16, bidir, X, 100, 0, Z)," &
"102 (BC_2, *, control, 0)," &
"103 (BC_1, MEMC_MA14, output3, X, 102, 0, Z)," &
"104 (BC_2, *, control, 0)," &
"105 (BC_1, MEMC_MA13, output3, X, 104, 0, Z)," &
"106 (BC_2, *, control, 0)," &
"107 (BC_1, MEMC_MA12, output3, X, 106, 0, Z)," &
"108 (BC_2, *, control, 0)," &
"109 (BC_1, MEMC_MA11, output3, X, 108, 0, Z)," &
"110 (BC_2, *, control, 0)," &
"111 (BC_1, MEMC_MA10, output3, X, 110, 0, Z)," &
"112 (BC_2, *, control, 0)," &
"113 (BC_1, MEMC_MA9, output3, X, 112, 0, Z)," &
"114 (BC_2, *, control, 0)," &
"115 (BC_1, MEMC_MA8, output3, X, 114, 0, Z)," &
"116 (BC_2, *, control, 0)," &
"117 (BC_1, MEMC_MA7, output3, X, 116, 0, Z)," &
"118 (BC_2, *, control, 0)," &
"119 (BC_1, MEMC_MA6, output3, X, 118, 0, Z)," &
"120 (BC_2, *, control, 0)," &
"121 (BC_1, MEMC_MA5, output3, X, 120, 0, Z)," &
"122 (BC_2, *, control, 0)," &
"123 (BC_1, MEMC_MA4, output3, X, 122, 0, Z)," &
"124 (BC_2, *, control, 0)," &
"125 (BC_1, MEMC_MA3, output3, X, 124, 0, Z)," &
"126 (BC_2, *, control, 0)," &
"127 (BC_1, MEMC_MA2, output3, X, 126, 0, Z)," &
"128 (BC_2, *, control, 0)," &
"129 (BC_1, MEMC_MA1, output3, X, 128, 0, Z)," &
"130 (BC_2, *, control, 0)," &
"131 (BC_1, MEMC_MA0, output3, X, 130, 0, Z)," &
"132 (BC_2, *, control, 0)," &
"133 (BC_1, MEMC_MBA2, output3, X, 132, 0, Z)," &
"134 (BC_2, *, control, 0)," &
"135 (BC_1, MEMC_MBA1, output3, X, 134, 0, Z)," &
"136 (BC_2, *, control, 0)," &
"137 (BC_1, MEMC_MBA0, output3, X, 136, 0, Z)," &
"138 (BC_2, *, control, 0)," &
"139 (BC_7, MEMC_MDQ0, bidir, X, 138, 0, Z)," &
"140 (BC_2, *, control, 0)," &
"141 (BC_7, MEMC_MDQ1, bidir, X, 140, 0, Z)," &
"142 (BC_2, *, control, 0)," &
"143 (BC_7, MEMC_MDQ2, bidir, X, 142, 0, Z)," &
"144 (BC_2, *, control, 0)," &
"145 (BC_7, MEMC_MDQ3, bidir, X, 144, 0, Z)," &
"146 (BC_2, *, control, 0)," &
"147 (BC_1, MEMC_MDM0, output3, X, 146, 0, Z)," &
"148 (BC_2, *, control, 0)," &
"149 (BC_7, MEMC_MDQS0, bidir, X, 148, 0, Z)," &
"150 (BC_2, *, control, 0)," &
"151 (BC_7, MEMC_MDQ4, bidir, X, 150, 0, Z)," &
"152 (BC_2, *, control, 0)," &
"153 (BC_7, MEMC_MDQ5, bidir, X, 152, 0, Z)," &
"154 (BC_2, *, control, 0)," &
"155 (BC_7, MEMC_MDQ6, bidir, X, 154, 0, Z)," &
"156 (BC_2, *, control, 0)," &
"157 (BC_7, MEMC_MDQ7, bidir, X, 156, 0, Z)," &
"158 (BC_2, *, control, 0)," &
"159 (BC_7, MEMC_MDQ8, bidir, X, 158, 0, Z)," &
"160 (BC_2, *, control, 0)," &
"161 (BC_7, MEMC_MDQ9, bidir, X, 160, 0, Z)," &
"162 (BC_2, *, control, 0)," &
"163 (BC_7, MEMC_MDQ10, bidir, X, 162, 0, Z)," &
"164 (BC_2, *, control, 0)," &
"165 (BC_7, MEMC_MDQ11, bidir, X, 164, 0, Z)," &
"166 (BC_2, *, control, 0)," &
"167 (BC_1, MEMC_MDM1, output3, X, 166, 0, Z)," &
"168 (BC_2, *, control, 0)," &
"169 (BC_7, MEMC_MDQS1, bidir, X, 168, 0, Z)," &
"170 (BC_2, *, control, 0)," &
"171 (BC_7, MEMC_MDQ12, bidir, X, 170, 0, Z)," &
"172 (BC_2, *, control, 0)," &
"173 (BC_7, MEMC_MDQ13, bidir, X, 172, 0, Z)," &
"174 (BC_2, *, control, 0)," &
"175 (BC_7, MEMC_MDQ14, bidir, X, 174, 0, Z)," &
"176 (BC_2, *, control, 0)," &
"177 (BC_7, MEMC_MDQ15, bidir, X, 176, 0, Z)," &
"178 (BC_2, *, internal, X)," &
"179 (BC_1, LGPL5, output2, X)," &
"180 (BC_2, *, internal, X)," &
"181 (BC_1, LA25, output2, X)," &
"182 (BC_2, *, internal, X)," &
"183 (BC_1, LA23, output2, X)," &
"184 (BC_2, *, internal, X)," &
"185 (BC_1, LCS_B0, output2, X)," &
"186 (BC_2, *, internal, X)," &
"187 (BC_1, LCS_B2, output2, X)," &
"188 (BC_2, *, internal, X)," &
"189 (BC_1, LA24, output2, X)," &
"190 (BC_2, *, internal, X)," &
"191 (BC_1, LWE_B0, output2, X)," &
"192 (BC_2, *, internal, X)," &
"193 (BC_1, LCS_B3, output2, X)," &
"194 (BC_2, *, internal, X)," &
"195 (BC_1, LCS_B1, output2, X)," &
"196 (BC_2, *, internal, X)," &
"197 (BC_1, LCLK1, output2, X)," &
"198 (BC_2, *, internal, X)," &
"199 (BC_1, LCLK0, output2, X)," &
"200 (BC_2, *, internal, X)," &
"201 (BC_1, LWE_B1, output2, X)," &
"202 (BC_2, *, internal, X)," &
"203 (BC_1, LALE, output2, X)," &
"204 (BC_2, *, internal, X)," &
"205 (BC_1, LBCTL, output2, X)," &
"206 (BC_2, *, control, 0)," &
"207 (BC_7, LAD15, bidir, X, 206, 0, Z)," &
"208 (BC_2, *, control, 0)," &
"209 (BC_7, LAD14, bidir, X, 208, 0, Z)," &
"210 (BC_2, *, control, 0)," &
"211 (BC_7, LAD13, bidir, X, 210, 0, Z)," &
"212 (BC_2, *, control, 0)," &
"213 (BC_7, LAD12, bidir, X, 212, 0, Z)," &
"214 (BC_2, *, control, 0)," &
"215 (BC_7, LAD11, bidir, X, 214, 0, Z)," &
"216 (BC_2, *, control, 0)," &
"217 (BC_7, LAD10, bidir, X, 216, 0, Z)," &
"218 (BC_2, *, control, 0)," &
"219 (BC_7, LAD9, bidir, X, 218, 0, Z)," &
"220 (BC_2, *, control, 0)," &
"221 (BC_7, LAD8, bidir, X, 220, 0, Z)," &
"222 (BC_2, *, control, 0)," &
"223 (BC_7, LAD7, bidir, X, 222, 0, Z)," &
"224 (BC_2, *, control, 0)," &
"225 (BC_7, LAD6, bidir, X, 224, 0, Z)," &
"226 (BC_2, *, control, 0)," &
"227 (BC_7, LAD5, bidir, X, 226, 0, Z)," &
"228 (BC_2, *, control, 0)," &
"229 (BC_7, LAD4, bidir, X, 228, 0, Z)," &
"230 (BC_2, *, control, 0)," &
"231 (BC_7, LAD3, bidir, X, 230, 0, Z)," &
"232 (BC_2, *, control, 0)," &
"233 (BC_7, LAD2, bidir, X, 232, 0, Z)," &
"234 (BC_2, *, control, 0)," &
"235 (BC_7, LAD1, bidir, X, 234, 0, Z)," &
"236 (BC_2, *, control, 0)," &
"237 (BC_7, LAD0, bidir, X, 236, 0, Z)," &
"238 (BC_2, *, control, 0)," &
"239 (BC_7, LGPL4, bidir, X, 238, 0, Z)," &
"240 (BC_2, *, internal, X)," &
"241 (BC_1, LGPL3, output2, X)," &
"242 (BC_2, *, internal, X)," &
"243 (BC_1, LGPL2, output2, X)," &
"244 (BC_2, *, internal, X)," &
"245 (BC_1, LGPL1, output2, X)," &
"246 (BC_2, *, internal, X)," &
"247 (BC_1, LGPL0, output2, X)," &
"248 (BC_2, *, internal, X)," &
"249 (BC_1, LA21, output2, X)," &
"250 (BC_2, *, internal, X)," &
"251 (BC_1, LA22, output2, X)," &
"252 (BC_2, *, internal, X)," &
"253 (BC_1, LA18, output2, X)," &
"254 (BC_2, *, internal, X)," &
"255 (BC_1, LA19, output2, X)," &
"256 (BC_2, *, internal, X)," &
"257 (BC_1, LA16, output2, X)," &
"258 (BC_2, *, internal, X)," &
"259 (BC_1, LA17, output2, X)," &
"260 (BC_2, *, internal, X)," &
"261 (BC_1, LA20, output2, X)," &
"262 (BC_2, *, internal, X)," &
"263 (BC_2, SATA_CLK_IN, input, X)," &
"264 (BC_2, *, internal, X)," &
"265 (BC_2, PCI_SYNC_IN, input, X)," &
"266 (BC_2, *, internal, X)," &
"267 (BC_2, RTC_PIT_CLOCK, input, X)," &
"268 (BC_2, *, internal, X)," &
"269 (BC_2, SYS_CLK_IN, input, X)," &
"270 (BC_2, *, internal, X)," &
"271 (BC_2, SYS_XTAL_IN, input, X)," &
"272 (BC_2, *, internal, X)," &
"273 (BC_1, PCI_SYNC_OUT, output2, X)," &
"274 (BC_2, *, control, 0)," &
"275 (BC_7, M66EN, bidir, X, 274, 0, Z)," &
"276 (BC_2, *, control, 0)," &
"277 (BC_7, PCI_AD0, bidir, X, 276, 0, Z)," &
"278 (BC_2, *, control, 0)," &
"279 (BC_7, PCI_AD1, bidir, X, 278, 0, Z)," &
"280 (BC_2, *, control, 0)," &
"281 (BC_7, PCI_AD4, bidir, X, 280, 0, Z)," &
"282 (BC_2, *, control, 0)," &
"283 (BC_7, PCI_AD2, bidir, X, 282, 0, Z)," &
"284 (BC_2, *, control, 0)," &
"285 (BC_7, PCI_AD3, bidir, X, 284, 0, Z)," &
"286 (BC_2, *, control, 0)," &
"287 (BC_7, PCI_AD7, bidir, X, 286, 0, Z)," &
"288 (BC_2, *, control, 0)," &
"289 (BC_7, PCI_C_BE_B0, bidir, X, 288, 0, Z)," &
"290 (BC_2, *, control, 0)," &
"291 (BC_7, PCI_AD5, bidir, X, 290, 0, Z)," &
"292 (BC_2, *, control, 0)," &
"293 (BC_7, PCI_AD6, bidir, X, 292, 0, Z)," &
"294 (BC_2, *, control, 0)," &
"295 (BC_7, PCI_AD10, bidir, X, 294, 0, Z)," &
"296 (BC_2, *, control, 0)," &
"297 (BC_7, PCI_AD11, bidir, X, 296, 0, Z)," &
"298 (BC_2, *, control, 0)," &
"299 (BC_7, PCI_AD8, bidir, X, 298, 0, Z)," &
"300 (BC_2, *, control, 0)," &
"301 (BC_7, PCI_AD9, bidir, X, 300, 0, Z)," &
"302 (BC_2, *, control, 0)," &
"303 (BC_7, PCI_AD12, bidir, X, 302, 0, Z)," &
"304 (BC_2, *, control, 0)," &
"305 (BC_7, PCI_AD13, bidir, X, 304, 0, Z)," &
"306 (BC_2, *, control, 0)," &
"307 (BC_7, PCI_AD15, bidir, X, 306, 0, Z)," &
"308 (BC_2, *, control, 0)," &
"309 (BC_7, PCI_AD14, bidir, X, 308, 0, Z)," &
"310 (BC_2, *, control, 0)," &
"311 (BC_7, PCI_IDSEL, bidir, X, 310, 0, Z)," &
"312 (BC_2, *, control, 0)," &
"313 (BC_7, PCI_PAR, bidir, X, 312, 0, Z)," &
"314 (BC_2, *, control, 0)," &
"315 (BC_7, PCI_FRAME_B, bidir, X, 314, 0, Z)," &
"316 (BC_2, *, control, 0)," &
"317 (BC_7, PCI_C_BE_B1, bidir, X, 316, 0, Z)," &
"318 (BC_2, *, control, 0)," &
"319 (BC_7, PCI_IRDY_B, bidir, X, 318, 0, Z)," &
"320 (BC_2, *, control, 0)," &
"321 (BC_7, PCI_PERR_B, bidir, X, 320, 0, Z)," &
"322 (BC_2, *, control, 0)," &
"323 (BC_7, PCI_SERR_B, bidir, X, 322, 0, Z)," &
"324 (BC_2, *, control, 0)," &
"325 (BC_1, PCI_CLK1, output3, X, 324, 0, Z)," &
"326 (BC_2, *, control, 0)," &
"327 (BC_1, PCI_CLK2, output3, X, 326, 0, Z)," &
"328 (BC_2, *, control, 0)," &
"329 (BC_1, PCI_CLK0, output3, X, 328, 0, Z)," &
"330 (BC_2, *, control, 0)," &
"331 (BC_7, PCI_AD17, bidir, X, 330, 0, Z)," &
"332 (BC_2, *, control, 0)," &
"333 (BC_7, PCI_AD16, bidir, X, 332, 0, Z)," &
"334 (BC_2, *, control, 0)," &
"335 (BC_7, PCI_AD20, bidir, X, 334, 0, Z)," &
"336 (BC_2, *, control, 0)," &
"337 (BC_7, PCI_AD18, bidir, X, 336, 0, Z)," &
"338 (BC_2, *, control, 0)," &
"339 (BC_7, PCI_AD19, bidir, X, 338, 0, Z)," &
"340 (BC_2, *, control, 0)," &
"341 (BC_7, PCI_C_BE_B2, bidir, X, 340, 0, Z)," &
"342 (BC_2, *, control, 0)," &
"343 (BC_7, PCI_STOP_B, bidir, X, 342, 0, Z)," &
"344 (BC_2, *, control, 0)," &
"345 (BC_7, PCI_DEVSEL_B, bidir, X, 344, 0, Z)," &
"346 (BC_2, *, control, 0)," &
"347 (BC_7, PCI_TRDY_B, bidir, X, 346, 0, Z)," &
"348 (BC_2, *, control, 0)," &
"349 (BC_7, PCI_PME_B, bidir, X, 348, 0, Z)," &
"350 (BC_2, *, control, 0)," &
"351 (BC_7, PCI_AD22, bidir, X, 350, 0, Z)," &
"352 (BC_2, *, control, 0)," &
"353 (BC_7, PCI_AD23, bidir, X, 352, 0, Z)," &
"354 (BC_2, *, control, 0)," &
"355 (BC_7, PCI_C_BE_B3, bidir, X, 354, 0, Z)," &
"356 (BC_2, *, control, 0)," &
"357 (BC_7, PCI_AD21, bidir, X, 356, 0, Z)," &
"358 (BC_2, *, control, 0)," &
"359 (BC_7, PCI_AD25, bidir, X, 358, 0, Z)," &
"360 (BC_2, *, control, 0)," &
"361 (BC_7, PCI_AD27, bidir, X, 360, 0, Z)," &
"362 (BC_2, *, control, 0)," &
"363 (BC_7, PCI_AD30, bidir, X, 362, 0, Z)," &
"364 (BC_2, *, control, 0)," &
"365 (BC_7, PCI_AD24, bidir, X, 364, 0, Z)," &
"366 (BC_2, *, control, 0)," &
"367 (BC_7, PCI_AD26, bidir, X, 366, 0, Z)," &
"368 (BC_2, *, control, 0)," &
"369 (BC_7, PCI_GNT_B0, bidir, X, 368, 0, Z)," &
"370 (BC_2, *, control, 0)," &
"371 (BC_7, PCI_AD28, bidir, X, 370, 0, Z)," &
"372 (BC_2, *, control, 0)," &
"373 (BC_7, PCI_RESET_OUT_B, bidir, X, 372, 0, Z)," &
"374 (BC_2, *, control, 0)," &
"375 (BC_7, PCI_AD31, bidir, X, 374, 0, Z)," &
"376 (BC_2, *, control, 0)," &
"377 (BC_7, PCI_AD29, bidir, X, 376, 0, Z)," &
"378 (BC_2, *, control, 0)," &
"379 (BC_7, PCI_REQ_B1, bidir, X, 378, 0, Z)," &
"380 (BC_2, *, control, 0)," &
"381 (BC_7, PCI_REQ_B0, bidir, X, 380, 0, Z)," &
"382 (BC_2, *, control, 0)," &
"383 (BC_7, PCI_INTA, bidir, X, 382, 0, Z)," &
"384 (BC_2, *, control, 0)," &
"385 (BC_7, PCI_REQ_B2, bidir, X, 384, 0, Z)," &
"386 (BC_2, *, control, 0)," &
"387 (BC_1, PCI_GNT_B1, output3, X, 386, 0, Z)," &
"388 (BC_2, *, control, 0)," &
"389 (BC_1, PCI_GNT_B2, output3, X, 388, 0, Z)," &
"390 (BC_2, *, control, 0)," &
"391 (BC_7, UART_RTS_B2, bidir, X, 390, 0, Z)," &
"392 (BC_2, *, control, 0)," &
"393 (BC_7, UART_RTS_B1, bidir, X, 392, 0, Z)," &
"394 (BC_2, *, control, 0)," &
"395 (BC_7, UART_CTS_B2, bidir, X, 394, 0, Z)," &
"396 (BC_2, *, control, 0)," &
"397 (BC_7, UART_CTS_B1, bidir, X, 396, 0, Z)," &
"398 (BC_2, *, control, 0)," &
"399 (BC_7, UART_SIN2, bidir, X, 398, 0, Z)," &
"400 (BC_2, *, control, 0)," &
"401 (BC_7, UART_SIN1, bidir, X, 400, 0, Z)," &
"402 (BC_2, *, control, 0)," &
"403 (BC_7, UART_SOUT2, bidir, X, 402, 0, Z)," &
"404 (BC_2, *, control, 0)," &
"405 (BC_7, UART_SOUT1, bidir, X, 404, 0, Z)," &
"406 (BC_2, *, internal, X)," &
"407 (BC_2, USB_CLK_IN, input, X)," &
"408 (BC_2, *, internal, X)," &
"409 (BC_2, USB_XTAL_IN, input, X)," &
"410 (BC_2, *, internal, X)," &
"411 (BC_1, TSEC2_TX_ER, output2, X)," &
"412 (BC_2, *, internal, X)," &
"413 (BC_1, TSEC2_TX_EN, output2, X)," &
"414 (BC_2, *, control, 0)," &
"415 (BC_7, TSEC2_TXD3, bidir, X, 414, 0, Z)," &
"416 (BC_2, *, internal, X)," &
"417 (BC_1, TSEC2_GTX_CLK, output2, X)," &
"418 (BC_2, *, control, 0)," &
"419 (BC_7, TSEC2_RX_ER, bidir, X, 418, 0, Z)," &
"420 (BC_2, *, control, 0)," &
"421 (BC_7, TSEC2_RXD3, bidir, X, 420, 0, Z)," &
"422 (BC_2, *, control, 0)," &
"423 (BC_7, TSEC2_RXD2, bidir, X, 422, 0, Z)," &
"424 (BC_2, *, control, 0)," &
"425 (BC_7, TSEC2_RXD1, bidir, X, 424, 0, Z)," &
"426 (BC_2, *, control, 0)," &
"427 (BC_7, TSEC2_RXD0, bidir, X, 426, 0, Z)," &
"428 (BC_2, *, control, 0)," &
"429 (BC_7, TSEC2_RX_DV, bidir, X, 428, 0, Z)," &
"430 (BC_2, *, control, 0)," &
"431 (BC_7, TSEC2_RX_CLK, bidir, X, 430, 0, Z)," &
"432 (BC_2, *, control, 0)," &
"433 (BC_7, TSEC2_CRS, bidir, X, 432, 0, Z)," &
"434 (BC_2, *, control, 0)," &
"435 (BC_7, TSEC2_COL, bidir, X, 434, 0, Z)," &
"436 (BC_2, *, control, 0)," &
"437 (BC_7, TSEC2_TX_CLK, bidir, X, 436, 0, Z)," &
"438 (BC_2, *, control, 0)," &
"439 (BC_7, TSEC2_TXD0, bidir, X, 438, 0, Z)," &
"440 (BC_2, *, control, 0)," &
"441 (BC_7, TSEC2_TXD1, bidir, X, 440, 0, Z)," &
"442 (BC_2, *, control, 0)," &
"443 (BC_7, TSEC2_TXD2, bidir, X, 442, 0, Z)," &
"444 (BC_2, *, control, 0)," &
"445 (BC_7, IRQ_B2, bidir, X, 444, 0, Z)," &
"446 (BC_2, *, control, 0)," &
"447 (BC_7, HRESET_B, bidir, X, 446, 0, Z)," &
"448 (BC_2, *, internal, X)," &
"449 (BC_2, PORESET_B, input, X)," &
"450 (BC_2, *, internal, X)," &
"451 (BC_1, QUIESCE_B, output2, X)," &
"452 (BC_2, *, control, 0)," &
"453 (BC_7, CFG_CLKIN_DIV_B, bidir, X, 452, 0, Z)," &
"454 (BC_2, *, control, 0)," &
"455 (BC_7, GPIO_0, bidir, X, 454, 0, Z)," &
"456 (BC_2, *, control, 0)," &
"457 (BC_7, GPIO_1, bidir, X, 456, 0, Z)," &
"458 (BC_2, *, control, 0)," &
"459 (BC_7, PMC_PWR_OK, bidir, X, 458, 0, Z)," &
"460 (BC_2, *, internal, X)," &
"461 (BC_1, EXT_PWR_CTRL, output2, X)," &
"462 (BC_2, *, control, 0)," &
"463 (BC_7, TSEC1_GTX_CLK125, bidir, X, 462, 0, Z)," &
"464 (BC_2, *, internal, X)," &
"465 (BC_1, TSEC1_MDC, output2, X)," &
"466 (BC_2, *, control, 0)," &
"467 (BC_7, TSEC1_MDIO, bidir, X, 466, 0, Z)," &
"468 (BC_2, *, control, 0)," &
"469 (BC_7, IRQ_B1, bidir, X, 468, 0, Z)," &
"470 (BC_2, *, internal, X)," &
"471 (BC_1, TSEC1_TX_ER, output2, X)," &
"472 (BC_2, *, control, 0)," &
"473 (BC_7, TSEC1_TX_EN, bidir, X, 472, 0, Z)," &
"474 (BC_2, *, control, 0)," &
"475 (BC_7, TSEC1_TXD3, bidir, X, 474, 0, Z)," &
"476 (BC_2, *, control, 0)," &
"477 (BC_7, TSEC1_TXD2, bidir, X, 476, 0, Z)," &
"478 (BC_2, *, control, 0)," &
"479 (BC_7, TSEC1_TXD1, bidir, X, 478, 0, Z)," &
"480 (BC_2, *, internal, X)," &
"481 (BC_1, TSEC1_TXD0, output2, X)," &
"482 (BC_2, *, control, 0)," &
"483 (BC_7, TSEC1_TX_CLK, bidir, X, 482, 0, Z)," &
"484 (BC_2, *, control, 0)," &
"485 (BC_7, TSEC1_RX_ER, bidir, X, 484, 0, Z)," &
"486 (BC_2, *, control, 0)," &
"487 (BC_7, TSEC1_RXD3, bidir, X, 486, 0, Z)," &
"488 (BC_2, *, control, 0)," &
"489 (BC_7, TSEC1_RXD2, bidir, X, 488, 0, Z)," &
"490 (BC_2, *, control, 0)," &
"491 (BC_7, TSEC1_RXD1, bidir, X, 490, 0, Z)," &
"492 (BC_2, *, control, 0)," &
"493 (BC_7, TSEC1_RXD0, bidir, X, 492, 0, Z)," &
"494 (BC_2, *, control, 0)," &
"495 (BC_7, TSEC1_CRS, bidir, X, 494, 0, Z)," &
"496 (BC_2, *, control, 0)," &
"497 (BC_7, TSEC1_COL, bidir, X, 496, 0, Z)," &
"498 (BC_2, *, control, 0)," &
"499 (BC_7, TSEC1_RX_DV, bidir, X, 498, 0, Z)," &
"500 (BC_2, *, control, 0)," &
"501 (BC_7, TSEC1_RX_CLK, bidir, X, 500, 0, Z)," &
"502 (BC_2, *, control, 0)," &
"503 (BC_7, TSEC1_GTX_CLK, bidir, X, 502, 0, Z)," &
"504 (BC_2, *, control, 0)," &
"505 (BC_7, GPIO_2, bidir, X, 504, 0, Z)," &
"506 (BC_2, *, control, 0)," &
"507 (BC_7, GPIO_4, bidir, X, 506, 0, Z)," &
"508 (BC_2, *, control, 0)," &
"509 (BC_7, GPIO_3, bidir, X, 508, 0, Z)," &
"510 (BC_2, *, control, 0)," &
"511 (BC_7, GPIO_5, bidir, X, 510, 0, Z)," &
"512 (BC_2, *, control, 0)," &
"513 (BC_7, GPIO_6, bidir, X, 512, 0, Z)," &
"514 (BC_2, *, control, 0)," &
"515 (BC_7, GPIO_7, bidir, X, 514, 0, Z)," &
"516 (BC_2, *, control, 0)," &
"517 (BC_7, GPIO_8, bidir, X, 516, 0, Z)," &
"518 (BC_2, *, control, 0)," &
"519 (BC_7, GPIO_9, bidir, X, 518, 0, Z)," &
"520 (BC_2, *, control, 0)," &
"521 (BC_7, GPIO_11, bidir, X, 520, 0, Z)," &
"522 (BC_2, *, control, 0)," &
"523 (BC_7, GPIO_10, bidir, X, 522, 0, Z)," &
"524 (BC_2, *, control, 0)," &
"525 (BC_7, IIC_SDA, bidir, X, 524, 0, Z)," &
"526 (BC_2, *, control, 0)," &
"527 (BC_7, IIC_SCL, bidir, X, 526, 0, Z)," &
"528 (BC_2, *, control, 1)," &
"529 (BC_2, TXA, output3, 0, 528, 1, Z)," &
"530 (BC_4, *, internal, X)," &
"531 (BC_4, SD_REF_CLK, clock, X)," &
"532 (BC_2, *, internal, X)," &
"533 (BC_2, *, internal, X)," &
"534 (BC_4, *, internal, X)," &
"535 (BC_2, *, control, 1)," &
"536 (BC_2, TXB, output3, 0, 535, 1, Z)," &
"537 (BC_2, *, control, 0)," &
"538 (BC_1, MCP_OUT_B, output3, X, 537, 0, Z)";
end MPC8315;