-- BSDL file for device %XC2C128%, package %VQ100%
-- Xilinx, Inc. ADVANCED: Exp $ $Date: 2002-09-10 16:50:20-07 $
-- Generated by createBSDL_BR %1a.0%
--
-- For technical support, http://support.xilinx.com -> enter text 'bsdl'
-- in the text search box at the left of the page. If none of
-- these records resolve your problem you should open a web support case
-- or contact our technical support at:
--
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-- Germany (49) 89 991 54930 dlhelp@xilinx.com
-- Japan (81) 3-3297-9163 jhotline@xilinx.com
-- This BSDL file was created using BSDL_MW version 1a.0
-- please contact the author of this program with any proposed
-- changes, modifications, updates
entity XC2C128_VQ100 is
generic (PHYSICAL_PIN_MAP : string := "UNDEFINED");
port ( tdi : in bit;
tck : in bit;
tms : in bit;
tdo : out bit;
IO_0 : inout bit;
IO_2 : inout bit;
IO_3 : inout bit;
IO_4 : inout bit;
IO_5 : inout bit;
IO_6 : inout bit;
IO_7 : inout bit;
IO_8 : inout bit;
IO_10 : inout bit;
IO_11 : inout bit;
IO_13 : inout bit;
IO_14 : inout bit;
IO_15 : inout bit;
IO_16 : inout bit;
IO_17 : inout bit;
IO_18 : inout bit;
IO_20 : inout bit;
IO_21 : inout bit;
IO_22 : inout bit;
IO_23 : inout bit;
IO_25 : inout bit;
IO_26 : inout bit;
IO_27 : inout bit;
IO_28 : inout bit;
IO_29 : inout bit;
IO_30 : inout bit;
IO_31 : inout bit;
IO_33 : inout bit;
IO_34 : inout bit;
IO_35 : inout bit;
IO_36 : inout bit;
IO_37 : inout bit;
IO_40 : inout bit;
IO_41 : inout bit;
IO_42 : inout bit;
IO_43 : inout bit;
IO_44 : inout bit;
IO_45 : inout bit;
IO_46 : inout bit;
IO_47 : inout bit;
IO_48 : inout bit;
IO_49 : inout bit;
IO_50 : inout bit;
IO_51 : inout bit;
IO_52 : inout bit;
IO_54 : inout bit;
IO_56 : inout bit;
IO_57 : inout bit;
IO_58 : inout bit;
IO_59 : inout bit;
IO_60 : inout bit;
IO_61 : inout bit;
IO_63 : inout bit;
IO_64 : inout bit;
IO_65 : inout bit;
IO_66 : inout bit;
IO_67 : inout bit;
IO_68 : inout bit;
IO_70 : inout bit;
IO_72 : inout bit;
IO_74 : inout bit;
IO_75 : inout bit;
IO_76 : inout bit;
IO_78 : inout bit;
IO_79 : inout bit;
IO_80 : inout bit;
IO_82 : inout bit;
IO_84 : inout bit;
IO_85 : inout bit;
IO_86 : inout bit;
IO_87 : inout bit;
IO_89 : inout bit;
IO_90 : inout bit;
IO_91 : inout bit;
IO_93 : inout bit;
IO_95 : inout bit;
IO_96 : inout bit;
IO_97 : inout bit;
IO_98 : inout bit;
IO_99 : inout bit);
use std_1149_1_1994.all;
use STD_1532_2001.all;
attribute COMPONENT_CONFORMANCE of XC2C128_VQ100 : entity is "std_1149_1_1993";
attribute PIN_MAP of XC2C128_VQ100 : entity is PHYSICAL_PIN_MAP;
constant UNDEFINED : PIN_MAP_STRING :=
" tdi:45, tck:48, tms:47, tdo:83," &
" IO_0:13, IO_2:12, IO_3:11, IO_4:10," &
" IO_5:9, IO_6:8, IO_7:7, IO_8:6," &
" IO_10:4, IO_11:3, IO_13:14, IO_14:15," &
" IO_15:16, IO_16:17, IO_17:18, IO_18:19," &
" IO_20:22, IO_21:23, IO_22:24, IO_23:27," &
" IO_25:2, IO_26:1, IO_27:99, IO_28:97, IO_29:96," &
" IO_30:95, IO_31:94, IO_33:93, IO_34:92," &
" IO_35:91, IO_36:90, IO_37:28," &
" IO_40:29, IO_41:30, IO_42:32, IO_43:33, IO_44:34," &
" IO_45:35, IO_46:36, IO_47:37, IO_48:39, IO_49:40," &
" IO_50:65, IO_51:66, IO_52:67, IO_54:68," &
" IO_56:70, IO_57:71, IO_58:72, IO_59:73," &
" IO_60:74, IO_61:76, IO_63:64, IO_64:63," &
" IO_65:61, IO_66:60, IO_67:59, IO_68:58," &
" IO_70:56, IO_72:55, IO_74:54," &
" IO_75:77, IO_76:78, IO_78:79, IO_79:80," &
" IO_80:81, IO_82:82, IO_84:85," &
" IO_85:86, IO_86:87, IO_87:89, IO_89:53," &
" IO_90:52, IO_91:50, IO_93:49," &
" IO_95:46, IO_96:44, IO_97:43, IO_98:42, IO_99:41";
attribute TAP_SCAN_IN of tdi : signal is true;
attribute TAP_SCAN_CLOCK of tck : signal is (10.0e6, both);
attribute TAP_SCAN_MODE of tms : signal is true;
attribute TAP_SCAN_OUT of tdo : signal is true;
attribute INSTRUCTION_LENGTH of XC2C128_VQ100 : entity is 8;
attribute INSTRUCTION_OPCODE of XC2C128_VQ100 : entity is
"BYPASS (11111111)," &
"SAMPLE (00000011)," &
"EXTEST (00000000)," &
"IDCODE (00000001)," &
"USERCODE (11111101)," &
"INTEST (00000010)," &
"HIGHZ (11111100)," &
"ISC_ENABLE_CLAMP (11101001)," &
"ISC_ENABLEOTF (11100100)," &
"ISC_ENABLE (11101000)," &
"ISC_SRAM_READ (11100111)," &
"ISC_SRAM_WRITE (11100110)," &
"ISC_ERASE (11101101)," &
"ISC_PROGRAM (11101010)," &
"ISC_READ (11101110)," &
"ISC_INIT (11110000)," &
"ISC_DISABLE (11000000)," &
"TEST_ENABLE (00010001)," &
"BULKPROG (00010010)," &
"ERASE_ALL (00010100)," &
"MVERIFY (00010011)," &
"TEST_DISABLE (00010101)," &
"STRTEST (00010110)," &
"ISC_NOOP (11100000)";
attribute INSTRUCTION_PRIVATE of XC2C128_VQ100 : entity is
"BULKPROG, MVERIFY, ERASE_ALL, TEST_ENABLE, TEST_DISABLE,STRTEST";
attribute INSTRUCTION_CAPTURE of XC2C128_VQ100 : entity is "XXXXXX01" ;
attribute IDCODE_REGISTER of XC2C128_VQ100 : entity is "00000110110110001010000010010011";
attribute USERCODE_REGISTER of XC2C128_VQ100 : entity is "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
attribute REGISTER_ACCESS of XC2C128_VQ100 : entity is
"BOUNDARY (SAMPLE)," &
"BOUNDARY (EXTEST)," &
"DEVICE_ID (IDCODE, USERCODE)," &
"BOUNDARY (INTEST)," &
"ISC_Default[1] (ISC_ENABLE_CLAMP)," &
"DATAREG[759] (ISC_ENABLEOTF)," &
"DATAREG[759] (ISC_ENABLE)," &
"DATAREG[759] (ISC_SRAM_READ)," &
"DATAREG[759] (ISC_SRAM_WRITE)," &
"DATAREG[759] (ISC_ERASE)," &
"DATAREG[759] (ISC_PROGRAM)," &
"DATAREG[759] (ISC_READ)," &
"DATAREG[759] (ISC_INIT)," &
"DATAREG[759] (ISC_DISABLE)," &
"ISC_Default[1] (ISC_NOOP)";
attribute BOUNDARY_LENGTH of XC2C128_VQ100 : entity is 328;
attribute BOUNDARY_REGISTER of XC2C128_VQ100 : entity is
--
-- num cell port function safe [ccell disval rslt]
--
" 327 (BC_1, IO_0, INPUT, X)," &
" 326 (BC_1, IO_0, OUTPUT3, X, 325, 0,Z),"&
" 325 (BC_1, *, CONTROL, X)," &
" 324 (BC_1, *, INTERNAL, X)," &
" 323 (BC_1, *, INTERNAL, X)," &
" 322 (BC_1, *, INTERNAL, X)," &
" 321 (BC_1, IO_2, INPUT, X)," &
" 320 (BC_1, IO_2, OUTPUT3, X, 319, 0,Z),"&
" 319 (BC_1, *, CONTROL, X)," &
" 318 (BC_1, IO_3, INPUT, X)," &
" 317 (BC_1, IO_3, OUTPUT3, X, 316, 0,Z),"&
" 316 (BC_1, *, CONTROL, X)," &
" 315 (BC_1, IO_4, INPUT, X)," &
" 314 (BC_1, IO_4, OUTPUT3, X, 313, 0,Z),"&
" 313 (BC_1, *, CONTROL, X)," &
" 312 (BC_1, IO_5, INPUT, X)," &
" 311 (BC_1, IO_5, OUTPUT3, X, 310, 0,Z),"&
" 310 (BC_1, *, CONTROL, X)," &
" 309 (BC_1, *, INTERNAL, X)," &
" 308 (BC_1, *, INTERNAL, X)," &
" 307 (BC_1, *, INTERNAL, X)," &
" 306 (BC_1, *, INTERNAL, X)," &
" 305 (BC_1, IO_6, INPUT, X)," &
" 304 (BC_1, IO_6, OUTPUT3, X, 303, 0,Z),"&
" 303 (BC_1, *, CONTROL, X)," &
" 302 (BC_1, IO_7, INPUT, X)," &
" 301 (BC_1, IO_7, OUTPUT3, X, 300, 0,Z),"&
" 300 (BC_1, *, CONTROL, X)," &
" 299 (BC_1, IO_8, INPUT, X)," &
" 298 (BC_1, IO_8, OUTPUT3, X, 297, 0,Z),"&
" 297 (BC_1, *, CONTROL, X)," &
" 296 (BC_1, *, INTERNAL, X)," &
" 295 (BC_1, *, INTERNAL, X)," &
" 294 (BC_1, *, INTERNAL, X)," &
" 293 (BC_1, IO_10, INPUT, X)," &
" 292 (BC_1, IO_10, OUTPUT3, X, 291, 0,Z),"&
" 291 (BC_1, *, CONTROL, X)," &
" 290 (BC_1, IO_11, INPUT, X)," &
" 289 (BC_1, IO_11, OUTPUT3, X, 288, 0,Z),"&
" 288 (BC_1, *, CONTROL, X)," &
" 287 (BC_1, *, INTERNAL, X)," &
" 286 (BC_1, *, INTERNAL, X)," &
" 285 (BC_1, *, INTERNAL, X)," &
" 284 (BC_1, IO_13, INPUT, X)," &
" 283 (BC_1, IO_13, OUTPUT3, X, 282, 0,Z),"&
" 282 (BC_1, *, CONTROL, X)," &
" 281 (BC_1, IO_14, INPUT, X)," &
" 280 (BC_1, IO_14, OUTPUT3, X, 279, 0,Z),"&
" 279 (BC_1, *, CONTROL, X)," &
" 278 (BC_1, IO_15, INPUT, X)," &
" 277 (BC_1, IO_15, OUTPUT3, X, 276, 0,Z),"&
" 276 (BC_1, *, CONTROL, X)," &
" 275 (BC_1, IO_16, INPUT, X)," &
" 274 (BC_1, IO_16, OUTPUT3, X, 273, 0,Z),"&
" 273 (BC_1, *, CONTROL, X)," &
" 272 (BC_1, IO_17, INPUT, X)," &
" 271 (BC_1, IO_17, OUTPUT3, X, 270, 0,Z),"&
" 270 (BC_1, *, CONTROL, X)," &
" 269 (BC_1, *, INTERNAL, X)," &
" 268 (BC_1, *, INTERNAL, X)," &
" 267 (BC_1, *, INTERNAL, X)," &
" 266 (BC_1, *, INTERNAL, X)," &
" 265 (BC_1, IO_18, INPUT, X)," &
" 264 (BC_1, IO_18, OUTPUT3, X, 263, 0,Z),"&
" 263 (BC_1, *, CONTROL, X)," &
" 262 (BC_1, *, INTERNAL, X)," &
" 261 (BC_1, *, INTERNAL, X)," &
" 260 (BC_1, *, INTERNAL, X)," &
" 259 (BC_1, IO_20, INPUT, X)," &
" 258 (BC_1, IO_20, OUTPUT3, X, 257, 0,Z),"&
" 257 (BC_1, *, CONTROL, X)," &
" 256 (BC_1, IO_21, INPUT, X)," &
" 255 (BC_1, IO_21, OUTPUT3, X, 254, 0,Z),"&
" 254 (BC_1, *, CONTROL, X)," &
" 253 (BC_1, IO_22, INPUT, X)," &
" 252 (BC_1, IO_22, OUTPUT3, X, 251, 0,Z),"&
" 251 (BC_1, *, CONTROL, X)," &
" 250 (BC_1, IO_23, INPUT, X)," &
" 249 (BC_1, IO_23, OUTPUT3, X, 248, 0,Z),"&
" 248 (BC_1, *, CONTROL, X)," &
" 247 (BC_1, *, INTERNAL, X)," &
" 246 (BC_1, *, INTERNAL, X)," &
" 245 (BC_1, *, INTERNAL, X)," &
" 244 (BC_1, IO_25, INPUT, X)," &
" 243 (BC_1, IO_25, OUTPUT3, X, 242, 0,Z),"&
" 242 (BC_1, *, CONTROL, X)," &
" 241 (BC_1, IO_26, INPUT, X)," &
" 240 (BC_1, IO_26, OUTPUT3, X, 239, 0,Z),"&
" 239 (BC_1, *, CONTROL, X)," &
" 238 (BC_1, IO_27, INPUT, X)," &
" 237 (BC_1, IO_27, OUTPUT3, X, 236, 0,Z),"&
" 236 (BC_1, *, CONTROL, X)," &
" 235 (BC_1, IO_28, INPUT, X)," &
" 234 (BC_1, IO_28, OUTPUT3, X, 233, 0,Z),"&
" 233 (BC_1, *, CONTROL, X)," &
" 232 (BC_1, IO_29, INPUT, X)," &
" 231 (BC_1, IO_29, OUTPUT3, X, 230, 0,Z),"&
" 230 (BC_1, *, CONTROL, X)," &
" 229 (BC_1, IO_30, INPUT, X)," &
" 228 (BC_1, IO_30, OUTPUT3, X, 227, 0,Z),"&
" 227 (BC_1, *, CONTROL, X)," &
" 226 (BC_1, *, INTERNAL, X)," &
" 225 (BC_1, *, INTERNAL, X)," &
" 224 (BC_1, *, INTERNAL, X)," &
" 223 (BC_1, IO_31, INPUT, X)," &
" 222 (BC_1, IO_31, OUTPUT3, X, 221, 0,Z),"&
" 221 (BC_1, *, CONTROL, X)," &
" 220 (BC_1, *, INTERNAL, X)," &
" 219 (BC_1, *, INTERNAL, X)," &
" 218 (BC_1, *, INTERNAL, X)," &
" 217 (BC_1, IO_33, INPUT, X)," &
" 216 (BC_1, IO_33, OUTPUT3, X, 215, 0,Z),"&
" 215 (BC_1, *, CONTROL, X)," &
" 214 (BC_1, IO_34, INPUT, X)," &
" 213 (BC_1, IO_34, OUTPUT3, X, 212, 0,Z),"&
" 212 (BC_1, *, CONTROL, X)," &
" 211 (BC_1, IO_35, INPUT, X)," &
" 210 (BC_1, IO_35, OUTPUT3, X, 209, 0,Z),"&
" 209 (BC_1, *, CONTROL, X)," &
" 208 (BC_1, IO_36, INPUT, X)," &
" 207 (BC_1, IO_36, OUTPUT3, X, 206, 0,Z),"&
" 206 (BC_1, *, CONTROL, X)," &
" 205 (BC_1, IO_37, INPUT, X)," &
" 204 (BC_1, IO_37, OUTPUT3, X, 203, 0,Z),"&
" 203 (BC_1, *, CONTROL, X)," &
" 202 (BC_1, *, INTERNAL, X)," &
" 201 (BC_1, *, INTERNAL, X)," &
" 200 (BC_1, *, INTERNAL, X)," &
" 199 (BC_1, *, INTERNAL, X)," &
" 198 (BC_1, *, INTERNAL, X)," &
" 197 (BC_1, *, INTERNAL, X)," &
" 196 (BC_1, IO_40, INPUT, X)," &
" 195 (BC_1, IO_40, OUTPUT3, X, 194, 0,Z),"&
" 194 (BC_1, *, CONTROL, X)," &
" 193 (BC_1, IO_41, INPUT, X)," &
" 192 (BC_1, IO_41, OUTPUT3, X, 191, 0,Z),"&
" 191 (BC_1, *, CONTROL, X)," &
" 190 (BC_1, IO_42, INPUT, X)," &
" 189 (BC_1, IO_42, OUTPUT3, X, 188, 0,Z),"&
" 188 (BC_1, *, CONTROL, X)," &
" 187 (BC_1, IO_43, INPUT, X)," &
" 186 (BC_1, IO_43, OUTPUT3, X, 185, 0,Z),"&
" 185 (BC_1, *, CONTROL, X)," &
" 184 (BC_1, *, INTERNAL, X)," &
" 183 (BC_1, *, INTERNAL, X)," &
" 182 (BC_1, *, INTERNAL, X)," &
" 181 (BC_1, IO_44, INPUT, X)," &
" 180 (BC_1, IO_44, OUTPUT3, X, 179, 0,Z),"&
" 179 (BC_1, *, CONTROL, X)," &
" 178 (BC_1, IO_45, INPUT, X)," &
" 177 (BC_1, IO_45, OUTPUT3, X, 176, 0,Z),"&
" 176 (BC_1, *, CONTROL, X)," &
" 175 (BC_1, IO_46, INPUT, X)," &
" 174 (BC_1, IO_46, OUTPUT3, X, 173, 0,Z),"&
" 173 (BC_1, *, CONTROL, X)," &
" 172 (BC_1, IO_47, INPUT, X)," &
" 171 (BC_1, IO_47, OUTPUT3, X, 170, 0,Z),"&
" 170 (BC_1, *, CONTROL, X)," &
" 169 (BC_1, IO_48, INPUT, X)," &
" 168 (BC_1, IO_48, OUTPUT3, X, 167, 0,Z),"&
" 167 (BC_1, *, CONTROL, X)," &
" 166 (BC_1, IO_49, INPUT, X)," &
" 165 (BC_1, IO_49, OUTPUT3, X, 164, 0,Z),"&
" 164 (BC_1, *, CONTROL, X)," &
" 163 (BC_1, IO_50, INPUT, X)," &
" 162 (BC_1, IO_50, OUTPUT3, X, 161, 0,Z),"&
" 161 (BC_1, *, CONTROL, X)," &
" 160 (BC_1, IO_51, INPUT, X)," &
" 159 (BC_1, IO_51, OUTPUT3, X, 158, 0,Z),"&
" 158 (BC_1, *, CONTROL, X)," &
" 157 (BC_1, IO_52, INPUT, X)," &
" 156 (BC_1, IO_52, OUTPUT3, X, 155, 0,Z),"&
" 155 (BC_1, *, CONTROL, X)," &
" 154 (BC_1, *, INTERNAL, X)," &
" 153 (BC_1, *, INTERNAL, X)," &
" 152 (BC_1, *, INTERNAL, X)," &
" 151 (BC_1, IO_54, INPUT, X)," &
" 150 (BC_1, IO_54, OUTPUT3, X, 149, 0,Z),"&
" 149 (BC_1, *, CONTROL, X)," &
" 148 (BC_1, *, INTERNAL, X)," &
" 147 (BC_1, *, INTERNAL, X)," &
" 146 (BC_1, *, INTERNAL, X)," &
" 145 (BC_1, IO_56, INPUT, X)," &
" 144 (BC_1, IO_56, OUTPUT3, X, 143, 0,Z),"&
" 143 (BC_1, *, CONTROL, X)," &
" 142 (BC_1, *, INTERNAL, X)," &
" 141 (BC_1, *, INTERNAL, X)," &
" 140 (BC_1, *, INTERNAL, X)," &
" 139 (BC_1, IO_57, INPUT, X)," &
" 138 (BC_1, IO_57, OUTPUT3, X, 137, 0,Z),"&
" 137 (BC_1, *, CONTROL, X)," &
" 136 (BC_1, IO_58, INPUT, X)," &
" 135 (BC_1, IO_58, OUTPUT3, X, 134, 0,Z),"&
" 134 (BC_1, *, CONTROL, X)," &
" 133 (BC_1, IO_59, INPUT, X)," &
" 132 (BC_1, IO_59, OUTPUT3, X, 131, 0,Z),"&
" 131 (BC_1, *, CONTROL, X)," &
" 130 (BC_1, IO_60, INPUT, X)," &
" 129 (BC_1, IO_60, OUTPUT3, X, 128, 0,Z),"&
" 128 (BC_1, *, CONTROL, X)," &
" 127 (BC_1, IO_61, INPUT, X)," &
" 126 (BC_1, IO_61, OUTPUT3, X, 125, 0,Z),"&
" 125 (BC_1, *, CONTROL, X)," &
" 124 (BC_1, *, INTERNAL, X)," &
" 123 (BC_1, *, INTERNAL, X)," &
" 122 (BC_1, *, INTERNAL, X)," &
" 121 (BC_1, IO_63, INPUT, X)," &
" 120 (BC_1, IO_63, OUTPUT3, X, 119, 0,Z),"&
" 119 (BC_1, *, CONTROL, X)," &
" 118 (BC_1, IO_64, INPUT, X)," &
" 117 (BC_1, IO_64, OUTPUT3, X, 116, 0,Z),"&
" 116 (BC_1, *, CONTROL, X)," &
" 115 (BC_1, IO_65, INPUT, X)," &
" 114 (BC_1, IO_65, OUTPUT3, X, 113, 0,Z),"&
" 113 (BC_1, *, CONTROL, X)," &
" 112 (BC_1, IO_66, INPUT, X)," &
" 111 (BC_1, IO_66, OUTPUT3, X, 110, 0,Z),"&
" 110 (BC_1, *, CONTROL, X)," &
" 109 (BC_1, IO_67, INPUT, X)," &
" 108 (BC_1, IO_67, OUTPUT3, X, 107, 0,Z),"&
" 107 (BC_1, *, CONTROL, X)," &
" 106 (BC_1, IO_68, INPUT, X)," &
" 105 (BC_1, IO_68, OUTPUT3, X, 104, 0,Z),"&
" 104 (BC_1, *, CONTROL, X)," &
" 103 (BC_1, *, INTERNAL, X)," &
" 102 (BC_1, *, INTERNAL, X)," &
" 101 (BC_1, *, INTERNAL, X)," &
" 100 (BC_1, *, INTERNAL, X)," &
" 99 (BC_1, *, INTERNAL, X)," &
" 98 (BC_1, *, INTERNAL, X)," &
" 97 (BC_1, *, INTERNAL, X)," &
" 96 (BC_1, IO_70, INPUT, X)," &
" 95 (BC_1, IO_70, OUTPUT3, X, 94, 0,Z),"&
" 94 (BC_1, *, CONTROL, X)," &
" 93 (BC_1, *, INTERNAL, X)," &
" 92 (BC_1, *, INTERNAL, X)," &
" 91 (BC_1, *, INTERNAL, X)," &
" 90 (BC_1, IO_72, INPUT, X)," &
" 89 (BC_1, IO_72, OUTPUT3, X, 88, 0,Z),"&
" 88 (BC_1, *, CONTROL, X)," &
" 87 (BC_1, *, INTERNAL, X)," &
" 86 (BC_1, *, INTERNAL, X)," &
" 85 (BC_1, *, INTERNAL, X)," &
" 84 (BC_1, IO_74, INPUT, X)," &
" 83 (BC_1, IO_74, OUTPUT3, X, 82, 0,Z),"&
" 82 (BC_1, *, CONTROL, X)," &
" 81 (BC_1, IO_75, INPUT, X)," &
" 80 (BC_1, IO_75, OUTPUT3, X, 79, 0,Z),"&
" 79 (BC_1, *, CONTROL, X)," &
" 78 (BC_1, IO_76, INPUT, X)," &
" 77 (BC_1, IO_76, OUTPUT3, X, 76, 0,Z),"&
" 76 (BC_1, *, CONTROL, X)," &
" 75 (BC_1, *, INTERNAL, X)," &
" 74 (BC_1, *, INTERNAL, X)," &
" 73 (BC_1, *, INTERNAL, X)," &
" 72 (BC_1, IO_78, INPUT, X)," &
" 71 (BC_1, IO_78, OUTPUT3, X, 70, 0,Z),"&
" 70 (BC_1, *, CONTROL, X)," &
" 69 (BC_1, IO_79, INPUT, X)," &
" 68 (BC_1, IO_79, OUTPUT3, X, 67, 0,Z),"&
" 67 (BC_1, *, CONTROL, X)," &
" 66 (BC_1, IO_80, INPUT, X)," &
" 65 (BC_1, IO_80, OUTPUT3, X, 64, 0,Z),"&
" 64 (BC_1, *, CONTROL, X)," &
" 63 (BC_1, *, INTERNAL, X)," &
" 62 (BC_1, *, INTERNAL, X)," &
" 61 (BC_1, *, INTERNAL, X)," &
" 60 (BC_1, *, INTERNAL, X)," &
" 59 (BC_1, *, INTERNAL, X)," &
" 58 (BC_1, *, INTERNAL, X)," &
" 57 (BC_1, IO_82, INPUT, X)," &
" 56 (BC_1, IO_82, OUTPUT3, X, 55, 0,Z),"&
" 55 (BC_1, *, CONTROL, X)," &
" 54 (BC_1, *, INTERNAL, X)," &
" 53 (BC_1, *, INTERNAL, X)," &
" 52 (BC_1, *, INTERNAL, X)," &
" 51 (BC_1, IO_84, INPUT, X)," &
" 50 (BC_1, IO_84, OUTPUT3, X, 49, 0,Z),"&
" 49 (BC_1, *, CONTROL, X)," &
" 48 (BC_1, IO_85, INPUT, X)," &
" 47 (BC_1, IO_85, OUTPUT3, X, 46, 0,Z),"&
" 46 (BC_1, *, CONTROL, X)," &
" 45 (BC_1, IO_86, INPUT, X)," &
" 44 (BC_1, IO_86, OUTPUT3, X, 43, 0,Z),"&
" 43 (BC_1, *, CONTROL, X)," &
" 42 (BC_1, IO_87, INPUT, X)," &
" 41 (BC_1, IO_87, OUTPUT3, X, 40, 0,Z),"&
" 40 (BC_1, *, CONTROL, X)," &
" 39 (BC_1, *, INTERNAL, X)," &
" 38 (BC_1, *, INTERNAL, X)," &
" 37 (BC_1, *, INTERNAL, X)," &
" 36 (BC_1, IO_89, INPUT, X)," &
" 35 (BC_1, IO_89, OUTPUT3, X, 34, 0,Z),"&
" 34 (BC_1, *, CONTROL, X)," &
" 33 (BC_1, IO_90, INPUT, X)," &
" 32 (BC_1, IO_90, OUTPUT3, X, 31, 0,Z),"&
" 31 (BC_1, *, CONTROL, X)," &
" 30 (BC_1, IO_91, INPUT, X)," &
" 29 (BC_1, IO_91, OUTPUT3, X, 28, 0,Z),"&
" 28 (BC_1, *, CONTROL, X)," &
" 27 (BC_1, *, INTERNAL, X)," &
" 26 (BC_1, *, INTERNAL, X)," &
" 25 (BC_1, *, INTERNAL, X)," &
" 24 (BC_1, IO_93, INPUT, X)," &
" 23 (BC_1, IO_93, OUTPUT3, X, 22, 0,Z),"&
" 22 (BC_1, *, CONTROL, X)," &
" 21 (BC_1, *, INTERNAL, X)," &
" 20 (BC_1, *, INTERNAL, X)," &
" 19 (BC_1, *, INTERNAL, X)," &
" 18 (BC_1, *, INTERNAL, X)," &
" 17 (BC_1, *, INTERNAL, X)," &
" 16 (BC_1, *, INTERNAL, X)," &
" 15 (BC_1, *, INTERNAL, X)," &
" 14 (BC_1, IO_95, INPUT, X)," &
" 13 (BC_1, IO_95, OUTPUT3, X, 12, 0,Z),"&
" 12 (BC_1, *, CONTROL, X)," &
" 11 (BC_1, IO_96, INPUT, X)," &
" 10 (BC_1, IO_96, OUTPUT3, X, 9, 0,Z),"&
" 9 (BC_1, *, CONTROL, X)," &
" 8 (BC_1, IO_97, INPUT, X)," &
" 7 (BC_1, IO_97, OUTPUT3, X, 6, 0,Z),"&
" 6 (BC_1, *, CONTROL, X)," &
" 5 (BC_1, IO_98, INPUT, X)," &
" 4 (BC_1, IO_98, OUTPUT3, X, 3, 0,Z),"&
" 3 (BC_1, *, CONTROL, X)," &
" 2 (BC_1, IO_99, INPUT, X)," &
" 1 (BC_1, IO_99, OUTPUT3, X, 0, 0,Z),"&
" 0 (BC_1, *, CONTROL, X)" ;
-- Following atribute is specific only to ISC_ENABLE Instruction
attribute ISC_PIN_BEHAVIOR of XC2C128_VQ100 : entity is "HIGHZ";
-- If ISC_ENABLE_CLAMP is executed instead of ISC_ENABLE, previous attribute
-- should be replaced with (clamp value depends on the preconditioning)
-- attribute ISC_PIN_BEHAVIOR of XC2C128_VQ100 : entity is "CLAMP"
-- If ISC_ENABLEOTF is executed instead of ISC_ENABLE, all device pins will
-- behave as previously programmed and would therefore be all indicated as
-- fixed system pins. You should uncomment the following attribute:
--
-- attribute ISC_FIXED_SYSTEM_PINS of XC2C128_VQ100 : entity is
-- IO_0, IO_1, IO_2, IO_3, IO_4, IO_5, IO_6, IO_7, IO_8, IO_9, IO_10, IO_11, IO_12, IO_13, IO_14,
-- IO_15, IO_16, IO_17, IO_18, IO_19, IO_20, IO_21, IO_22, IO_23, IO_24, IO_25, IO_26, IO_27, IO_28, IO_29,
-- IO_30, IO_31, IO_32, IO_33, IO_34, IO_35, IO_36, IO_37, IO_38, IO_39, IO_40, IO_41, IO_42, IO_43, IO_44,
-- IO_45, IO_46, IO_47, IO_48, IO_49, IO_50, IO_51, IO_52, IO_53, IO_54, IO_55, IO_56, IO_57, IO_58, IO_59,
-- IO_60, IO_61, IO_62, IO_63, IO_64, IO_65, IO_66, IO_67, IO_68, IO_69, IO_70, IO_71, IO_72, IO_73, IO_74,
-- IO_75, IO_76, IO_77, IO_78, IO_79, IO_80, IO_81, IO_82, IO_83, IO_84, IO_85, IO_86, IO_87, IO_88, IO_89,
-- IO_90, IO_91, IO_92, IO_93, IO_94, IO_95, IO_96, IO_97, IO_98, IO_99;IO_0, IO_1, IO_2, IO_3, IO_4,
-- IO_5, IO_6, IO_7, IO_8, IO_9, IO_10, IO_11, IO_12, IO_13, IO_14, IO_15, IO_16, IO_17, IO_18, IO_19,
-- IO_20, IO_21, IO_22, IO_23, IO_24, IO_25, IO_26, IO_27, IO_28, IO_29, IO_30, IO_31, IO_32, IO_33, IO_34,
-- IO_35, IO_36, IO_37, IO_38, IO_39, IO_40, IO_41, IO_42, IO_43, IO_44, IO_45, IO_46, IO_47, IO_48, IO_49,
-- IO_50, IO_51, IO_52, IO_53, IO_54, IO_55, IO_56, IO_57, IO_58, IO_59, IO_60, IO_61, IO_62, IO_63, IO_64,
-- IO_65, IO_66, IO_67, IO_68, IO_69, IO_70, IO_71, IO_72, IO_73, IO_74, IO_75, IO_76, IO_77, IO_78, IO_79,
-- IO_80, IO_81, IO_82, IO_83, IO_84, IO_85, IO_86, IO_87, IO_88, IO_89, IO_90, IO_91, IO_92, IO_93, IO_94,
-- IO_95, IO_96, IO_97, IO_98, IO_99;IO_0, IO_1, IO_2, IO_3, IO_4, IO_5, IO_6, IO_7, IO_8, IO_9,
-- IO_10, IO_11, IO_12, IO_13, IO_14, IO_15, IO_16, IO_17, IO_18, IO_19, IO_20, IO_21, IO_22, IO_23, IO_24,
-- IO_25, IO_26, IO_27, IO_28, IO_29, IO_30, IO_31, IO_32, IO_33, IO_34, IO_35, IO_36, IO_37, IO_38, IO_39,
-- IO_40, IO_41, IO_42, IO_43, IO_44, IO_45, IO_46, IO_47, IO_48, IO_49, IO_50, IO_51, IO_52, IO_53, IO_54,
-- IO_55, IO_56, IO_57, IO_58, IO_59, IO_60, IO_61, IO_62, IO_63, IO_64, IO_65, IO_66, IO_67, IO_68, IO_69,
-- IO_70, IO_71, IO_72, IO_73, IO_74, IO_75, IO_76, IO_77, IO_78, IO_79, IO_80, IO_81, IO_82, IO_83, IO_84,
-- IO_85, IO_86, IO_87, IO_88, IO_89, IO_90, IO_91, IO_92, IO_93, IO_94, IO_95, IO_96, IO_97, IO_98, IO_99;
-- IO_0, IO_2, IO_3, IO_4, IO_5, IO_6, IO_7, IO_8, IO_10, IO_11, IO_13, IO_14, IO_15, IO_16, IO_17,
-- IO_18, IO_20, IO_21, IO_22, IO_23, IO_25, IO_26, IO_27, IO_28, IO_29, IO_30, IO_31, IO_33, IO_34, IO_35,
-- IO_36, IO_37, IO_40, IO_41, IO_42, IO_43, IO_44, IO_45, IO_46, IO_47, IO_48, IO_49, IO_50, IO_51, IO_52,
-- IO_54, IO_56, IO_57, IO_58, IO_59, IO_60, IO_61, IO_63, IO_64, IO_65, IO_66, IO_67, IO_68, IO_70, IO_72,
-- IO_74, IO_75, IO_76, IO_78, IO_79, IO_80, IO_82, IO_84, IO_85, IO_86, IO_87, IO_89, IO_90, IO_91, IO_93,
-- IO_95, IO_96, IO_97, IO_98, IO_99;
attribute ISC_STATUS of XC2C128_VQ100 : entity is "NOT IMPLEMENTED";
attribute ISC_BLANK_USERCODE of XC2C128_VQ100 : entity is "11111111111111111111111111111111";
--attribute ISC_SECURITY of XC2C128_VQ100 : entity is "ISC_DISABLE_READ *";
attribute ISC_FLOW of XC2C128_VQ100 : entity is
-- program device
"flow_program(array)" &
"initialize" &
"(ISC_PROGRAM 7:?,752:? wait 10.0e-3)" &
"Repeat 81 "&
"(ISC_PROGRAM 7:?,752:? wait 10.0e-3)," &
--program device
-- "flow_program1(array)" &
-- "initialize" &
-- "(ISC_PROGRAM 281:? wait 10.0e-3)," &
"flow_program_donebit " &
"initialize" &
"(ISC_PROGRAM 7:0f, 12:FFB wait tck 10000 )," &
-- verify device
"flow_verify(array) " &
"initialize " &
"(ISC_READ 7:$addr?, 752:f wait tck 1 7:0*0, 752:$data?)" &
"Repeat 81 "&
"(ISC_READ 7:$addr?, 752:f wait tck 1 7:0*0, 752:$data?)," &
-- read device
"flow_read(array) " &
"initialize " &
"(ISC_READ 752:0, 7:$addr=0 wait tck 1 752:!, 7:0*0)" &
" Repeat 81 "&
"(ISC_READ 752:0, 7:$addr+1 wait tck 1 752:!, 7:0*0)," &
-- program SRAM
"flow_sram_write(array) " &
"initialize " &
"(ISC_SRAM_WRITE 752:?, 7:$addr=0 wait 10.0e-3)" &
" Repeat 81 "&
"(ISC_SRAM_WRITE 752:?, 7:$addr+1 wait 10.0e-3)," &
-- verify SRAM
"flow_sram_read(array) " &
"initialize " &
"(ISC_SRAM_READ 752:0, 7:$addr=0 wait tck 1 752:!, 7:0*0)" &
" Repeat 81 "&
"(ISC_SRAM_READ 752:0, 7:$addr+1 wait tck 1 752:!, 7:0*0)," &
-- verify IDCODE
"flow_verify(idcode) " &
"initialize " &
"(IDCODE wait tck 1 32:06d8a093), " &
-- read IDCODE
"flow_read(idcode) " &
"initialize " &
"(IDCODE wait tck 1 32:!), " &
-- verify USERCODE blank device
"flow_verify(usercode) " &
"initialize " &
"(USERCODE wait tck 1 32:FFFFFFFF), " &
-- read USERCODE blank device
"flow_verify(usercode) " &
"initialize " &
"(USERCODE wait tck 1 32:!), " &
-- erase device
"flow_erase " &
"initialize " &
"(ISC_ERASE 752:0 wait 100.0e-3) " &
"(ISC_INIT wait 20.0e-6) " &
"(ISC_INIT 752:0 wait 200.0e-6), " &
-- erase verify
"flow_erase_verify(array) " &
"initialize " &
"(ISC_READ 7:?,752:? wait tck 1 7:0*0, 752:F*F ) " &
-- "(ISC_READ 7:?,752:? wait tck 1 752:" &
-- "FFFFFFFFFFFFFFFFFFF" &
-- "FFFFFFFFFFFFFFFFFFFF" &
-- "FFFFFFFFFFFFFFFFFFFF" &
-- "FFFFFFFFFF, 7:0*0)" &
" Repeat 81 "&
"(ISC_READ 7:?,752:? wait tck 1 7:0*0, 752:F*F), " &
-- "(ISC_READ 7:?,752:? wait tck 1 752:" &
-- "FFFFFFFFFFFFFFFFFFF" &
-- "FFFFFFFFFFFFFFFFFFFF" &
-- "FFFFFFFFFFFFFFFFFFFF" &
-- "FFFFFFFFFF, 7:0*0)," &
--
-- ISC MODE can be enabled with any of the following three flows
-- enable ISC mode (outputs are HIGHZ)
"flow_enable_highz " &
"initialize " &
"(ISC_ENABLE wait tck 1), " &
-- enable ISC mode (outputs are CLAMP)
"flow_enable_clamp " &
"initialize " &
"(ISC_ENABLE_CLAMP wait tck 1), " &
-- enable ISC mode (outputs are ACTIVE)
"flow_enable_active " &
"initialize " &
"(ISC_ENABLEOTF wait tck 1), " &
-- load bypass instruction
"flow_bypass " &
"initialize " &
"(BYPASS wait tck 1), " &
-- disable ISC mode (disables all three ISC modes)
"flow_disable " &
"initialize " &
"(ISC_DISABLE wait tck 100), " &
-- reinitialize device
"flow_reinit " &
"initialize " &
"(ISC_INIT wait TCK 20) " &
"(ISC_INIT 759:0 wait TCK 100 ) " ;
attribute ISC_PROCEDURE of XC2C128_VQ100 : entity is
"proc_verify(idcode) = (flow_verify(idcode)), " &
"proc_read(idcode) = (flow_read(idcode)), " &
"proc_verify(usercode) = (flow_verify(usercode)), " &
"proc_verify(array) = (flow_verify(array))," &
"proc_read(array) = (flow_read(array))," &
"proc_disable = (flow_disable), "&
"proc_reinit = (flow_reinit), "&
"proc_enable = (flow_enable_highz), "&
"proc_bypass = (flow_bypass), "&
"proc_enable_clamp = (flow_enable_clamp), "&
"proc_enable_active = (flow_enable_active), "&
"proc_error_exit = (flow_disable), "&
"proc_program(array) = (flow_program(array),flow_program_donebit), "&
"proc_verify(array) = (flow_verify(array)), " &
"proc_sram_write(array) = (flow_sram_write(array)), " &
"proc_sram_read(array) = (flow_sram_read(array)), " &
"proc_erase = (flow_erase), " &
"proc_blank_check = (flow_erase_verify(array)), " &
"proc_isc_exit = (flow_disable)";
attribute ISC_ACTION of XC2C128_VQ100 : entity is
"erase = (proc_verify(idcode) recommended, " &
" proc_enable, " &
" proc_erase, " &
" proc_blank_check optional, " &
" proc_reinit, proc_bypass, " &
" proc_disable), " &
"program = (proc_verify(idcode) recommended, " &
" proc_enable, " &
" proc_erase, " &
" proc_blank_check optional, " &
" proc_program(array), " &
" proc_verify(array) optional, " &
" proc_reinit, " &
" proc_disable, proc_bypass), " &
-- When using program_clamp the PIN_BEHAVIOR is CLAMP
"program_clamp = (proc_verify(idcode) recommended, " &
" proc_enable_clamp, " &
" proc_erase, " &
" proc_blank_check optional, " &
" proc_program(array), " &
" proc_verify(array) optional, " &
" proc_reinit, " &
" proc_disable), " &
-- When using program_active all IOs behave as fixed pins
"program_active = (proc_verify(idcode) recommended, " &
" proc_enable_active, " &
" proc_sram_write(array), " &
" proc_reinit, " &
" proc_disable), " &
"verify = (proc_verify(idcode) recommended, " &
" proc_enable, " &
" proc_verify(array), " &
" proc_reinit, " &
" proc_disable), " &
"read = (proc_verify(idcode) recommended, " &
" proc_enable, " &
" proc_read(array), " &
" proc_reinit, " &
" proc_disable), "&
"verify(idcode) = (proc_verify(idcode))," &
"read(idcode) = (proc_read(idcode))";
-- attribute ISC_DESIGN_WARNING of XC2C128_VQ100: entity is
-- "When using the ACTION: program_clamp, the PIN_BEHAVIOR is CLAMP. " &
-- "For correctness, the BSDL should be modified to indicate this. " &
-- "When using the ACTION: program_active, the pins behave as previously " &
-- "programmed. This makes all device IO's effectively behave as fixed pins.";
-- ===========================================================
end XC2C128_VQ100;