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ChipVORX ISP IP for Ultra Fast Flash Programming
BSDL File: EPX8160Q208_0 Download View details  


-- Copyright (C) 1995-2005 Altera Corporation
-- File Name     : 8160Q_D0.BSD
-- Device        : EPX8160 (First JTAG half of the device)
-- Package       : 208 Pin Plastic Quad Flat Pack (PQFP)
-- Created by    : Altera Corporation
-- BSDL Version  : 1.33
-- BSDL Status   : Final
-- Revision      : 1.0, 7/1/95
--   History     : 1.31, 8/15/98
--                   Update info to Altera
--               : 1.32, 10/18/99
--                   Updated to 1994 spec
--               : 1.33, 8/23/02
--                   Changed file status to Final
-- Verification  : Software syntax checked on:
--                   ASSET Tool Box ver. 2.3d
--                   Genrad BSDL syntax checker ver. 4.01, a component
--                      of Scan Pathfinder(tm) and BasicSCAN(tm)
--                   HP 3070 BSDL Compiler
--                   JTAG Technologies PLDPROG ver. 2.7
-- Documentation : FLASHlogic Family Datasheet
--                   Note: This device is obsolete
--                 AN39 - JTAG Boundary Scan for Altera Devices
--
--
--                          IMPORTANT NOTICE
--
--  Altera and EPX8160 are trademarks of Altera Corporation.
--  Altera products, marketed under trademarks are protected 
--  under numerous US and foreign patents and pending 
--  applications, maskwork rights, and copyrights.  Altera 
--  warrants performance of its semiconductor products to 
--  current specifications in accordance with Altera's standard 
--  warranty, but reserves the right to make changes to any 
--  products and services at any time without notice.  Altera 
--  assumes no responsibility or liability arising out of the 
--  application or use of any information, product, or service 
--  described herein except as expressly agreed to in writing 
--  by Altera Corporation.  Altera customers are advised to 
--  obtain the latest version of device specifications before
--  relying on any published information and before placing
--  orders for products or services.

entity EPX8160Q208_0 is

generic(PHYSICAL_PIN_MAP : string := "PQFP208");

port (
    CLK1     : in    bit;
    CLK2     : in    bit;
    INP      : in    bit_vector(0 to 23);   -- inputs

 -- I/O pins
    IO0: inout bit; IO1 :inout bit; IO2 :inout bit; IO3 :inout bit; 
    IO4 :inout bit; IO5: inout bit; IO6 :inout bit; IO7 :inout bit; 
    IO8 :inout bit; IO9 :inout bit; IO10:inout bit; IO11:inout bit;
    IO12:inout bit; IO13:inout bit; IO14:inout bit; IO15:inout bit;
    IO16:inout bit; IO17:inout bit; IO18:inout bit; IO19:inout bit;
    IO20:inout bit; IO23:inout bit; IO25:inout bit; IO27:inout bit; 
    IO29:inout bit; IO30:inout bit; IO33:inout bit; IO35:inout bit;
    IO37:inout bit; IO39:inout bit; IO40:inout bit; IO41:inout bit;
    IO42:inout bit; IO43:inout bit; IO44:inout bit; IO45:inout bit;
    IO46:inout bit; IO47:inout bit; IO48:inout bit; IO49:inout bit;
    IO50:inout bit; IO51:inout bit; IO52:inout bit; IO53:inout bit;
    IO54:inout bit; IO55:inout bit; IO56:inout bit; IO57:inout bit;
    IO58:inout bit; IO59:inout bit; IO60:inout bit; IO63:inout bit;
    IO65:inout bit; IO67:inout bit; IO69:inout bit; IO70:inout bit;
    IO73:inout bit; IO75:inout bit; IO77:inout bit; IO79:inout bit;

    TCK, TMS, TDI      : in   bit;          -- Scan Port inputs
    TDO      : out  bit;                    -- Scan Port output
    VCC      : linkage bit_vector(1 to 2);  -- VCC
    VCCO     : linkage bit_vector(1 to 4);  -- VCC
    VSS      : linkage bit_vector(1 to 8);  -- GND pins
    VPP0     : linkage bit                  -- VPP pin
);  -- end of ports

use STD_1149_1_1994.all;

attribute COMPONENT_CONFORMANCE of EPX8160Q208_0 : entity is "STD_1149_1_1993";

attribute PIN_MAP of EPX8160Q208_0 : entity is PHYSICAL_PIN_MAP;

   -- NOTE: lots of the I/O pins in the 208 pin package are buried
   -- and do not have an external pin. These are represented as being
   -- above pin 300.
constant PQFP208 : PIN_MAP_STRING :=      -- Define Pin Out of QFP
   -- I/O pins, listed by CFB
      "IO0:185,IO1:187,IO2:189,IO3:191,IO4:193,IO5:195,IO6:197,"&
      "IO7:199,IO8:201,IO9:203," &

      "IO10:180,IO11:178,IO12:176,IO13:174,IO14:172,IO15:170,IO16:168,"&
      "IO17:166,IO18:164,IO19:162,"&

      "IO20:6, IO23:5, IO25:4, IO27:3, IO29:2,"&

      "IO30:151, IO33:152, IO35:153, IO37:154, IO39:155,"&

      "IO40:8,IO41:9,IO42:10,IO43:11,IO44:12,IO45:16,IO46:17,IO47:18,"&
      "IO48:19,IO49:20,"&

      "IO50:149,IO51:148,IO52:147,IO53:146,IO54:145,IO55:141,IO56:140,"&
      "IO57:139,IO58:138,IO59:137,"&

      "IO60:26,IO63:25,IO65:24,IO67:23,IO69:22,"&
      "IO70:131,IO73:132,IO75:133,IO77:134,IO79:135,"&

      -- IO CELLS NOT IN BOUNDARY_REGISTER, AND THEREFORE 
      -- HAVE NO PIN DECLARATIONS
      -- IO21 , IO22 , IO24 , IO26 , IO28 ,
      -- IO31 , IO32 , IO34 , IO36 , IO38 ,
      -- IO61 , IO62 , IO64 , IO66 , IO68 ,
      -- IO71 , IO72 , IO74 , IO76 , IO78 ,

   -- Dedicated Clocks
      "CLK1:184, CLK2:181," &

   -- Power pins
      "VSS:(7, 15, 136, 142, 150, 171, 183, 194)," & -- GND
      "VCC:(14, 143), VPP0:182," &
      "VCCO:(204,161,13,144), " &

   -- TAP controller pins
      "TCK:104, TMS:105, TDI:1, TDO:208," &

   -- Dedicated Inputs
      "INP:(207,206,205,202,200,198,196,192,190,188,186,179,177,175,"&
           "173,169,167,165,163,160,159,158,157,156)";

attribute Tap_Scan_In of    TDI      : signal is true;
attribute Tap_Scan_Mode of  TMS      : signal is true;
attribute Tap_Scan_Out of   TDO      : signal is true;
attribute Tap_Scan_Clock of TCK      : signal is (8.0e6, BOTH);

attribute Instruction_Length of EPX8160Q208_0: entity is 5;

attribute Instruction_Opcode of EPX8160Q208_0: entity is
   "BYPASS  (11111),"&
   "EXTEST  (00000),"&
   "SAMPLE  (00001),"&
   "IDCODE  (00010),"&
   "LDVECT  (00101),"&
   "FREAD   (00110),"& -- Read FLASH cells
   "SWRITE  (01111),"& -- Write SRAM cells
   "SREAD   (10000),"& -- Read SRAM cells
   "FPGMALL1(10010),"& -- Program all FLASH cells to '1
   "FPGM    (10101),"& -- Program FLASH cells
   "UESCODE (10110),"&
   "FERASE  (10001),"& -- FALSH erase.  Do FPGAMALL1 first
   "RADLOAD (11000),"& -- Row ADdress LOAD
   "BSCAN   (11100),"& -- Buried Macrocell Scan Chain
   "ISCAN   (11110),"& -- Internal Macrocell Register Scan (destructive)
   "TRIBYP  (11101),"& -- Boundary Hi-Z
   "PRIVATE (00011,00100,00111,01000,01001,01010,01011,01100,01101,"&
            "01110,10011,10100,10111,11001,11010,11011)";

attribute Instruction_Capture of EPX8160Q208_0: entity is "00001";
   -- there is no Instruction_Disable attribute for EPX8160Q208_0

attribute Instruction_Private of EPX8160Q208_0: entity is "private";

attribute Idcode_Register of EPX8160Q208_0: entity is
   "0000"                  &  --version
   "0000011000100100"      &  --part number
   "00000001001"           &  --manufacturers identity, 9h for Intel
   "1";                       --required by the standard

attribute Register_Access of EPX8160Q208_0: entity is
   "BYPASS (BYPASS, TRIBYP)," &            -- 1149.1 bypass
                                           -- High-Z Bypass
   "BOUNDARY (EXTEST, SAMPLE)," &          -- 1149.1 extest & sample
   "EPROM_VECTOR[43] (LDVECT)," &          -- semi-private flash prog.
   "ROW_VECTOR[622] (FREAD, SWRITE, SREAD)," & 
   -- semi-private flash read
   -- semi-private sram write
   -- semi-private sram read
   "VERIFY[1] (FPGM, FPGMALL1)," &         -- semi-private flash verify
   "ERASE[1] (FERASE)," &                  -- semi-private flash verify
   "UES_CODE[622] (UESCODE)," &            -- semi-private user code
   "ADDR[6] (RADLOAD)," &                  -- semi-private address load
   "BURIED_SCAN[20] (BSCAN)," &            -- semi-private buried mcells
   "REGISTER_SCAN[80] (ISCAN)";            -- semi-private all mcells

--{*******************************************************************}
-- ISCAN CHAIN-The ISCAN chain scans out the device macrocell registers
-- in the order given below.  It goes from Macrocell 9 to 0 in each CFB,
-- and from CFB 0 to CFB 7.  See the appropriate application notes and
-- datasheet restrictions on how to use this instruction.
-- TDI -> IO9,IO8,IO7,IO6,IO5,IO4,IO3,IO2,IO1,IO0, IO19,...IO70 -> TDO
--{*******************************************************************}
-- BSCAN CHAIN-The BSCAN chain scans out the BURIED macrocell register
-- output in the order given below.  This chain is the equivalent of
-- having INPUT cells on the feedback paths.  This chain is provided 
-- because the feedbacks are not in the normal BOUNDARY chain.
-- See the appropriate application notes and datasheet restrictions on 
-- how to use this instruction.
-- TDI -> IO71,IO72,IO74,IO76,IO78, IO31,IO32,IO34,IO36,IO38,
--           IO28,IO26,IO24,IO22,IO21, IO68,IO66,IO64,IO62,IO61 -> TDO
--{*******************************************************************}

attribute Boundary_Length of EPX8160Q208_0: entity is 206;

attribute Boundary_Register of EPX8160Q208_0: entity is

       --num  cell   port   function safe ccell dsval rslt
        "  0 (BC_1,     *, CONTROLR, 0)," &                 -- IO60.OE
        "  1 (BC_1,  IO60, output3, X,   0, 0, Z)," &       -- IO60.OUT
        "  2 (BC_1,  IO60, input, 0)," &                    -- IO60.IN
        "  3 (BC_1,     *, CONTROLR, 0)," &                 -- IO63.OE
        "  4 (BC_1,  IO63, output3, X,   3, 0, Z)," &       -- IO63.OUT
        "  5 (BC_1,  IO63, input, 0)," &                    -- IO63.IN
        "  6 (BC_1,     *, CONTROLR, 0)," &                 -- IO65.OE
        "  7 (BC_1,  IO65, output3, X,   6, 0, Z)," &       -- IO65.OUT
        "  8 (BC_1,  IO65, input, 0)," &                    -- IO65.IN
        "  9 (BC_1,     *, CONTROLR, 0)," &                 -- IO67.OE
        " 10 (BC_1,  IO67, output3, X,   9, 0, Z)," &       -- IO67.OUT
        " 11 (BC_1,  IO67, input, 0)," &                    -- IO67.IN
        " 12 (BC_1,     *, CONTROLR, 0)," &                 -- IO69.OE
        " 13 (BC_1,  IO69, output3, X,  12, 0, Z)," &       -- IO69.OUT
        " 14 (BC_1,  IO69, input, 0)," &                    -- IO69.IN
--
        " 15 (BC_1,     *, CONTROLR, 0)," &                 -- IO49
        " 16 (BC_1,  IO49, output3, X,  15, 0, Z)," &
        " 17 (BC_1,  IO49, input, 0)," &
        " 18 (BC_1,     *, CONTROLR, 0)," &                 -- IO48
        " 19 (BC_1,  IO48, output3, X,  18, 0, Z)," &
        " 20 (BC_1,  IO48, input, 0)," &
        " 21 (BC_1,     *, CONTROLR, 0)," &                 -- IO47
        " 22 (BC_1,  IO47, output3, X,  21, 0, Z)," &
        " 23 (BC_1,  IO47, input, 0)," &
        " 24 (BC_1,     *, CONTROLR, 0)," &                 -- IO46
        " 25 (BC_1,  IO46, output3, X,  24, 0, Z)," &
        " 26 (BC_1,  IO46, input, 0)," &
        " 27 (BC_1,     *, CONTROLR, 0)," &                 -- IO45
        " 28 (BC_1,  IO45, output3, X,  27, 0, Z)," &
        " 29 (BC_1,  IO45, input, 0)," &
--
        " 30 (BC_1,     *, CONTROLR, 0)," &                 -- IO44
        " 31 (BC_1,  IO44, output3, X,  30, 0, Z)," &
        " 32 (BC_1,  IO44, input, 0)," &
        " 33 (BC_1,     *, CONTROLR, 0)," &                 -- IO43
        " 34 (BC_1,  IO43, output3, X,  33, 0, Z)," &
        " 35 (BC_1,  IO43, input, 0)," &
        " 36 (BC_1,     *, CONTROLR, 0)," &                 -- IO42
        " 37 (BC_1,  IO42, output3, X,  36, 0, Z)," &
        " 38 (BC_1,  IO42, input, 0)," &
        " 39 (BC_1,     *, CONTROLR, 0)," &                 -- IO41
        " 40 (BC_1,  IO41, output3, X,  39, 0, Z)," &
        " 41 (BC_1,  IO41, input, 0)," &
        " 42 (BC_1,     *, CONTROLR, 0)," &                 -- IO40
        " 43 (BC_1,  IO40, output3, X,  42, 0, Z)," &
        " 44 (BC_1,  IO40, input, 0)," &
--
        " 45 (BC_1,     *, CONTROLR, 0)," &                 -- IO20
        " 46 (BC_1,  IO20, output3, X,  45, 0, Z)," &
        " 47 (BC_1,  IO20, input, 0)," &
        " 48 (BC_1,     *, CONTROLR, 0)," &                 -- IO23
        " 49 (BC_1,  IO23, output3, X,  48, 0, Z)," &
        " 50 (BC_1,  IO23, input, 0)," &
        " 51 (BC_1,     *, CONTROLR, 0)," &                 -- IO25
        " 52 (BC_1,  IO25, output3, X,  51, 0, Z)," &
        " 53 (BC_1,  IO25, input, 0)," &
        " 54 (BC_1,     *, CONTROLR, 0)," &                 -- IO27
        " 55 (BC_1,  IO27, output3, X,  54, 0, Z)," &
        " 56 (BC_1,  IO27, input, 0)," &
        " 57 (BC_1,     *, CONTROLR, 0)," &                 -- IO29
        " 58 (BC_1,  IO29, output3, X,  57, 0, Z)," &
        " 59 (BC_1,  IO29, input, 0)," &
--
        " 60 (BC_4,  INP(0),  INPUT, X)," &
        " 61 (BC_4,  INP(1),  INPUT, X)," &
        " 62 (BC_4,  INP(2),  INPUT, X)," &
--
        " 63 (BC_1,     *, CONTROLR, 0)," &                 -- IO09
        " 64 (BC_1,  IO9, output3, X,  63, 0, Z)," &
        " 65 (BC_1,  IO9, input, 0)," &
        " 66 (BC_4,  INP(3),  INPUT, X)," &
        " 67 (BC_1,     *, CONTROLR, 0)," &                 -- IO08
        " 68 (BC_1,  IO8, output3, X,  67, 0, Z)," &
        " 69 (BC_1,  IO8, input, 0)," &
        " 70 (BC_4,  INP(4),  INPUT, X)," &
        " 71 (BC_1,     *, CONTROLR, 0)," &                 -- IO07
        " 72 (BC_1,  IO7, output3, X,  71, 0, Z)," &
        " 73 (BC_1,  IO7, input, 0)," &
        " 74 (BC_4,  INP(5),  INPUT, X)," &
        " 75 (BC_1,     *, CONTROLR, 0)," &                 -- IO06
        " 76 (BC_1,  IO6, output3, X,  75, 0, Z)," &
        " 77 (BC_1,  IO6, input, 0)," &
        " 78 (BC_4,  INP(6),  INPUT, X)," &
        " 79 (BC_1,     *, CONTROLR, 0)," &                 -- IO05
        " 80 (BC_1,  IO5, output3, X,  79, 0, Z)," &
        " 81 (BC_1,  IO5, input, 0)," &
--
        " 82 (BC_1,     *, CONTROLR, 0)," &                 -- IO04
        " 83 (BC_1,  IO4, output3, X,  82, 0, Z)," &
        " 84 (BC_1,  IO4, input, 0)," &
        " 85 (BC_4,  INP(7),  INPUT, X)," &
        " 86 (BC_1,     *, CONTROLR, 0)," &                 -- IO03
        " 87 (BC_1,  IO3, output3, X,  86, 0, Z)," &
        " 88 (BC_1,  IO3, input, 0)," &
        " 89 (BC_4,  INP(8),  INPUT, X)," &
        " 90 (BC_1,     *, CONTROLR, 0)," &                 -- IO02
        " 91 (BC_1,  IO2, output3, X,  90, 0, Z)," &
        " 92 (BC_1,  IO2, input, 0)," &
        " 93 (BC_4,  INP(9),  INPUT, X)," &
        " 94 (BC_1,     *, CONTROLR, 0)," &                 -- IO01
        " 95 (BC_1,  IO1, output3, X,  94, 0, Z)," &
        " 96 (BC_1,  IO1, input, 0)," &
        " 97 (BC_4,  INP(10),  INPUT, X)," &
        " 98 (BC_1,     *, CONTROLR, 0)," &                 -- IO00
        " 99 (BC_1,  IO0, output3, X,  98, 0, Z)," &
        "100 (BC_1,  IO0, input, 0)," &
        "101 (BC_4,  CLK1,  INPUT, X)," &                 -- Device CLK1
        "102 (BC_4,  CLK2,  INPUT, X)," &                 -- Device CLK2
        "103 (BC_1,     *, CONTROLR, 0)," &                 -- IO10
        "104 (BC_1,  IO10, output3, X, 103, 0, Z)," &
        "105 (BC_1,  IO10, input, 0)," &
        "106 (BC_4,  INP(11),  INPUT, X)," &
        "107 (BC_1,     *, CONTROLR, 0)," &                 -- IO11
        "108 (BC_1,  IO11, output3, X, 107, 0, Z)," &
        "109 (BC_1,  IO11, input, 0)," &
        "110 (BC_4,  INP(12),  INPUT, X)," &
        "111 (BC_1,     *, CONTROLR, 0)," &                 -- IO12
        "112 (BC_1,  IO12, output3, X, 111, 0, Z)," &
        "113 (BC_1,  IO12, input, 0)," &
        "114 (BC_4,  INP(13),  INPUT, X)," &
        "115 (BC_1,     *, CONTROLR, 0)," &                 -- IO13
        "116 (BC_1,  IO13, output3, X, 115, 0, Z)," &
        "117 (BC_1,  IO13, input, 0)," &
        "118 (BC_4,  INP(14),  INPUT, X)," &
        "119 (BC_1,     *, CONTROLR, 0)," &                 -- IO14
        "120 (BC_1,  IO14, output3, X, 119, 0, Z)," &
        "121 (BC_1,  IO14, input, 0)," &
--
        "122 (BC_1,     *, CONTROLR, 0)," &                 -- IO15
        "123 (BC_1,  IO15, output3, X, 122, 0, Z)," &
        "124 (BC_1,  IO15, input, 0)," &
        "125 (BC_4,  INP(15),  INPUT, X)," &
        "126 (BC_1,     *, CONTROLR, 0)," &                 -- IO16
        "127 (BC_1,  IO16, output3, X, 126, 0, Z)," &
        "128 (BC_1,  IO16, input, 0)," &
        "129 (BC_4,  INP(16),  INPUT, X)," &
        "130 (BC_1,     *, CONTROLR, 0)," &                 -- IO17
        "131 (BC_1,  IO17, output3, X, 130, 0, Z)," &
        "132 (BC_1,  IO17, input, 0)," &
        "133 (BC_4,  INP(17),  INPUT, X)," &
        "134 (BC_1,     *, CONTROLR, 0)," &                 -- IO18
        "135 (BC_1,  IO18, output3, X, 134, 0, Z)," &
        "136 (BC_1,  IO18, input, 0)," &
        "137 (BC_4,  INP(18),  INPUT, X)," &
        "138 (BC_1,     *, CONTROLR, 0)," &                 -- IO19
        "139 (BC_1,  IO19, output3, X, 138, 0, Z)," &
        "140 (BC_1,  IO19, input, 0)," &
--
        "141 (BC_4,  INP(19),  INPUT, X)," &
        "142 (BC_4,  INP(20),  INPUT, X)," &
        "143 (BC_4,  INP(21),  INPUT, X)," &
        "144 (BC_4,  INP(22),  INPUT, X)," &
        "145 (BC_4,  INP(23),  INPUT, X)," &
--
        "146 (BC_1,     *, CONTROLR, 0)," &                 -- IO39
        "147 (BC_1,  IO39, output3, X, 146, 0, Z)," &
        "148 (BC_1,  IO39, input, 0)," &
        "149 (BC_1,     *, CONTROLR, 0)," &                 -- IO37
        "150 (BC_1,  IO37, output3, X, 149, 0, Z)," &
        "151 (BC_1,  IO37, input, 0)," &
        "152 (BC_1,     *, CONTROLR, 0)," &                 -- IO35
        "153 (BC_1,  IO35, output3, X, 152, 0, Z)," &
        "154 (BC_1,  IO35, input, 0)," &
        "155 (BC_1,     *, CONTROLR, 0)," &                 -- IO33
        "156 (BC_1,  IO33, output3, X, 155, 0, Z)," &
        "157 (BC_1,  IO33, input, 0)," &
        "158 (BC_1,     *, CONTROLR, 0)," &                 -- IO30
        "159 (BC_1,  IO30, output3, X, 158, 0, Z)," &
        "160 (BC_1,  IO30, input, 0)," &
--
        "161 (BC_1,     *, CONTROLR, 0)," &                 -- IO50
        "162 (BC_1,  IO50, output3, X, 161, 0, Z)," &
        "163 (BC_1,  IO50, input, 0)," &
        "164 (BC_1,     *, CONTROLR, 0)," &                 -- IO51
        "165 (BC_1,  IO51, output3, X, 164, 0, Z)," &
        "166 (BC_1,  IO51, input, 0)," &
        "167 (BC_1,     *, CONTROLR, 0)," &                 -- IO52
        "168 (BC_1,  IO52, output3, X, 167, 0, Z)," &
        "169 (BC_1,  IO52, input, 0)," &
        "170 (BC_1,     *, CONTROLR, 0)," &                 -- IO53
        "171 (BC_1,  IO53, output3, X, 170, 0, Z)," &
        "172 (BC_1,  IO53, input, 0)," &
        "173 (BC_1,     *, CONTROLR, 0)," &                 -- IO54
        "174 (BC_1,  IO54, output3, X, 173, 0, Z)," &
        "175 (BC_1,  IO54, input, 0)," &
--
        "176 (BC_1,     *, CONTROLR, 0)," &                 -- IO55
        "177 (BC_1,  IO55, output3, X, 176, 0, Z)," &
        "178 (BC_1,  IO55, input, 0)," &
        "179 (BC_1,     *, CONTROLR, 0)," &                 -- IO56
        "180 (BC_1,  IO56, output3, X, 179, 0, Z)," &
        "181 (BC_1,  IO56, input, 0)," &
        "182 (BC_1,     *, CONTROLR, 0)," &                 -- IO57
        "183 (BC_1,  IO57, output3, X, 182, 0, Z)," &
        "184 (BC_1,  IO57, input, 0)," &
        "185 (BC_1,     *, CONTROLR, 0)," &                 -- IO58
        "186 (BC_1,  IO58, output3, X, 185, 0, Z)," &
        "187 (BC_1,  IO58, input, 0)," &
        "188 (BC_1,     *, CONTROLR, 0)," &                 -- IO59
        "189 (BC_1,  IO59, output3, X, 188, 0, Z)," &
        "190 (BC_1,  IO59, input, 0)," &
--
        "191 (BC_1,     *, CONTROLR, 0)," &                 -- IO79
        "192 (BC_1,  IO79, output3, X, 191, 0, Z)," &
        "193 (BC_1,  IO79, input, 0)," &
        "194 (BC_1,     *, CONTROLR, 0)," &                 -- IO77
        "195 (BC_1,  IO77, output3, X, 194, 0, Z)," &
        "196 (BC_1,  IO77, input, 0)," &
        "197 (BC_1,     *, CONTROLR, 0)," &                 -- IO75
        "198 (BC_1,  IO75, output3, X, 197, 0, Z)," &
        "199 (BC_1,  IO75, input, 0)," &
        "200 (BC_1,     *, CONTROLR, 0)," &                 -- IO73
        "201 (BC_1,  IO73, output3, X, 200, 0, Z)," &
        "202 (BC_1,  IO73, input, 0)," &
        "203 (BC_1,     *, CONTROLR, 0)," &                 -- IO70
        "204 (BC_1,  IO70, output3, X, 203, 0, Z)," &
        "205 (BC_1,  IO70, input, 0)";

end EPX8160Q208_0;

This library contains 7714 BSDL files (for 6086 distinct entities) from 64 vendors
Last BSDL model (CY7C1512KV18) was added on Sep 15, 2017 14:30
info@bsdl.info