-------------------------------------------------------------------------------
-- TI TMS320C44PDB Parallel-Processing 32-bit Floating-point DSP --
-- The PDB package is a 262 pin power quad flat pack --
-------------------------------------------------------------------------------
-- Created by : Texas Instruments Incorporated --
-- Documentation : TMS320C44 Users Guide (SPRU???) --
-- and Boundary Scan Technical Reference (Rev *) --
-- BSDL revision : 1.0 --
-- BSDL status : Production --
-- Date created : 09/19/95 --
-- --
--***************************************************************************--
-- --
-- IMPORTANT NOTICE --
-- Texas Instruments Incorporated (TI) reserves the right to make changes --
-- to its products or to discontinue any semiconductor product or service --
-- without notice, and advises its customers to obtain the latest version --
-- of the relevant information to verify, before placing orders, that the --
-- information being relied on is current. --
-- --
-- TI warrants performance of its semiconductor products and related --
-- software to the specifications applicable at the time of sale in --
-- accordance with TI's standard warranty. Testing and other quality control--
-- techniques are utilized to the extent TI deems necessary to support this --
-- warranty. Specific testing of all parameters of each device is not --
-- necessarily performed, except those mandated by government requirements. --
-- --
-- Certain applications using semiconductor devices may involve potential --
-- risks of death, personal injury, or severe property or environmental --
-- damage ("Critical Applications"). --
-- --
-- TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, --
-- OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, --
-- DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. --
-- --
-- Inclusion of TI products in such applications is understood to be fully --
-- at the risk of the customer. Use of TI products in such applications --
-- requires the written approval of an appropriate TI officer. Questions --
-- concerning potential risk applications should be directed to TI through --
-- a local SC sales office. --
-- --
-- In order to minimize risks associated with the customer's applications, --
-- adequate design and operating safeguards should be provided by the --
-- customer to minimize inherent or procedural hazards. --
-- --
-- TI assumes no liability for applications assistance, customer product --
-- design, software performance, or infringement of patents or services --
-- described herein. Nor does TI warrant or represent that any license, --
-- either express or implied, is granted under any patent right, copyright, --
-- mask work right, or other intellectual property right of TI covering or --
-- relating to any combination, machine, or process in which such --
-- semiconductor products or services might be or are used. --
-- --
-- Copyright (c) 1995, Texas Instruments Incorporated --
--
--Technical Note for Texas Instruments TI320C4x Devices
--
--Incorrect Operation of JTAG Logic during Capture-DR state
--
--Overview:
--
--The TI320C4x devices exhibit a non-compliant behavior during the Capture-DR state. This behavior --causes the capturing of cell data to occur 1/2 TCK clock later than the JTAG specification requires.
--
--Detailed Description:
--
--When performing a Data Register (DR) scan of the boundary register the Test Access Port (TAP) of each --device passes through a state called Capture-DR. During the rising edge of TCK while the device is in --this state the values of all the boundary register cells must be loaded with a value. This value will be --scanned out during the Shift-DR states. For input and bi-directional input pins the value of the device's --pin is latched into the cell. The TI320C4x devices perform the DR scan correctly.
--
--The problem is that the latching of input data occurs 1/2 TCK later than required. Instead of latching on --the rising edge in the Capture-DR state it latches on the falling edge in the Shift-DR state.
--
--Work Around:
--
--This behavior must be considered during development of device and board level tests. The tester must --maintain the input pins value for an additional 1/2 TCK. This usually is not a problem.
--
--For board level JTAG interconnect tests this will not present any problems. The input pin values for the --TI320C4x will be provided by output pins of other devices. These devices will be setup during the prior --Update-DR state and remain until the next Update-DR state.
--This covers the 1/2 TCK late capture problem.
--
--Device or in-circuit testing could be a problem if the tester does not maintain input pin values past the --Capture-DR state. If the tester does not maintain the input values then the test program must be modified.
--
-------------------------------------------------------------------------------
entity tms320c44 is
generic (PHYSICAL_PIN_MAP : string := "PDB");
port (A:out bit_vector(0 to 23);
AE_NEG:in bit;
C1D:inout bit_vector(0 to 7);
C2D:inout bit_vector(0 to 7);
C4D:inout bit_vector(0 to 7);
C5D:inout bit_vector(0 to 7);
CACK1_NEG:inout bit;
CACK2_NEG:inout bit;
CACK4_NEG:inout bit;
CACK5_NEG:inout bit;
CDIR1:out bit;
CDIR2:out bit;
CDIR4:out bit;
CDIR5:out bit;
CE_NEG:in bit_vector(0 to 1);
CRDY1_NEG:inout bit;
CRDY2_NEG:inout bit;
CRDY4_NEG:inout bit;
CRDY5_NEG:inout bit;
CREQ1_NEG:inout bit;
CREQ2_NEG:inout bit;
CREQ4_NEG:inout bit;
CREQ5_NEG:inout bit;
CSTRB1_NEG:inout bit;
CSTRB2_NEG:inout bit;
CSTRB4_NEG:inout bit;
CSTRB5_NEG:inout bit;
CVSS:linkage bit_vector(1 to 17);
D:inout bit_vector(0 to 31);
DE_NEG:in bit;
DVDD:linkage bit_vector(1 to 22);
DVSS:linkage bit_vector(1 to 17);
EMU:inout bit_vector(0 to 1);
H1:out bit;
H3:out bit;
IACK_NEG:out bit;
IIOF:inout bit_vector(0 to 3);
IVSS:linkage bit_vector(1 to 6);
LA:out bit_vector(0 to 23);
LAE_NEG:in bit;
LCE_NEG:in bit_vector(0 to 1);
LD:inout bit_vector(0 to 31);
LDE_NEG:in bit;
LLOCK_NEG:out bit;
LOCK_NEG:out bit;
LPAGE:out bit_vector(0 to 1);
LRDY_NEG:in bit_vector(0 to 1);
LR_W_NEG:out bit_vector(0 to 1);
LSTAT:out bit_vector(0 to 3);
LSTRB_NEG:out bit_vector(0 to 1);
NMI_NEG:in bit;
PAGE:out bit_vector(0 to 1);
RDY_NEG:in bit_vector(0 to 1);
RESETLOC:in bit_vector(0 to 1);
RESET_NEG:in bit;
ROMEN:in bit;
R_W_NEG:out bit_vector(0 to 1);
STAT:out bit_vector(0 to 3);
STRB_NEG:out bit_vector(0 to 1);
TCK:in bit;
TCLK:inout bit_vector(0 to 1);
TDO:out bit;
TDI:in bit;
TMS:in bit;
TRST_NEG:in bit;
VDDL:linkage bit_vector(1 to 4);
VSSL:linkage bit_vector(1 to 4);
VSUBS:linkage bit;
X1:linkage bit;
X2CLKIN:linkage bit);
use STD_1149_1_1990.all; -- Get standard attributes and definitions
use TI_BIDIR.all; -- Get C4X BIDIR cell attributes
-- This package type TI_BIDIR must be available to your toolset.
-- In most cases this text should be placed in a separate file that
-- is referenced via the 'use' statement above.
--
-- package TI_BIDIR is
-- use STD_1149_1_1990.all; -- Comment out for ASSET tool
-- constant BC_BIDIR : CELL_INFO;
-- end TI_BIDIR;
--
-- package body TI_BIDIR is
-- constant BC_BIDIR : CELL_INFO :=
-- ((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, PI),
-- (BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI),
-- (BIDIR_IN, INTEST, PI), (BIDIR_OUT, INTEST, PI));
-- end TI_BIDIR;
attribute PIN_MAP of tms320c44 : entity is PHYSICAL_PIN_MAP;
constant PDB : PIN_MAP_STRING :=
" A:(149,150,151,152,154,155,156,157,158,159,160,162, "&
" 165,166,167,168,169,170,171,174,175,176,177,178), "&
" AE_NEG:57, "&
" C1D:(269,271,274,276,278,280,283,286), "&
" C2D:(26,27,29,30,31,32,33,34), "&
" C4D:(87,88,90,92,94,97,99,100), "&
" C5D:(37,39,41,42,45,46,47,48), "&
" CACK1_NEG:13, CACK2_NEG:21, CACK4_NEG:73, CACK5_NEG:50, "&
" CDIR1:19, CDIR2:18, CDIR4:16, CDIR5:15, "&
" CRDY1_NEG:8, CRDY2_NEG:23, CRDY4_NEG:85, CRDY5_NEG:53, "&
" CREQ1_NEG:11, CREQ2_NEG:20, CREQ4_NEG:71, CREQ5_NEG:49, "&
" CSTRB1_NEG:14,CSTRB2_NEG:22,CSTRB4_NEG:84,CSTRB5_NEG:52, "&
" CE_NEG:(93,101), "&
" CVSS:(148,134,117,102,78,62,44,25,7, "&
" 282,262,247,230,218,202,182,164), "&
" D:(104,105,106,107,108,110,111,112,113,114,115,118,120, "&
" 122,123,125,127,128,129,130,131,132,135,136,137,138, "&
" 140,141,142,143,144,145), "&
" DE_NEG:89, "&
" DVDD:(139,124,109,96,83,67,51,40,28,17,302,288, "&
" 272,256,244,236,223,207,188,172,161,153), "&
" DVSS:(147,133,116,103,79,63,43,24,6,281, "&
" 261,246,231,217,201,179,163), "&
" EMU:(75,74), "&
" H1:266, H3:268, IACK_NEG:270, "&
" IIOF:(10,9,5,4), "&
" IVSS:(126,65,35,2,285,209), "&
" LA:(232,233,234,235,237,238,239,240,241,242,243,245, "&
" 248,249,250,251,252,253,254,255,257,258,259,260), "&
" LAE_NEG:287, LCE_NEG:(297,292), "&
" LD:(183,184,185,186,187,192,194,195,196,197,200,203,204,205,"&
" 206,208,210,211,212,213,215,216,219,220,221,222,224,225,"&
" 226,227,228,229), "&
" LDE_NEG:291, "&
" LLOCK_NEG:284, LOCK_NEG:95, "&
" LPAGE:(299,294), LRDY_NEG:(298,293), "&
" LR_W_NEG:(300,295), LSTAT:(279,277,275,273), "&
" LSTRB_NEG:(301,296), NMI_NEG:3, "&
" PAGE:(60,72), RDY_NEG:(91,98), "&
" RESETLOC:(55,56), RESET_NEG:54, "&
" ROMEN:12, R_W_NEG:(59,70), "&
" STAT:(68,66,64,61), "&
" STRB_NEG:(58,69), "&
" TCLK:(290,289), "&
" VSUBS:146, X1:264, "&
" X2CLKIN:263, "&
" TCK:86, TDO:80, TDI:76, TMS:82, TRST_NEG:81, "&
" VDDL:(38,121,191,267), "&
" VSSL:(36,119,193,265) ";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of TRST_NEG : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (20.00e6, BOTH);
attribute INSTRUCTION_LENGTH of tms320c44 : entity is 8;
attribute INSTRUCTION_OPCODE of tms320c44 : entity is
"EXTEST (00000000), "&
"BYPASS (11111111), "&
"SAMPLE (00000010), "&
"HIGHZ (00000110), "&
"PRIVATE1 (00000011), "& -- Use of PRIVATE opcodes could
"PRIVATE2 (00100000), "& -- cause the device to operate
"PRIVATE3 (00100001), "& -- in an unexpected manner.
"PRIVATE4 (00100010), "&
"PRIVATE5 (00100011), "&
"PRIVATE6 (00100100), "&
"PRIVATE7 (00100101), "&
"PRIVATE8 (00100110), "&
"PRIVATE9 (00100111), "&
"PRIVATE10 (00101000), "&
"PRIVATE11 (00101001) ";
attribute INSTRUCTION_CAPTURE of tms320c44 : entity is "0XXXXX01";
-- Instruction capture value is dependent upon the
-- silicon revision level (PG revision).
-- PG-2 (0011XX01)
attribute INSTRUCTION_DISABLE of tms320c44 : entity is "HIGHZ";
attribute INSTRUCTION_PRIVATE of tms320c44 : entity is
"PRIVATE1, PRIVATE2, PRIVATE3, "&
"PRIVATE4, PRIVATE5, PRIVATE6, "&
"PRIVATE7, PRIVATE8, PRIVATE9, "&
"PRIVATE10, PRIVATE11 ";
attribute REGISTER_ACCESS of tms320c44 : entity is
"BOUNDARY (EXTEST, SAMPLE), "&
"BYPASS (BYPASS, HIGHZ) ";
attribute BOUNDARY_CELLS of tms320c44 : entity is "BC_1, BC_BIDIR";
attribute BOUNDARY_LENGTH of tms320c44 : entity is 262;
attribute BOUNDARY_REGISTER of tms320c44 : entity is
"0 (BC_1 , * ,internal, 1 ), "&
"1 (BC_BIDIR, C4D(7) , bidir , X, 9, 1, Z), "&
"2 (BC_BIDIR, C4D(6) , bidir , X, 9, 1, Z), "&
"3 (BC_BIDIR, C4D(5) , bidir , X, 9, 1, Z), "&
"4 (BC_BIDIR, C4D(4) , bidir , X, 9, 1, Z), "&
"5 (BC_BIDIR, C4D(3) , bidir , X, 9, 1, Z), "&
"6 (BC_BIDIR, C4D(2) , bidir , X, 9, 1, Z), "&
"7 (BC_BIDIR, C4D(1) , bidir , X, 9, 1, Z), "&
"8 (BC_BIDIR, C4D(0) , bidir , X, 9, 1, Z), "&
"9 (BC_1 , * , control, 1 ), "&
"10 (BC_1 , * , control, 1 ), "&
"11 (BC_BIDIR, CRDY4_NEG , bidir , X, 10, 1, Z), "&
"12 (BC_1 , * , control, 1 ), "&
"13 (BC_BIDIR, CSTRB4_NEG , bidir , X, 12, 1, Z), "&
"14 (BC_1 , * , control, 1 ), "&
"15 (BC_BIDIR, EMU(0) , bidir , X, 14, 1, Z), "&
"16 (BC_1 , * , control, 1 ), "&
"17 (BC_BIDIR, EMU(1) , bidir , X, 16, 1, Z), "&
"18 (BC_1 , * , control, 1 ), "&
"19 (BC_BIDIR, CACK4_NEG , bidir , X, 18, 1, Z), "&
"20 (BC_1 , * , control, 1 ), "&
"21 (BC_1 , PAGE(1) , output3, X, 20, 1, Z), "&
"22 (BC_1 , * , control, 1 ), "&
"23 (BC_BIDIR, CREQ4_NEG , bidir , X, 22, 1, Z), "&
"24 (BC_1 , * , control, 1 ), "&
"25 (BC_1 , R_W_NEG(1) , output3, X, 24, 1, Z), "&
"26 (BC_1 , * , control, 1 ), "&
"27 (BC_1 , STRB_NEG(1) , output3, X, 26, 1, Z), "&
"28 (BC_1 , STAT(0) , output3, X, 32, 1, Z), "&
"29 (BC_1 , STAT(1) , output3, X, 32, 1, Z), "&
"30 (BC_1 , STAT(2) , output3, X, 32, 1, Z), "&
"31 (BC_1 , STAT(3) , output3, X, 32, 1, Z), "&
"32 (BC_1 , * , control, 1 ), "&
"33 (BC_1 , * , control, 1 ), "&
"34 (BC_1 , PAGE(0) , output3, X, 33, 1, Z), "&
"35 (BC_1 , * , control, 1 ), "&
"36 (BC_1 , R_W_NEG(0) , output3, X, 35, 1, Z), "&
"37 (BC_1 , * , control, 1 ), "&
"38 (BC_1 , STRB_NEG(0) , output3, X, 37, 1, Z), "&
"39 (BC_1 , AE_NEG , input , X ), "&
"40 (BC_1 , RESETLOC(1) , input , X ), "&
"41 (BC_1 , RESETLOC(0) , input , X ), "&
"42 (BC_1 , RESET_NEG , input , X ), "&
"43 (BC_1 , * , control, 1 ), "&
"44 (BC_BIDIR, CRDY5_NEG , bidir , X, 43, 1, Z), "&
"45 (BC_1 , * , control, 1 ), "&
"46 (BC_BIDIR, CSTRB5_NEG , bidir , X, 45, 1, Z), "&
"47 (BC_1 , * , control, 1 ), "&
"48 (BC_BIDIR, CACK5_NEG , bidir , X, 47, 1, Z), "&
"49 (BC_1 , * , control, 1 ), "&
"50 (BC_BIDIR, CREQ5_NEG , bidir , X, 49, 1, Z), "&
"51 (BC_BIDIR, C5D(7) , bidir , X, 59, 1, Z), "&
"52 (BC_BIDIR, C5D(6) , bidir , X, 59, 1, Z), "&
"53 (BC_BIDIR, C5D(5) , bidir , X, 59, 1, Z), "&
"54 (BC_BIDIR, C5D(4) , bidir , X, 59, 1, Z), "&
"55 (BC_BIDIR, C5D(3) , bidir , X, 59, 1, Z), "&
"56 (BC_BIDIR, C5D(2) , bidir , X, 59, 1, Z), "&
"57 (BC_BIDIR, C5D(1) , bidir , X, 59, 1, Z), "&
"58 (BC_BIDIR, C5D(0) , bidir , X, 59, 1, Z), "&
"59 (BC_1 , * , control, 1 ), "&
"60 (BC_BIDIR, C2D(7) , bidir , X, 68, 1, Z), "&
"61 (BC_BIDIR, C2D(6) , bidir , X, 68, 1, Z), "&
"62 (BC_BIDIR, C2D(5) , bidir , X, 68, 1, Z), "&
"63 (BC_BIDIR, C2D(4) , bidir , X, 68, 1, Z), "&
"64 (BC_BIDIR, C2D(3) , bidir , X, 68, 1, Z), "&
"65 (BC_BIDIR, C2D(2) , bidir , X, 68, 1, Z), "&
"66 (BC_BIDIR, C2D(1) , bidir , X, 68, 1, Z), "&
"67 (BC_BIDIR, C2D(0) , bidir , X, 68, 1, Z), "&
"68 (BC_1 , * , control, 1 ), "&
"69 (BC_1 , * , control, 1 ), "&
"70 (BC_BIDIR, CRDY2_NEG , bidir , X, 69, 1, Z), "&
"71 (BC_1 , * , control, 1 ), "&
"72 (BC_BIDIR, CSTRB2_NEG , bidir , X, 71, 1, Z), "&
"73 (BC_1 , * , control, 1 ), "&
"74 (BC_BIDIR, CACK2_NEG , bidir , X, 73, 1, Z), "&
"75 (BC_1 , * , control, 1 ), "&
"76 (BC_BIDIR, CREQ2_NEG , bidir , X, 75, 1, Z), "&
"77 (BC_1 , CDIR1 , output3, X, 137, 1, Z), "&
"78 (BC_1 , CDIR2 , output3, X, 137, 1, Z), "&
"79 (BC_1 , CDIR4 , output3, X, 137, 1, Z), "&
"80 (BC_1 , CDIR5 , output3, X, 137, 1, Z), "&
"81 (BC_1 , * , control, 1 ), "&
"82 (BC_BIDIR, CSTRB1_NEG , bidir , X, 81, 1, Z), "&
"83 (BC_1 , * , control, 1 ), "&
"84 (BC_BIDIR, CACK1_NEG , bidir , X, 83, 1, Z), "&
"85 (BC_1 , ROMEN , input , X ), "&
"86 (BC_1 , * , control, 1 ), "&
"87 (BC_BIDIR, CREQ1_NEG , bidir , X, 86, 1, Z), "&
"88 (BC_1 , * , control, 1 ), "&
"89 (BC_BIDIR, IIOF(0) , bidir , X, 88, 1, Z), "&
"90 (BC_1 , * , control, 1 ), "&
"91 (BC_BIDIR, IIOF(1) , bidir , X, 90, 1, Z), "&
"92 (BC_1 , * , control, 1 ), "&
"93 (BC_BIDIR, CRDY1_NEG , bidir , X, 92, 1, Z), "&
"94 (BC_1 , * , control, 1 ), "&
"95 (BC_BIDIR, IIOF(2) , bidir , X, 94, 1, Z), "&
"96 (BC_1 , * , control, 1 ), "&
"97 (BC_BIDIR, IIOF(3) , bidir , X, 96, 1, Z), "&
"98 (BC_1 , NMI_NEG , input , X ), "&
"99 (BC_1 , * , control, 1 ), "&
"100 (BC_1 , LSTRB_NEG(0), output3, X, 99, 1, Z), "&
"101 (BC_1 , * , control, 1 ), "&
"102 (BC_1 , LR_W_NEG(0) , output3, X, 101, 1, Z), "&
"103 (BC_1 , * , control, 1 ), "&
"104 (BC_1 , LPAGE(0) , output3, X, 103, 1, Z), "&
"105 (BC_1 , LRDY_NEG(0) , input , X ), "&
"106 (BC_1 , LCE_NEG(0) , input , X ), "&
"107 (BC_1 , * , control, 1 ), "&
"108 (BC_1 , LSTRB_NEG(1), output3, X, 107, 1, Z), "&
"109 (BC_1 , * , control, 1 ), "&
"110 (BC_1 , LR_W_NEG(1) , output3, X, 109, 1, Z), "&
"111 (BC_1 , * , control, 1 ), "&
"112 (BC_1 , LPAGE(1) , output3, X, 111, 1, Z), "&
"113 (BC_1 , LRDY_NEG(1) , input , X ), "&
"114 (BC_1 , LCE_NEG(1) , input , X ), "&
"115 (BC_1 , LDE_NEG , input , X ), "&
"116 (BC_1 , * , control, 1 ), "&
"117 (BC_BIDIR, TCLK(0) , bidir , X, 116, 1, Z), "&
"118 (BC_1 , * , control, 1 ), "&
"119 (BC_BIDIR, TCLK(1) , bidir , X, 118, 1, Z), "&
"120 (BC_1 , LAE_NEG , input , X ), "&
"121 (BC_BIDIR, C1D(7) , bidir , X, 129, 1, Z), "&
"122 (BC_BIDIR, C1D(6) , bidir , X, 129, 1, Z), "&
"123 (BC_BIDIR, C1D(5) , bidir , X, 129, 1, Z), "&
"124 (BC_BIDIR, C1D(4) , bidir , X, 129, 1, Z), "&
"125 (BC_BIDIR, C1D(3) , bidir , X, 129, 1, Z), "&
"126 (BC_BIDIR, C1D(2) , bidir , X, 129, 1, Z), "&
"127 (BC_BIDIR, C1D(1) , bidir , X, 129, 1, Z), "&
"128 (BC_BIDIR, C1D(0) , bidir , X, 129, 1, Z), "&
"129 (BC_1 , * , control, 1 ), "&
"130 (BC_1 , LLOCK_NEG , output3, X, 135, 1, Z), "&
"131 (BC_1 , LSTAT(0) , output3, X, 135, 1, Z), "&
"132 (BC_1 , LSTAT(1) , output3, X, 135, 1, Z), "&
"133 (BC_1 , LSTAT(2) , output3, X, 135, 1, Z), "&
"134 (BC_1 , LSTAT(3) , output3, X, 135, 1, Z), "&
"135 (BC_1 , * , control, 1 ), "&
"136 (BC_1 , IACK_NEG , output3, X, 137, 1, Z), "&
"137 (BC_1 , * , control, 1 ), "&
"138 (BC_1 , H3 , output3, X, 137, 1, Z), "&
"139 (BC_1 , H1 , output3, X, 137, 1, Z), "&
"140 (BC_1 , LA(23) , output3, X, 164, 1, Z), "&
"141 (BC_1 , LA(22) , output3, X, 164, 1, Z), "&
"142 (BC_1 , LA(21) , output3, X, 164, 1, Z), "&
"143 (BC_1 , LA(20) , output3, X, 164, 1, Z), "&
"144 (BC_1 , LA(19) , output3, X, 164, 1, Z), "&
"145 (BC_1 , LA(18) , output3, X, 164, 1, Z), "&
"146 (BC_1 , LA(17) , output3, X, 164, 1, Z), "&
"147 (BC_1 , LA(16) , output3, X, 164, 1, Z), "&
"148 (BC_1 , LA(15) , output3, X, 164, 1, Z), "&
"149 (BC_1 , LA(14) , output3, X, 164, 1, Z), "&
"150 (BC_1 , LA(13) , output3, X, 164, 1, Z), "&
"151 (BC_1 , LA(12) , output3, X, 164, 1, Z), "&
"152 (BC_1 , LA(11) , output3, X, 164, 1, Z), "&
"153 (BC_1 , LA(10) , output3, X, 164, 1, Z), "&
"154 (BC_1 , LA(9) , output3, X, 164, 1, Z), "&
"155 (BC_1 , LA(8) , output3, X, 164, 1, Z), "&
"156 (BC_1 , LA(7) , output3, X, 164, 1, Z), "&
"157 (BC_1 , LA(6) , output3, X, 164, 1, Z), "&
"158 (BC_1 , LA(5) , output3, X, 164, 1, Z), "&
"159 (BC_1 , LA(4) , output3, X, 164, 1, Z), "&
"160 (BC_1 , LA(3) , output3, X, 164, 1, Z), "&
"161 (BC_1 , LA(2) , output3, X, 164, 1, Z), "&
"162 (BC_1 , LA(1) , output3, X, 164, 1, Z), "&
"163 (BC_1 , LA(0) , output3, X, 164, 1, Z), "&
"164 (BC_1 , * , control, 1 ), "&
"165 (BC_BIDIR, LD(31) , bidir , X, 197, 1, Z), "&
"166 (BC_BIDIR, LD(30) , bidir , X, 197, 1, Z), "&
"167 (BC_BIDIR, LD(29) , bidir , X, 197, 1, Z), "&
"168 (BC_BIDIR, LD(28) , bidir , X, 197, 1, Z), "&
"169 (BC_BIDIR, LD(27) , bidir , X, 197, 1, Z), "&
"170 (BC_BIDIR, LD(26) , bidir , X, 197, 1, Z), "&
"171 (BC_BIDIR, LD(25) , bidir , X, 197, 1, Z), "&
"172 (BC_BIDIR, LD(24) , bidir , X, 197, 1, Z), "&
"173 (BC_BIDIR, LD(23) , bidir , X, 197, 1, Z), "&
"174 (BC_BIDIR, LD(22) , bidir , X, 197, 1, Z), "&
"175 (BC_BIDIR, LD(21) , bidir , X, 197, 1, Z), "&
"176 (BC_BIDIR, LD(20) , bidir , X, 197, 1, Z), "&
"177 (BC_BIDIR, LD(19) , bidir , X, 197, 1, Z), "&
"178 (BC_BIDIR, LD(18) , bidir , X, 197, 1, Z), "&
"179 (BC_BIDIR, LD(17) , bidir , X, 197, 1, Z), "&
"180 (BC_BIDIR, LD(16) , bidir , X, 197, 1, Z), "&
"181 (BC_BIDIR, LD(15) , bidir , X, 197, 1, Z), "&
"182 (BC_BIDIR, LD(14) , bidir , X, 197, 1, Z), "&
"183 (BC_BIDIR, LD(13) , bidir , X, 197, 1, Z), "&
"184 (BC_BIDIR, LD(12) , bidir , X, 197, 1, Z), "&
"185 (BC_BIDIR, LD(11) , bidir , X, 197, 1, Z), "&
"186 (BC_BIDIR, LD(10) , bidir , X, 197, 1, Z), "&
"187 (BC_BIDIR, LD(9) , bidir , X, 197, 1, Z), "&
"188 (BC_BIDIR, LD(8) , bidir , X, 197, 1, Z), "&
"189 (BC_BIDIR, LD(7) , bidir , X, 197, 1, Z), "&
"190 (BC_BIDIR, LD(6) , bidir , X, 197, 1, Z), "&
"191 (BC_BIDIR, LD(5) , bidir , X, 197, 1, Z), "&
"192 (BC_BIDIR, LD(4) , bidir , X, 197, 1, Z), "&
"193 (BC_BIDIR, LD(3) , bidir , X, 197, 1, Z), "&
"194 (BC_BIDIR, LD(2) , bidir , X, 197, 1, Z), "&
"195 (BC_BIDIR, LD(1) , bidir , X, 197, 1, Z), "&
"196 (BC_BIDIR, LD(0) , bidir , X, 197, 1, Z), "&
"197 (BC_1 , * , control, 1 ), "&
"198 (BC_1 , A(23) , output3, X, 222, 1, Z), "&
"199 (BC_1 , A(22) , output3, X, 222, 1, Z), "&
"200 (BC_1 , A(21) , output3, X, 222, 1, Z), "&
"201 (BC_1 , A(20) , output3, X, 222, 1, Z), "&
"202 (BC_1 , A(19) , output3, X, 222, 1, Z), "&
"203 (BC_1 , A(18) , output3, X, 222, 1, Z), "&
"204 (BC_1 , A(17) , output3, X, 222, 1, Z), "&
"205 (BC_1 , A(16) , output3, X, 222, 1, Z), "&
"206 (BC_1 , A(15) , output3, X, 222, 1, Z), "&
"207 (BC_1 , A(14) , output3, X, 222, 1, Z), "&
"208 (BC_1 , A(13) , output3, X, 222, 1, Z), "&
"209 (BC_1 , A(12) , output3, X, 222, 1, Z), "&
"210 (BC_1 , A(11) , output3, X, 222, 1, Z), "&
"211 (BC_1 , A(10) , output3, X, 222, 1, Z), "&
"212 (BC_1 , A(9) , output3, X, 222, 1, Z), "&
"213 (BC_1 , A(8) , output3, X, 222, 1, Z), "&
"214 (BC_1 , A(7) , output3, X, 222, 1, Z), "&
"215 (BC_1 , A(6) , output3, X, 222, 1, Z), "&
"216 (BC_1 , A(5) , output3, X, 222, 1, Z), "&
"217 (BC_1 , A(4) , output3, X, 222, 1, Z), "&
"218 (BC_1 , A(3) , output3, X, 222, 1, Z), "&
"219 (BC_1 , A(2) , output3, X, 222, 1, Z), "&
"220 (BC_1 , A(1) , output3, X, 222, 1, Z), "&
"221 (BC_1 , A(0) , output3, X, 222, 1, Z), "&
"222 (BC_1 , * , control, 1 ), "&
"223 (BC_BIDIR, D(31) , bidir , X, 255, 1, Z), "&
"224 (BC_BIDIR, D(30) , bidir , X, 255, 1, Z), "&
"225 (BC_BIDIR, D(29) , bidir , X, 255, 1, Z), "&
"226 (BC_BIDIR, D(28) , bidir , X, 255, 1, Z), "&
"227 (BC_BIDIR, D(27) , bidir , X, 255, 1, Z), "&
"228 (BC_BIDIR, D(26) , bidir , X, 255, 1, Z), "&
"229 (BC_BIDIR, D(25) , bidir , X, 255, 1, Z), "&
"230 (BC_BIDIR, D(24) , bidir , X, 255, 1, Z), "&
"231 (BC_BIDIR, D(23) , bidir , X, 255, 1, Z), "&
"232 (BC_BIDIR, D(22) , bidir , X, 255, 1, Z), "&
"233 (BC_BIDIR, D(21) , bidir , X, 255, 1, Z), "&
"234 (BC_BIDIR, D(20) , bidir , X, 255, 1, Z), "&
"235 (BC_BIDIR, D(19) , bidir , X, 255, 1, Z), "&
"236 (BC_BIDIR, D(18) , bidir , X, 255, 1, Z), "&
"237 (BC_BIDIR, D(17) , bidir , X, 255, 1, Z), "&
"238 (BC_BIDIR, D(16) , bidir , X, 255, 1, Z), "&
"239 (BC_BIDIR, D(15) , bidir , X, 255, 1, Z), "&
"240 (BC_BIDIR, D(14) , bidir , X, 255, 1, Z), "&
"241 (BC_BIDIR, D(13) , bidir , X, 255, 1, Z), "&
"242 (BC_BIDIR, D(12) , bidir , X, 255, 1, Z), "&
"243 (BC_BIDIR, D(11) , bidir , X, 255, 1, Z), "&
"244 (BC_BIDIR, D(10) , bidir , X, 255, 1, Z), "&
"245 (BC_BIDIR, D(9) , bidir , X, 255, 1, Z), "&
"246 (BC_BIDIR, D(8) , bidir , X, 255, 1, Z), "&
"247 (BC_BIDIR, D(7) , bidir , X, 255, 1, Z), "&
"248 (BC_BIDIR, D(6) , bidir , X, 255, 1, Z), "&
"249 (BC_BIDIR, D(5) , bidir , X, 255, 1, Z), "&
"250 (BC_BIDIR, D(4) , bidir , X, 255, 1, Z), "&
"251 (BC_BIDIR, D(3) , bidir , X, 255, 1, Z), "&
"252 (BC_BIDIR, D(2) , bidir , X, 255, 1, Z), "&
"253 (BC_BIDIR, D(1) , bidir , X, 255, 1, Z), "&
"254 (BC_BIDIR, D(0) , bidir , X, 255, 1, Z), "&
"255 (BC_1 , * , control, 1 ), "&
"256 (BC_1 , CE_NEG(1) , input , X ), "&
"257 (BC_1 , RDY_NEG(1) , input , X ), "&
"258 (BC_1 , LOCK_NEG , output3, X, 32, 1, Z), "&
"259 (BC_1 , CE_NEG(0) , input , X ), "&
"260 (BC_1 , RDY_NEG(0) , input , X ), "&
"261 (BC_1 , DE_NEG , input , X ) ";
end tms320c44;
